Re: [tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Sebastian Huber

On 29/06/2022 17:54, Kinsey Moore wrote:

On 6/29/2022 04:34, Sebastian Huber wrote:

On 29/06/2022 11:20, Chris Johns wrote:


On 29 Jun 2022, at 4:42 pm, Sebastian Huber 
 wrote:


On 29/06/2022 08:40, Sebastian Huber wrote:
Report the same data in JSON and YAML reports.  Do not report 
redundant

information.
Update 4671.


This patch changes the JSON reports. Are there already consumers for 
the JSON reports so that we have to be backward compatible?


Could compatibility be added back in if this proves to be an issue?

I am wondering if that could be considered if comparability becomes 
an issue.


The JSON report was added by:

commit 5fcaf843bdb491e2da14dc1af61806ac6d20bae5
Author: Kinsey Moore 
Date:   Wed Aug 21 16:34:12 2019 +

    Add JSON log generation

    Add log formatter hooks and JSON log formatter to the test 
infrastructure

    for consumption by automated processes or report generators.


I am not sure if these automated processes or report generators 
already exist.


The existing attribute names are quite inconsistent, for example 
"Command Line", "passed_count", "wrong-version_count". I would use 
lower case only with "-" as a separator. The JSON report should 
contain all information of a test run.


The new report looks like this:

{
    "command-line": [
    "/opt/rtems/6/bin/rtems-test",
    "--rtems-bsp=xilinx_zynq_a9_qemu",
    "--report-format=json",
    "--report-path=report",
    "build/arm/xilinx_zynq_a9_qemu/testsuites/samples/"
    ],
    "end-time": "2022-06-28T14:08:47.595131",
    "host": "Linux-5.3.18-150300.59.76-default-x86_64-with-glibc2.3.4 
(Linux lupus 5.3.18-150300.59.76-default #1 SMP Thu Jun 16 04:23:47 
UTC 2022 (2cc2ade) x86_64 x86_64)",

    "python": "3.6.15 (default, Sep 23 2021, 15:41:43) [GCC]",
    "reports": [
    {
    "arch": "arm",
    "bsp": "xilinx_zynq_a9_qemu",
    "command-line": "qemu-system-arm -no-reboot -nographic 
-net none -serial null -serial mon:stdio -M xilinx-zynq-a9 -m 256M 
-kernel build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",

    "end-time": "2022-06-28T12:08:48.161691+00:00",
    "executable": 
"build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",
    "executable-sha512": 
"413bc8a506053c95a0e1d93942cce9fd0d653f7b3cde42623085ce147aea324f4baeff7ce0102008322fb1341bc2b38defd3925a64144e47e13cc5f32185bf78", 


    "output": [
    "qemu-system-arm: warning: nic cadence_gem.0 has no 
peer",
    "qemu-system-arm: warning: nic cadence_gem.1 has no 
peer",

    "",
    "",
    "*** BEGIN OF TEST CONSTRUCTOR/DESTRUCTOR ***",
    "*** TEST VERSION: 
6.0.0.3302b72754df5f37214e86dd68522189857772c7",

    "*** TEST STATE: EXPECTED_PASS",
    "*** TEST BUILD: RTEMS_DEBUG RTEMS_POSIX_API",
    "*** TEST TOOLS: 12.1.1 20220622 (RTEMS 6, RSB 
bf3f66c29a046ec1c5029e4f919b525947df6245, Newlib e7ffbdb)",
    "GLOBAL: Hey I'm in base class constructor number 1 
for 0x214474.",
    "GLOBAL: Hey I'm in base class constructor number 2 
for 0x214480.",
    "GLOBAL: Hey I'm in derived class constructor number 3 
for 0x214480.",
    "LOCAL: Hey I'm in base class constructor number 4 for 
0x228864.",

    ...


"WRoZqtoO3A8BDJkUSmRGNOBaaHW1UwAAoQGQAQwAAABck8Bx+K/znDWWTEcA", 



"AKEB2P///wEMVP6TRqQZY+4+srvAAAChAfD///8BDMXOxS0Rhzqx6Old2wAA", 



"oQH4AQwAAADJyx1ZCnZ4l+m/XkMAAKEB0P///wEMN3+9YAwMW8gTHIoPAACh", 



"Adj///8BDBtxsj3zXZF/+UqzfAAAoQHwAQwwMDMeE7mphT6yu8AAAKEB", 


"8P///wEMr2rLCcwzVnf5SrN8AAChAfD///8A",
    "*** END OF GCOV INFO BASE64 ***",
    ""
    ],
    "result": "passed",
    "start-time": "2022-06-28T12:08:47.721822+00:00"
    }
    ],
    "start-time": "2022-06-28T14:08:47.595131"
}

There are no publicly available report generators for the existing 
format, but I do have one I use to generate STR documents for delivery 
using mustache templates and further processing. The existing format was 
designed to be easily consumable by that and other simple templating 
mechanisms by providing structure (test subsets) and precalculating 
values that would otherwise be implicit in the data. Changes to the 
names of various fields should be easy to accommodate, but a more 
significant restructure is going to present problems continuing with any 
simple templating mechanism and would instead require a more 
comprehensive document generator for all cases.


I'm not necessarily opposed to this change as it significantly 
simplifies the report generation code, but it will definitely require 
some rework in my processes. I can't speak for any users of the YAML 
report format, but it was committed over a year and a half ago.


Ok, I will bring back the 

Re: [PATCH] Proposal for new GPIO API and example implementation for STM32F4 BSP

2022-06-29 Thread oss

Hello Duc,

Am 29.06.22 um 13:46 schrieb Duc Doan:

Hello Christian,

I have been writing the complete API and also implementation for
STM32F4. A patch is coming soon.

On Mon, 2022-06-27 at 13:33 +0200, Christian MAUDERER wrote:

Regarding pin groups: I think it's worth to think a bit about how the
structure could be extended. You don't have to implement it right now
but you should have a plan what could be possible.

  From my point of view, there are two directions how that could be
implemented: Masks or lists.

If you have a mask (like 0x00108 for pin 3 and pin 8) it has the
advantage that it works fast for most controllers. Difficult is that
it
adds a limit to the maximum pin number depending on the size of the
mask. With that it works only for a few hardware models.

The other option is to add a list of pins instead of a mask. That
makes
it inefficient because most controllers will have to collect pins
into
masks and work with that.

Hm. Difficult. Maybe someone else has a good idea for that in the
next
few days.


I am thinking of later adding separate functions that handle pin
groups. I think it's quite hard to integrate into current functions
because of using virtual pin.

I have an assumption that needs confirmation: all microcontrollers (or
most of them) have register size equal to word size, and pin masks
should be at word size. Is that assumption correct? If so, maybe we can
just use unsigned int (or uintptr_t) for pin masks?


Not sure whether some 64bit controllers don't use 32bit registers. So 
it's not generally true that registers have the word size. It should 
work for most controllers (at least the ones I worked with) but I 
wouldn't guarantee it.


Beneath that: You most likely know my argument already: What about I2C 
or SPI chips. They can use register sizes that are not the same as the 
controllers register size (even if they are most likely only 8 bit most 
of the time at least for I2C).


Best regards

Christian



Best,

Duc Doan



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Re: [tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Kinsey Moore

On 6/29/2022 04:34, Sebastian Huber wrote:

On 29/06/2022 11:20, Chris Johns wrote:


On 29 Jun 2022, at 4:42 pm, Sebastian Huber 
 wrote:


On 29/06/2022 08:40, Sebastian Huber wrote:
Report the same data in JSON and YAML reports.  Do not report 
redundant

information.
Update 4671.


This patch changes the JSON reports. Are there already consumers for 
the JSON reports so that we have to be backward compatible?


Could compatibility be added back in if this proves to be an issue?

I am wondering if that could be considered if comparability becomes 
an issue.


The JSON report was added by:

commit 5fcaf843bdb491e2da14dc1af61806ac6d20bae5
Author: Kinsey Moore 
Date:   Wed Aug 21 16:34:12 2019 +

    Add JSON log generation

    Add log formatter hooks and JSON log formatter to the test 
infrastructure

    for consumption by automated processes or report generators.


I am not sure if these automated processes or report generators 
already exist.


The existing attribute names are quite inconsistent, for example 
"Command Line", "passed_count", "wrong-version_count". I would use 
lower case only with "-" as a separator. The JSON report should 
contain all information of a test run.


The new report looks like this:

{
    "command-line": [
    "/opt/rtems/6/bin/rtems-test",
    "--rtems-bsp=xilinx_zynq_a9_qemu",
    "--report-format=json",
    "--report-path=report",
    "build/arm/xilinx_zynq_a9_qemu/testsuites/samples/"
    ],
    "end-time": "2022-06-28T14:08:47.595131",
    "host": "Linux-5.3.18-150300.59.76-default-x86_64-with-glibc2.3.4 
(Linux lupus 5.3.18-150300.59.76-default #1 SMP Thu Jun 16 04:23:47 
UTC 2022 (2cc2ade) x86_64 x86_64)",

    "python": "3.6.15 (default, Sep 23 2021, 15:41:43) [GCC]",
    "reports": [
    {
    "arch": "arm",
    "bsp": "xilinx_zynq_a9_qemu",
    "command-line": "qemu-system-arm -no-reboot -nographic 
-net none -serial null -serial mon:stdio -M xilinx-zynq-a9 -m 256M 
-kernel build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",

    "end-time": "2022-06-28T12:08:48.161691+00:00",
    "executable": 
"build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",
    "executable-sha512": 
"413bc8a506053c95a0e1d93942cce9fd0d653f7b3cde42623085ce147aea324f4baeff7ce0102008322fb1341bc2b38defd3925a64144e47e13cc5f32185bf78",

    "output": [
    "qemu-system-arm: warning: nic cadence_gem.0 has no 
peer",
    "qemu-system-arm: warning: nic cadence_gem.1 has no 
peer",

    "",
    "",
    "*** BEGIN OF TEST CONSTRUCTOR/DESTRUCTOR ***",
    "*** TEST VERSION: 
6.0.0.3302b72754df5f37214e86dd68522189857772c7",

    "*** TEST STATE: EXPECTED_PASS",
    "*** TEST BUILD: RTEMS_DEBUG RTEMS_POSIX_API",
    "*** TEST TOOLS: 12.1.1 20220622 (RTEMS 6, RSB 
bf3f66c29a046ec1c5029e4f919b525947df6245, Newlib e7ffbdb)",
    "GLOBAL: Hey I'm in base class constructor number 1 
for 0x214474.",
    "GLOBAL: Hey I'm in base class constructor number 2 
for 0x214480.",
    "GLOBAL: Hey I'm in derived class constructor number 3 
for 0x214480.",
    "LOCAL: Hey I'm in base class constructor number 4 for 
0x228864.",

    ...


"WRoZqtoO3A8BDJkUSmRGNOBaaHW1UwAAoQGQAQwAAABck8Bx+K/znDWWTEcA", 



"AKEB2P///wEMVP6TRqQZY+4+srvAAAChAfD///8BDMXOxS0Rhzqx6Old2wAA", 



"oQH4AQwAAADJyx1ZCnZ4l+m/XkMAAKEB0P///wEMN3+9YAwMW8gTHIoPAACh", 



"Adj///8BDBtxsj3zXZF/+UqzfAAAoQHwAQwwMDMeE7mphT6yu8AAAKEB", 


"8P///wEMr2rLCcwzVnf5SrN8AAChAfD///8A",
    "*** END OF GCOV INFO BASE64 ***",
    ""
    ],
    "result": "passed",
    "start-time": "2022-06-28T12:08:47.721822+00:00"
    }
    ],
    "start-time": "2022-06-28T14:08:47.595131"
}

There are no publicly available report generators for the existing 
format, but I do have one I use to generate STR documents for delivery 
using mustache templates and further processing. The existing format was 
designed to be easily consumable by that and other simple templating 
mechanisms by providing structure (test subsets) and precalculating 
values that would otherwise be implicit in the data. Changes to the 
names of various fields should be easy to accommodate, but a more 
significant restructure is going to present problems continuing with any 
simple templating mechanism and would instead require a more 
comprehensive document generator for all cases.


I'm not necessarily opposed to this change as it significantly 
simplifies the report generation code, but it will definitely require 
some rework in my processes. I can't speak for any users of the YAML 
report format, but it was committed over a year and a half ago.



Kinsey

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Re: [PATCH] arm/gicv3: Fix building arm/r52

2022-06-29 Thread Sebastian Huber

On 27/06/2022 08:27, Sebastian Huber wrote:

On 27/06/2022 05:02, Chris Johns wrote:

On 24/6/2022 7:44 pm, Sebastian Huber wrote:

On 20.06.22 04:03, chr...@rtems.org wrote:

From: Chris Johns 

---
   bsps/include/dev/irq/arm-gicv3.h | 5 +
   1 file changed, 5 insertions(+)

diff --git a/bsps/include/dev/irq/arm-gicv3.h 
b/bsps/include/dev/irq/arm-gicv3.h

index a79368ebdf..aac02fa191 100644
--- a/bsps/include/dev/irq/arm-gicv3.h
+++ b/bsps/include/dev/irq/arm-gicv3.h
@@ -335,7 +335,12 @@ static void gicv3_init_cpu_interface(uint32_t 
cpu_index)

 }
       /* Enable interrupt groups 0 and 1 */
+#ifdef ARM_MULTILIB_ARCH_V4
+  WRITE_SR(ICC_IGRPEN0, 0x1);
+  WRITE_SR(ICC_IGRPEN1, 0x1);
+#else
 gic_icc_write(IGRPEN1, 1);
+#endif
 WRITE_SR(ICC_CTLR, 0x0);
   }


I have a different patch to fix this:

https://lists.rtems.org/pipermail/devel/2022-June/072056.html


Does this change work on a real aarch64 with a suitably configured 
TF-A? The
security profile of the TF-A needs to disable EL1 access to these 
registers to

see the issue.


I don't have a hardware to test this change. I can do tests on a 
Cortex-R52 hardware.


For the Cortex-R52, group 0 interrupts are signaled through FIQ 
exceptions and group 1 interrupts are signaled through IRQ exceptions. 
This processor has no secore/non-secure states.


I checked the GICv3 manual. The group 0 interrupts are always Secure if 
the system has at least two Security states. So, if RTEMS runs in 
Non-Secure mode, it cannot modify group 0 interrupts. We have some 
things to consider:


1. Count of system security states

2. In which state RTEMS runs

3. What RTEMS needs to initialize

We cannot simply use the target architecture to determine what to do 
during GIC initialization. I think we need some BSP options to control 
the initialization behaviour.


--
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Dornierstr. 4
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[PATCH] score: Add _CPU_Use_thread_local_storage()

2022-06-29 Thread Sebastian Huber
At some point during system initialization, the idle threads are created.
Afterwards, the boot processor basically executes within the context of an idle
thread with thread dispatching disabled.  On some architectures, the
thread-local storage area of the associated thread must be set in dedicated
processor registers.  Add the new CPU port function to do this:

void _CPU_Use_thread_local_storage( const Context_Control *context )

Close #4672.
---
 .../cpu/aarch64/include/rtems/score/cpuimpl.h |  9 +++
 .../cpu/arm/include/rtems/score/cpuimpl.h | 13 ++
 .../cpu/bfin/include/rtems/score/cpuimpl.h|  7 +
 .../cpu/i386/include/rtems/score/cpuimpl.h| 26 +++
 .../cpu/lm32/include/rtems/score/cpuimpl.h|  7 +
 .../cpu/m68k/include/rtems/score/cpuimpl.h| 11 
 .../microblaze/include/rtems/score/cpuimpl.h  | 11 
 .../cpu/mips/include/rtems/score/cpuimpl.h|  7 +
 .../cpu/moxie/include/rtems/score/cpuimpl.h   |  7 +
 .../cpu/nios2/include/rtems/score/cpuimpl.h   | 12 +
 .../cpu/no_cpu/include/rtems/score/cpuimpl.h  | 17 
 .../cpu/or1k/include/rtems/score/cpuimpl.h|  7 +
 .../cpu/powerpc/include/rtems/score/cpuimpl.h | 16 
 .../cpu/riscv/include/rtems/score/cpuimpl.h   | 12 +
 .../cpu/sh/include/rtems/score/cpuimpl.h  |  7 +
 .../cpu/sparc/include/rtems/score/cpuimpl.h   | 12 +
 .../cpu/sparc64/include/rtems/score/cpuimpl.h |  7 +
 .../cpu/v850/include/rtems/score/cpuimpl.h|  7 +
 .../cpu/x86_64/include/rtems/score/cpuimpl.h  |  7 +
 cpukit/score/src/threadcreateidle.c   |  5 
 testsuites/sptests/sptls01/init.c | 20 +++---
 21 files changed, 223 insertions(+), 4 deletions(-)

diff --git a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h 
b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
index ffdef2f30a..14836965ef 100644
--- a/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/aarch64/include/rtems/score/cpuimpl.h
@@ -162,6 +162,15 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( 
void )
   __asm__ volatile ( "nop" );
 }
 
+RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage(
+  const Context_Control *context
+)
+{
+  __asm__ volatile (
+"msr TPIDR_EL0, %0" : : "r" ( context->thread_id ) : "memory"
+  );
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h 
b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
index 0ce347c86f..4f20113b71 100644
--- a/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/arm/include/rtems/score/cpuimpl.h
@@ -160,6 +160,19 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( 
void )
   __asm__ volatile ( "nop" );
 }
 
+RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage(
+  const Context_Control *context
+)
+{
+#ifdef ARM_MULTILIB_HAS_THREAD_ID_REGISTER
+  __asm__ volatile (
+"mcr p15, 0, %0, c13, c0, 3" : : "r" ( context->thread_id ) : "memory"
+  );
+#else
+  (void) context;
+#endif
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h 
b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h
index 1485abd365..91e57da4a0 100644
--- a/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/bfin/include/rtems/score/cpuimpl.h
@@ -59,6 +59,13 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( 
void )
   __asm__ volatile ( "nop" );
 }
 
+RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage(
+  const Context_Control *context
+)
+{
+  (void) context;
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h 
b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
index 31ec0ac8bb..71f2679dde 100644
--- a/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
+++ b/cpukit/score/cpu/i386/include/rtems/score/cpuimpl.h
@@ -80,6 +80,32 @@ RTEMS_INLINE_ROUTINE void _CPU_Instruction_no_operation( 
void )
   __asm__ volatile ( "nop" );
 }
 
+RTEMS_INLINE_ROUTINE void _CPU_Use_thread_local_storage(
+  const Context_Control *context
+)
+{
+  uint32_t tmp;
+  uint32_t cpu_index;
+
+#ifdef RTEMS_SMP
+  cpu_index = _CPU_SMP_Get_current_processor();
+#else
+  cpu_index = 0;
+#endif
+
+  __asm__ volatile (
+"movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_0_OFFSET ) "(%2), %0\n"
+"movl %0, _Global_descriptor_table+24(,%1,8)\n"
+"movl " RTEMS_XSTRING( I386_CONTEXT_CONTROL_GS_1_OFFSET ) "(%2), %0\n"
+"movl %0, _Global_descriptor_table+28(,%1,8)\n"
+"leal 24(,%1,8), %0\n"
+"movl %0, %%gs\n"
+: "=" ( tmp )
+: "r" ( cpu_index ), "r" ( context )
+: "memory"
+  );
+}
+
 #ifdef __cplusplus
 }
 #endif
diff --git a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h 
b/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h
index eb0c058723..24e8e5cb41 100644
--- a/cpukit/score/cpu/lm32/include/rtems/score/cpuimpl.h
+++ 

Re: [PATCH] Proposal for new GPIO API and example implementation for STM32F4 BSP

2022-06-29 Thread Duc Doan
Hello Christian,

I have been writing the complete API and also implementation for
STM32F4. A patch is coming soon.

On Mon, 2022-06-27 at 13:33 +0200, Christian MAUDERER wrote:
> Regarding pin groups: I think it's worth to think a bit about how the
> structure could be extended. You don't have to implement it right now
> but you should have a plan what could be possible.
> 
>  From my point of view, there are two directions how that could be 
> implemented: Masks or lists.
> 
> If you have a mask (like 0x00108 for pin 3 and pin 8) it has the 
> advantage that it works fast for most controllers. Difficult is that
> it 
> adds a limit to the maximum pin number depending on the size of the 
> mask. With that it works only for a few hardware models.
> 
> The other option is to add a list of pins instead of a mask. That
> makes 
> it inefficient because most controllers will have to collect pins
> into 
> masks and work with that.
> 
> Hm. Difficult. Maybe someone else has a good idea for that in the
> next 
> few days.

I am thinking of later adding separate functions that handle pin
groups. I think it's quite hard to integrate into current functions
because of using virtual pin.

I have an assumption that needs confirmation: all microcontrollers (or
most of them) have register size equal to word size, and pin masks
should be at word size. Is that assumption correct? If so, maybe we can
just use unsigned int (or uintptr_t) for pin masks?

Best,

Duc Doan


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Re: [tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Sebastian Huber

On 29/06/2022 11:20, Chris Johns wrote:



On 29 Jun 2022, at 4:42 pm, Sebastian Huber 
 wrote:

On 29/06/2022 08:40, Sebastian Huber wrote:

Report the same data in JSON and YAML reports.  Do not report redundant
information.
Update 4671.


This patch changes the JSON reports. Are there already consumers for the JSON 
reports so that we have to be backward compatible?


Could compatibility be added back in if this proves to be an issue?

I am wondering if that could be considered if comparability becomes an issue.


The JSON report was added by:

commit 5fcaf843bdb491e2da14dc1af61806ac6d20bae5
Author: Kinsey Moore 
Date:   Wed Aug 21 16:34:12 2019 +

Add JSON log generation

Add log formatter hooks and JSON log formatter to the test 
infrastructure

for consumption by automated processes or report generators.


I am not sure if these automated processes or report generators already 
exist.


The existing attribute names are quite inconsistent, for example 
"Command Line", "passed_count", "wrong-version_count". I would use lower 
case only with "-" as a separator. The JSON report should contain all 
information of a test run.


The new report looks like this:

{
"command-line": [
"/opt/rtems/6/bin/rtems-test",
"--rtems-bsp=xilinx_zynq_a9_qemu",
"--report-format=json",
"--report-path=report",
"build/arm/xilinx_zynq_a9_qemu/testsuites/samples/"
],
"end-time": "2022-06-28T14:08:47.595131",
"host": "Linux-5.3.18-150300.59.76-default-x86_64-with-glibc2.3.4 
(Linux lupus 5.3.18-150300.59.76-default #1 SMP Thu Jun 16 04:23:47 UTC 
2022 (2cc2ade) x86_64 x86_64)",

"python": "3.6.15 (default, Sep 23 2021, 15:41:43) [GCC]",
"reports": [
{
"arch": "arm",
"bsp": "xilinx_zynq_a9_qemu",
"command-line": "qemu-system-arm -no-reboot -nographic -net 
none -serial null -serial mon:stdio -M xilinx-zynq-a9 -m 256M -kernel 
build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",

"end-time": "2022-06-28T12:08:48.161691+00:00",
"executable": 
"build/arm/xilinx_zynq_a9_qemu/testsuites/samples/cdtest.exe",
"executable-sha512": 
"413bc8a506053c95a0e1d93942cce9fd0d653f7b3cde42623085ce147aea324f4baeff7ce0102008322fb1341bc2b38defd3925a64144e47e13cc5f32185bf78",

"output": [
"qemu-system-arm: warning: nic cadence_gem.0 has no peer",
"qemu-system-arm: warning: nic cadence_gem.1 has no peer",
"",
"",
"*** BEGIN OF TEST CONSTRUCTOR/DESTRUCTOR ***",
"*** TEST VERSION: 
6.0.0.3302b72754df5f37214e86dd68522189857772c7",

"*** TEST STATE: EXPECTED_PASS",
"*** TEST BUILD: RTEMS_DEBUG RTEMS_POSIX_API",
"*** TEST TOOLS: 12.1.1 20220622 (RTEMS 6, RSB 
bf3f66c29a046ec1c5029e4f919b525947df6245, Newlib e7ffbdb)",
"GLOBAL: Hey I'm in base class constructor number 1 for 
0x214474.",
"GLOBAL: Hey I'm in base class constructor number 2 for 
0x214480.",
"GLOBAL: Hey I'm in derived class constructor number 3 
for 0x214480.",
"LOCAL: Hey I'm in base class constructor number 4 for 
0x228864.",

...


"WRoZqtoO3A8BDJkUSmRGNOBaaHW1UwAAoQGQAQwAAABck8Bx+K/znDWWTEcA",

"AKEB2P///wEMVP6TRqQZY+4+srvAAAChAfD///8BDMXOxS0Rhzqx6Old2wAA",

"oQH4AQwAAADJyx1ZCnZ4l+m/XkMAAKEB0P///wEMN3+9YAwMW8gTHIoPAACh",

"Adj///8BDBtxsj3zXZF/+UqzfAAAoQHwAQwwMDMeE7mphT6yu8AAAKEB",
"8P///wEMr2rLCcwzVnf5SrN8AAChAfD///8A",
"*** END OF GCOV INFO BASE64 ***",
""
],
"result": "passed",
"start-time": "2022-06-28T12:08:47.721822+00:00"
}
],
"start-time": "2022-06-28T14:08:47.595131"
}

--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
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Re: [tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Chris Johns

> On 29 Jun 2022, at 4:42 pm, Sebastian Huber 
>  wrote:
> 
> On 29/06/2022 08:40, Sebastian Huber wrote:
>> Report the same data in JSON and YAML reports.  Do not report redundant
>> information.
>> Update 4671.
> 
> This patch changes the JSON reports. Are there already consumers for the JSON 
> reports so that we have to be backward compatible?

Could compatibility be added back in if this proves to be an issue?

I am wondering if that could be considered if comparability becomes an issue. 

Chris


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Re: [tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Sebastian Huber

On 29/06/2022 08:40, Sebastian Huber wrote:

Report the same data in JSON and YAML reports.  Do not report redundant
information.

Update 4671.


This patch changes the JSON reports. Are there already consumers for the 
JSON reports so that we have to be backward compatible?


--
embedded brains GmbH
Herr Sebastian HUBER
Dornierstr. 4
82178 Puchheim
Germany
email: sebastian.hu...@embedded-brains.de
phone: +49-89-18 94 741 - 16
fax:   +49-89-18 94 741 - 08

Registergericht: Amtsgericht München
Registernummer: HRB 157899
Vertretungsberechtigte Geschäftsführer: Peter Rasmussen, Thomas Dörfler
Unsere Datenschutzerklärung finden Sie hier:
https://embedded-brains.de/datenschutzerklaerung/
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[tools] tester: Normalize JSON and YAML reports

2022-06-29 Thread Sebastian Huber
Report the same data in JSON and YAML reports.  Do not report redundant
information.

Update 4671.
---
 tester/rt/test.py | 191 ++
 1 file changed, 40 insertions(+), 151 deletions(-)

diff --git a/tester/rt/test.py b/tester/rt/test.py
index 113936c..5b86804 100644
--- a/tester/rt/test.py
+++ b/tester/rt/test.py
@@ -218,76 +218,46 @@ def killall(tests):
 test.kill()
 
 
+def results_to_data(args, reports, start_time, end_time):
+data = {}
+data['command-line'] = args
+data['host'] = host.label(mode='all')
+data['python'] = sys.version.replace('\n', '')
+data['start-time'] = start_time.isoformat()
+data['end-time'] = start_time.isoformat()
+reports_data = []
+
+for name, run in reports.results.items():
+run_data = {}
+result = run['result']
+run_data['result'] = result
+output = []
+for line in run['output']:
+if line.startswith('] '):
+output.append(line[2:])
+elif line.startswith('=>  exe:'):
+run_data['command-line'] = line[9:]
+run_data['output'] = output
+run_data['executable'] = name
+run_data['executable-sha512'] = get_hash512(name)
+run_data['start-time'] = run['start'].isoformat()
+run_data['end-time'] = run['end'].isoformat()
+run_data['bsp'] = run['bsp']
+run_data['arch'] = run['bsp_arch']
+reports_data.append(run_data)
+
+data['reports'] = reports_data
+return data
+
+
 def generate_json_report(args, reports, start_time, end_time,
- total, json_file):
+ _total, json_file):
 import json
-import sys
-json_log = {}
-json_log['Command Line'] = " ".join(args)
-json_log['Python'] = sys.version.replace('\n', '')
-json_log['test_groups'] = []
-json_log['Host'] = host.label(mode='all')
-json_log['summary'] = {}
-json_log['summary']['passed_count'] = reports.passed
-json_log['summary']['failed_count'] = reports.failed
-json_log['summary']['user-input_count'] = reports.user_input
-json_log['summary']['expected-fail_count'] = reports.expected_fail
-json_log['summary']['indeterminate_count'] = reports.indeterminate
-json_log['summary']['benchmark_count'] = reports.benchmark
-json_log['summary']['timeout_count'] = reports.timeouts
-json_log['summary']['test-too-long_count'] = reports.test_too_long
-json_log['summary']['invalid_count'] = reports.invalids
-json_log['summary']['wrong-version_count'] = reports.wrong_version
-json_log['summary']['wrong-build_count'] = reports.wrong_build
-json_log['summary']['wrong-tools_count'] = reports.wrong_tools
-json_log['summary']['invalid-header_count'] = reports.wrong_header
-json_log['summary']['total_count'] = reports.total
-time_delta = end_time - start_time
-json_log['summary']['average_test_time'] = str(time_delta / total)
-json_log['summary']['testing_time'] = str(time_delta)
-
-result_types = [
-'failed', 'user-input', 'expected-fail', 'indeterminate',
-'benchmark', 'timeout', 'test-too-long', 'invalid', 
'wrong-version',
-'wrong-build', 'wrong-tools', 'wrong-header'
-]
-json_results = {}
-for result_type in result_types:
-json_log['summary'][result_type] = []
-
-# collate results for JSON log
-for name in reports.results:
-result_type = reports.results[name]['result']
-# map fatal-error on to failed since the report adds both to the 
failed count
-if result_type == "fatal-error":
-result_type = "failed"
-test_parts = name.split("/")
-test_category = test_parts[-2]
-test_name = test_parts[-1]
-if result_type != 'passed':
-json_log['summary'][result_type].append(test_name)
-if test_category not in json_results:
-json_results[test_category] = []
-json_result = {}
-# remove the file extension
-json_result["name"] = test_name.split('.')[0]
-json_result["result"] = result_type
-if result_type == "failed" or result_type == "timeout":
-json_result["output"] = reports.results[name]["output"]
-json_results[test_category].append(json_result)
-
-# convert results to a better format for report generation
-sorted_keys = sorted(json_results.keys())
-for i in range(len(sorted_keys)):
-results_log = {}
-results_log["index"] = i + 1
-results_log["name"] = sorted_keys[i]
-results_log["results"] = json_results[sorted_keys[i]]
-json_log["test_groups"].append(results_log)
-
-# write out JSON log
+
+data = results_to_data(args, reports, start_time, end_time);
+
 with open(json_file, 'w') as outfile:
-json.dump(json_log, outfile, sort_keys=True, indent=4)
+json.dump(data, outfile, 

[PATCH 08/12] gcov: Add functions to dump the gcov information

2022-06-29 Thread Sebastian Huber
Update #4670.
---
 cpukit/include/rtems/score/io.h |   4 +
 cpukit/include/rtems/test-info.h|   6 ++
 cpukit/libtest/testgcovdumpinfo.c   |  66 ++
 cpukit/score/src/iogcovdumpinfo.c   | 101 +
 cpukit/score/src/iogcovdumpinfobase64.c | 111 
 spec/build/cpukit/librtemscpu.yml   |   2 +
 spec/build/cpukit/librtemstest.yml  |   1 +
 testsuites/validation/tc-terminate.c|   3 +-
 8 files changed, 293 insertions(+), 1 deletion(-)
 create mode 100644 cpukit/libtest/testgcovdumpinfo.c
 create mode 100644 cpukit/score/src/iogcovdumpinfo.c
 create mode 100644 cpukit/score/src/iogcovdumpinfobase64.c

diff --git a/cpukit/include/rtems/score/io.h b/cpukit/include/rtems/score/io.h
index 106418f185..097cb9bdfe 100644
--- a/cpukit/include/rtems/score/io.h
+++ b/cpukit/include/rtems/score/io.h
@@ -141,6 +141,10 @@ int _IO_Base64url(
  */
 void _IO_Relax( void );
 
+void _IO_Gcov_dump_info( IO_Put_char put_char, void *arg );
+
+void _IO_Gcov_dump_info_base64( IO_Put_char put_char, void *arg );
+
 /** @} */ 
 
 #ifdef __cplusplus
diff --git a/cpukit/include/rtems/test-info.h b/cpukit/include/rtems/test-info.h
index 1bc963249c..c7c6c2438d 100644
--- a/cpukit/include/rtems/test-info.h
+++ b/cpukit/include/rtems/test-info.h
@@ -331,6 +331,12 @@ RTEMS_NO_RETURN void rtems_test_run(
   const RTEMS_TEST_STATE state
 );
 
+/**
+ * @brief Dumps the gcov information as a base64 encoded gcfn and gcda data
+ *   stream using rtems_put_char().
+ */
+void rtems_test_gcov_dump_info( void );
+
 /** @} */
 
 #ifdef __cplusplus
diff --git a/cpukit/libtest/testgcovdumpinfo.c 
b/cpukit/libtest/testgcovdumpinfo.c
new file mode 100644
index 00..4276d9e1c3
--- /dev/null
+++ b/cpukit/libtest/testgcovdumpinfo.c
@@ -0,0 +1,66 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTest
+ *
+ * @brief This source file contains the implementation of
+ *   rtems_test_gcov_dump_info().
+ */
+
+/*
+ * Copyright (C) 2021, 2022 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include 
+#include 
+#include 
+
+ISR_LOCK_DEFINE( static, gcov_dump_lock, "gcov dump" );
+
+static bool gcov_dump_done;
+
+void rtems_test_gcov_dump_info( void )
+{
+  ISR_lock_Context lock_context;
+
+  _ISR_lock_ISR_disable_and_acquire( _dump_lock, _context );
+
+  if ( !gcov_dump_done ) {
+gcov_dump_done = true;
+
+_IO_Printf( rtems_put_char, NULL, "\n*** BEGIN OF GCOV INFO BASE64 ***\n" 
);
+_IO_Gcov_dump_info_base64( rtems_put_char, NULL );
+_IO_Printf( rtems_put_char, NULL, "\n*** END OF GCOV INFO BASE64 ***\n" );
+  }
+
+  _ISR_lock_Release_and_ISR_enable( _dump_lock, _context );
+}
diff --git a/cpukit/score/src/iogcovdumpinfo.c 
b/cpukit/score/src/iogcovdumpinfo.c
new file mode 100644
index 00..79a644106c
--- /dev/null
+++ b/cpukit/score/src/iogcovdumpinfo.c
@@ -0,0 +1,101 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSScoreIO
+ *
+ * @brief This source file contains the implementation of _IO_Gcov_dump_info().
+ */
+
+/*
+ * Copyright (C) 2021, 2022 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or 

[PATCH 06/12] build: Allow separate optimization flags

2022-06-29 Thread Sebastian Huber
Allow separate optimization flags for libraries and tests.  For example, the
libraries may be built without optimization if coverage instrumentation is
enabled, however, the tests may still use optimization.

Update #4670.
---
 spec/build/bsps/bspopts.yml |  6 ++
 spec/build/bsps/optcflags.yml   | 17 +
 spec/build/bsps/optliboptflags.yml  | 18 ++
 spec/build/bsps/opto0.yml   |  4 +---
 spec/build/bsps/opto1.yml   |  4 +---
 spec/build/bsps/opto2.yml   |  4 +---
 spec/build/bsps/optog.yml   |  4 +---
 spec/build/bsps/optos.yml   |  4 +---
 spec/build/bsps/opttestoptflags.yml | 18 ++
 spec/build/cpukit/grp.yml   |  6 --
 spec/build/testsuites/grp.yml   |  6 --
 wscript |  2 +-
 12 files changed, 73 insertions(+), 20 deletions(-)
 create mode 100644 spec/build/bsps/optcflags.yml
 create mode 100644 spec/build/bsps/optliboptflags.yml
 create mode 100644 spec/build/bsps/opttestoptflags.yml

diff --git a/spec/build/bsps/bspopts.yml b/spec/build/bsps/bspopts.yml
index d43136e94e..522b1865bc 100644
--- a/spec/build/bsps/bspopts.yml
+++ b/spec/build/bsps/bspopts.yml
@@ -7,6 +7,10 @@ guard: __BSP_OPTIONS_H
 include-headers: []
 install-path: ${BSP_INCLUDEDIR}
 links:
+- role: build-dependency
+  uid: optliboptflags
+- role: build-dependency
+  uid: opttestoptflags
 - role: build-dependency
   uid: optabi
 - role: build-dependency
@@ -17,6 +21,8 @@ links:
   uid: optfatalverb
 - role: build-dependency
   uid: optincludes
+- role: build-dependency
+  uid: optcflags
 - role: build-dependency
   uid: optlinkflags
 - role: build-dependency
diff --git a/spec/build/bsps/optcflags.yml b/spec/build/bsps/optcflags.yml
new file mode 100644
index 00..8035640ae3
--- /dev/null
+++ b/spec/build/bsps/optcflags.yml
@@ -0,0 +1,17 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- set-value: |
+${LIBRARY_OPTIMIZATION_FLAGS}
+- substitute: null
+- split: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
+default: null
+default-by-variant: []
+description: ''
+enabled-by: true
+links: []
+name: BSP_CFLAGS
+type: build
diff --git a/spec/build/bsps/optliboptflags.yml 
b/spec/build/bsps/optliboptflags.yml
new file mode 100644
index 00..039284299a
--- /dev/null
+++ b/spec/build/bsps/optliboptflags.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- substitute: null
+- split: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
+default: ${OPTIMIZATION_FLAGS}
+default-by-variant: []
+description: |
+  Optimization flags passed to the C and C++ compiler for libraries.
+enabled-by: true
+format: '{}'
+links: []
+name: LIBRARY_OPTIMIZATION_FLAGS
+type: build
diff --git a/spec/build/bsps/opto0.yml b/spec/build/bsps/opto0.yml
index 406286980f..9f54709c07 100644
--- a/spec/build/bsps/opto0.yml
+++ b/spec/build/bsps/opto0.yml
@@ -3,8 +3,6 @@ actions:
 - get-string: null
 - split: null
 - env-assign: null
-- env-append: CFLAGS
-- env-append: CXXFLAGS
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
@@ -15,7 +13,7 @@ default:
 - -ffunction-sections
 default-by-variant: []
 description: |
-  Optimization flags passed to the C and C++ compiler
+  Default optimization flags for C and C++ compilers.
 enabled-by: true
 links: []
 name: OPTIMIZATION_FLAGS
diff --git a/spec/build/bsps/opto1.yml b/spec/build/bsps/opto1.yml
index 52d285c2ab..e0668a887b 100644
--- a/spec/build/bsps/opto1.yml
+++ b/spec/build/bsps/opto1.yml
@@ -3,8 +3,6 @@ actions:
 - get-string: null
 - split: null
 - env-assign: null
-- env-append: CFLAGS
-- env-append: CXXFLAGS
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
@@ -15,7 +13,7 @@ default:
 - -ffunction-sections
 default-by-variant: []
 description: |
-  Optimization flags passed to the C and C++ compiler
+  Default optimization flags for C and C++ compilers.
 enabled-by: true
 links: []
 name: OPTIMIZATION_FLAGS
diff --git a/spec/build/bsps/opto2.yml b/spec/build/bsps/opto2.yml
index 071e5411d5..7b54556c5b 100644
--- a/spec/build/bsps/opto2.yml
+++ b/spec/build/bsps/opto2.yml
@@ -3,8 +3,6 @@ actions:
 - get-string: null
 - split: null
 - env-assign: null
-- env-append: CFLAGS
-- env-append: CXXFLAGS
 build-type: option
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
@@ -15,7 +13,7 @@ default:
 - -ffunction-sections
 default-by-variant: []
 description: |
-  Optimization flags passed to the C and C++ compiler
+  Default optimization flags for C and C++ compilers.
 enabled-by: true
 links: []
 name: OPTIMIZATION_FLAGS
diff --git a/spec/build/bsps/optog.yml 

[PATCH 09/12] gcov: Add wrapper to dump the gcov info

2022-06-29 Thread Sebastian Huber
Update #4670.
---
 cpukit/libtest/testgcovbspreset.c | 54 +++
 cpukit/libtest/testgcovcpufatalhalt.c | 54 +++
 spec/build/cpukit/librtemstest.yml|  2 +
 3 files changed, 110 insertions(+)
 create mode 100644 cpukit/libtest/testgcovbspreset.c
 create mode 100644 cpukit/libtest/testgcovcpufatalhalt.c

diff --git a/cpukit/libtest/testgcovbspreset.c 
b/cpukit/libtest/testgcovbspreset.c
new file mode 100644
index 00..6e10615f8c
--- /dev/null
+++ b/cpukit/libtest/testgcovbspreset.c
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTest
+ *
+ * @brief This source file contains the implementation of a wrapper for
+ *   bsp_reset() which dumps the gcov information using
+ *   rtems_test_gcov_dump_info() before the real bsp_reset() is called.
+ */
+
+/*
+ * Copyright (C) 2021, 2022 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include 
+
+void __real_bsp_reset( void );
+
+void __wrap_bsp_reset( void );
+
+void __wrap_bsp_reset( void )
+{
+  rtems_test_gcov_dump_info();
+  __real_bsp_reset();
+}
diff --git a/cpukit/libtest/testgcovcpufatalhalt.c 
b/cpukit/libtest/testgcovcpufatalhalt.c
new file mode 100644
index 00..dd8f10149c
--- /dev/null
+++ b/cpukit/libtest/testgcovcpufatalhalt.c
@@ -0,0 +1,54 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup RTEMSTest
+ *
+ * @brief This source file contains the implementation of a wrapper for
+ *   _CPU_Fatal_halt() which dumps the gcov information using
+ *   rtems_test_gcov_dump_info() before the real _CPU_Fatal_halt() is called.
+ */
+
+/*
+ * Copyright (C) 2021, 2022 embedded brains GmbH
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include 
+
+void __real__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
+
+void __wrap__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error );
+
+void __wrap__CPU_Fatal_halt( uint32_t source, CPU_Uint32ptr error )
+{
+  rtems_test_gcov_dump_info();
+  __real__CPU_Fatal_halt( source, error );
+}
diff --git a/spec/build/cpukit/librtemstest.yml 
b/spec/build/cpukit/librtemstest.yml
index cb04690066..ddbf6e3e76 100644
--- a/spec/build/cpukit/librtemstest.yml
+++ b/spec/build/cpukit/librtemstest.yml
@@ -38,6 

[PATCH 12/12] libtests/crypt01: Avoid stack overflows

2022-06-29 Thread Sebastian Huber
The SHA512 functions may use huge amounts of stack space if compiled without
optimization.
---
 testsuites/libtests/crypt01/init.c | 6 +-
 1 file changed, 5 insertions(+), 1 deletion(-)

diff --git a/testsuites/libtests/crypt01/init.c 
b/testsuites/libtests/crypt01/init.c
index 0944aa60f7..26ba70e250 100644
--- a/testsuites/libtests/crypt01/init.c
+++ b/testsuites/libtests/crypt01/init.c
@@ -36,6 +36,8 @@
 #include 
 #include 
 
+#include 
+
 #include "tmacros.h"
 
 const char rtems_test_name[] = "CRYPT 1";
@@ -234,18 +236,20 @@ static void Init(rtems_task_argument arg)
   test_sha512();
   test_generic();
 
+  rtems_test_assert(!rtems_stack_checker_is_blown());
   TEST_END();
   rtems_test_exit(0);
 }
 
 #define CONFIGURE_APPLICATION_DOES_NOT_NEED_CLOCK_DRIVER
 #define CONFIGURE_APPLICATION_NEEDS_SIMPLE_CONSOLE_DRIVER
+#define CONFIGURE_STACK_CHECKER_ENABLED
 
 #define CONFIGURE_MAXIMUM_TASKS 1
 
 #define CONFIGURE_INITIAL_EXTENSIONS RTEMS_TEST_INITIAL_EXTENSION
 
-#define CONFIGURE_INIT_TASK_STACK_SIZE (2 * RTEMS_MINIMUM_STACK_SIZE)
+#define CONFIGURE_INIT_TASK_STACK_SIZE (8 * RTEMS_MINIMUM_STACK_SIZE)
 
 #define CONFIGURE_RTEMS_INIT_TASKS_TABLE
 
-- 
2.35.3

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[PATCH 10/12] build: Add RTEMS_COVERAGE option

2022-06-29 Thread Sebastian Huber
Update #4670.
---
 spec/build/bsps/optcflags.yml  |  2 +-
 spec/build/cpukit/cpuopts.yml  | 10 +
 spec/build/cpukit/grp.yml  |  2 ++
 spec/build/cpukit/optcoverage.yml  | 16 ++
 spec/build/cpukit/optcoveragecflags.yml| 20 +
 spec/build/cpukit/optcoverageldflags.yml   | 25 ++
 spec/build/cpukit/optnocoveragecflags.yml  | 18 
 spec/build/cpukit/optnocoverageldflags.yml | 18 
 spec/build/testsuites/grp.yml  |  3 ++-
 9 files changed, 112 insertions(+), 2 deletions(-)
 create mode 100644 spec/build/cpukit/optcoverage.yml
 create mode 100644 spec/build/cpukit/optcoveragecflags.yml
 create mode 100644 spec/build/cpukit/optcoverageldflags.yml
 create mode 100644 spec/build/cpukit/optnocoveragecflags.yml
 create mode 100644 spec/build/cpukit/optnocoverageldflags.yml

diff --git a/spec/build/bsps/optcflags.yml b/spec/build/bsps/optcflags.yml
index 8035640ae3..7d63c95d41 100644
--- a/spec/build/bsps/optcflags.yml
+++ b/spec/build/bsps/optcflags.yml
@@ -1,7 +1,7 @@
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
 actions:
 - set-value: |
-${LIBRARY_OPTIMIZATION_FLAGS}
+${LIBRARY_OPTIMIZATION_FLAGS} ${COVERAGE_COMPILER_FLAGS}
 - substitute: null
 - split: null
 - env-assign: null
diff --git a/spec/build/cpukit/cpuopts.yml b/spec/build/cpukit/cpuopts.yml
index 301d49ccea..86cc7f676a 100644
--- a/spec/build/cpukit/cpuopts.yml
+++ b/spec/build/cpukit/cpuopts.yml
@@ -67,6 +67,16 @@ links:
   uid: optszoff
 - role: build-dependency
   uid: optsztime
+- role: build-dependency
+  uid: optcoverage
+- role: build-dependency
+  uid: optcoveragecflags
+- role: build-dependency
+  uid: optnocoveragecflags
+- role: build-dependency
+  uid: optcoverageldflags
+- role: build-dependency
+  uid: optnocoverageldflags
 - role: build-dependency
   uid: optversion
 target: cpukit/include/rtems/score/cpuopts.h
diff --git a/spec/build/cpukit/grp.yml b/spec/build/cpukit/grp.yml
index 9958b0bd66..58b9757f54 100644
--- a/spec/build/cpukit/grp.yml
+++ b/spec/build/cpukit/grp.yml
@@ -2,11 +2,13 @@ SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
 build-type: group
 cflags:
 - ${LIBRARY_OPTIMIZATION_FLAGS}
+- ${COVERAGE_COMPILER_FLAGS}
 copyrights:
 - Copyright (C) 2020 embedded brains GmbH (http://www.embedded-brains.de)
 cppflags: []
 cxxflags:
 - ${LIBRARY_OPTIMIZATION_FLAGS}
+- ${COVERAGE_COMPILER_FLAGS}
 enabled-by: true
 includes: []
 install: []
diff --git a/spec/build/cpukit/optcoverage.yml 
b/spec/build/cpukit/optcoverage.yml
new file mode 100644
index 00..f0bdfa4ca4
--- /dev/null
+++ b/spec/build/cpukit/optcoverage.yml
@@ -0,0 +1,16 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-boolean: null
+- env-enable: null
+- define-condition: null
+build-type: option
+copyrights:
+- Copyright (C) 2022 embedded brains GmbH (http://www.embedded-brains.de)
+default: false
+default-by-variant: []
+description: |
+  Enable the code and branch coverage support.
+enabled-by: true
+links: []
+name: RTEMS_COVERAGE
+type: build
diff --git a/spec/build/cpukit/optcoveragecflags.yml 
b/spec/build/cpukit/optcoveragecflags.yml
new file mode 100644
index 00..512eeffe56
--- /dev/null
+++ b/spec/build/cpukit/optcoveragecflags.yml
@@ -0,0 +1,20 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- --coverage
+- -fprofile-info-section=.rtemsroset.gcov_info.content
+- -fprofile-update=atomic
+default-by-variant: []
+description: |
+  Compiler flags recommended for components which should generate coverage
+  information.
+enabled-by: RTEMS_COVERAGE
+links: []
+name: COVERAGE_COMPILER_FLAGS
+type: build
diff --git a/spec/build/cpukit/optcoverageldflags.yml 
b/spec/build/cpukit/optcoverageldflags.yml
new file mode 100644
index 00..f13322cbee
--- /dev/null
+++ b/spec/build/cpukit/optcoverageldflags.yml
@@ -0,0 +1,25 @@
+SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
+actions:
+- get-string: null
+- split: null
+- env-assign: null
+build-type: option
+copyrights:
+- Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+default:
+- -Wl,--wrap=_CPU_Fatal_halt
+- -Wl,--wrap=bsp_reset
+- -Wl,--start-group
+- -lrtemsbsp
+- -lrtemscpu
+- -lrtemstest
+- -lgcov
+- -Wl,--end-group
+default-by-variant: []
+description: |
+  Linker flags recommended for executables which contain modules with coverage
+  information.
+enabled-by: RTEMS_COVERAGE
+links: []
+name: COVERAGE_LINKER_FLAGS
+type: build
diff --git a/spec/build/cpukit/optnocoveragecflags.yml 
b/spec/build/cpukit/optnocoveragecflags.yml
new file mode 100644
index 00..561a99b0d4
--- /dev/null
+++ b/spec/build/cpukit/optnocoveragecflags.yml
@@ -0,0 +1,18 @@
+SPDX-License-Identifier: 

[PATCH 11/12] samples/minimum: Prevent a stack overflow

2022-06-29 Thread Sebastian Huber
Prevent a stack overflow if RTEMS_COVERAGE is enabled.
---
 testsuites/samples/minimum/init.c | 5 +
 1 file changed, 5 insertions(+)

diff --git a/testsuites/samples/minimum/init.c 
b/testsuites/samples/minimum/init.c
index c988d6d750..4238c47659 100644
--- a/testsuites/samples/minimum/init.c
+++ b/testsuites/samples/minimum/init.c
@@ -81,7 +81,12 @@ static void *Init( uintptr_t ignored )
  *  demonstrates that the user can specify how small of a minimum
  *  stack they want.
  */
+#ifdef RTEMS_COVERAGE
+#define CONFIGURE_MINIMUM_TASK_STACK_SIZE \
+  (CPU_STACK_MINIMUM_SIZE - CPU_STACK_ALIGNMENT)
+#else
 #define CONFIGURE_MINIMUM_TASK_STACK_SIZE 512
+#endif
 
 /*
  * Keep the interrupt/initialization stack as is.  Otherwise, the test may fail
-- 
2.35.3

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[PATCH 05/12] build: Add cppflags, cflags, cxxflags to groups

2022-06-29 Thread Sebastian Huber
Propagate the group defined cppflags, cflags, and cxxflags from parent groups
to child items through the build item context.

Update #4670.
---
 spec/build/bsps/aarch64/a53/grp.yml  | 3 +++
 spec/build/bsps/aarch64/a72/grp.yml  | 3 +++
 spec/build/bsps/aarch64/grp.yml  | 3 +++
 spec/build/bsps/aarch64/xilinx-versal/grp.yml| 3 +++
 spec/build/bsps/aarch64/xilinx-versal/grp_qemu.yml   | 3 +++
 spec/build/bsps/aarch64/xilinx-versal/grp_vck190.yml | 3 +++
 spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml| 3 +++
 spec/build/bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml  | 5 -
 spec/build/bsps/arm/beagle/grp.yml   | 3 +++
 spec/build/bsps/arm/csb337/grp.yml   | 3 +++
 spec/build/bsps/arm/fvp/grp.yml  | 3 +++
 spec/build/bsps/arm/grp.yml  | 3 +++
 spec/build/bsps/arm/lm3s69xx/grp.yml | 3 +++
 spec/build/bsps/arm/lpc176x/grp.yml  | 3 +++
 spec/build/bsps/arm/lpc24xx/grp.yml  | 3 +++
 spec/build/bsps/arm/lpc32xx/grp.yml  | 3 +++
 spec/build/bsps/arm/raspberrypi/grp.yml  | 3 +++
 spec/build/bsps/arm/rtl22xx/grp.yml  | 3 +++
 spec/build/bsps/arm/stm32f4/grp.yml  | 3 +++
 spec/build/bsps/arm/stm32h7/grp.yml  | 3 +++
 spec/build/bsps/arm/tms570/grp.yml   | 3 +++
 spec/build/bsps/arm/xilinx-zynq/grp.yml  | 3 +++
 spec/build/bsps/bfin/grp.yml | 3 +++
 spec/build/bsps/grpmake.yml  | 3 +++
 spec/build/bsps/i386/grp.yml | 3 +++
 spec/build/bsps/i386/pc386/grp.yml   | 3 +++
 spec/build/bsps/lm32/grp.yml | 3 +++
 spec/build/bsps/lm32/lm32_evr/grp.yml| 3 +++
 spec/build/bsps/m68k/gen68360/grp.yml| 3 +++
 spec/build/bsps/m68k/genmcf548x/grp.yml  | 3 +++
 spec/build/bsps/m68k/grp.yml | 3 +++
 spec/build/bsps/m68k/mvme162/grp.yml | 3 +++
 spec/build/bsps/microblaze/grp.yml   | 3 +++
 spec/build/bsps/microblaze/microblaze_fpga/grp.yml   | 3 +++
 spec/build/bsps/mips/grp.yml | 3 +++
 spec/build/bsps/or1k/grp.yml | 3 +++
 spec/build/bsps/powerpc/gen5200/grp.yml  | 3 +++
 spec/build/bsps/powerpc/gen83xx/grp.yml  | 3 +++
 spec/build/bsps/powerpc/grp.yml  | 3 +++
 spec/build/bsps/powerpc/motorola_powerpc/grp.yml | 3 +++
 spec/build/bsps/powerpc/mpc55xxevb/grp.yml   | 3 +++
 spec/build/bsps/powerpc/qoriq/grp.yml| 3 +++
 spec/build/bsps/powerpc/tqm8xx/grp.yml   | 3 +++
 spec/build/bsps/riscv/griscv/grp.yml | 3 +++
 spec/build/bsps/riscv/grp.yml| 3 +++
 spec/build/bsps/riscv/riscv/grp.yml  | 3 +++
 spec/build/bsps/sh/shsim/grp.yml | 3 +++
 spec/build/bsps/sparc/grp.yml| 3 +++
 spec/build/bsps/sparc/leon2/grp.yml  | 3 +++
 spec/build/bsps/sparc/leon3/grp.yml  | 3 +++
 spec/build/bsps/sparc64/grp.yml  | 3 +++
 spec/build/bsps/v850/gdbv850sim/grp.yml  | 3 +++
 spec/build/bsps/x86_64/grp.yml   | 3 +++
 spec/build/cpukit/grp.yml| 3 +++
 spec/build/grp.yml   | 3 +++
 spec/build/testsuites/ada/grp.yml| 3 +++
 spec/build/testsuites/benchmarks/grp.yml | 3 +++
 spec/build/testsuites/fstests/grp.yml| 3 +++
 spec/build/testsuites/grp.yml| 3 +++
 spec/build/testsuites/libtests/grp.yml   | 3 +++
 spec/build/testsuites/mptests/grp.yml| 3 +++
 spec/build/testsuites/psxtests/grp.yml   | 3 +++
 spec/build/testsuites/psxtmtests/grp.yml | 3 +++
 spec/build/testsuites/rhealstone/grp.yml | 3 +++
 spec/build/testsuites/samples/grp.yml| 3 +++
 spec/build/testsuites/smptests/grp.yml   | 3 +++
 spec/build/testsuites/sptests/grp.yml| 3 +++
 spec/build/testsuites/tmtests/grp.yml| 3 +++
 spec/build/testsuites/unit/grp.yml   | 3 +++
 spec/build/testsuites/validation/grp.yml | 3 +++
 wscript  | 6 +++---
 71 files changed, 214 insertions(+), 4 deletions(-)

diff --git a/spec/build/bsps/aarch64/a53/grp.yml 
b/spec/build/bsps/aarch64/a53/grp.yml
index cc6418da75..091f18d6f5 100644
--- a/spec/build/bsps/aarch64/a53/grp.yml
+++ b/spec/build/bsps/aarch64/a53/grp.yml
@@ -1,7 +1,10 @@
 SPDX-License-Identifier: CC-BY-SA-4.0 OR BSD-2-Clause
 build-type: group
+cflags: []
 copyrights:
 - Copyright (C) 2020 On-Line Applications Research (OAR)
+cppflags: 

[PATCH 00/12] Support gcov instrumentation

2022-06-29 Thread Sebastian Huber
This patch set adds support to build the RTEMS libraries with gcov
instrumentation to get code and branch coverage.  There are some improvements
necessary in the build system to support different compiler flags for libraries
and tests.  In general, code coverage is enabled by the new RTEMS_COVERAGE
build configuration option.  The user can fine tune the build through the
LIBRARY_OPTIMIZATION_FLAGS, TEST_OPTIMIZATION_FLAGS, and 
COVERAGE_COMPILER_FLAGS,
COVERAGE_LINKER_FLAGS options.  The gcov information is dumped after each test
case in a base64 encoded gcfn and gcda data stream.  It looks like this:

*** BEGIN OF GCOV INFO BASE64 ***
bmZjZyAxMkJSL3RtcC9zaC9iLXJ0ZW1zL2FybS94aWxpbnhfenlucV9hOV9xZW11L2NwdWtp
dC9saWJjc3VwcG9ydC9zcmMvX19nZXR0b2QuYy42NS5nY2RhAGFkY2cgMTJCPoT6qo6mcBUB
DOOrF1pxp0aIPrK7wAAAoQHwAQwAAADTfDdNQYCYwJ9ZRL0AAKEBIAQA
...
srvAAAChAfD///8BDMXOxS0Rhzqx6Old2wAAoQH4AQwAAACYh8U9/rgJ5hMc
ig8AAKEB2P///wEMN3+9YAwMW8gTHIoPAAChAdj///8BDDAwMx4TuamFPrK7
wAAAoQHwAQwAAACvassJzDNWd/lKs3wAAKEB8P///wA=
*** END OF GCOV INFO BASE64 ***

On the host you can decode the block and pipe it through the gcov-tool to
produce the *.gcda files.  Example Python code:

block = some regex stuff to get the block between the BEGIN/END OF ...
stream = base64.b64decode(block)
subprocess.run(["arm-rtems6-gcov-tool", "merge-stream"], input=stream)

Sebastian Huber (12):
  build: Add more flags to BuildItemContext
  build: Move BSP_INCLUDES split
  build: Fix identifier pattern
  build: Improve value substitution
  build: Add cppflags, cflags, cxxflags to groups
  build: Allow separate optimization flags
  gcov: Add fork(), etc. gcov wrappers
  gcov: Add functions to dump the gcov information
  gcov: Add wrapper to dump the gcov info
  build: Add RTEMS_COVERAGE option
  samples/minimum: Prevent a stack overflow
  libtests/crypt01: Avoid stack overflows

 cpukit/include/rtems/score/io.h   |   4 +
 cpukit/include/rtems/test-info.h  |   6 +
 cpukit/libcsupport/src/gcovfork.c |  94 ++
 cpukit/libtest/testgcovbspreset.c |  54 
 cpukit/libtest/testgcovcpufatalhalt.c |  54 
 cpukit/libtest/testgcovdumpinfo.c |  66 ++
 cpukit/score/src/iogcovdumpinfo.c | 101 +++
 cpukit/score/src/iogcovdumpinfobase64.c   | 111 
 spec/build/bsps/aarch64/a53/grp.yml   |   3 +
 spec/build/bsps/aarch64/a72/grp.yml   |   3 +
 spec/build/bsps/aarch64/grp.yml   |   3 +
 spec/build/bsps/aarch64/xilinx-versal/grp.yml |   3 +
 .../bsps/aarch64/xilinx-versal/grp_qemu.yml   |   3 +
 .../bsps/aarch64/xilinx-versal/grp_vck190.yml |   3 +
 spec/build/bsps/aarch64/xilinx-zynqmp/grp.yml |   3 +
 .../bsps/aarch64/xilinx-zynqmp/grp_zu3eg.yml  |   5 +-
 spec/build/bsps/arm/beagle/grp.yml|   3 +
 spec/build/bsps/arm/csb337/grp.yml|   3 +
 spec/build/bsps/arm/fvp/grp.yml   |   3 +
 spec/build/bsps/arm/grp.yml   |   3 +
 spec/build/bsps/arm/lm3s69xx/grp.yml  |   3 +
 spec/build/bsps/arm/lpc176x/grp.yml   |   3 +
 spec/build/bsps/arm/lpc24xx/grp.yml   |   3 +
 spec/build/bsps/arm/lpc32xx/grp.yml   |   3 +
 spec/build/bsps/arm/raspberrypi/grp.yml   |   3 +
 spec/build/bsps/arm/rtl22xx/grp.yml   |   3 +
 spec/build/bsps/arm/stm32f4/grp.yml   |   3 +
 spec/build/bsps/arm/stm32h7/grp.yml   |   3 +
 spec/build/bsps/arm/tms570/grp.yml|   3 +
 spec/build/bsps/arm/xilinx-zynq/grp.yml   |   3 +
 spec/build/bsps/bfin/grp.yml  |   3 +
 spec/build/bsps/bspopts.yml   |   6 +
 spec/build/bsps/grpmake.yml   |   3 +
 spec/build/bsps/i386/grp.yml  |   3 +
 spec/build/bsps/i386/pc386/grp.yml|   3 +
 spec/build/bsps/lm32/grp.yml  |   3 +
 spec/build/bsps/lm32/lm32_evr/grp.yml |   3 +
 spec/build/bsps/m68k/gen68360/grp.yml |   3 +
 spec/build/bsps/m68k/genmcf548x/grp.yml   |   3 +
 spec/build/bsps/m68k/grp.yml  |   3 +
 spec/build/bsps/m68k/mvme162/grp.yml  |   3 +
 spec/build/bsps/microblaze/grp.yml|   3 +
 .../bsps/microblaze/microblaze_fpga/grp.yml   |   3 +
 spec/build/bsps/mips/grp.yml  |   3 +
 spec/build/bsps/optcflags.yml |  17 +++
 spec/build/bsps/optincludes.yml   |   1 +
 spec/build/bsps/optliboptflags.yml|  18 +++
 spec/build/bsps/opto0.yml |   4 +-
 spec/build/bsps/opto1.yml |   4 +-
 spec/build/bsps/opto2.yml |   4 +-
 spec/build/bsps/optog.yml |   4 +-
 spec/build/bsps/optos.yml |   4 +-
 spec/build/bsps/opttestoptflags.yml   |  18 +++
 spec/build/bsps/or1k/grp.yml  |   3 +
 

[PATCH 01/12] build: Add more flags to BuildItemContext

2022-06-29 Thread Sebastian Huber
Add cppflags, cflags, and cxxflags to BuildItemContext.  This allows to
propagate the flags from parent items to child items.

Update #4670.
---
 wscript | 93 +++--
 1 file changed, 70 insertions(+), 23 deletions(-)

diff --git a/wscript b/wscript
index 8ad0ed30b1..e6abdaa7b5 100755
--- a/wscript
+++ b/wscript
@@ -513,6 +513,9 @@ class GroupItem(Item):
 def prepare_build(self, bld, bic):
 return BuildItemContext(
 bic.includes + self.get_values(bld, "includes"),
+bic.cppflags,
+bic.cflags,
+bic.cxxflags,
 self.data["use-before"] + bic.use + self.data["use-after"],
 bic.ldflags + self.get_values(bld, "ldflags"),
 bic.objects,
@@ -578,13 +581,24 @@ class ObjectsItem(Item):
 def __init__(self, uid, data):
 super(ObjectsItem, self).__init__(uid, data)
 
+def prepare_build(self, bld, bic):
+return BuildItemContext(
+bic.includes + self.substitute(bld, self.data["includes"]),
+bic.cppflags + self.substitute(bld, self.data["cppflags"]),
+bic.cflags + self.substitute(bld, self.data["cflags"]),
+bic.cxxflags + self.substitute(bld, self.data["cxxflags"]),
+bic.use,
+bic.ldflags,
+bic.objects,
+)
+
 def do_build(self, bld, bic):
 bld.objects(
-asflags=self.substitute(bld, self.data["cppflags"]),
-cflags=self.substitute(bld, self.data["cflags"]),
-cppflags=self.substitute(bld, self.data["cppflags"]),
-cxxflags=self.substitute(bld, self.data["cxxflags"]),
-includes=bic.includes + self.substitute(bld, 
self.data["includes"]),
+asflags=bic.cppflags,
+cflags=bic.cflags,
+cppflags=bic.cppflags,
+cxxflags=bic.cxxflags,
+includes=bic.includes,
 source=self.data["source"],
 target=self.uid,
 )
@@ -600,15 +614,23 @@ class BSPItem(Item):
 
 def prepare_build(self, bld, bic):
 return BuildItemContext(
-bic.includes + bld.env.BSP_INCLUDES.split(), [], [], []
+bic.includes
++ bld.env.BSP_INCLUDES.split()
++ self.substitute(bld, self.data["includes"]),
+self.substitute(bld, self.data["cppflags"]),
+self.substitute(bld, self.data["cflags"]),
+[],
+[],
+[],
+[],
 )
 
 def do_build(self, bld, bic):
 bld(
-cflags=self.substitute(bld, self.data["cflags"]),
-cppflags=self.substitute(bld, self.data["cppflags"]),
+cflags=bic.cflags,
+cppflags=bic.cppflags,
 features="c cstlib",
-includes=bic.includes + self.substitute(bld, 
self.data["includes"]),
+includes=bic.includes,
 install_path="${BSP_LIBDIR}",
 source=self.data["source"],
 target="rtemsbsp",
@@ -622,15 +644,23 @@ class LibraryItem(Item):
 super(LibraryItem, self).__init__(uid, data)
 
 def prepare_build(self, bld, bic):
-return BuildItemContext(bic.includes, [], [], [])
+return BuildItemContext(
+bic.includes + self.substitute(bld, self.data["includes"]),
+bic.cppflags + self.substitute(bld, self.data["cppflags"]),
+bic.cflags + self.substitute(bld, self.data["cflags"]),
+bic.cxxflags + self.substitute(bld, self.data["cxxflags"]),
+bic.use,
+bic.ldflags,
+[],
+)
 
 def do_build(self, bld, bic):
 bld(
-cflags=self.substitute(bld, self.data["cflags"]),
-cppflags=self.substitute(bld, self.data["cppflags"]),
-cxxflags=self.substitute(bld, self.data["cxxflags"]),
+cflags=bic.cflags,
+cppflags=bic.cppflags,
+cxxflags=bic.cxxflags,
 features="c cxx cstlib",
-includes=bic.includes + self.substitute(bld, 
self.data["includes"]),
+includes=bic.includes,
 install_path=self.data["install-path"],
 source=self.data["source"],
 target=self.get(bld, "target"),
@@ -650,22 +680,32 @@ class TestProgramItem(Item):
 return [{"and": [{"not": self.exclude}, self.data["enabled-by"]]}]
 
 def prepare_build(self, bld, bic):
-return BuildItemContext(bic.includes, bic.use, bic.ldflags, [])
+return BuildItemContext(
+bic.includes + self.substitute(bld, self.data["includes"]),
+bic.cppflags
++ bld.env[self.cppflags]
++ self.substitute(bld, self.data["cppflags"]),
+bic.cflags + self.substitute(bld, self.data["cflags"]),
+bic.cxxflags + self.substitute(bld, self.data["cxxflags"]),
+self.data["use-before"] + bic.use + self.data["use-after"],
+

[PATCH 02/12] build: Move BSP_INCLUDES split

2022-06-29 Thread Sebastian Huber
The goal is to let the build items define as much as possible.
---
 spec/build/bsps/optincludes.yml | 1 +
 wscript | 2 +-
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/spec/build/bsps/optincludes.yml b/spec/build/bsps/optincludes.yml
index 0b4a71031c..ea57fe3e05 100644
--- a/spec/build/bsps/optincludes.yml
+++ b/spec/build/bsps/optincludes.yml
@@ -3,6 +3,7 @@ actions:
 - set-value: |
 bsps/include bsps/${ARCH}/include bsps/${ARCH}/${BSP_FAMILY}/include
 - substitute: null
+- split: null
 - env-assign: null
 build-type: option
 copyrights:
diff --git a/wscript b/wscript
index e6abdaa7b5..38910f2816 100755
--- a/wscript
+++ b/wscript
@@ -615,7 +615,7 @@ class BSPItem(Item):
 def prepare_build(self, bld, bic):
 return BuildItemContext(
 bic.includes
-+ bld.env.BSP_INCLUDES.split()
++ bld.env.BSP_INCLUDES
 + self.substitute(bld, self.data["includes"]),
 self.substitute(bld, self.data["cppflags"]),
 self.substitute(bld, self.data["cflags"]),
-- 
2.35.3

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[PATCH 04/12] build: Improve value substitution

2022-06-29 Thread Sebastian Huber
The waf build system uses lists for tool flags.  The build items may use
variable substitution.  Add the ability to use the variable substitution in
lists.  For example:

MORE_FLAGS = ['-more', '-flags']

flags:
- -some-flag
- ${MORE_FLAGS}

Before this change, the ${MORE_FLAGS} was substituted to "-more -flags".  This
would be passed by waf as a single command line argument to the tool.

After this change, the ${MORE_FLAGS} list extends the flags list:

flags = ['-some-flag', '-more', '-flags']

This list extension is performed if a list element consists of exactly one
variable.

Update #4670.
---
 wscript | 25 -
 1 file changed, 16 insertions(+), 9 deletions(-)

diff --git a/wscript b/wscript
index 731d1402ff..6ad230aca5 100755
--- a/wscript
+++ b/wscript
@@ -115,6 +115,9 @@ class Template(string.Template):
 idpattern = "[_A-Za-z][_A-Za-z0-9:#]*"
 
 
+_VAR_PATTERN = re.compile("\$\{?(" + Template.idpattern + ")\}?$")
+
+
 def _is_enabled_op_and(enabled, enabled_by):
 for next_enabled_by in enabled_by:
 if not _is_enabled(enabled, next_enabled_by):
@@ -249,18 +252,22 @@ class Item(object):
 )
 )
 if isinstance(value, list):
-return [self.substitute(ctx, subvalue) for subvalue in value]
+more = []
+for item in value:
+if isinstance(item, str):
+m = _VAR_PATTERN.match(item)
+else:
+m = None
+if m:
+more.extend(ctx.env[m.group(1).strip("{}")])
+else:
+more.append(self.substitute(ctx, item))
+return more
 return value
 
 def get(self, ctx, name):
 return self.substitute(ctx, self.data[name])
 
-def get_values(self, ctx, name):
-more = []
-for value in self.data[name]:
-more.extend(self.substitute(ctx, value).split())
-return more
-
 def install_target(self, bld):
 install_path = self.data["install-path"]
 if install_path:
@@ -512,12 +519,12 @@ class GroupItem(Item):
 
 def prepare_build(self, bld, bic):
 return BuildItemContext(
-bic.includes + self.get_values(bld, "includes"),
+bic.includes + self.substitute(bld, self.data["includes"]),
 bic.cppflags,
 bic.cflags,
 bic.cxxflags,
 self.data["use-before"] + bic.use + self.data["use-after"],
-bic.ldflags + self.get_values(bld, "ldflags"),
+bic.ldflags + self.substitute(bld, self.data["ldflags"]),
 bic.objects,
 )
 
-- 
2.35.3

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[PATCH 07/12] gcov: Add fork(), etc. gcov wrappers

2022-06-29 Thread Sebastian Huber
The compiler wraps fork(), etc. system calls if coverage generation is enabled.
These functions must be provided by the system.  For RTEMS, they just return an
error status.

Update #4670.
---
 cpukit/libcsupport/src/gcovfork.c | 94 +++
 spec/build/cpukit/librtemscpu.yml |  1 +
 2 files changed, 95 insertions(+)
 create mode 100644 cpukit/libcsupport/src/gcovfork.c

diff --git a/cpukit/libcsupport/src/gcovfork.c 
b/cpukit/libcsupport/src/gcovfork.c
new file mode 100644
index 00..763412d735
--- /dev/null
+++ b/cpukit/libcsupport/src/gcovfork.c
@@ -0,0 +1,94 @@
+/* SPDX-License-Identifier: BSD-2-Clause */
+
+/**
+ * @file
+ *
+ * @ingroup libcsupport
+ *
+ * @brief This source file contains functions required by GCC if code and
+ *   branch coverage instrumentation (gcov) is enabled.
+ */
+
+/*
+ * Copyright (C) 2021 embedded brains GmbH (http://www.embedded-brains.de)
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *notice, this list of conditions and the following disclaimer in the
+ *documentation and/or other materials provided with the distribution.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS IS"
+ * AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
+ * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
+ * ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR CONTRIBUTORS BE
+ * LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
+ * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
+ * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
+ * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
+ * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
+ * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifdef HAVE_CONFIG_H
+#include "config.h"
+#endif
+
+#include 
+
+#include 
+
+#include 
+
+int __gcov_execl( const char *, char *, ... );
+
+int __gcov_execl( const char *path, char *arg, ... )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+int __gcov_execlp( const char *, char *, ... );
+
+int __gcov_execlp( const char *path, char *arg, ... )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+int __gcov_execle( const char *, char *, ... );
+
+int __gcov_execle( const char *path, char *arg, ... )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+int __gcov_execv( const char *, char *const[] );
+
+int __gcov_execv( const char *path, char *const argv[] )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+int __gcov_execvp( const char *, char *const[] );
+
+int __gcov_execvp( const char *path, char *const argv[] )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+int __gcov_execve( const char *, char *const[], char *const[] );
+
+int __gcov_execve( const char *path, char *const argv[], char *const envp[] )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
+
+pid_t __gcov_fork( void );
+
+pid_t __gcov_fork( void )
+{
+  rtems_set_errno_and_return_minus_one( ENOSYS );
+}
diff --git a/spec/build/cpukit/librtemscpu.yml 
b/spec/build/cpukit/librtemscpu.yml
index 965419c389..4a8a0ee1ad 100644
--- a/spec/build/cpukit/librtemscpu.yml
+++ b/spec/build/cpukit/librtemscpu.yml
@@ -640,6 +640,7 @@ source:
 - cpukit/libcsupport/src/ftruncate.c
 - cpukit/libcsupport/src/ftrylockfile.c
 - cpukit/libcsupport/src/funlockfile.c
+- cpukit/libcsupport/src/gcovfork.c
 - cpukit/libcsupport/src/getchark.c
 - cpukit/libcsupport/src/getdents.c
 - cpukit/libcsupport/src/getegid.c
-- 
2.35.3

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[PATCH 03/12] build: Fix identifier pattern

2022-06-29 Thread Sebastian Huber
Allow upper case characters in identifiers.

Update #4670.
---
 wscript | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/wscript b/wscript
index 38910f2816..731d1402ff 100755
--- a/wscript
+++ b/wscript
@@ -112,7 +112,7 @@ class EnvWrapper(object):
 
 
 class Template(string.Template):
-idpattern = "[_a-z][_a-z0-9:#]*"
+idpattern = "[_A-Za-z][_A-Za-z0-9:#]*"
 
 
 def _is_enabled_op_and(enabled, enabled_by):
-- 
2.35.3

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