Re: [PATCH 7/8] score: Distribute clock tick to all online CPUs

2016-03-03 Thread Joel Sherrill
On Thu, Mar 3, 2016 at 9:15 AM, Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

>
>
> On 03/03/16 16:14, Joel Sherrill wrote:
>
>> I don't necessarily see anything wrong but I don't see the overall design
>> and execution flow from the code. Is there some documentation?
>>
>
> I will update the clock driver documentation once the new documentation
> repository is ready for contribution.
>
> OK. File a ticket on it please. I am going to have to do the same for the
POSIX APIs I am adding.


> --
> Sebastian Huber, embedded brains GmbH
>
> Address : Dornierstr. 4, D-82178 Puchheim, Germany
> Phone   : +49 89 189 47 41-16
> Fax : +49 89 189 47 41-09
> E-Mail  : sebastian.hu...@embedded-brains.de
> PGP : Public key available on request.
>
> Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.
>
>
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Re: [PATCH 7/8] score: Distribute clock tick to all online CPUs

2016-03-03 Thread Joel Sherrill
I don't necessarily see anything wrong but I don't see the overall design
and execution flow from the code. Is there some documentation?

Sorry.. used the wrong reply to email address and it didn't hit the list.

On Thu, Mar 3, 2016 at 8:47 AM, Sebastian Huber <
sebastian.hu...@embedded-brains.de> wrote:

> Update #2554.
> ---
>  .../libbsp/arm/shared/arm-a9mpcore-clock-config.c  | 68
> +++---
>  c/src/lib/libbsp/arm/shared/arm-gic-irq.c  | 18 ++
>  c/src/lib/libbsp/arm/shared/include/arm-gic-irq.h  |  5 ++
>  c/src/lib/libbsp/i386/pc386/clock/ckinit.c | 15 +++--
>  c/src/lib/libbsp/i386/shared/smp/smp-imps.c| 11 +++-
>  .../lib/libbsp/powerpc/qoriq/clock/clock-config.c  |  9 ++-
>  c/src/lib/libbsp/powerpc/qoriq/include/irq.h   |  5 ++
>  c/src/lib/libbsp/powerpc/qoriq/irq/irq.c   | 20 ---
>  c/src/lib/libbsp/shared/clockdrv_shell.h   | 12 
>  c/src/lib/libbsp/shared/include/fatal.h|  1 +
>  c/src/lib/libbsp/sparc/erc32/clock/ckinit.c|  5 ++
>  c/src/lib/libbsp/sparc/leon3/clock/ckinit.c| 11 
>  cpukit/score/include/rtems/score/smpimpl.h | 34 +++
>  cpukit/score/include/rtems/score/watchdogimpl.h|  7 ++-
>  cpukit/score/src/kern_tc.c |  9 ++-
>  cpukit/score/src/smp.c |  5 +-
>  cpukit/score/src/watchdogtick.c| 10 ++--
>  17 files changed, 199 insertions(+), 46 deletions(-)
>
> diff --git a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
> b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
> index 8e2e153..3dcf708 100644
> --- a/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
> +++ b/c/src/lib/libbsp/arm/shared/arm-a9mpcore-clock-config.c
> @@ -1,5 +1,5 @@
>  /*
> - * Copyright (c) 2013-2015 embedded brains GmbH.  All rights reserved.
> + * Copyright (c) 2013, 2016 embedded brains GmbH.  All rights reserved.
>   *
>   *  embedded brains GmbH
>   *  Dornierstr. 4
> @@ -15,9 +15,11 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  #include 
>  #include 
>  #include 
> +#include 
>
>  #define A9MPCORE_GT ((volatile a9mpcore_gt *) BSP_ARM_A9MPCORE_GT_BASE)
>
> @@ -77,6 +79,60 @@ static uint32_t a9mpcore_clock_get_timecount(struct
> timecounter *tc)
>return gt->cntrlower;
>  }
>
> +static void a9mpcore_clock_gt_init(
> +  volatile a9mpcore_gt *gt,
> +  uint64_t cmpval,
> +  uint32_t interval
> +)
> +{
> +  gt->cmpvallower = (uint32_t) cmpval;
> +  gt->cmpvalupper = (uint32_t) (cmpval >> 32);
> +  gt->autoinc = interval;
> +  gt->ctrl = A9MPCORE_GT_CTRL_AUTOINC_EN
> +| A9MPCORE_GT_CTRL_IRQ_EN
> +| A9MPCORE_GT_CTRL_COMP_EN
> +| A9MPCORE_GT_CTRL_TMR_EN;
> +}
> +
> +#ifdef RTEMS_SMP
> +typedef struct {
> +  uint64_t cmpval;
> +  uint32_t interval;
> +} a9mpcore_clock_init_data;
> +
> +static void a9mpcore_clock_secondary_action(void *arg)
> +{
> +  volatile a9mpcore_gt *gt = A9MPCORE_GT;
> +  a9mpcore_clock_init_data *init_data = arg;
> +
> +  a9mpcore_clock_gt_init(gt, init_data->cmpval, init_data->interval);
> +  bsp_interrupt_vector_enable(A9MPCORE_IRQ_GT);
> +}
> +#endif
> +
> +static void a9mpcore_clock_secondary_initialization(
> +  volatile a9mpcore_gt *gt,
> +  uint64_t cmpval,
> +  uint32_t interval
> +)
> +{
> +#ifdef RTEMS_SMP
> +  a9mpcore_clock_init_data init_data = {
> +.cmpval = cmpval,
> +.interval = interval
> +  };
> +
> +  _SMP_Before_multitasking_action_broadcast(
> +a9mpcore_clock_secondary_action,
> +_data
> +  );
> +
> +  if (cmpval - a9mpcore_clock_get_counter(gt) >= interval) {
> +bsp_fatal(BSP_ARM_A9MPCORE_FATAL_CLOCK_SMP_INIT);
> +  }
> +#endif
> +}
> +
>  static void a9mpcore_clock_initialize(void)
>  {
>volatile a9mpcore_gt *gt = A9MPCORE_GT;
> @@ -91,14 +147,8 @@ static void a9mpcore_clock_initialize(void)
>cmpval = a9mpcore_clock_get_counter(gt);
>cmpval += interval;
>
> -  gt->cmpvallower = (uint32_t) cmpval;
> -  gt->cmpvalupper = (uint32_t) (cmpval >> 32);
> -  gt->autoinc = interval;
> -
> -  gt->ctrl = A9MPCORE_GT_CTRL_AUTOINC_EN
> -| A9MPCORE_GT_CTRL_IRQ_EN
> -| A9MPCORE_GT_CTRL_COMP_EN
> -| A9MPCORE_GT_CTRL_TMR_EN;
> +  a9mpcore_clock_gt_init(gt, cmpval, interval);
> +  a9mpcore_clock_secondary_initialization(gt, cmpval, interval);
>
>a9mpcore_tc.tc_get_timecount = a9mpcore_clock_get_timecount;
>a9mpcore_tc.tc_counter_mask = 0x;
> diff --git a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
> b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
> index 7623489..487ee16 100644
> --- a/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
> +++ b/c/src/lib/libbsp/arm/shared/arm-gic-irq.c
> @@ -164,3 +164,21 @@ rtems_status_code arm_gic_irq_get_priority(
>
>return sc;
>  }
> +
> +rtems_status_code arm_gic_irq_set_affinity(
> +  rtems_vector_number vector,
> +  uint8_t targets
> +)
> +{
> +  rtems_status_code sc = RTEMS_SUCCESSFUL;
> +
> +  if (bsp_interrupt_is_valid_vector(vector)) {
> +volatile 

Re: [PATCH 7/8] score: Distribute clock tick to all online CPUs

2016-03-03 Thread Sebastian Huber



On 03/03/16 16:14, Joel Sherrill wrote:

I don't necessarily see anything wrong but I don't see the overall design
and execution flow from the code. Is there some documentation?


I will update the clock driver documentation once the new documentation 
repository is ready for contribution.


--
Sebastian Huber, embedded brains GmbH

Address : Dornierstr. 4, D-82178 Puchheim, Germany
Phone   : +49 89 189 47 41-16
Fax : +49 89 189 47 41-09
E-Mail  : sebastian.hu...@embedded-brains.de
PGP : Public key available on request.

Diese Nachricht ist keine geschäftliche Mitteilung im Sinne des EHUG.

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