Re: [PATCH V11 4/7] dma: add Qualcomm Technologies HIDMA channel driver

[Andy Shevchenko]

On Mon, Jan 4, 2016 at 2:06 AM, Sinan Kaya  wrote:
> This patch adds support for hidma engine. The driver consists of two
> logical blocks. The DMA engine interface and the low-level interface.
> The hardware only supports memcpy/memset and this driver only support
> memcpy interface. HW and driver doesn't support slave interface.
>

Looks fine now.

Reviewed-by: Andy Shevchenko 

> Signed-off-by: Sinan Kaya 
> ---
>  drivers/dma/qcom/Kconfig |  10 +
>  drivers/dma/qcom/hidma.c | 744 
> +++
>  drivers/dma/qcom/hidma.h | 160 ++
>  3 files changed, 914 insertions(+)
>  create mode 100644 drivers/dma/qcom/hidma.c
>  create mode 100644 drivers/dma/qcom/hidma.h
>
> diff --git a/drivers/dma/qcom/Kconfig b/drivers/dma/qcom/Kconfig
> index ebe5b8c..5588e1c 100644
> --- a/drivers/dma/qcom/Kconfig
> +++ b/drivers/dma/qcom/Kconfig
> @@ -17,3 +17,13 @@ config QCOM_HIDMA_MGMT
>   start managing the channels. In a virtualized environment,
>   the guest OS would run QCOM_HIDMA channel driver and the
>   hypervisor would run the QCOM_HIDMA_MGMT management driver.
> +
> +config QCOM_HIDMA
> +   tristate "Qualcomm Technologies HIDMA Channel support"
> +   select DMA_ENGINE
> +   help
> + Enable support for the Qualcomm Technologies HIDMA controller.
> + The HIDMA controller supports optimized buffer copies
> + (user to kernel, kernel to kernel, etc.).  It only supports
> + memcpy interface. The core is not intended for general
> + purpose slave DMA.
> diff --git a/drivers/dma/qcom/hidma.c b/drivers/dma/qcom/hidma.c
> new file mode 100644
> index 000..f8960f1
> --- /dev/null
> +++ b/drivers/dma/qcom/hidma.c
> @@ -0,0 +1,744 @@
> +/*
> + * Qualcomm Technologies HIDMA DMA engine interface
> + *
> + * Copyright (c) 2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +/*
> + * Copyright (C) Freescale Semicondutor, Inc. 2007, 2008.
> + * Copyright (C) Semihalf 2009
> + * Copyright (C) Ilya Yanok, Emcraft Systems 2010
> + * Copyright (C) Alexander Popov, Promcontroller 2014
> + *
> + * Written by Piotr Ziecik . Hardware description
> + * (defines, structures and comments) was taken from MPC5121 DMA driver
> + * written by Hongjun Chen .
> + *
> + * Approved as OSADL project by a majority of OSADL members and funded
> + * by OSADL membership fees in 2009;  for details see www.osadl.org.
> + *
> + * This program is free software; you can redistribute it and/or modify it
> + * under the terms of the GNU General Public License as published by the Free
> + * Software Foundation; either version 2 of the License, or (at your option)
> + * any later version.
> + *
> + * This program is distributed in the hope that it will be useful, but 
> WITHOUT
> + * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
> + * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
> + * more details.
> + *
> + * The full GNU General Public License is included in this distribution in 
> the
> + * file called COPYING.
> + */
> +
> +/* Linux Foundation elects GPLv2 license only. */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "../dmaengine.h"
> +#include "hidma.h"
> +
> +/*
> + * Default idle time is 2 seconds. This parameter can
> + * be overridden by changing the following
> + * /sys/bus/platform/devices/QCOM8061:/power/autosuspend_delay_ms
> + * during kernel boot.
> + */
> +#define HIDMA_AUTOSUSPEND_TIMEOUT  2000
> +#define HIDMA_ERR_INFO_SW  0xFF
> +#define HIDMA_ERR_CODE_UNEXPECTED_TERMINATE0x0
> +
> +static inline struct hidma_dev *to_hidma_dev(struct dma_device *dmadev)
> +{
> +   return container_of(dmadev, struct hidma_dev, ddev);
> +}
> +
> +static inline
> +struct hidma_dev *to_hidma_dev_from_lldev(struct hidma_lldev **_lldevp)
> +{
> +   return container_of(_lldevp, struct hidma_dev, lldev);
> +}
> +
> +static inline struct hidma_chan *to_hidma_chan(struct dma_chan *dmach)
> +{
> +   return container_of(dmach, struct hidma_chan, chan);
> +}
> +
> +static inline
> +struct hidma_desc *to_hidma_desc(struct dma_async_tx_descriptor *t)
> +{
> +   return container_of(t, struct 

Re: [linux-sunxi] Re: [PATCH v2 1/3] reset: Add shared reset_control_[de]assert variants

[Michal Suchanek]

On 4 January 2016 at 21:39, Philipp Zabel  wrote:
> Am Samstag, den 19.12.2015, 11:55 +0100 schrieb Hans de Goede:
>> On 18-12-15 12:08, Maxime Ripard wrote:

>> >  - If the reset line is in a !exclusive use with more than 1 user,
>> >the refcount is modified and an error is returned to notify that
>> >it didn't happen.
>>
>> Also ack, except for returning the error, if a driver has used
>> reset_control_get_shared, it should simply be aware that doing an assert
>> might not necessarily actually assert the line, just like doing a clk-disable
>> does not really necessary disable the clock, etc. If a driver is not prepared
>> to deal with this, it should simply not use reset_control_get_shared.
>>
>> I see returning an error if the assert did not happen due to other users /
>> deassert_count != 0 as inconsistent compared to how clks, regulators and phys
>> handle this, these all simply return success in this case.
>
> I wouldn't want drivers to have to differentiate between relevant and
> irrelevant error codes, so in the clock-like refcounting use case
> reset_assert should not return an error if it just correctly decremented
> the refcount. I'd still prefer to have separate API for the counted
> must_deassert/may_assert vs the exclusive must_assert/must_deassert use
> cases, but I just can't think of a good name.
>

Maybe something along the lines of assert_now or assert_sync. It
should be possible to call on shared line and then get an error when
the operation is blocked by other user.

The driver may not really care. Depending on the hardware the line can
be shared on one device and exclusive on another. The driver may just
let the line go when the device is powered off. And it may require a
reset cycle when it detects the device is hosed and return an error
when the reset fails for whatever reason.

Thanks

Michal
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Re: [PATCH V11 5/7] dma: qcom_hidma: implement lower level hardware interface

[Andy Shevchenko]

On Mon, Jan 4, 2016 at 2:06 AM, Sinan Kaya  wrote:
> This patch implements the hardware hooks for the HIDMA channel driver.
>
> The main functions of interest are:
> - hidma_ll_init
> - hidma_ll_request
> - hidma_ll_queue_request
> - hidma_ll_hw_start
>
> OS layer calls the hidma_ll_init function during probe to set up the
> hardware. At this moment, the number of supported descriptors are also
> given. On each request, a descriptor is allocated from the free pool and
> filled in with the transfer parameters. Multiple requests can be queued
> into the hardware via the OS interface. When client is ready for requests
> to be executed, start method is called.
>
> Completions are delivered via callbacks via tasklet.

Few nitpicks below.

>
> Signed-off-by: Sinan Kaya 
> ---
>  drivers/dma/qcom/Makefile   |   2 +
>  drivers/dma/qcom/hidma.h|   2 +-
>  drivers/dma/qcom/hidma_ll.c | 927 
> 
>  3 files changed, 930 insertions(+), 1 deletion(-)
>  create mode 100644 drivers/dma/qcom/hidma_ll.c
>
> diff --git a/drivers/dma/qcom/Makefile b/drivers/dma/qcom/Makefile
> index bfea699..6bf9267 100644
> --- a/drivers/dma/qcom/Makefile
> +++ b/drivers/dma/qcom/Makefile
> @@ -1,3 +1,5 @@
>  obj-$(CONFIG_QCOM_BAM_DMA) += bam_dma.o
>  obj-$(CONFIG_QCOM_HIDMA_MGMT) += hdma_mgmt.o
>  hdma_mgmt-objs  := hidma_mgmt.o hidma_mgmt_sys.o
> +obj-$(CONFIG_QCOM_HIDMA) +=  hdma.o
> +hdma-objs:= hidma_ll.o hidma.o
> diff --git a/drivers/dma/qcom/hidma.h b/drivers/dma/qcom/hidma.h
> index 231e306..1e09d7c 100644
> --- a/drivers/dma/qcom/hidma.h
> +++ b/drivers/dma/qcom/hidma.h
> @@ -37,7 +37,7 @@ struct hidma_tre {
> atomic_t allocated; /* if this channel is allocated */
> bool queued;/* flag whether this is pending */
> u16 status; /* status   */
> -   u32 chidx;  /* index of the tre */
> +   u32 idx;/* index of the tre */
> u32 dma_sig;/* signature of the tre */
> const char *dev_name;   /* name of the device   */
> void (*callback)(void *data);   /* requester callback   */
> diff --git a/drivers/dma/qcom/hidma_ll.c b/drivers/dma/qcom/hidma_ll.c
> new file mode 100644
> index 000..0cd8d70
> --- /dev/null
> +++ b/drivers/dma/qcom/hidma_ll.c
> @@ -0,0 +1,927 @@
> +/*
> + * Qualcomm Technologies HIDMA DMA engine low level code
> + *
> + * Copyright (c) 2015, The Linux Foundation. All rights reserved.
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 and
> + * only version 2 as published by the Free Software Foundation.
> + *
> + * This program is distributed in the hope that it will be useful,
> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> + * GNU General Public License for more details.
> + */
> +
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +#include 
> +
> +#include "hidma.h"
> +
> +#define EVRE_SIZE  16  /* each EVRE is 16 bytes */
> +
> +#define TRCA_CTRLSTS_OFFSET0x0
> +#define TRCA_RING_LOW_OFFSET   0x8
> +#define TRCA_RING_HIGH_OFFSET  0xC
> +#define TRCA_RING_LEN_OFFSET   0x10
> +#define TRCA_READ_PTR_OFFSET   0x18
> +#define TRCA_WRITE_PTR_OFFSET  0x20
> +#define TRCA_DOORBELL_OFFSET   0x400

I would rather have same precision for all offsets
like
...CTRLSTS_OFFSET  0x000
and so on

> +
> +#define EVCA_CTRLSTS_OFFSET0x0
> +#define EVCA_INTCTRL_OFFSET0x4
> +#define EVCA_RING_LOW_OFFSET   0x8
> +#define EVCA_RING_HIGH_OFFSET  0xC
> +#define EVCA_RING_LEN_OFFSET   0x10
> +#define EVCA_READ_PTR_OFFSET   0x18
> +#define EVCA_WRITE_PTR_OFFSET  0x20
> +#define EVCA_DOORBELL_OFFSET   0x400

Ditto.

> +
> +#define EVCA_IRQ_STAT_OFFSET   0x100
> +#define EVCA_IRQ_CLR_OFFSET0x108
> +#define EVCA_IRQ_EN_OFFSET 0x110
> +
> +#define EVRE_CFG_IDX   0
> +#define EVRE_LEN_IDX   1
> +#define EVRE_DEST_LOW_IDX  2
> +#define EVRE_DEST_HI_IDX   3
> +
> +#define EVRE_ERRINFO_BIT_POS   24
> +#define EVRE_CODE_BIT_POS  28
> +
> +#define EVRE_ERRINFO_MASK  GENMASK(3, 0)
> +#define EVRE_CODE_MASK GENMASK(3, 0)
> +
> +#define CH_CONTROL_MASKGENMASK(7, 0)
> +#define CH_STATE_MASK  GENMASK(7, 0)
> +#define CH_STATE_BIT_POS   0x8
> +
> +#define IRQ_EV_CH_EOB_IRQ_BIT_POS  0
> 

Re: [PATCH] ARM: dts: compulab: add new board description

[Igor Grinberg]

Arnd, Olof,

Will we be able to get this in for 4.5 trough your tree?
Or should we get it in some other way around?

On 12/23/15 01:21, Rob Herring wrote:
> On Tue, Dec 22, 2015 at 11:10:59AM +0200, Ilya Ledvich wrote:
>> Add description for newly introduced Compulab devices:
>> - CL-SOM-iMX7
>> - SBC-iMX7
>>
>> Signed-off-by: Ilya Ledvich 
> 
> Acked-by: Rob Herring 
> 
> 

-- 
Regards,
Igor.
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Re: [PATCH 2/2] devicetree: Add DTS file to support the Nexus7 2013 (flo) device.

[John Stultz]

On Fri, Dec 11, 2015 at 5:22 PM, John Stultz  wrote:
> This patch adds a dts file to support the Nexus7 2013
> device. Its based off of the qcom-apq8064-ifc6410.dts
> which is similar hardware.
>
> Also includes some comments and context folded in
> from Vinay Simha BN 

Happy new years, all!

Just wanted to send a quick ping on this, to see if there was any
feedback or issues that might be keeping this from being queued?

thanks
-john
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Re: [linux-sunxi] Re: [PATCH v2 1/3] reset: Add shared reset_control_[de]assert variants

[Philipp Zabel]

Am Samstag, den 19.12.2015, 11:55 +0100 schrieb Hans de Goede:
> On 18-12-15 12:08, Maxime Ripard wrote:
[...]
> > I guess we could also have something like this:
> >
> >* The driver gets the reference to the reset line using
> >  reset_control_get or its shared variant.
> >
> >  - If you call reset_control_get on a free line, it succeeds, and
> >marks the line in exclusive use.
> >  - If you call reset_control_get on a busy line, it fails with
> >EBUSY
> >
> >  - If you call the shared variant on a free line, it succeeds
> >  - If you call the shared variant on a busy exclusive line, it
> >fails with EBUSY
> >  - If you call the shared variant on a busy !exclusive line, it
> >succeeds.
>>
> >* The customer driver can then call reset_control_assert / deassert:
> >
> >  - If the reset line is in exclusive use, the assertion happens
> >right away, it succeeds and returns 0.
> >
> >  - If the reset line is in a !exclusive use, but with a single
> >user, the assertion happens right away, it succeeds and returns
> >0.
>
> Ack for all of the above, this is what I had in mind at first, but I started
> with a more lightweight version as I'm lazy :)  If Philipp likes this
> suggestion I can rework my patch-set into this.

Seconded, this all sounds good to me.

> >  - If the reset line is in a !exclusive use with more than 1 user,
> >the refcount is modified and an error is returned to notify that
> >it didn't happen.
>
> Also ack, except for returning the error, if a driver has used
> reset_control_get_shared, it should simply be aware that doing an assert
> might not necessarily actually assert the line, just like doing a clk-disable
> does not really necessary disable the clock, etc. If a driver is not prepared
> to deal with this, it should simply not use reset_control_get_shared.
>
> I see returning an error if the assert did not happen due to other users /
> deassert_count != 0 as inconsistent compared to how clks, regulators and phys
> handle this, these all simply return success in this case.

I wouldn't want drivers to have to differentiate between relevant and
irrelevant error codes, so in the clock-like refcounting use case
reset_assert should not return an error if it just correctly decremented
the refcount. I'd still prefer to have separate API for the counted
must_deassert/may_assert vs the exclusive must_assert/must_deassert use
cases, but I just can't think of a good name.

regards
Philipp

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Re: [PATCH V11 3/7] dma: add Qualcomm Technologies HIDMA management driver

[Andy Shevchenko]

On Mon, Jan 4, 2016 at 2:06 AM, Sinan Kaya  wrote:
> The Qualcomm Technologies HIDMA device has been designed to support
> virtualization technology. The driver has been divided into two to follow
> the hardware design.
>
> 1. HIDMA Management driver
> 2. HIDMA Channel driver
>
> Each HIDMA HW consists of multiple channels. These channels share some set
> of common parameters. These parameters are initialized by the management
> driver during power up. Same management driver is used for monitoring the
> execution of the channels. Management driver can change the performance
> behavior dynamically such as bandwidth allocation and prioritization.
>
> The management driver is executed in hypervisor context and is the main
> management entity for all channels provided by the device.
>
> Signed-off-by: Sinan Kaya 
> Reviewed-by: Andy Shevchenko 
> ---
>  .../ABI/testing/sysfs-platform-hidma-mgmt  |  97 +++
>  drivers/dma/qcom/Kconfig   |  11 +
>  drivers/dma/qcom/Makefile  |   2 +
>  drivers/dma/qcom/hidma_mgmt.c  | 302 
> +
>  drivers/dma/qcom/hidma_mgmt.h  |  39 +++
>  drivers/dma/qcom/hidma_mgmt_sys.c  | 295 
>  6 files changed, 746 insertions(+)
>  create mode 100644 Documentation/ABI/testing/sysfs-platform-hidma-mgmt
>  create mode 100644 drivers/dma/qcom/hidma_mgmt.c
>  create mode 100644 drivers/dma/qcom/hidma_mgmt.h
>  create mode 100644 drivers/dma/qcom/hidma_mgmt_sys.c
>
> diff --git a/Documentation/ABI/testing/sysfs-platform-hidma-mgmt 
> b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
> new file mode 100644
> index 000..c2fb5d0
> --- /dev/null
> +++ b/Documentation/ABI/testing/sysfs-platform-hidma-mgmt
> @@ -0,0 +1,97 @@
> +What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/priority
> +   /sys/devices/platform/QCOM8060:*/chanops/chan*/priority
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains either 0 or 1 and indicates if the DMA channel is a
> +   low priority (0) or high priority (1) channel.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/chanops/chan*/weight
> +   /sys/devices/platform/QCOM8060:*/chanops/chan*/weight
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains 0..15 and indicates the weight of the channel among
> +   equal priority channels during round robin scheduling.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/chreset_timeout_cycles
> +   /sys/devices/platform/QCOM8060:*/chreset_timeout_cycles
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains the platform specific cycle value to wait after a
> +   reset command is issued. If the value is chosen too short,
> +   then the HW will issue a reset failure interrupt. The value
> +   is platform specific and should not be changed without
> +   consultance.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/dma_channels
> +   /sys/devices/platform/QCOM8060:*/dma_channels
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains the number of dma channels supported by one instance
> +   of HIDMA hardware. The value may change from chip to chip.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/hw_version_major
> +   /sys/devices/platform/QCOM8060:*/hw_version_major
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Version number major for the hardware.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/hw_version_minor
> +   /sys/devices/platform/QCOM8060:*/hw_version_minor
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Version number minor for the hardware.
> +
> +What:  /sys/devices/platform/hidma-mgmt*/max_rd_xactions
> +   /sys/devices/platform/QCOM8060:*/max_rd_xactions
> +Date:  Nov 2015
> +KernelVersion: 4.4
> +Contact:   "Sinan Kaya "
> +Description:
> +   Contains a value between 0 and 31. Maximum number of
> +   read transactions that can be issued back to back.
> +   Choosing a higher number gives better performance but
> +   can also cause performance reduction to other peripherals
> +   sharing the same bus.
> +
> +What:  

Re: [PATCH v7 06/14] drm/mediatek: Add HDMI support

[Philipp Zabel]

Am Dienstag, den 29.12.2015, 16:49 +0800 schrieb Yingjoe Chen:
> On Mon, 2015-11-30 at 22:07 +0100, Philipp Zabel wrote:
> > From: Jie Qiu 
> > 
> > This patch adds drivers for the HDMI bridge connected to the DPI0
> > display subsystem function block, for the HDMI DDC block, and for
> > the HDMI PHY to support HDMI output.
> > 
> > Signed-off-by: Jie Qiu 
> > Signed-off-by: Philipp Zabel 
> > ---
> <...>
> > +static int mtk_hdmi_setup_avi_infoframe(struct mtk_hdmi *hdmi,
> > +   struct drm_display_mode *mode)
> > +{
> > +   struct hdmi_avi_infoframe frame;
> > +   u8 buffer[17];
> > +   ssize_t err;
> > +
> > +   err = drm_hdmi_avi_infoframe_from_display_mode(, mode);
> > +   if (err < 0) {
> > +   dev_err(hdmi->dev,
> > +   "Failed to get AVI infoframe from mode: %ld\n", err);
> 
> Please use %zd instead for ssize_t, otherwise you'll see warning message
> when compile this on 32bits platform.
> 
> Joe.C

Ok, thanks.

regards
Philipp

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[PATCH v4 net-next 0/3] Add new capability and macb DT variant

[Neil Armstrong]

The first patch introduces a new capability bit to disable usage of the
USRIO register on platform not implementing it thus avoiding some external
imprecise aborts on ARM based platforms.
The two last patchs adds a new macb variant compatible name using the
capability, the NPx name is temporary and must be fixed when the first patch
hits mainline.

Only the first patch should be merged right now until the compatible name
is fixed.

v1: 
http://lkml.kernel.org/r/1449485914-12883-1-git-send-email-narmstr...@baylibre.com
v2: 
http://lkml.kernel.org/r/1449582726-6148-1-git-send-email-narmstr...@baylibre.com
v3: 
http://lkml.kernel.org/r/1451898103-21868-1-git-send-email-narmstr...@baylibre.com
v4: as nicolas suggested, use a new macb config and a new product/vendor prefix

Neil Armstrong (3):
  net: ethernet: cadence-macb: Add disabled usrio caps
  net: macb: Add NPx macb config using USRIO_DISABLED cap
  dt-bindings: net: macb: Add NPx macb variant

 Documentation/devicetree/bindings/net/macb.txt |  1 +
 drivers/net/ethernet/cadence/macb.c| 33 --
 drivers/net/ethernet/cadence/macb.h|  1 +
 3 files changed, 23 insertions(+), 12 deletions(-)

-- 
1.9.1

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[PATCH v3 6/8] media: vcodec: mediatek: Add Mediatek VP8 Video Encoder Driver

[Tiffany Lin]

Add vp8 encoder driver for MT8173

Signed-off-by: Daniel Hsiao 
Signed-off-by: Tiffany Lin 
---
 drivers/media/platform/mtk-vcodec/Makefile |2 +
 drivers/media/platform/mtk-vcodec/venc_drv_if.c|3 +
 drivers/media/platform/mtk-vcodec/vp8_enc/Makefile |6 +
 .../platform/mtk-vcodec/vp8_enc/venc_vp8_if.c  |  419 
 .../platform/mtk-vcodec/vp8_enc/venc_vp8_if.h  |  145 +++
 .../platform/mtk-vcodec/vp8_enc/venc_vp8_vpu.c |  221 +++
 .../platform/mtk-vcodec/vp8_enc/venc_vp8_vpu.h |   28 ++
 7 files changed, 824 insertions(+)
 create mode 100644 drivers/media/platform/mtk-vcodec/vp8_enc/Makefile
 create mode 100644 drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_if.c
 create mode 100644 drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_if.h
 create mode 100644 drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_vpu.c
 create mode 100644 drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_vpu.h

diff --git a/drivers/media/platform/mtk-vcodec/Makefile 
b/drivers/media/platform/mtk-vcodec/Makefile
index ce38689..f4ef502 100644
--- a/drivers/media/platform/mtk-vcodec/Makefile
+++ b/drivers/media/platform/mtk-vcodec/Makefile
@@ -5,4 +5,6 @@ obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk_vcodec_intr.o \
   mtk_vcodec_enc_pm.o \
   venc_drv_if.o
 
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += vp8_enc/
+
 ccflags-y += -I$(srctree)/drivers/media/platform/mtk-vpu
diff --git a/drivers/media/platform/mtk-vcodec/venc_drv_if.c 
b/drivers/media/platform/mtk-vcodec/venc_drv_if.c
index daa8e93..d293f2c 100644
--- a/drivers/media/platform/mtk-vcodec/venc_drv_if.c
+++ b/drivers/media/platform/mtk-vcodec/venc_drv_if.c
@@ -24,6 +24,7 @@
 #include "mtk_vpu.h"
 
 #include "venc_drv_base.h"
+#include "vp8_enc/venc_vp8_if.h"
 
 int venc_if_create(struct mtk_vcodec_ctx *ctx, unsigned int fourcc)
 {
@@ -34,6 +35,8 @@ int venc_if_create(struct mtk_vcodec_ctx *ctx, unsigned int 
fourcc)
 
switch (fourcc) {
case V4L2_PIX_FMT_VP8:
+ctx->enc_if = get_vp8_enc_comm_if();
+break;
case V4L2_PIX_FMT_H264:
default:
return -EINVAL;
diff --git a/drivers/media/platform/mtk-vcodec/vp8_enc/Makefile 
b/drivers/media/platform/mtk-vcodec/vp8_enc/Makefile
new file mode 100644
index 000..0f515c7
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/vp8_enc/Makefile
@@ -0,0 +1,6 @@
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += venc_vp8_if.o venc_vp8_vpu.o
+
+ccflags-y += \
+-I$(srctree)/drivers/media/platform/mtk-vcodec/ \
+-I$(srctree)/drivers/media/platform/mtk-vcodec/vp8_enc \
+-I$(srctree)/drivers/media/platform/mtk-vpu
diff --git a/drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_if.c 
b/drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_if.c
new file mode 100644
index 000..dbd88a8
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/vp8_enc/venc_vp8_if.c
@@ -0,0 +1,419 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Daniel Hsiao 
+ * PoChun Lin 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_vcodec_drv.h"
+#include "mtk_vcodec_util.h"
+#include "mtk_vcodec_intr.h"
+#include "mtk_vcodec_enc.h"
+#include "mtk_vcodec_pm.h"
+#include "mtk_vpu.h"
+
+#include "venc_vp8_if.h"
+#include "venc_vp8_vpu.h"
+
+#define VENC_PIC_BITSTREAM_BYTE_CNT 0x0098
+#define VENC_PIC_BITSTREAM_BYTE_CNT1 0x00e8
+#define VENC_IRQ_STATUS_ENC_FRM_INT 0x04
+
+#define MAX_AC_TAG_SZ 10
+
+static inline void vp8_enc_write_reg(struct venc_vp8_inst *inst, u32 addr,
+u32 val)
+{
+   writel(val, inst->hw_base + addr);
+}
+
+static inline u32 vp8_enc_read_reg(struct venc_vp8_inst *inst, u32 addr)
+{
+   return readl(inst->hw_base + addr);
+}
+
+static void vp8_enc_free_work_buf(struct venc_vp8_inst *inst)
+{
+   int i;
+
+   mtk_vcodec_debug_enter(inst);
+
+   /* Except the RC_CODEx buffers, other buffers need to be freed by AP. */
+   for (i = 0; i < VENC_VP8_VPU_WORK_BUF_MAX; i++)
+   if ((i != VENC_VP8_VPU_WORK_BUF_RC_CODE) &&
+   (i != VENC_VP8_VPU_WORK_BUF_RC_CODE2) &&
+   (i != VENC_VP8_VPU_WORK_BUF_RC_CODE3))
+   if (inst->work_bufs[i].va != NULL)
+   mtk_vcodec_mem_free(inst->ctx,
+  

[PATCH v3 8/8] arm64: dts: mediatek: Add Video Encoder for MT8173

[Tiffany Lin]

Add video encoder node for MT8173

Signed-off-by: Tiffany Lin 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   37 ++
 1 file changed, 37 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index b3636cd..09f29c5 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -1138,6 +1138,43 @@
clock-names = "apb", "smi";
};
 
+   vcodec_enc: vcodec@18002000 {
+   compatible = "mediatek,mt8173-vcodec-enc";
+   reg = <0 0x18002000 0 0x1000>,  /* VENC_SYS */
+ <0 0x19002000 0 0x1000>;  /* VENC_LT_SYS */
+   interrupts = ,
+;
+   mediatek,larb = <>,
+   <>;
+   iommus = < M4U_PORT_VENC_RCPU>,
+< M4U_PORT_VENC_REC>,
+< M4U_PORT_VENC_BSDMA>,
+< M4U_PORT_VENC_SV_COMV>,
+< M4U_PORT_VENC_RD_COMV>,
+< M4U_PORT_VENC_CUR_LUMA>,
+< M4U_PORT_VENC_CUR_CHROMA>,
+< M4U_PORT_VENC_REF_LUMA>,
+< M4U_PORT_VENC_REF_CHROMA>,
+< M4U_PORT_VENC_NBM_RDMA>,
+< M4U_PORT_VENC_NBM_WDMA>,
+< M4U_PORT_VENC_RCPU_SET2>,
+< M4U_PORT_VENC_REC_FRM_SET2>,
+< M4U_PORT_VENC_BSDMA_SET2>,
+< M4U_PORT_VENC_SV_COMA_SET2>,
+< M4U_PORT_VENC_RD_COMA_SET2>,
+< M4U_PORT_VENC_CUR_LUMA_SET2>,
+< M4U_PORT_VENC_CUR_CHROMA_SET2>,
+< M4U_PORT_VENC_REF_LUMA_SET2>,
+< M4U_PORT_VENC_REC_CHROMA_SET2>;
+   mediatek,vpu = <>;
+   clocks = < CLK_APMIXED_VENCPLL>,
+< CLK_TOP_VENC_LT_SEL>,
+< CLK_TOP_VCODECPLL_370P5>;
+   clock-names = "vencpll",
+ "venc_lt_sel",
+ "vcodecpll_370p5_ck";
+   };
+
vencltsys: clock-controller@1900 {
compatible = "mediatek,mt8173-vencltsys", "syscon";
reg = <0 0x1900 0 0x1000>;
-- 
1.7.9.5

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[RFC PATCH v1 1/2] drm/rockchip: vop: add rk3229 vop support

[Yakir Yang]

RK3229 registers layout is simalar to RK3288 layout, only the
interruput registers is different to RK3288.

RK3229 support two overlay plane and one hwc plane, max output
resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Yakir Yang 
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   7 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 120 
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  90 +
 4 files changed, 217 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d83bf87..3c83097 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -63,9 +63,12 @@
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
int i, reg = 0; \
-   for (i = 0; i < vop->data->intr->nintrs; i++) { \
-   if (vop->data->intr->intrs[i] & type) \
+   const struct vop_intr *intr = vop->data->intr; \
+   for (i = 0; i < intr->nintrs; i++) { \
+   if (intr->intrs[i] & type) { \
reg |= (v) << i; \
+   reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
+   } \
} \
VOP_INTR_SET(vop, name, reg); \
} while (0)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 071ff0b..1e839e8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -60,6 +60,7 @@ struct vop_ctrl {
 };
 
 struct vop_intr {
+   bool write_mask;
const int *intrs;
uint32_t nintrs;
struct vop_reg enable;
@@ -136,6 +137,7 @@ struct vop_data {
 };
 
 /* interrupt define */
+#define DUMMY_INTR (0 << 0)
 #define DSP_HOLD_VALID_INTR(1 << 0)
 #define FS_INTR(1 << 1)
 #define LINE_FLAG_INTR (1 << 2)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 3166b46..bbcd128 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
 };
 
 static const struct vop_intr rk3288_vop_intr = {
+   .write_mask = false,
.intrs = rk3288_vop_intrs,
.nintrs = ARRAY_SIZE(rk3288_vop_intrs),
.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
@@ -190,6 +191,122 @@ static const struct vop_data rk3288_vop = {
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
 };
 
+static const struct vop_scl_extension rk3229_win_full_scl_ext = {
+   .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
+   .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
+   .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
+   .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
+   .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
+   .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
+   .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
+   .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
+   .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
+   .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
+   .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
+   .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
+   .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
+   .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
+   .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
+   .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
+   .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
+   .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
+   .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
+   .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
+   .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3229_win_full_scl = {
+   .ext = _win_full_scl_ext,
+   .scale_yrgb_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 0x0),
+   .scale_yrgb_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 16),
+   .scale_cbcr_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 0x0),
+   .scale_cbcr_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 16),
+};
+
+static const struct vop_win_phy rk3229_win01_data = {
+   .scl = _win_full_scl,
+   .data_formats = formats_win_full,
+   .nformats = ARRAY_SIZE(formats_win_full),
+   .enable = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 0),
+   .format = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 1),
+   .rb_swap = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 12),
+   .act_info = 

Re: [PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

[Nicolas Ferre]

Le 04/01/2016 10:42, Neil Armstrong a écrit :
> Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
> capability bit.
> 
> Signed-off-by: Neil Armstrong 
> ---
>  drivers/net/ethernet/cadence/macb.c | 6 ++
>  1 file changed, 6 insertions(+)
> 
> diff --git a/drivers/net/ethernet/cadence/macb.c 
> b/drivers/net/ethernet/cadence/macb.c
> index fa53bc3..a9e27a7 100644
> --- a/drivers/net/ethernet/cadence/macb.c
> +++ b/drivers/net/ethernet/cadence/macb.c
> @@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
>   .init = at91ether_init,
>  };
>  
> +static const struct macb_config npx_config = {
> + .caps = MACB_CAPS_USRIO_DISABLED,
> + .clk_init = macb_clk_init,
> + .init = macb_init,
> +};
>  
>  static const struct macb_config zynqmp_config = {
>   .caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
> @@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
>   { .compatible = "cdns,at32ap7000-macb" },
>   { .compatible = "cdns,at91sam9260-macb", .data = _config },
>   { .compatible = "cdns,macb" },
> + { .compatible = "cdns,npx-macb", .data = _config },

I can accept that, but I think that you'd better make your device tree
compatibility string *not* generic. Name it by the first NPx SoC or
perfectly compatible SoC family that has this configuration and you'll
be able to make the NP(x+1) compatible with it.

It has proven to be much more future proof and even if in the early days
of DT on ARM we accepted some binding with generic strings like this one
below, It has proven to be a mistake.

>   { .compatible = "cdns,gem", .data = _config },
>   { .compatible = "atmel,sama5d2-gem", .data = _config },
> 


-- 
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Re: [PATCH v2 3/3] [media] mt9v032: Add V4L2 controls for AEC and AGC

[Markus Pargmann]

Hi Laurent,

On Tuesday 29 December 2015 11:38:39 Laurent Pinchart wrote:
> Hi Markus,
> 
> On Wednesday 16 December 2015 11:14:28 Markus Pargmann wrote:
> > On Wednesday 16 December 2015 09:47:58 Laurent Pinchart wrote:
> > > On Monday 14 December 2015 15:41:53 Markus Pargmann wrote:
> > >> This patch adds V4L2 controls for Auto Exposure Control and Auto Gain
> > >> Control settings. These settings include low pass filter, update
> > >> frequency of these settings and the update interval for those units.
> > >> 
> > >> Signed-off-by: Markus Pargmann 
> > > 
> > > Please see below for a few comments. If you agree about them there's no
> > > need to resubmit, I'll fix the patch when applying.
> > 
> > Most of them are fine, I commented on the open ones.
> > 
> > >> ---
> > >> 
> > >>  drivers/media/i2c/mt9v032.c | 153 -
> > >>  1 file changed, 152 insertions(+), 1 deletion(-)
> > >> 
> > >> diff --git a/drivers/media/i2c/mt9v032.c b/drivers/media/i2c/mt9v032.c
> > >> index cc16acf001de..6cbc3b87eda9 100644
> > >> --- a/drivers/media/i2c/mt9v032.c
> > >> +++ b/drivers/media/i2c/mt9v032.c
> 
> [snip]
> 
> > >> +static const struct v4l2_ctrl_config mt9v032_aec_max_shutter_width = {
> > >> +.ops= _ctrl_ops,
> > >> +.id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH,
> > >> +.type   = V4L2_CTRL_TYPE_INTEGER,
> > >> +.name   = "aec_max_shutter_width",
> > >> +.min= 1,
> > >> +.max= MT9V032_TOTAL_SHUTTER_WIDTH_MAX,
> > > 
> > > According the the MT9V032 datasheet I have, the maximum value is 2047
> > > while MT9V032_TOTAL_SHUTTER_WIDTH_MAX is defined as 32767. Do you have any
> > > information that would hint for an error in the datasheet ?
> > 
> > The register is defined as having 15 bits. I simply assumed that the already
> > defined TOTAL_SHUTTER_WIDTH_MAX would apply for this register as well. At
> > least it should end up controlling the same property of the chip. I didn't
> > test this on mt9v032 but on mt9v024.
> 
> According to the MT9V032 datasheet 
> (http://www.onsemi.com/pub/Collateral/MT9V032-D.PDF) the maximum shutter 
> width 
> in AEC mode is limited to 2047. That is documented both in the Maximum Total 
> Shutter Width register legal values and in the "Automatic Gain Control and 
> Automatic Exposure Control" section:
> 
> "The exposure is measured in row-time by reading R0xBB. The exposure range is
> 1 to 2047."
> 
> I assume that the the AEC unit limits the shutter width to 2047 lines and 
> that 
> it's thus pointless to set the maximum total shutter width to a higher value. 
> Whether doing so could have any adverse effect I don't know, but better be 
> same than sorry. If you agree we should limit the value to 2047 I can fix 
> this.

Yes, I agree. It would be great if you fix this.

Thanks,

Markus

> 
> > >> +.step   = 1,
> > >> +.def= MT9V032_TOTAL_SHUTTER_WIDTH_DEF,
> > >> +.flags  = 0,
> > >> +};
> > >> +
> > >> +static const struct v4l2_ctrl_config mt9v034_aec_max_shutter_width = {
> > >> +.ops= _ctrl_ops,
> > >> +.id = V4L2_CID_AEC_MAX_SHUTTER_WIDTH,
> > >> +.type   = V4L2_CTRL_TYPE_INTEGER,
> > >> +.name   = "aec_max_shutter_width",
> > >> +.min= 1,
> > >> +.max= MT9V034_TOTAL_SHUTTER_WIDTH_MAX,
> > >> +.step   = 1,
> > >> +.def= MT9V032_TOTAL_SHUTTER_WIDTH_DEF,
> > >> +.flags  = 0,
> > >> +};
> > > 
> > > [snip]
> 
> 

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Re: [linux-sunxi] Re: [PATCH v3 2/3] ARM: dts: sun8i: Add Allwinner A83T dtsi

[Maxime Ripard]

Hi,

On Sat, Dec 19, 2015 at 11:57:03AM +0100, Hans de Goede wrote:
> >>+   memory {
> >>+   reg = <0x4000 0x8000>;
> >>+   };
> >
> >Is mainline u-boot usable ? If so, you can remove that node entirely.
> 
> mainline u-boot works for me when cold-booting from a sdcard, so I consider
> it usable :)

I'm glad we have the same definition of usable ;)

Maxime

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Re: [PATCH v1 3/3] ARM64 LPC: update binding doc

[Arnd Bergmann]

On Sunday 03 January 2016 20:24:14 Rongrong Zou wrote:
> 在 2015/12/31 23:00, Rongrong Zou 写道:
> > 2015-12-31 22:40 GMT+08:00 Arnd Bergmann  > >:
> >  > On Thursday 31 December 2015 22:12:19 Rongrong Zou wrote:
> >  > > 在 2015/12/30 17:06, Arnd Bergmann 写道:
> >  > > > On Tuesday 29 December 2015 21:33:52 Rongrong Zou wrote:
> >  >
> >  > The DT sample above looks good in principle. I believe what you are 
> > missing
> >  > here is code in your driver to scan the child nodes to create the 
> > platform
> >  > devices. of_bus_isa_translate() should work with your definition here
> >  > and create the correct IORESOURCE_IO resources. You don't have any MMIO
> >  > resources, so the absence of a ranges property is ok. Maybe all you
> >  > are missing is a call to of_platform_populate() or 
> > of_platform_bus_probe()?
> >  >
> >
> > You are right. thanks, i'll try on test board .  if i get the correct 
> > result , the new patch
> > will be sent later. By the way, it's my another email account use when i at 
> > home.
> 
> I tried, and there need some additional changes.
> 
> isa@a01b {
> 
> /*the node name should start with "isa", because of below definition
> * static int of_bus_isa_match(struct device_node *np)
> * {
> * return !strcmp(np->name, "isa");
> * }

Looks good. It would be nicer to match on device_type than on name,
but this is ancient code and it's probably best not to touch it
so we don't accidentally break some old SPARC or PPC system.

> */
>   compatible = "low-pin-count";
>   device_type = "isa";
>   #address-cells = <2>;
>   #size-cells = <1>;
>   reg = <0x0 0xa01b 0x0 0x1>;
>   ranges = <0x1 0x0 0x0 0x0 0x1000>;
> /*
> *  ranges is required, then i can get the IORESOURCE_IO <0xe4,4> from "reg = 
> <0x1, 0x00e4, 4>".
> *
> */
>   ipmi_0:ipmi@00e4{
>   device_type = "ipmi";
>   compatible = "ipmi-bt";
>   reg = <0x1 0x00e4 0x4>;
> };
> 

This looks wrong: the property above says that the I/O port range is
translated to MMIO address 0x to 0x0001, which is not
true on your hardware. I think this needs to be changed in the code
so the ranges property is not required for I/O ports.

> drivers\of\address.c
> static int __of_address_to_resource(struct device_node *dev,
>  const __be32 *addrp, u64 size, unsigned int flags,
>  const char *name, struct resource *r)
> {
>  u64 taddr;
> 
>  if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
>  return -EINVAL;
>  taddr = of_translate_address(dev, addrp);
>  if (taddr == OF_BAD_ADDR)
>  return -EINVAL;
>  memset(r, 0, sizeof(struct resource));
>  if (flags & IORESOURCE_IO) {
>  unsigned long port;
> 
> /*/
> /*legacy port(< 0x1000) is reserved, and need no translation here*/
> /*/
>  if(taddr + size < PCIBIOS_MIN_IO){
>  r->start = taddr;
>  r->end = taddr + size - 1;
>  }

I don't like having a special case based on the address here,
the same kind of hack might be needed for PCI I/O spaces in
hardware that uses an indirect method like your LPC bus
does, and the code above will not work on any LPC implementation
that correctly multiplexes its I/O ports with the first PCI domain.

I think it would be better to avoid translating the port into
a physical address to start with just to translate it back into
a port number, what we need instead is the offset between the
bus specific port number and the linux port number. I've added
Liviu to Cc, he wrote this code originally and may have some idea
of how we could do that.

Arnd
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Re: fuzzing dtc with AFL

[David Gibson]

On Sun, Jan 03, 2016 at 08:28:48PM +1100, David Gibson wrote:
> On Sun, Jan 03, 2016 at 02:32:47AM +1100, Anton Blanchard wrote:
> > Hi David,
> > 
> > I wanted something to test AFL with, and since dtc is simple, self
> 
> What's AFL?
> 
> > contained and checked out on my laptop, I attacked it. It found a
> > number of interesting testcases:
> > 
> > A divide by zero issue:
> > 
> > # ./dtc test1.dts 
> > Floating point exception
> > 
> > An issue parsing octals:
> > 
> > # ./dtc test2.dts 
> > dtc: dtc-lexer.l:156: yylex: Assertion `!(*e) || !e[strspn(e, "UL")]'
> > failed.
> > Aborted
> > 
> > An issue with null escape characters:
> > 
> > # ./dtc test3.dts 
> > dtc: util.c:155: get_escape_char: Assertion `c' failed.
> > Aborted
> > 
> > and a SEGV:
> > 
> > # ./dtc test4.dts 
> > Segmentation fault
> 
> Nice catches all.  I'll try to debug these in detail soon.

I've now commited fixes (and test cases) for all of these to the
master tree.

-- 
David Gibson| I'll have my music baroque, and my code
david AT gibson.dropbear.id.au  | minimalist, thank you.  NOT _the_ _other_
| _way_ _around_!
http://www.ozlabs.org/~dgibson


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[PATCH v3 4/8] dt-bindings: Add a binding for Mediatek Video Encoder

[Tiffany Lin]

Add a DT binding documentation of Video Encoder for the
MT8173 SoC from Mediatek.

Signed-off-by: Tiffany Lin 
---
 .../devicetree/bindings/media/mediatek-vcodec.txt  |   58 
 1 file changed, 58 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt

diff --git a/Documentation/devicetree/bindings/media/mediatek-vcodec.txt 
b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
new file mode 100644
index 000..5cc35ae
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-vcodec.txt
@@ -0,0 +1,58 @@
+Mediatek Video Codec
+
+Mediatek Video Codec is the video codec hw present in Mediatek SoCs which
+supports high resolution encoding functionalities.
+
+Required properties:
+- compatible : "mediatek,mt8173-vcodec-enc" for encoder
+- reg : Physical base address of the video codec registers and length of
+  memory mapped region.
+- interrupts : interrupt number to the cpu.
+- mediatek,larb : must contain the local arbiters in the current Socs.
+- clocks : list of clock specifiers, corresponding to entries in
+  the clock-names property;
+- clock-names: must contain "vencpll", "venc_lt_sel", "vcodecpll_370p5_ck"
+- iommus : list of iommus specifiers should be enabled for hw encode.
+  There are 2 cells needed to enable/disable iommu.
+  The first one is local arbiter index(larbid), and the other is port
+  index(portid) within local arbiter. Specifies the larbid and portid
+  as defined in dt-binding/memory/mt8173-larb-port.h.
+- mediatek,vpu : the node of video processor unit
+
+Example:
+vcodec_enc: vcodec@0x18002000 {
+compatible = "mediatek,mt8173-vcodec-enc";
+reg = <0 0x18002000 0 0x1000>,/*VENC_SYS*/
+  <0 0x19002000 0 0x1000>;/*VENC_LT_SYS*/
+interrupts = ,
+   ;
+mediatek,larb = <>,
+   <>;
+iommus = < M4U_PORT_VENC_RCPU>,
+ < M4U_PORT_VENC_REC>,
+ < M4U_PORT_VENC_BSDMA>,
+ < M4U_PORT_VENC_SV_COMV>,
+ < M4U_PORT_VENC_RD_COMV>,
+ < M4U_PORT_VENC_CUR_LUMA>,
+ < M4U_PORT_VENC_CUR_CHROMA>,
+ < M4U_PORT_VENC_REF_LUMA>,
+ < M4U_PORT_VENC_REF_CHROMA>,
+ < M4U_PORT_VENC_NBM_RDMA>,
+ < M4U_PORT_VENC_NBM_WDMA>,
+ < M4U_PORT_VENC_RCPU_SET2>,
+ < M4U_PORT_VENC_REC_FRM_SET2>,
+ < M4U_PORT_VENC_BSDMA_SET2>,
+ < M4U_PORT_VENC_SV_COMA_SET2>,
+ < M4U_PORT_VENC_RD_COMA_SET2>,
+ < M4U_PORT_VENC_CUR_LUMA_SET2>,
+ < M4U_PORT_VENC_CUR_CHROMA_SET2>,
+ < M4U_PORT_VENC_REF_LUMA_SET2>,
+ < M4U_PORT_VENC_REC_CHROMA_SET2>;
+mediatek,vpu = <>;
+clocks = < CLK_APMIXED_VENCPLL>,
+ < CLK_TOP_VENC_LT_SEL>,
+ < CLK_TOP_VCODECPLL_370P5>;
+clock-names = "vencpll",
+  "venc_lt_sel",
+  "vcodecpll_370p5_ck";
+  };
-- 
1.7.9.5

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Re: [linux-sunxi] Re: [PATCH 4/5] ARM: dts: sun5i: Add dts file for the Empire Electronix D709 tablet

[Maxime Ripard]

Hi,

On Tue, Dec 22, 2015 at 12:29:24PM +0800, Chen-Yu Tsai wrote:
> >>> So this means enabled the sdio controller (should be safe on all
> >>> boards?)  and enabling 2 regulators to power the wifi-chip. I
> >>> think it will be safe to do this even on boards where those
> >>> regulators are not used, what do you think ?
> >>
> >> Wouldn't that introduce some useless power drain on those boards?
> >
> >
> > If nothing is attached to those regulators (which I expect to be
> > the case when they are not used to power wifi) then I would expect
> > the drain to be minimal, my biggest worry is some board having
> > tied these to ground, but I don't think that is very likely.
> 
> AFAIK the AXP datasheets mention that unused DCDC outputs should be left
> floating. Not sure if this applies to LDO outputs as well. But any used
> outputs would have a bypass capacitor.
> 
> From the board designs I've seen, this seems to be the common case.
> I'm not an electrical engineer, but I think we're covered here.

Ok, I guess we're good then.

Thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux, Kernel and Android engineering
http://free-electrons.com


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[PATCH v3 0/8] Add MT8173 Video Encoder Driver and VPU Driver

[Tiffany Lin]

==
 Introduction
==

The purpose of this series is to add the driver for video codec hw
embedded in the Mediatek's MT8173 SoCs. Mediatek Video Codec is able to
handle video encoding of in a range of formats.

This RFC also include VPU driver. Mediatek Video Codec driver rely on
VPU driver to load, communicate with VPU.

Internally the driver uses videobuf2 framework and MTK IOMMU and MTK SMI.
MTK IOMMU and MTK SMI[1] have not yet been merged, but we wanted to start
discussion about the driver earlier so it could be merged sooner. The
driver posted here is the initial version, so I suppose it will require
more work.

[1]https://patchwork.kernel.org/patch/7880291/

==
 Device interface
==

In principle the driver bases on memory-to-memory framework:
it provides a single video node and each opened file handle gets its own
private context with separate buffer queues. Each context consist of 2
buffer queues: OUTPUT (for source buffers, i.e. raw video frames)
and CAPTURE (for destination buffers, i.e. encoded video frames).

The process of encoding video data from stream is a bit more complicated
than typical memory-to-memory processing. We base on memory-to-memory
framework and add the complicated part in our vb2 and v4l2 callback 
functionss. So we can base on well done m2m memory-to-memory framework, 
reduce duplicate code and make our driver code simple.

==
 VPU (Video Processor Unit)
==
The VPU driver for hw video codec embedded in Mediatek's MT8173 SOCs.
It is able to handle video decoding/encoding of in a range of formats.
The driver provides with VPU firmware download, memory management and
the communication interface between CPU and VPU.
For VPU initialization, it will create virtual memory for CPU access and
IOMMU address for vcodec hw device access. When a decode/encode instance
opens a device node, vpu driver will download vpu firmware to the device.
A decode/encode instant will decode/encode a frame using VPU 
interface to interrupt vpu to handle decoding/encoding jobs.

Please have a look at the code and comments will be very much appreciated.

Change in v3:
1.Refine code to pass v4l2-compliance test, now it still has 2 issues
2.Refine code according to latest MTK IOMMU patches[1]
3.Remove MFC51 specific CIDs and add MTK specific CIDs for for keyframe and
  skip I-frame
4.Refine code according to review comments

Below is the v1.6 version v4l2-compliance report for the mt8173 encoder driver.
Now there are still 2 test fail in v1.6.
For VIDIOC_REQBUFS/CREATE_BUFS/QUERYBUF, we directly use v4l2_m2m_ioctl_* 
functions,
but it still fail. It pass in kernel 3.18 but fail in kernel 4.4.
We will try v1.8 in next version.
VIDIOC_EXPBUF is becuase we support all three memory types VB2_DMABUF, VB2_MMAP 
and
VB2_USERPTR. VIDIOC_EXPBUF only allowed when only VB2_MMAP supported.
localhost ~ # /usr/bin/v4l2-compliance -d /dev/video1
Driver Info:
Driver name   : mtk-vcodec-en
Card type : platform:mt817
Bus info  : platform:mt817
Driver version: 4.4.0
Capabilities  : 0x84204000
Video Memory-to-Memory Multiplanar
Streaming
Extended Pix Format
Device Capabilities
Device Caps   : 0x04204000
Video Memory-to-Memory Multiplanar
Streaming
Extended Pix Format

Compliance test for device /dev/video1 (not using libv4l2):

Required ioctls:
test VIDIOC_QUERYCAP: OK

Allow for multiple opens:
test second video open: OK
test VIDIOC_QUERYCAP: OK
test VIDIOC_G/S_PRIORITY: OK

Debug ioctls:
test VIDIOC_DBG_G/S_REGISTER: OK (Not Supported)
test VIDIOC_LOG_STATUS: OK (Not Supported)

Input ioctls:
test VIDIOC_G/S_TUNER/ENUM_FREQ_BANDS: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_S_HW_FREQ_SEEK: OK (Not Supported)
test VIDIOC_ENUMAUDIO: OK (Not Supported)
test VIDIOC_G/S/ENUMINPUT: OK (Not Supported)
test VIDIOC_G/S_AUDIO: OK (Not Supported)
Inputs: 0 Audio Inputs: 0 Tuners: 0

Output ioctls:
test VIDIOC_G/S_MODULATOR: OK (Not Supported)
test VIDIOC_G/S_FREQUENCY: OK (Not Supported)
test VIDIOC_ENUMAUDOUT: OK (Not Supported)
test VIDIOC_G/S/ENUMOUTPUT: OK (Not Supported)
test VIDIOC_G/S_AUDOUT: OK (Not Supported)
Outputs: 0 Audio Outputs: 0 Modulators: 0

Input/Output configuration ioctls:
test VIDIOC_ENUM/G/S/QUERY_STD: OK (Not Supported)
test VIDIOC_ENUM/G/S/QUERY_DV_TIMINGS: OK (Not Supported)
test VIDIOC_DV_TIMINGS_CAP: OK (Not Supported)
test VIDIOC_G/S_EDID: OK (Not Supported)

Control ioctls:
test VIDIOC_QUERYCTRL/MENU: OK
test VIDIOC_G/S_CTRL: OK
test VIDIOC_G/S/TRY_EXT_CTRLS: OK
  

Re: [RFC PATCH v1 1/2] drm/rockchip: vop: add rk3229 vop support

[Yakir Yang]

Sorry, there shouldn't have the "3228" prefix,
%s/3228/3229

I have send the new patch out, please ignore this one.

Thanks,
- Yakir

On 01/04/2016 07:50 PM, Yakir Yang wrote:

RK3228 registers layout is simalar to RK3288 layout, only the
interruput registers is different to RK3288.

RK3228 support two overlay plane and one hwc plane, max output
resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Yakir Yang 
---
  drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   7 +-
  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 120 
  drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  90 +
  4 files changed, 217 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d83bf87..3c83097 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -63,9 +63,12 @@
  #define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
int i, reg = 0; \
-   for (i = 0; i < vop->data->intr->nintrs; i++) { \
-   if (vop->data->intr->intrs[i] & type) \
+   const struct vop_intr *intr = vop->data->intr; \
+   for (i = 0; i < intr->nintrs; i++) { \
+   if (intr->intrs[i] & type) { \
reg |= (v) << i; \
+   reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
+   } \
} \
VOP_INTR_SET(vop, name, reg); \
} while (0)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 071ff0b..1e839e8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -60,6 +60,7 @@ struct vop_ctrl {
  };
  
  struct vop_intr {

+   bool write_mask;
const int *intrs;
uint32_t nintrs;
struct vop_reg enable;
@@ -136,6 +137,7 @@ struct vop_data {
  };
  
  /* interrupt define */

+#define DUMMY_INTR (0 << 0)
  #define DSP_HOLD_VALID_INTR   (1 << 0)
  #define FS_INTR   (1 << 1)
  #define LINE_FLAG_INTR(1 << 2)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 3166b46..bbcd128 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
  };
  
  static const struct vop_intr rk3288_vop_intr = {

+   .write_mask = false,
.intrs = rk3288_vop_intrs,
.nintrs = ARRAY_SIZE(rk3288_vop_intrs),
.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
@@ -190,6 +191,122 @@ static const struct vop_data rk3288_vop = {
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
  };
  
+static const struct vop_scl_extension rk3229_win_full_scl_ext = {

+   .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
+   .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
+   .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
+   .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
+   .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
+   .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
+   .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
+   .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
+   .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
+   .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
+   .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
+   .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
+   .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
+   .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
+   .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
+   .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
+   .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
+   .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
+   .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
+   .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
+   .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3229_win_full_scl = {
+   .ext = _win_full_scl_ext,
+   .scale_yrgb_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 0x0),
+   .scale_yrgb_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 16),
+   .scale_cbcr_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 0x0),
+   .scale_cbcr_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 16),
+};
+
+static const struct vop_win_phy rk3229_win01_data = {
+   .scl = _win_full_scl,
+   .data_formats = formats_win_full,
+   .nformats = ARRAY_SIZE(formats_win_full),

[PATCH v3 1/8] dt-bindings: Add a binding for Mediatek Video Processor

[Tiffany Lin]

From: Andrew-CT Chen 

Add a DT binding documentation of Video Processor Unit for the
MT8173 SoC from Mediatek.

Signed-off-by: Andrew-CT Chen 
Signed-off-by: Tiffany Lin 
---
 .../devicetree/bindings/media/mediatek-vpu.txt |   27 
 1 file changed, 27 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/mediatek-vpu.txt

diff --git a/Documentation/devicetree/bindings/media/mediatek-vpu.txt 
b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
new file mode 100644
index 000..3c3a424
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/mediatek-vpu.txt
@@ -0,0 +1,27 @@
+* Mediatek Video Processor Unit
+
+Video Processor Unit is a HW video controller. It controls HW Codec including
+H.264/VP8/VP9 Decode, H.264/VP8 Encode and Image Processor (scale/rotate/color 
convert).
+
+Required properties:
+  - compatible: "mediatek,mt8173-vpu"
+  - reg: Must contain an entry for each entry in reg-names.
+  - reg-names: Must include the following entries:
+"tcm": tcm base
+"cfg_reg": Main configuration registers base
+  - interrupts: interrupt number to the cpu.
+  - clocks : clock name from clock manager
+  - clock-names: must be main. It is the main clock of VPU
+  - iommus : phandle and IOMMU spcifier for the IOMMU that serves the VPU.
+
+Example:
+   vpu: vpu@1002 {
+   compatible = "mediatek,mt8173-vpu";
+   reg = <0 0x1002 0 0x3>,
+ <0 0x1005 0 0x100>;
+   reg-names = "tcm", "cfg_reg";
+   interrupts = ;
+   clocks = < TOP_SCP_SEL>;
+   clock-names = "main";
+   iommus = < M4U_PORT_VENC_RCPU>;
+   };
-- 
1.7.9.5

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[PATCH v3 5/8] media: vcodec: mediatek: Add Mediatek V4L2 Video Encoder Driver

[Tiffany Lin]

From: Andrew-CT Chen 

Add v4l2 layer encoder driver for MT8173

Signed-off-by: Tiffany Lin 
---
 drivers/media/platform/Kconfig |   11 +
 drivers/media/platform/Makefile|2 +
 drivers/media/platform/mtk-vcodec/Makefile |8 +
 drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h |  391 ++
 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c | 1433 
 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.h |   46 +
 .../media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c |  454 +++
 .../media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c  |  122 ++
 .../media/platform/mtk-vcodec/mtk_vcodec_intr.c|  102 ++
 .../media/platform/mtk-vcodec/mtk_vcodec_intr.h|   29 +
 drivers/media/platform/mtk-vcodec/mtk_vcodec_pm.h  |   26 +
 .../media/platform/mtk-vcodec/mtk_vcodec_util.c|  106 ++
 .../media/platform/mtk-vcodec/mtk_vcodec_util.h|   85 ++
 drivers/media/platform/mtk-vcodec/venc_drv_base.h  |   62 +
 drivers/media/platform/mtk-vcodec/venc_drv_if.c|  100 ++
 drivers/media/platform/mtk-vcodec/venc_drv_if.h|  175 +++
 drivers/media/platform/mtk-vcodec/venc_ipi_msg.h   |  212 +++
 include/uapi/linux/v4l2-controls.h |4 +
 18 files changed, 3368 insertions(+)
 create mode 100644 drivers/media/platform/mtk-vcodec/Makefile
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.c
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc.h
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_drv.c
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_enc_pm.c
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_intr.c
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_intr.h
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_pm.h
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_util.c
 create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_util.h
 create mode 100644 drivers/media/platform/mtk-vcodec/venc_drv_base.h
 create mode 100644 drivers/media/platform/mtk-vcodec/venc_drv_if.c
 create mode 100644 drivers/media/platform/mtk-vcodec/venc_drv_if.h
 create mode 100644 drivers/media/platform/mtk-vcodec/venc_ipi_msg.h

diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index ba812d6..3e831c5 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -157,6 +157,17 @@ config VIDEO_MEDIATEK_VPU
codec embedded in new Mediatek's SOCs. It is able
to handle video decoding/encoding in a range of formats.
 
+config VIDEO_MEDIATEK_VCODEC
+tristate "Mediatek Video Codec driver"
+depends on VIDEO_DEV && VIDEO_V4L2
+depends on ARCH_MEDIATEK || COMPILE_TEST
+select VIDEOBUF2_DMA_CONTIG
+select V4L2_MEM2MEM_DEV
+select MEDIATEK_VPU
+default n
+---help---
+Mediatek video codec driver for V4L2
+
 config VIDEO_MEM2MEM_DEINTERLACE
tristate "Deinterlace support"
depends on VIDEO_DEV && VIDEO_V4L2 && DMA_ENGINE
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index e5b19c6..510e06b 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -57,3 +57,5 @@ obj-$(CONFIG_VIDEO_XILINX)+= xilinx/
 ccflags-y += -I$(srctree)/drivers/media/i2c
 
 obj-$(CONFIG_VIDEO_MEDIATEK_VPU)   += mtk-vpu/
+
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC)+= mtk-vcodec/
diff --git a/drivers/media/platform/mtk-vcodec/Makefile 
b/drivers/media/platform/mtk-vcodec/Makefile
new file mode 100644
index 000..ce38689
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/Makefile
@@ -0,0 +1,8 @@
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk_vcodec_intr.o \
+  mtk_vcodec_util.o \
+  mtk_vcodec_enc_drv.o \
+  mtk_vcodec_enc.o \
+  mtk_vcodec_enc_pm.o \
+  venc_drv_if.o
+
+ccflags-y += -I$(srctree)/drivers/media/platform/mtk-vpu
diff --git a/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h 
b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
new file mode 100644
index 000..9744bd9
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/mtk_vcodec_drv.h
@@ -0,0 +1,391 @@
+/*
+* Copyright (c) 2015 MediaTek Inc.
+* Author: PC Chen 
+* Tiffany Lin 
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* 

[PATCH v3 7/8] media: vcodec: mediatek: Add Mediatek H264 Video Encoder Driver

[Tiffany Lin]

Add h264 encoder driver for MT8173

Signed-off-by: Daniel Hsiao 
Signed-off-by: Tiffany Lin 
---
 drivers/media/platform/mtk-vcodec/Makefile |3 +-
 .../media/platform/mtk-vcodec/h264_enc/Makefile|6 +
 .../platform/mtk-vcodec/h264_enc/venc_h264_if.c|  530 
 .../platform/mtk-vcodec/h264_enc/venc_h264_if.h|  165 ++
 .../platform/mtk-vcodec/h264_enc/venc_h264_vpu.c   |  310 
 .../platform/mtk-vcodec/h264_enc/venc_h264_vpu.h   |   30 ++
 drivers/media/platform/mtk-vcodec/venc_drv_if.c|3 +
 7 files changed, 1046 insertions(+), 1 deletion(-)
 create mode 100644 drivers/media/platform/mtk-vcodec/h264_enc/Makefile
 create mode 100644 drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_if.c
 create mode 100644 drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_if.h
 create mode 100644 drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_vpu.c
 create mode 100644 drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_vpu.h

diff --git a/drivers/media/platform/mtk-vcodec/Makefile 
b/drivers/media/platform/mtk-vcodec/Makefile
index f4ef502..f47dfc7 100644
--- a/drivers/media/platform/mtk-vcodec/Makefile
+++ b/drivers/media/platform/mtk-vcodec/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += mtk_vcodec_intr.o \
   mtk_vcodec_enc_pm.o \
   venc_drv_if.o
 
-obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += vp8_enc/
+
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += vp8_enc/ h264_enc/
 
 ccflags-y += -I$(srctree)/drivers/media/platform/mtk-vpu
diff --git a/drivers/media/platform/mtk-vcodec/h264_enc/Makefile 
b/drivers/media/platform/mtk-vcodec/h264_enc/Makefile
new file mode 100644
index 000..765b45f
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/h264_enc/Makefile
@@ -0,0 +1,6 @@
+obj-$(CONFIG_VIDEO_MEDIATEK_VCODEC) += venc_h264_if.o venc_h264_vpu.o
+
+ccflags-y += \
+-I$(srctree)/drivers/media/platform/mtk-vcodec/ \
+-I$(srctree)/drivers/media/platform/mtk-vcodec/h264_enc \
+-I$(srctree)/drivers/media/platform/mtk-vpu
diff --git a/drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_if.c 
b/drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_if.c
new file mode 100644
index 000..14990ce
--- /dev/null
+++ b/drivers/media/platform/mtk-vcodec/h264_enc/venc_h264_if.c
@@ -0,0 +1,530 @@
+/*
+ * Copyright (c) 2015 MediaTek Inc.
+ * Author: Jungchang Tsao 
+ * Daniel Hsiao 
+ * PoChun Lin 
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+#include "mtk_vcodec_drv.h"
+#include "mtk_vcodec_util.h"
+#include "mtk_vcodec_intr.h"
+#include "mtk_vcodec_enc.h"
+#include "mtk_vcodec_pm.h"
+#include "mtk_vpu.h"
+
+#include "venc_h264_if.h"
+#include "venc_h264_vpu.h"
+
+#define VENC_PIC_BITSTREAM_BYTE_CNT 0x0098
+
+static inline void h264_write_reg(struct venc_h264_inst *inst, u32 addr,
+ u32 val)
+{
+   writel(val, inst->hw_base + addr);
+}
+
+static inline u32 h264_read_reg(struct venc_h264_inst *inst, u32 addr)
+{
+   return readl(inst->hw_base + addr);
+}
+
+enum venc_h264_irq_status {
+   H264_IRQ_STATUS_ENC_SPS_INT = (1 << 0),
+   H264_IRQ_STATUS_ENC_PPS_INT = (1 << 1),
+   H264_IRQ_STATUS_ENC_FRM_INT = (1 << 2),
+};
+
+static void h264_enc_free_work_buf(struct venc_h264_inst *inst)
+{
+   int i;
+
+   mtk_vcodec_debug_enter(inst);
+
+   /* Except the RC_CODE and SKIP_FRAME buffers,
+* other buffers need to be freed by AP.
+*/
+   for (i = 0; i < VENC_H264_VPU_WORK_BUF_MAX; i++) {
+   if ((i != VENC_H264_VPU_WORK_BUF_RC_CODE) &&
+   (i != VENC_H264_VPU_WORK_BUF_SKIP_FRAME))
+   if (inst->work_bufs[i].va != NULL)
+   mtk_vcodec_mem_free(inst->ctx,
+   >work_bufs[i]);
+   }
+
+   if (inst->pps_buf.va != NULL)
+   mtk_vcodec_mem_free(inst->ctx, >pps_buf);
+
+   mtk_vcodec_debug_leave(inst);
+}
+
+static int h264_enc_alloc_work_buf(struct venc_h264_inst *inst, void *param)
+{
+   int i;
+   int ret = 0;
+   struct venc_h264_vpu_buf *wb = inst->vpu_inst.drv->work_bufs;
+   struct venc_enc_prm *enc_param = param;
+
+   mtk_vcodec_debug_enter(inst);
+
+   for (i = 0; i < VENC_H264_VPU_WORK_BUF_MAX; i++) {
+   /*
+

[PATCH v3 2/8] media: VPU: mediatek: support Mediatek VPU

[Tiffany Lin]

The VPU driver for hw video codec embedded in Mediatek's MT8173 SOCs.
It is able to handle video decoding/encoding of in a range of formats.
The driver provides with VPU firmware download, memory management and
the communication interface between CPU and VPU.
For VPU initialization, it will create virtual memory for CPU access and
IOMMU address for vcodec hw device access. When a decode/encode instance
opens a device node, vpu driver will download vpu firmware to the device.
A decode/encode instant will decode/encode a frame using VPU
interface to interrupt vpu to handle decoding/encoding jobs.

Signed-off-by: Andrew-CT Chen 
Signed-off-by: Tiffany Lin 
---
 drivers/media/platform/Kconfig   |9 +
 drivers/media/platform/Makefile  |2 +
 drivers/media/platform/mtk-vpu/Makefile  |1 +
 drivers/media/platform/mtk-vpu/mtk_vpu.c |  941 ++
 drivers/media/platform/mtk-vpu/mtk_vpu.h |  182 ++
 5 files changed, 1135 insertions(+)
 create mode 100644 drivers/media/platform/mtk-vpu/Makefile
 create mode 100644 drivers/media/platform/mtk-vpu/mtk_vpu.c
 create mode 100644 drivers/media/platform/mtk-vpu/mtk_vpu.h

diff --git a/drivers/media/platform/Kconfig b/drivers/media/platform/Kconfig
index ccbc974..ba812d6 100644
--- a/drivers/media/platform/Kconfig
+++ b/drivers/media/platform/Kconfig
@@ -148,6 +148,15 @@ config VIDEO_CODA
   Coda is a range of video codec IPs that supports
   H.264, MPEG-4, and other video formats.
 
+config VIDEO_MEDIATEK_VPU
+   tristate "Mediatek Video Processor Unit"
+   depends on VIDEO_DEV && VIDEO_V4L2 && ARCH_MEDIATEK
+   ---help---
+   This driver provides downloading VPU firmware and
+   communicating with VPU. This driver for hw video
+   codec embedded in new Mediatek's SOCs. It is able
+   to handle video decoding/encoding in a range of formats.
+
 config VIDEO_MEM2MEM_DEINTERLACE
tristate "Deinterlace support"
depends on VIDEO_DEV && VIDEO_V4L2 && DMA_ENGINE
diff --git a/drivers/media/platform/Makefile b/drivers/media/platform/Makefile
index efa0295..e5b19c6 100644
--- a/drivers/media/platform/Makefile
+++ b/drivers/media/platform/Makefile
@@ -55,3 +55,5 @@ obj-$(CONFIG_VIDEO_AM437X_VPFE)   += am437x/
 obj-$(CONFIG_VIDEO_XILINX) += xilinx/
 
 ccflags-y += -I$(srctree)/drivers/media/i2c
+
+obj-$(CONFIG_VIDEO_MEDIATEK_VPU)   += mtk-vpu/
diff --git a/drivers/media/platform/mtk-vpu/Makefile 
b/drivers/media/platform/mtk-vpu/Makefile
new file mode 100644
index 000..d890a66
--- /dev/null
+++ b/drivers/media/platform/mtk-vpu/Makefile
@@ -0,0 +1 @@
+obj-y += mtk_vpu.o
diff --git a/drivers/media/platform/mtk-vpu/mtk_vpu.c 
b/drivers/media/platform/mtk-vpu/mtk_vpu.c
new file mode 100644
index 000..be4c43e
--- /dev/null
+++ b/drivers/media/platform/mtk-vpu/mtk_vpu.c
@@ -0,0 +1,941 @@
+/*
+* Copyright (c) 2015 MediaTek Inc.
+* Author: Andrew-CT Chen 
+*
+* This program is free software; you can redistribute it and/or modify
+* it under the terms of the GNU General Public License version 2 as
+* published by the Free Software Foundation.
+*
+* This program is distributed in the hope that it will be useful,
+* but WITHOUT ANY WARRANTY; without even the implied warranty of
+* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+* GNU General Public License for more details.
+*/
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "mtk_vpu.h"
+
+/**
+ * VPU (video processor unit) is a tiny processor controlling video hardware
+ * related to video codec, scaling and color format converting.
+ * VPU interfaces with other blocks by share memory and interrupt.
+ **/
+
+#define INIT_TIMEOUT_MS2000U
+#define IPI_TIMEOUT_MS 2000U
+#define VPU_FW_VER_LEN 16
+
+/* maximum program/data TCM (Tightly-Coupled Memory) size */
+#define VPU_PTCM_SIZE  (96 * SZ_1K)
+#define VPU_DTCM_SIZE  (32 * SZ_1K)
+/* the offset to get data tcm address */
+#define VPU_DTCM_OFFSET0x18000UL
+/* daynamic allocated maximum extended memory size */
+#define VPU_EXT_P_SIZE SZ_1M
+#define VPU_EXT_D_SIZE SZ_4M
+/* maximum binary firmware size */
+#define VPU_P_FW_SIZE  (VPU_PTCM_SIZE + VPU_EXT_P_SIZE)
+#define VPU_D_FW_SIZE  (VPU_DTCM_SIZE + VPU_EXT_D_SIZE)
+/* the size of share buffer between Host and  VPU */
+#define SHARE_BUF_SIZE 48
+
+/* binary firmware name */
+#define VPU_P_FW   "vpu_p.bin"
+#define VPU_D_FW   "vpu_d.bin"
+
+#define VPU_RESET  0x0
+#define VPU_TCM_CFG0x0008
+#define VPU_PMEM_EXT0_ADDR 0x000C
+#define VPU_PMEM_EXT1_ADDR 0x0010
+#define VPU_TO_HOST0x001C
+#define VPU_DMEM_EXT0_ADDR 0x0014
+#define 

[PATCH v3 3/8] arm64: dts: mediatek: Add node for Mediatek Video Processor Unit

[Tiffany Lin]

Add VPU drivers for MT8173

Signed-off-by: Andrew-CT Chen 
Signed-off-by: Tiffany Lin 
---
 arch/arm64/boot/dts/mediatek/mt8173.dtsi |   11 +++
 1 file changed, 11 insertions(+)

diff --git a/arch/arm64/boot/dts/mediatek/mt8173.dtsi 
b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
index 60a1284..b3636cd 100644
--- a/arch/arm64/boot/dts/mediatek/mt8173.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8173.dtsi
@@ -422,6 +422,17 @@
clocks = < CLK_INFRA_CEC>;
};
 
+   vpu: vpu@1002 {
+   compatible = "mediatek,mt8173-vpu";
+   reg = <0 0x1002 0 0x3>,
+ <0 0x1005 0 0x100>;
+   reg-names = "tcm", "cfg_reg";
+   interrupts = ;
+   clocks = < CLK_TOP_SCP_SEL>;
+   clock-names = "main";
+   iommus = < M4U_PORT_VENC_RCPU>;
+   };
+
sysirq: intpol-controller@10200620 {
compatible = "mediatek,mt8173-sysirq",
 "mediatek,mt6577-sysirq";
-- 
1.7.9.5

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[RFC PATCH v1 1/2] drm/rockchip: vop: add rk3229 vop support

[Yakir Yang]

RK3228 registers layout is simalar to RK3288 layout, only the
interruput registers is different to RK3288.

RK3228 support two overlay plane and one hwc plane, max output
resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Yakir Yang 
---
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   7 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 120 
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  90 +
 4 files changed, 217 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d83bf87..3c83097 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -63,9 +63,12 @@
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
int i, reg = 0; \
-   for (i = 0; i < vop->data->intr->nintrs; i++) { \
-   if (vop->data->intr->intrs[i] & type) \
+   const struct vop_intr *intr = vop->data->intr; \
+   for (i = 0; i < intr->nintrs; i++) { \
+   if (intr->intrs[i] & type) { \
reg |= (v) << i; \
+   reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
+   } \
} \
VOP_INTR_SET(vop, name, reg); \
} while (0)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 071ff0b..1e839e8 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -60,6 +60,7 @@ struct vop_ctrl {
 };
 
 struct vop_intr {
+   bool write_mask;
const int *intrs;
uint32_t nintrs;
struct vop_reg enable;
@@ -136,6 +137,7 @@ struct vop_data {
 };
 
 /* interrupt define */
+#define DUMMY_INTR (0 << 0)
 #define DSP_HOLD_VALID_INTR(1 << 0)
 #define FS_INTR(1 << 1)
 #define LINE_FLAG_INTR (1 << 2)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 3166b46..bbcd128 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
 };
 
 static const struct vop_intr rk3288_vop_intr = {
+   .write_mask = false,
.intrs = rk3288_vop_intrs,
.nintrs = ARRAY_SIZE(rk3288_vop_intrs),
.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
@@ -190,6 +191,122 @@ static const struct vop_data rk3288_vop = {
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
 };
 
+static const struct vop_scl_extension rk3229_win_full_scl_ext = {
+   .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
+   .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
+   .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
+   .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
+   .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
+   .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
+   .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
+   .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
+   .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
+   .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
+   .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
+   .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
+   .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
+   .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
+   .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
+   .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
+   .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
+   .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
+   .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
+   .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
+   .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3229_win_full_scl = {
+   .ext = _win_full_scl_ext,
+   .scale_yrgb_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 0x0),
+   .scale_yrgb_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 16),
+   .scale_cbcr_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 0x0),
+   .scale_cbcr_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 16),
+};
+
+static const struct vop_win_phy rk3229_win01_data = {
+   .scl = _win_full_scl,
+   .data_formats = formats_win_full,
+   .nformats = ARRAY_SIZE(formats_win_full),
+   .enable = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 0),
+   .format = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 1),
+   .rb_swap = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 12),
+   .act_info = 

[RFC PATCH v1 2/2] dt-bindings: add document for rk3229-vop

[Yakir Yang]

Signed-off-by: Yakir Yang 
---
 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt 
b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
index 5489b59..75ebc20 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
@@ -7,6 +7,7 @@ buffer to an external LCD interface.
 Required properties:
 - compatible: value should be one of the following
"rockchip,rk3288-vop";
+   "rockchip,rk3229-vop";
"rockchip,rk3036-vop";
 
 - interrupts: should contain a list of all VOP IP block interrupts in the
-- 
1.9.1


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[RFC PATCH v1 0/2] Add RK3229 vop support

[Yakir Yang]

Add RK3229 vop support


Yakir Yang (2):
  drm/rockchip: vop: add rk3229 vop support
  dt-bindings: add document for rk3229-vop

 .../bindings/display/rockchip/rockchip-vop.txt |   1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c|   7 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h|   2 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c| 120 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h|  90 
 5 files changed, 218 insertions(+), 2 deletions(-)

-- 
1.9.1


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Re: fuzzing dtc with AFL

[Anton Blanchard]

Hi David,

> What's AFL?

http://lcamtuf.coredump.cx/afl/

> Nice catches all.  I'll try to debug these in detail soon.

Thanks!

Anton
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[PATCH v2] of/unittest: Show broken behaviour in the platform bus

[Wolfram Sang]

From: Grant Likely 

Add a single resource to the test bus device to exercise the platform
bus code a little more. This isn't strictly a devicetree test, but it is
a corner case that the devicetree runs into. Until we've got platform
device unittests, it can live here. It doesn't need to be an explicit
text because the kernel will oops when it is wrong.

Cc: Pantelis Antoniou 
Cc: Rob Herring 
Cc: Greg Kroah-Hartman 
Cc: Ricardo Ribalda Delgado 
Signed-off-by: Grant Likely 
[wsa: added the comment provided by Grant, rebased, and tested]
Signed-off-by: Wolfram Sang 
---
 drivers/of/unittest.c | 14 ++
 1 file changed, 14 insertions(+)

I found this patch in one of my branches and think it is still worth applying.
In v1, Rob wanted a comment added which Grant provided but never folded into
the patch. I have done so now :) Note that the fix to this problem was already
picked up by Rob.

diff --git a/drivers/of/unittest.c b/drivers/of/unittest.c
index e16ea5717b7f76..bbff09dee1cf45 100644
--- a/drivers/of/unittest.c
+++ b/drivers/of/unittest.c
@@ -757,6 +757,11 @@ static void __init of_unittest_match_node(void)
}
 }
 
+static struct resource test_bus_res = {
+   .start = 0xfff8,
+   .end = 0xfff9,
+   .flags = IORESOURCE_MEM,
+};
 static const struct platform_device_info test_bus_info = {
.name = "unittest-bus",
 };
@@ -800,6 +805,15 @@ static void __init of_unittest_platform_populate(void)
return;
test_bus->dev.of_node = np;
 
+   /*
+* Add a dummy resource to the test bus node after it is
+* registered to catch problems with un-inserted resources. The
+* DT code doesn't insert the resources, and it has caused the
+* kernel to oops in the past. This makes sure the same bug
+* doesn't crop up again.
+*/
+   platform_device_add_resources(test_bus, _bus_res, 1);
+
of_platform_populate(np, match, NULL, _bus->dev);
for_each_child_of_node(np, child) {
for_each_child_of_node(child, grandchild)
-- 
2.1.4

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Re: [PATCH v6 0/9] mfd: axp20x: Add support for RSB based AXP223

[Chen-Yu Tsai]

Hi Lee,

On Thu, Dec 17, 2015 at 12:32 AM, Chen-Yu Tsai  wrote:
> Hi everyone,
>
> This is v6 of the AXP223 PMIC series. v6 fixes the address of the AXP223
> in the DT. Hope this series makes it into 4.5, and we can then support
> even more AXP PMICs in 4.6+.
>
> Lee, can you take the first 7 patches. Once they're in, Maxime can take
> the DTS patches.

We're at -rc8. Any chance the first 7 patches make the next release?

Thanks

ChenYu

>
> Changes since v5:
>
>   - Correct AXP223 address to 0x3a3.
>
> Changes since v4:
>
>   - Get rid of second parameter of axp20x_match_device() (new patch 2)
>
>   - Match against dev->driver->of_match_table, so the entirety of
> axp20x_match_device() can be kept in the core. (new patch 3)
>
>   - Move *_device_id tables to bottom of the driver, right above driver
> declaration. (patch 4 & 6)
>
>   - Remove extra whitespaces while moving i2c specific code (patch 4)
>
>   - Remove leftover whitespace and code style issues in axp20x core
> (new patch 5)
>
>   - Remove extra whitespaces in rsb specific code (patch 6)
>
> Changes since v3:
>
>   - Removed settings for axp223 reg_rtc_ldo from board dts files that
> are already in axp22x.dtsi. The name is kept.
>
>   - Dropped simplefb label and defconfig patches, as they are merged.
>
> Changes since v2:
>
>   - s/It's/Its/ for the commit messages of patches 5 and 7
>
>   - Add Rob's Acked-by for patch 1
>
> Changes since v1:
>
>   - Dropped NMI interrupt controller dts patch (Merged)
>
>   - Change MFD_AXP20X to represent the axp20x core, and drop MFD_AXP20X_CORE
>
>   - Keep the axp20x core bits named axp20x.c
>
>   - Add patch 7 to add AXP223 to sun8i-q8-common.dtsi
>
>   - Add patch 8 & 9 to update defconfigs
>
>   - Make axp20x drivers tristate and buildable as modules
>
>   - Drop "_sunxi" substring from identifiers in axp20x-rsb driver
>
>
> This series adds support for the Reduced Serial Bus based AXP223 PMIC.
> The AXP223 is functionally identical to the AXP221, which we already
> support. Only some default values for the regulators are different.
> The defaults fit their recommended application, paired with different
> SoCs.
>
> Patch 1 adds AXP223 to the list of supported chips in the DT binding.
>
> Patch 2 gets rid of the extra "struct device *" parameter from
> axp20x_match_device().
>
> Patch 3 makes axp20x_match_device() use dev->driver->of_match_table,
> so the function can be library-ized without modification.
>
> Patch 4 splits the axp20x mfd driver into 2 parts, a core library, and
> an I2C driver.
>
> Patch 5 cleans up some leftover whitespace issues in axp20x core.
>
> Patch 6 adds an RSB based driver for the AXP223.
>
> Patch 7 adds support for the AXP223 regulators
>
> Patch 8 enables the AXP223 PMIC and its regulators for the Sinlinx
> SinA33.
>
> Patch 9 enables the AXP223 PMIC and its regulators for A23/A33 based
> Q8 tablet devices.
>
>
> Regards
> ChenYu
>
>
> Chen-Yu Tsai (9):
>   mfd: axp20x: Add AXP223 to list of supported PMICs in DT bindings
>   mfd: axp20x: Remove second struct device * parameter for
> axp20x_match_device()
>   mfd: axp20x: use dev->driver->of_match_table in axp20x_match_device()
>   mfd: axp20x: Split the driver into core and i2c bits
>   mfd: axp20x: Whitespace, open parenthesis alignment code style fixes
>   mfd: axp20x: Add support for RSB based AXP223 PMIC
>   regulator: axp20x: Support new AXP223 PMIC
>   ARM: dts: sun8i: sinlinx-sina33: Add AXP223 PMIC device and regulator
> nodes
>   ARM: dts: sun8i: q8-common: Add AXP223 PMIC device and regulator nodes
>
>  Documentation/devicetree/bindings/mfd/axp20x.txt |   7 +-
>  arch/arm/boot/dts/sun8i-a33-sinlinx-sina33.dts   |  76 -
>  arch/arm/boot/dts/sun8i-q8-common.dtsi   |  83 +-
>  drivers/mfd/Kconfig  |  25 --
>  drivers/mfd/Makefile |   2 +
>  drivers/mfd/axp20x-i2c.c | 102 
> +++
>  drivers/mfd/axp20x-rsb.c |  78 +
>  drivers/mfd/axp20x.c | 101 +-
>  drivers/regulator/axp20x-regulator.c |   3 +
>  include/linux/mfd/axp20x.h   |  34 +++-
>  10 files changed, 418 insertions(+), 93 deletions(-)
>  create mode 100644 drivers/mfd/axp20x-i2c.c
>  create mode 100644 drivers/mfd/axp20x-rsb.c
>
> --
> 2.6.4
>
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[PATCH v4 net-next 1/3] net: ethernet: cadence-macb: Add disabled usrio caps

[Neil Armstrong]

On some platforms, the macb integration does not use the USRIO
register to configure the (R)MII port and clocks.
When the register is not implemented and the MACB error signal
is connected to the bus error, reading or writing to the USRIO
register can trigger some Imprecise External Aborts on ARM platforms.

Signed-off-by: Neil Armstrong 
---
 drivers/net/ethernet/cadence/macb.c | 27 +++
 drivers/net/ethernet/cadence/macb.h |  1 +
 2 files changed, 16 insertions(+), 12 deletions(-)

diff --git a/drivers/net/ethernet/cadence/macb.c 
b/drivers/net/ethernet/cadence/macb.c
index 8b45bc9..fa53bc3 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2124,7 +2124,8 @@ static void macb_get_regs(struct net_device *dev, struct 
ethtool_regs *regs,
regs_buff[10] = macb_tx_dma(>queues[0], tail);
regs_buff[11] = macb_tx_dma(>queues[0], head);
 
-   regs_buff[12] = macb_or_gem_readl(bp, USRIO);
+   if (!(bp->caps & MACB_CAPS_USRIO_DISABLED))
+   regs_buff[12] = macb_or_gem_readl(bp, USRIO);
if (macb_is_gem(bp)) {
regs_buff[13] = gem_readl(bp, DMACFG);
}
@@ -2403,19 +2404,21 @@ static int macb_init(struct platform_device *pdev)
dev->hw_features &= ~NETIF_F_SG;
dev->features = dev->hw_features;
 
-   val = 0;
-   if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
-   val = GEM_BIT(RGMII);
-   else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
-(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-   val = MACB_BIT(RMII);
-   else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
-   val = MACB_BIT(MII);
+   if (!(bp->caps & MACB_CAPS_USRIO_DISABLED)) {
+   val = 0;
+   if (bp->phy_interface == PHY_INTERFACE_MODE_RGMII)
+   val = GEM_BIT(RGMII);
+   else if (bp->phy_interface == PHY_INTERFACE_MODE_RMII &&
+(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+   val = MACB_BIT(RMII);
+   else if (!(bp->caps & MACB_CAPS_USRIO_DEFAULT_IS_MII))
+   val = MACB_BIT(MII);
 
-   if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
-   val |= MACB_BIT(CLKEN);
+   if (bp->caps & MACB_CAPS_USRIO_HAS_CLKEN)
+   val |= MACB_BIT(CLKEN);
 
-   macb_or_gem_writel(bp, USRIO, val);
+   macb_or_gem_writel(bp, USRIO, val);
+   }
 
/* Set MII management clock divider */
val = macb_mdc_clk_div(bp);
diff --git a/drivers/net/ethernet/cadence/macb.h 
b/drivers/net/ethernet/cadence/macb.h
index 5c03e81..0d4ecfc 100644
--- a/drivers/net/ethernet/cadence/macb.h
+++ b/drivers/net/ethernet/cadence/macb.h
@@ -400,6 +400,7 @@
 #define MACB_CAPS_USRIO_HAS_CLKEN  0x0002
 #define MACB_CAPS_USRIO_DEFAULT_IS_MII 0x0004
 #define MACB_CAPS_NO_GIGABIT_HALF  0x0008
+#define MACB_CAPS_USRIO_DISABLED   0x0010
 #define MACB_CAPS_FIFO_MODE0x1000
 #define MACB_CAPS_GIGABIT_MODE_AVAILABLE   0x2000
 #define MACB_CAPS_SG_DISABLED  0x4000
-- 
1.9.1

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[PATCH v4 net-next 3/3] dt-bindings: net: macb: Add NPx macb variant

[Neil Armstrong]

Add NPx macb variant for NPx SoCs.

Signed-off-by: Neil Armstrong 
---
 Documentation/devicetree/bindings/net/macb.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git a/Documentation/devicetree/bindings/net/macb.txt 
b/Documentation/devicetree/bindings/net/macb.txt
index 38c8e84..638cdde 100644
--- a/Documentation/devicetree/bindings/net/macb.txt
+++ b/Documentation/devicetree/bindings/net/macb.txt
@@ -4,6 +4,7 @@ Required properties:
 - compatible: Should be "cdns,[-]{macb|gem}"
   Use "cdns,at91sam9260-macb" for Atmel at91sam9 SoCs or the 10/100Mbit IP
   available on sama5d3 SoCs.
+  Use "cdns,npx-macb" for NPX SoCs devices.
   Use "cdns,at32ap7000-macb" for other 10/100 usage or use the generic form: 
"cdns,macb".
   Use "cdns,pc302-gem" for Picochip picoXcell pc302 and later devices based on
   the Cadence GEM, or the generic form: "cdns,gem".
-- 
1.9.1

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[PATCH v4 net-next 2/3] net: macb: Add NPx macb config using USRIO_DISABLED cap

[Neil Armstrong]

Declare a new SoC variant for NPx SoCs having USRIO_DISABLED as
capability bit.

Signed-off-by: Neil Armstrong 
---
 drivers/net/ethernet/cadence/macb.c | 6 ++
 1 file changed, 6 insertions(+)

diff --git a/drivers/net/ethernet/cadence/macb.c 
b/drivers/net/ethernet/cadence/macb.c
index fa53bc3..a9e27a7 100644
--- a/drivers/net/ethernet/cadence/macb.c
+++ b/drivers/net/ethernet/cadence/macb.c
@@ -2781,6 +2781,11 @@ static const struct macb_config emac_config = {
.init = at91ether_init,
 };
 
+static const struct macb_config npx_config = {
+   .caps = MACB_CAPS_USRIO_DISABLED,
+   .clk_init = macb_clk_init,
+   .init = macb_init,
+};
 
 static const struct macb_config zynqmp_config = {
.caps = MACB_CAPS_GIGABIT_MODE_AVAILABLE | MACB_CAPS_JUMBO,
@@ -2801,6 +2806,7 @@ static const struct of_device_id macb_dt_ids[] = {
{ .compatible = "cdns,at32ap7000-macb" },
{ .compatible = "cdns,at91sam9260-macb", .data = _config },
{ .compatible = "cdns,macb" },
+   { .compatible = "cdns,npx-macb", .data = _config },
{ .compatible = "cdns,pc302-gem", .data = _config },
{ .compatible = "cdns,gem", .data = _config },
{ .compatible = "atmel,sama5d2-gem", .data = _config },
-- 
1.9.1

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[PATCH 1/2] i2c: xiic: Implement Power management

[Shubhrajyoti Datta]

Enable power management. This patch enables the clocks
before transfer and disables after the transfer.

Signed-off-by: Shubhrajyoti Datta 
---
 drivers/i2c/busses/i2c-xiic.c |   86 +---
 1 files changed, 79 insertions(+), 7 deletions(-)

diff --git a/drivers/i2c/busses/i2c-xiic.c b/drivers/i2c/busses/i2c-xiic.c
index 0b20449..b464a35 100644
--- a/drivers/i2c/busses/i2c-xiic.c
+++ b/drivers/i2c/busses/i2c-xiic.c
@@ -37,6 +37,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #define DRIVER_NAME "xiic-i2c"
 
@@ -66,6 +68,7 @@ enum xiic_endian {
  * @endianness: big/little-endian byte order
  */
 struct xiic_i2c {
+   struct device   *dev;
void __iomem*base;
wait_queue_head_t   wait;
struct i2c_adapter  adap;
@@ -77,6 +80,7 @@ struct xiic_i2c {
struct i2c_msg  *rx_msg;
int rx_pos;
enum xiic_endianendianness;
+   struct clk *clk;
 };
 
 
@@ -164,6 +168,7 @@ struct xiic_i2c {
 
 #define XIIC_RESET_MASK 0xAUL
 
+#define XIIC_PM_TIMEOUT1000/* ms */
 /*
  * The following constant is used for the device global interrupt enable
  * register, to enable all interrupts for the device, this is the only bit
@@ -676,9 +681,13 @@ static int xiic_xfer(struct i2c_adapter *adap, struct 
i2c_msg *msgs, int num)
dev_dbg(adap->dev.parent, "%s entry SR: 0x%x\n", __func__,
xiic_getreg8(i2c, XIIC_SR_REG_OFFSET));
 
+   err = pm_runtime_get_sync(i2c->dev);
+   if (err < 0)
+   return err;
+
err = xiic_busy(i2c);
if (err)
-   return err;
+   goto out;
 
i2c->tx_msg = msgs;
i2c->nmsgs = num;
@@ -686,14 +695,20 @@ static int xiic_xfer(struct i2c_adapter *adap, struct 
i2c_msg *msgs, int num)
xiic_start_xfer(i2c);
 
if (wait_event_timeout(i2c->wait, (i2c->state == STATE_ERROR) ||
-   (i2c->state == STATE_DONE), HZ))
-   return (i2c->state == STATE_DONE) ? num : -EIO;
-   else {
+   (i2c->state == STATE_DONE), HZ)) {
+   err = (i2c->state == STATE_DONE) ? num : -EIO;
+   goto out;
+   } else {
i2c->tx_msg = NULL;
i2c->rx_msg = NULL;
i2c->nmsgs = 0;
-   return -ETIMEDOUT;
+   err = -ETIMEDOUT;
+   goto out;
}
+out:
+   pm_runtime_mark_last_busy(i2c->dev);
+   pm_runtime_put_autosuspend(i2c->dev);
+   return err;
 }
 
 static u32 xiic_func(struct i2c_adapter *adap)
@@ -748,13 +763,26 @@ static int xiic_i2c_probe(struct platform_device *pdev)
spin_lock_init(>lock);
init_waitqueue_head(>wait);
 
+   i2c->clk = devm_clk_get(>dev, NULL);
+   if (IS_ERR(i2c->clk)) {
+   dev_err(>dev, "input clock not found.\n");
+   return PTR_ERR(i2c->clk);
+   }
+   ret = clk_prepare_enable(i2c->clk);
+   if (ret)
+   dev_err(>dev, "Unable to enable clock.\n");
+
+   pm_runtime_enable(i2c->dev);
+   pm_runtime_set_autosuspend_delay(i2c->dev, XIIC_PM_TIMEOUT);
+   pm_runtime_use_autosuspend(i2c->dev);
+   pm_runtime_set_active(i2c->dev);
ret = devm_request_threaded_irq(>dev, irq, xiic_isr,
xiic_process, IRQF_ONESHOT,
pdev->name, i2c);
 
if (ret < 0) {
dev_err(>dev, "Cannot claim IRQ\n");
-   return ret;
+   goto err_clk_dis;
}
 
/*
@@ -776,7 +804,7 @@ static int xiic_i2c_probe(struct platform_device *pdev)
if (ret) {
dev_err(>dev, "Failed to add adapter\n");
xiic_deinit(i2c);
-   return ret;
+   goto err_clk_dis;
}
 
if (pdata) {
@@ -786,16 +814,30 @@ static int xiic_i2c_probe(struct platform_device *pdev)
}
 
return 0;
+
+err_clk_dis:
+   clk_disable_unprepare(i2c->clk);
+   pm_runtime_set_suspended(>dev);
+   pm_runtime_disable(>dev);
+   return ret;
 }
 
 static int xiic_i2c_remove(struct platform_device *pdev)
 {
struct xiic_i2c *i2c = platform_get_drvdata(pdev);
+   int ret;
 
/* remove adapter & data */
i2c_del_adapter(>adap);
 
+   ret = clk_prepare_enable(i2c->clk);
+   if (ret) {
+   dev_err(>dev, "Unable to enable clock.\n");
+   return ret;
+   }
xiic_deinit(i2c);
+   clk_disable_unprepare(i2c->clk);
+   pm_runtime_disable(>dev);
 
return 0;
 }
@@ -808,12 +850,42 @@ static const struct of_device_id xiic_of_match[] = {
 MODULE_DEVICE_TABLE(of, xiic_of_match);
 #endif
 
+static int __maybe_unused cdns_i2c_runtime_suspend(struct device *dev)
+{
+   struct platform_device *pdev = to_platform_device(dev);
+   

[PATCH 2/2] bindings: i2c: Add clock entries for i2c-xiic

[Shubhrajyoti Datta]

Add clock description for i2c-xiic

Signed-off-by: Shubhrajyoti Datta 
---
 Documentation/devicetree/bindings/i2c/i2c-xiic.txt |3 +++
 1 files changed, 3 insertions(+), 0 deletions(-)

diff --git a/Documentation/devicetree/bindings/i2c/i2c-xiic.txt 
b/Documentation/devicetree/bindings/i2c/i2c-xiic.txt
index ceabbe9..caf42e9 100644
--- a/Documentation/devicetree/bindings/i2c/i2c-xiic.txt
+++ b/Documentation/devicetree/bindings/i2c/i2c-xiic.txt
@@ -6,14 +6,17 @@ Required properties:
 - interrupts : IIC controller unterrupt
 - #address-cells = <1>
 - #size-cells = <0>
+- clocks: Input clock specifier. Refer to common clock bindings.
 
 Optional properties:
 - Child nodes conforming to i2c bus binding
+- clock-names: Input clock name, should be 'pclk'.
 
 Example:
 
axi_iic_0: i2c@4080 {
compatible = "xlnx,xps-iic-2.00.a";
+   clocks = < 15>;
interrupts = < 1 2 >;
reg = < 0x4080 0x1 >;
 
-- 
1.7.1

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Re: [PATCH v2] ARM: dts: rockchip: Adding LEDs handling via leds-gpio for the Radxa Rock2 Square

[Sjoerd Simons]

On Thu, 2015-12-31 at 10:13 +0100, Romain Perier wrote:
> Describe the two user-controllable LEDs on Rock2 Square boards.
> All information have been retrieved from the schematics and the
> vendor
> devicetree. The default-triggers mimic the behaviour of the vendor-
> kernel to
> keep functionalities in sync.
> 
> Signed-off-by: Romain Perier 

Reviewed-by: Sjoerd Simons 

> ---
> 
> Changes in v2:
> - Changed labels according to what is defined in the schematics
> - Added a long commit message describing this patch in details
> 
>  arch/arm/boot/dts/rk3288-rock2-square.dts | 17 +
>  1 file changed, 17 insertions(+)
> 
> diff --git a/arch/arm/boot/dts/rk3288-rock2-square.dts
> b/arch/arm/boot/dts/rk3288-rock2-square.dts
> index c5453a0..0813428 100644
> --- a/arch/arm/boot/dts/rk3288-rock2-square.dts
> +++ b/arch/arm/boot/dts/rk3288-rock2-square.dts
> @@ -56,6 +56,23 @@
>   pinctrl-0 = <_int>;
>   };
>  
> + gpio-leds {
> + compatible = "gpio-leds";
> +
> + heartbeat {
> + gpios = < 15 GPIO_ACTIVE_LOW>;
> + label = "rock2:green:state1";
> + linux,default-trigger = "heartbeat";
> + };
> +
> + mmc {
> + gpios = < 11 GPIO_ACTIVE_LOW>;
> + label = "rock2:blue:state2";
> + linux,default-trigger = "mmc0";
> + };
> + };
> +
> +
>   sound {
>   compatible = "simple-audio-card";
>   simple-audio-card,name = "SPDIF";

-- 
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Collabora Ltd.
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Re: [PATCH] dtc: create tool to diff device trees

[Rob Herring]

On Thu, Dec 31, 2015 at 3:12 AM, Frank Rowand  wrote:
> From: Frank Rowand 
>
> Create script to diff device trees.
>
> The device tree can be in any of the forms recognized by the dtc compiler:
>   - source
>   - binary blob
>   - file system tree (from /proc/devicetree)
>
> If the device tree is a source file, then it is pre-processed in the
> same way as it would be when built in the linux kernel source tree
> before diffing.

In general, I'd like to see some of this move to dtc and the kernel
dependencies minimized.

>
> Signed-off-by: Frank Rowand 
> ---
>
> Tools to develop and debug device tree are somewhat inadequate.  This is a
> small step in improving the situation.
>
> Rationale for and examples of using the script are provided in slides
> 1 - 78 of the elce 2015 presentation "Solving Device Tree Issues",
> which can be found at:
>
>http://elinux.org/images/0/04/Dt_debugging_elce_2015_151006_0421.pdf
>
> (The script was named dtdiff instead of dtx_diff in the presentation.)
>
>
>  scripts/dtc/dtx_diff |  368 
> +++
>  1 file changed, 368 insertions(+)
>
> Index: b/scripts/dtc/dtx_diff
> ===
> --- /dev/null
> +++ b/scripts/dtc/dtx_diff
> @@ -0,0 +1,368 @@
> +#! /bin/bash

Add "-e" by default?

> +
> +# Copyright (C) 2015 Frank Rowand
> +#
> +# This program is free software; you can redistribute it and/or modify
> +# it under the terms of the GNU General Public License as published by
> +# the Free Software Foundation; version 2 of the License.
> +
> +
> +usage() {
> +
> +   # use spaces instead of tabs in the usage message
> +   cat >&2 < +
> +Usage:
> +
> +   `basename $0` DTx
> +decompile DTx
> +
> +   `basename $0` DTx_1 DTx_2
> +diff DTx_1 and DTx_2
> +
> +
> +   -f   print full dts in diff (--unified=9)
> +   -h   synonym for --help
> +   -helpsynonym for --help
> +  --helpprint this message and exit
> +   -s SRCTREE   linux kernel source tree is at path SRCTREE
> +(default is current directory)
> +   -S   linux kernel source tree is at root of current git repo

Can't this be detected? There are some cases of kernel trees which are
not in git.

> +   -u   unsorted, do not sort DTx
> +
> +
> +Each DTx is processed by the dtc compiler to produce a sorted dts source
> +file.  If DTx is a dts source file then it is pre-processed in the same
> +manner as done for the compile of the dts source file in the Linux kernel
> +build system ('#include' and '/include/' directives are processed).
> +
> +If two DTx are provided, the resulting dts source files are diffed.
> +
> +If DTx is a directory, it is treated as a DT subtree, such as
> +  /proc/device-tree.
> +
> +If DTx contains the binary blob magic value in the first four bytes,
> +  it is treated as a binary blob (aka .dtb or FDT).
> +
> +Otherwise DTx is treated as a dts source file (aka .dts).
> +
> +   If this script is not run from the root of the linux source tree,
> +   and DTx utilizes '#include' or '/include/' then the path of the
> +   linux source tree can be provided by '-s SRCTREE' or '-S' so that
> +   include paths will be set properly.
> +
> +   The shell variable \${ARCH} must provide the architecture containing
> +   the dts source file for include paths to be set properly for '#include'
> +   or '/include/' to be processed.
> +
> +   If DTx_1 and DTx_2 are in different architectures, then this script
> +   may not work since \${ARCH} is part of the include path.  Two possible
> +   workarounds:
> +
> +  `basename $0` \\
> +  <(ARCH=arch_of_dtx_1 `basename $0` DTx_1) \\
> +  <(ARCH=arch_of_dtx_2 `basename $0` DTx_2)
> +
> +  `basename $0` ARCH=arch_of_dtx_1 DTx_1 >tmp_dtx_1.dts
> +  `basename $0` ARCH=arch_of_dtx_2 DTx_2 >tmp_dtx_2.dts
> +  `basename $0` tmp_dtx_1.dts tmp_dtx_2.dts
> +  rm tmp_dtx_1.dts tmp_dtx_2.dts
> +
> +   If DTx_1 and DTx_2 are in different directories, then this script will
> +   add the path of DTx_1 and DTx_2 to the include paths.  If DTx_2 includes
> +   a local file that exists in both the path of DTx_1 and DTx_2 then the
> +   file in the path of DTx_1 will incorrectly be included.  Possible
> +   workaround:
> +
> +  `basename $0` DTx_1 >tmp_dtx_1.dts
> +  `basename $0` DTx_2 >tmp_dtx_2.dts
> +  `basename $0` tmp_dtx_1.dts tmp_dtx_2.dts
> +  rm tmp_dtx_1.dts tmp_dtx_2.dts
> +
> +eod
> +}
> +
> +
> +compile_to_dts() {
> +
> +   dtx="$1"
> +
> +   if [ -d "${dtx}" ] ; then
> +
> +   # -  input is file tree
> +
> +   if ( ! ${DTC} -I fs ${dtx} ) ; then
> +   exit 3
> +   fi
> +
> +   elif [ -f "${dtx}" ] && [ -r "${dtx}" ] ; then
> +
> +   

Re: [PATCH] of/irq: Export of_irq_count()

[Stephen Boyd]

On 12/22, Rob Herring wrote:
> On Tue, Dec 22, 2015 at 6:22 AM, Mark Brown  wrote:
> > Some of the Qualcomm pinctrl drivers have started trying to use
> > of_irq_count() in modular code but this fails to build as the symbol is
> > not exported.  Since there doesn't seem to be any reason not to export
> > the symbol make it available to modules.
> 
> The reason it has not been exported is because we want to stick with
> the platform_* APIs for IRQs. There's not really an equivalent
> function though. Perhaps we should make one? Usually it is just used
> for allocating some driver data. If that is the case, is it really
> enough data to not just allocate the max?
> 

It's mostly used for allocation but we also do some pin type
discovery by reading registers and that would fail if we went
past the actual number of pins there are.

So how about implementing platform_irq_count()? I'd like to keep
these drivers as tristate if possible.

8<
diff --git a/drivers/base/platform.c b/drivers/base/platform.c
index d77ed0c946dd..421c67f8fdef 100644
--- a/drivers/base/platform.c
+++ b/drivers/base/platform.c
@@ -118,6 +118,25 @@ int platform_get_irq(struct platform_device *dev, unsigned 
int num)
 EXPORT_SYMBOL_GPL(platform_get_irq);
 
 /**
+ * platform_irq_count - Count the number of IRQs a platform device uses
+ * @dev: platform device
+ *
+ * Return: Number of IRQs a platform device uses or EPROBE_DEFER
+ */
+int platform_irq_count(struct platform_device *dev)
+{
+   int ret, nr = 0;
+
+   while ((ret = platform_get_irq(dev, nr)) == 0)
+   nr++;
+
+   if (ret == -EPROBE_DEFER)
+   return ret;
+
+   return nr;
+}
+
+/**
  * platform_get_resource_byname - get a resource for a device by name
  * @dev: platform device
  * @type: resource type

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Re: [PATCH] mtd: spi-nor: add hisilicon spi-nor flash controller driver

[xuejiancheng]

Hi Rob,
   Happy new year to you! Thank you for your patience.

On 2016/1/1 6:26, Rob Herring wrote:
> On Wed, Dec 30, 2015 at 10:26:11AM +0800, Jiancheng Xue wrote:
>> add hisilicon spi-nor flash controller driver
>>
>> Signed-off-by: Binquan Peng 
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  .../devicetree/bindings/spi/spi-hisi-sfc.txt   |  24 +
>>  drivers/mtd/spi-nor/Kconfig|   7 +
>>  drivers/mtd/spi-nor/Makefile   |   1 +
>>  drivers/mtd/spi-nor/hisi-sfc.c | 505 
>> +
>>  4 files changed, 537 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>>  create mode 100644 drivers/mtd/spi-nor/hisi-sfc.c
>>
>> diff --git a/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt 
>> b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> new file mode 100644
>> index 000..170885a
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/spi/spi-hisi-sfc.txt
>> @@ -0,0 +1,24 @@
>> +HiSilicon SPI-NOR Flash Controller
>> +
>> +Required properties:
>> +- compatible : Should be "hisilicon,hisi-sfc".
>> +- address-cells: number of cells required to define a chip select
>> +address on the SPI bus. Should be set to 1. See spi-bus.txt.
>> +- size-cells:Should be 0.
> 
> How about some consistency in the spacing around the ':'.

OK. I'll correct it in next version. Thank you.

> 
>> +- reg : Offset and length of the register set for the controller device.
>> +- reg-names: Must include the following two entries:"control","memory".
>^ ^
> Spaces needed.

OK

> 
>> +- clocks: handle to spi-nor flash controller clock.
>> +
>> +Example:
>> +spi-nor-controller@1400 {
>> +compatible = "hisilicon,hisi-sfc";
>> +#address-cells = <1>;
>> +#size-cells = <0>;
>> +reg = <0x1000 0x1000>, <0x1400 0x100>;
>> +reg-names = "control", "memory";
>> +clocks = < HI3519_FMC_CLK>;
>> +spi-nor@0 {
>> +compatible = "jedec,spi-nor";
>> +reg = <0>;
>> +};
>> +};
>> diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig
>> index 2fe2a7e..7fe1564 100644
>> --- a/drivers/mtd/spi-nor/Kconfig
>> +++ b/drivers/mtd/spi-nor/Kconfig
>> @@ -30,6 +30,12 @@ config SPI_FSL_QUADSPI
>>This controller does not support generic SPI. It only supports
>>SPI NOR.
>>  
>> +config SPI_HISI_SFC
>> +tristate "Hisilicon SPI-NOR Flash Controller(SFC)"
>> +depends on ARCH_HISI
>> +help
>> +  This enables support for hisilicon SPI-NOR flash controller.
>> +
>>  config SPI_NXP_SPIFI
>>  tristate "NXP SPI Flash Interface (SPIFI)"
>>  depends on OF && (ARCH_LPC18XX || COMPILE_TEST)
>> @@ -41,4 +47,5 @@ config SPI_NXP_SPIFI
>>Flash. Enable this option if you have a device with a SPIFI
>>controller and want to access the Flash as a mtd device.
>>  
>> +
> 
> Drop this spurious change.

OK. Thank you. I'll pay more attention to this later.

> 
>>  endif # MTD_SPI_NOR
>> diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile
>> index e5e..8cea3c5 100644
>> --- a/drivers/mtd/spi-nor/Makefile
>> +++ b/drivers/mtd/spi-nor/Makefile
>> @@ -1,3 +1,4 @@
>>  obj-$(CONFIG_MTD_SPI_NOR)   += spi-nor.o
>>  obj-$(CONFIG_SPI_FSL_QUADSPI)   += fsl-quadspi.o
>> +obj-$(CONFIG_SPI_HISI_SFC)  += hisi-sfc.o
>>  obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o
>> diff --git a/drivers/mtd/spi-nor/hisi-sfc.c b/drivers/mtd/spi-nor/hisi-sfc.c
>> new file mode 100644
>> index 000..fd9649a
>> --- /dev/null
>> +++ b/drivers/mtd/spi-nor/hisi-sfc.c
>> @@ -0,0 +1,505 @@
>> +/* HiSilicon SPI Nor Flash Controller Driver
>> + *
>> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> + * but WITHOUT ANY WARRANTY; without even the implied warranty of
>> + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
>> + * GNU General Public License for more details.
>> + *
>> + * You should have received a copy of the GNU General Public License
>> + * along with this program. If not, see .
>> + */
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
>> +#include 
> 
> Some say to alphabetize includes. I don't care so much, but at least 
> group subdirectories.

Sorry about that. I'll reorder them.

> 
> Rob
> 
> .
> 

Jiancheng

.

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[PATCH v2 2/3] drm/rockchip: vop: add rk3229 vop support

[Yakir Yang]

RK3229 registers layout is simalar to RK3288 layout, only the
interruput registers is different to RK3288.

RK3229 support two overlay plane and one hwc plane, max output
resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Yakir Yang 
---
Changes in v2:
- Separate the write-mask changes out, and remove the DUMMY_INTR marcos (Heiko)

 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 110 
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h |  90 +++
 2 files changed, 200 insertions(+)

diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 7fbaf76..f1358f9 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -191,6 +191,114 @@ static const struct vop_data rk3288_vop = {
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
 };
 
+static const struct vop_scl_extension rk3229_win_full_scl_ext = {
+   .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
+   .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
+   .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
+   .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
+   .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
+   .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
+   .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
+   .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
+   .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
+   .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
+   .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
+   .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
+   .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
+   .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
+   .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
+   .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
+   .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
+   .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
+   .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
+   .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
+   .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3229_win_full_scl = {
+   .ext = _win_full_scl_ext,
+   .scale_yrgb_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 0x0),
+   .scale_yrgb_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_YRGB, 0x, 16),
+   .scale_cbcr_x = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 0x0),
+   .scale_cbcr_y = VOP_REG(RK3229_WIN0_SCL_FACTOR_CBR, 0x, 16),
+};
+
+static const struct vop_win_phy rk3229_win01_data = {
+   .scl = _win_full_scl,
+   .data_formats = formats_win_full,
+   .nformats = ARRAY_SIZE(formats_win_full),
+   .enable = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 0),
+   .format = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 1),
+   .rb_swap = VOP_REG(RK3229_WIN0_CTRL0, 0x1, 12),
+   .act_info = VOP_REG(RK3229_WIN0_ACT_INFO, 0x1fff1fff, 0),
+   .dsp_info = VOP_REG(RK3229_WIN0_DSP_INFO, 0x0fff0fff, 0),
+   .dsp_st = VOP_REG(RK3229_WIN0_DSP_ST, 0x1fff1fff, 0),
+   .yrgb_mst = VOP_REG(RK3229_WIN0_YRGB_MST, 0x, 0),
+   .uv_mst = VOP_REG(RK3229_WIN0_CBR_MST, 0x, 0),
+   .yrgb_vir = VOP_REG(RK3229_WIN0_VIR, 0x3fff, 0),
+   .uv_vir = VOP_REG(RK3229_WIN0_VIR, 0x3fff, 16),
+   .src_alpha_ctl = VOP_REG(RK3229_WIN0_SRC_ALPHA_CTRL, 0xff, 0),
+   .dst_alpha_ctl = VOP_REG(RK3229_WIN0_DST_ALPHA_CTRL, 0xff, 0),
+};
+
+static const struct vop_win_data rk3229_vop_win_data[] = {
+   { .base = 0x00, .phy = _win01_data,
+ .type = DRM_PLANE_TYPE_PRIMARY },
+   { .base = 0x40, .phy = _win01_data,
+ .type = DRM_PLANE_TYPE_CURSOR },
+};
+
+static const struct vop_ctrl rk3229_ctrl_data = {
+   .cfg_done = VOP_REG(RK3229_REG_CFG_DONE, 0x1, 0),
+   .standby = VOP_REG(RK3229_SYS_CTRL, 0x1, 22),
+   .gate_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 23),
+   .mmu_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 20),
+   .rgb_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 12),
+   .hdmi_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 13),
+   .edp_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 14),
+   .mipi_en = VOP_REG(RK3229_SYS_CTRL, 0x1, 15),
+   .data_blank = VOP_REG(RK3229_DSP_CTRL0, 0x1, 19),
+   .out_mode = VOP_REG(RK3229_DSP_CTRL0, 0xf, 0),
+   .pin_pol = VOP_REG(RK3229_DSP_CTRL1, 0xf, 20),
+   .dither_up = VOP_REG(RK3229_DSP_CTRL1, 0x1, 6),
+   .htotal_pw = VOP_REG(RK3229_DSP_HTOTAL_HS_END, 0x1fff1fff, 0),
+   .hact_st_end = VOP_REG(RK3229_DSP_HACT_ST_END, 0x1fff1fff, 0),
+   .vtotal_pw = VOP_REG(RK3229_DSP_VTOTAL_VS_END, 0x1fff1fff, 0),
+   .vact_st_end = VOP_REG(RK3229_DSP_VACT_ST_END, 0x1fff1fff, 0),
+   .hpost_st_end = VOP_REG(RK3229_POST_DSP_HACT_INFO, 0x1fff1fff, 0),
+   .vpost_st_end = 

[PATCH] of/platform: export of_default_bus_match_table

[Masahiro Yamada]

Currently, drivers/bus/uniphier-system-bus.c is kept from being a
module due to the unresolved reference to of_default_bus_match_table.

Refer to commit 326ea45aa827 ("bus: uniphier: allow only built-in
driver").

Signed-off-by: Masahiro Yamada 
---

 drivers/of/platform.c | 1 +
 1 file changed, 1 insertion(+)

diff --git a/drivers/of/platform.c b/drivers/of/platform.c
index af98343..8d103e4 100644
--- a/drivers/of/platform.c
+++ b/drivers/of/platform.c
@@ -31,6 +31,7 @@ const struct of_device_id of_default_bus_match_table[] = {
 #endif /* CONFIG_ARM_AMBA */
{} /* Empty terminated list */
 };
+EXPORT_SYMBOL(of_default_bus_match_table);
 
 static int of_dev_node_match(struct device *dev, void *data)
 {
-- 
1.9.1

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Re: [RFC PATCH v1 1/2] drm/rockchip: vop: add rk3229 vop support

[Yakir Yang]

Hi Heiko,

On 01/04/2016 08:23 PM, Heiko Stuebner wrote:

Hi Yakir,

Am Montag, 4. Januar 2016, 19:53:58 schrieb Yakir Yang:

RK3229 registers layout is simalar to RK3288 layout, only the
interruput registers is different to RK3288.

RK3229 support two overlay plane and one hwc plane, max output
resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.

Signed-off-by: Yakir Yang 
---
  drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   7 +-
  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 120
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h
|  90 + 4 files changed, 217 insertions(+), 2
deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d83bf87..3c83097
100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -63,9 +63,12 @@
  #define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
int i, reg = 0; \
-   for (i = 0; i < vop->data->intr->nintrs; i++) { \
-   if (vop->data->intr->intrs[i] & type) \
+   const struct vop_intr *intr = vop->data->intr; \
+   for (i = 0; i < intr->nintrs; i++) { \
+   if (intr->intrs[i] & type) { \
reg |= (v) << i; \
+   reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
+   } \
} \
VOP_INTR_SET(vop, name, reg); \
} while (0)

I do believe this part, as well as setting the default .write_mask = false
for the existing parts should get its own patch + a bit more explanation
on what this does and why it's needed.

 8< 
drm/rockchip: Add support for interrupt registers using write-masks

Some new display-controllers are need to set write-masks to enable writes
to interrupt registers. Allow this to be set on a per-vop basis.
 8< 

or something like that, and then patches 2+3 being the rk3229 support +
binding.


Great, will send the new version out.




diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 071ff0b..1e839e8
100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -60,6 +60,7 @@ struct vop_ctrl {
  };

  struct vop_intr {
+   bool write_mask;
const int *intrs;
uint32_t nintrs;
struct vop_reg enable;
@@ -136,6 +137,7 @@ struct vop_data {
  };

  /* interrupt define */
+#define DUMMY_INTR (0 << 0)
  #define DSP_HOLD_VALID_INTR   (1 << 0)
  #define FS_INTR   (1 << 1)
  #define LINE_FLAG_INTR(1 << 2)
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 3166b46..bbcd128
100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
  };

  static const struct vop_intr rk3288_vop_intr = {
+   .write_mask = false,
.intrs = rk3288_vop_intrs,
.nintrs = ARRAY_SIZE(rk3288_vop_intrs),
.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
@@ -190,6 +191,122 @@ static const struct vop_data rk3288_vop = {
.win_size = ARRAY_SIZE(rk3288_vop_win_data),
  };

+static const struct vop_scl_extension rk3229_win_full_scl_ext = {
+   .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
+   .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
+   .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
+   .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
+   .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
+   .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
+   .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
+   .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
+   .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
+   .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
+   .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
+   .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
+   .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
+   .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
+   .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
+   .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
+   .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
+   .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
+   .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
+   .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
+   .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
+};
+
+static const struct vop_scl_regs rk3229_win_full_scl = {
+   .ext = _win_full_scl_ext,
+   

[PATCH v2 0/3] Add RK3229 vop support

[Yakir Yang]

Based on Mark Yao's drm-next branch
[https://github.com/markyzq/kernel-drm-rockchip/tree/drm-rockchip-next-2015-12-28]


Changes in v2:
- Add this patch in v2 (Heiko)
- Separate the write-mask changes out, and remove the DUMMY_INTR marcos (Heiko)
- acked by Rob

Yakir Yang (3):
  drm/rockchip: vop: Add support for interrupt registers using
write-masks
  drm/rockchip: vop: add rk3229 vop support
  dt-bindings: add document for rk3229-vop

 .../bindings/display/rockchip/rockchip-vop.txt |   1 +
 drivers/gpu/drm/rockchip/rockchip_drm_vop.c|   7 +-
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h|   1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c| 112 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.h|  90 +
 5 files changed, 209 insertions(+), 2 deletions(-)

-- 
1.9.1


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[PATCH v2 3/3] dt-bindings: add document for rk3229-vop

[Yakir Yang]

Signed-off-by: Yakir Yang 
Acked-by: Rob Herring 
---
Changes in v2:
- acked by Rob

 Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 1 +
 1 file changed, 1 insertion(+)

diff --git 
a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt 
b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
index 5489b59..75ebc20 100644
--- a/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
+++ b/Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt
@@ -7,6 +7,7 @@ buffer to an external LCD interface.
 Required properties:
 - compatible: value should be one of the following
"rockchip,rk3288-vop";
+   "rockchip,rk3229-vop";
"rockchip,rk3036-vop";
 
 - interrupts: should contain a list of all VOP IP block interrupts in the
-- 
1.9.1


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Re: [PATCH v3 1/8] dt-bindings: Add a binding for Mediatek Video Processor

[tiffany lin]

Hi Rob,

Got it. Sorry about that. I will add acks next time.

best regards,
Tiffany

On Mon, 2016-01-04 at 08:15 -0600, Rob Herring wrote:
> On Mon, Jan 04, 2016 at 06:11:49PM +0800, Tiffany Lin wrote:
> > From: Andrew-CT Chen 
> > 
> > Add a DT binding documentation of Video Processor Unit for the
> > MT8173 SoC from Mediatek.
> > 
> > Signed-off-by: Andrew-CT Chen 
> > Signed-off-by: Tiffany Lin 
> 
> Please add acks when sending new versions as I already acked the last 
> version.
> 
> Acked-by: Rob Herring 


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[PATCH v2 1/3] drm/rockchip: vop: Add support for interrupt registers using write-masks

[Yakir Yang]

Some new display-controllers are need to set write-masks to enable writes
to interrupt registers. Allow this to be set on a per-vop basis.

Signed-off-by: Yakir Yang 
---
Changes in v2:
- Add this patch in v2 (Heiko)

 drivers/gpu/drm/rockchip/rockchip_drm_vop.c | 7 +--
 drivers/gpu/drm/rockchip/rockchip_drm_vop.h | 1 +
 drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 ++
 3 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
index d83bf87..3c83097 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
@@ -63,9 +63,12 @@
 #define VOP_INTR_SET_TYPE(vop, name, type, v) \
do { \
int i, reg = 0; \
-   for (i = 0; i < vop->data->intr->nintrs; i++) { \
-   if (vop->data->intr->intrs[i] & type) \
+   const struct vop_intr *intr = vop->data->intr; \
+   for (i = 0; i < intr->nintrs; i++) { \
+   if (intr->intrs[i] & type) { \
reg |= (v) << i; \
+   reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
+   } \
} \
VOP_INTR_SET(vop, name, reg); \
} while (0)
diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h 
b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
index 071ff0b..f1bb84d 100644
--- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
+++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
@@ -60,6 +60,7 @@ struct vop_ctrl {
 };
 
 struct vop_intr {
+   bool write_mask;
const int *intrs;
uint32_t nintrs;
struct vop_reg enable;
diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c 
b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
index 3166b46..7fbaf76 100644
--- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
+++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
@@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
 };
 
 static const struct vop_intr rk3288_vop_intr = {
+   .write_mask = false,
.intrs = rk3288_vop_intrs,
.nintrs = ARRAY_SIZE(rk3288_vop_intrs),
.status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
@@ -240,6 +241,7 @@ static const int rk3036_vop_intrs[] = {
 };
 
 static const struct vop_intr rk3036_intr = {
+   .write_mask = false,
.intrs = rk3036_vop_intrs,
.nintrs = ARRAY_SIZE(rk3036_vop_intrs),
.status = VOP_REG(RK3036_INT_STATUS, 0xf, 0),
-- 
1.9.1


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Re: [V5, 1/6] i2c: qup: Change qup_wait_writeready function to use for all timeouts

[Andy Gross]

On Tue, Nov 17, 2015 at 05:15:22PM +0530, Sricharan R wrote:
> qup_wait_writeready waits only on a output fifo empty event.
> Change the same function to accept the event and data length
> to wait as parameters. This way the same function can be used for
> timeouts in other places as well.
> 
> Signed-off-by: Sricharan R 

Looks good to me.

Reviewed-by: Andy Gross 
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Re: [PATCH V11 3/7] dma: add Qualcomm Technologies HIDMA management driver

[Vinod Koul]

On Mon, Jan 04, 2016 at 08:37:30PM +0200, Andy Shevchenko wrote:

> > +static int set_priority(struct hidma_mgmt_dev *mdev, unsigned int i, u64 
> > val)
> > +{
> > +   u64 tmp;
> > +   int rc;
> > +
> > +   if (i > mdev->dma_channels)
> 
> Shouldn't be >= ? I somehow missed that.

There is no merit is posting not related context while replying, makes your
emails harder to read, please fix that

> > +   return -EINVAL;
> > +
> > +   tmp = mdev->priority[i];
> > +   mdev->priority[i] = val;
> > +   rc = hidma_mgmt_setup(mdev);
> > +   if (rc)
> > +   mdev->priority[i] = tmp;
> > +   return rc;
> > +}
> > +
> > +static int set_weight(struct hidma_mgmt_dev *mdev, unsigned int i, u64 val)
> > +{
> > +   u64 tmp;
> > +   int rc;
> > +
> > +   if (i > mdev->dma_channels)
> 
> Ditto.

Exactly, ditto...


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Re: [RFC PATCH v1 2/2] dt-bindings: add document for rk3229-vop

[Yakir Yang]

Thanks, Rob

- Yakir

On 01/04/2016 10:11 PM, Rob Herring wrote:

On Mon, Jan 04, 2016 at 07:50:30PM +0800, Yakir Yang wrote:

Signed-off-by: Yakir Yang 
---
  Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 1 +
  1 file changed, 1 insertion(+)

Acked-by: Rob Herring 






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Re: [RFC PATCH v1 1/2] drm/rockchip: vop: add rk3229 vop support

[Heiko Stuebner]

Hi Yakir,

Am Montag, 4. Januar 2016, 19:53:58 schrieb Yakir Yang:
> RK3229 registers layout is simalar to RK3288 layout, only the
> interruput registers is different to RK3288.
> 
> RK3229 support two overlay plane and one hwc plane, max output
> resolution is 4K. it support IOMMU, and its IOMMU same as rk3288's.
> 
> Signed-off-by: Yakir Yang 
> ---
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.c |   7 +-
>  drivers/gpu/drm/rockchip/rockchip_drm_vop.h |   2 +
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 120
>  drivers/gpu/drm/rockchip/rockchip_vop_reg.h
> |  90 + 4 files changed, 217 insertions(+), 2
> deletions(-)
> 
> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c index d83bf87..3c83097
> 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.c
> @@ -63,9 +63,12 @@
>  #define VOP_INTR_SET_TYPE(vop, name, type, v) \
>   do { \
>   int i, reg = 0; \
> - for (i = 0; i < vop->data->intr->nintrs; i++) { \
> - if (vop->data->intr->intrs[i] & type) \
> + const struct vop_intr *intr = vop->data->intr; \
> + for (i = 0; i < intr->nintrs; i++) { \
> + if (intr->intrs[i] & type) { \
>   reg |= (v) << i; \
> + reg |= intr->write_mask ? (1 << (i + 16)) : 0; \
> + } \
>   } \
>   VOP_INTR_SET(vop, name, reg); \
>   } while (0)

I do believe this part, as well as setting the default .write_mask = false 
for the existing parts should get its own patch + a bit more explanation
on what this does and why it's needed.

 8< 
drm/rockchip: Add support for interrupt registers using write-masks

Some new display-controllers are need to set write-masks to enable writes
to interrupt registers. Allow this to be set on a per-vop basis.
 8< 

or something like that, and then patches 2+3 being the rk3229 support + 
binding.


> diff --git a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h index 071ff0b..1e839e8
> 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> +++ b/drivers/gpu/drm/rockchip/rockchip_drm_vop.h
> @@ -60,6 +60,7 @@ struct vop_ctrl {
>  };
> 
>  struct vop_intr {
> + bool write_mask;
>   const int *intrs;
>   uint32_t nintrs;
>   struct vop_reg enable;
> @@ -136,6 +137,7 @@ struct vop_data {
>  };
> 
>  /* interrupt define */
> +#define DUMMY_INTR   (0 << 0)
>  #define DSP_HOLD_VALID_INTR  (1 << 0)
>  #define FS_INTR  (1 << 1)
>  #define LINE_FLAG_INTR   (1 << 2)
> diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 3166b46..bbcd128
> 100644
> --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c
> @@ -174,6 +174,7 @@ static const int rk3288_vop_intrs[] = {
>  };
> 
>  static const struct vop_intr rk3288_vop_intr = {
> + .write_mask = false,
>   .intrs = rk3288_vop_intrs,
>   .nintrs = ARRAY_SIZE(rk3288_vop_intrs),
>   .status = VOP_REG(RK3288_INTR_CTRL0, 0xf, 0),
> @@ -190,6 +191,122 @@ static const struct vop_data rk3288_vop = {
>   .win_size = ARRAY_SIZE(rk3288_vop_win_data),
>  };
> 
> +static const struct vop_scl_extension rk3229_win_full_scl_ext = {
> + .cbcr_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 31),
> + .cbcr_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 30),
> + .cbcr_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 28),
> + .cbcr_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 26),
> + .cbcr_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 24),
> + .yrgb_vsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 23),
> + .yrgb_vsu_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 22),
> + .yrgb_hsd_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 20),
> + .yrgb_ver_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 18),
> + .yrgb_hor_scl_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 16),
> + .line_load_mode = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 15),
> + .cbcr_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0x7, 12),
> + .yrgb_axi_gather_num = VOP_REG(RK3229_WIN0_CTRL1, 0xf, 8),
> + .vsd_cbcr_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 7),
> + .vsd_cbcr_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 6),
> + .vsd_yrgb_gt2 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 5),
> + .vsd_yrgb_gt4 = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 4),
> + .bic_coe_sel = VOP_REG(RK3229_WIN0_CTRL1, 0x3, 2),
> + .cbcr_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 1),
> + .yrgb_axi_gather_en = VOP_REG(RK3229_WIN0_CTRL1, 0x1, 0),
> + .lb_mode = VOP_REG(RK3229_WIN0_CTRL0, 0x7, 5),
> +};
> +
> +static const struct vop_scl_regs rk3229_win_full_scl = {
> + .ext = _win_full_scl_ext,
> + 

[PATCH 09/10] [media] tvp5150: Initialize the chip on probe

[Javier Martinez Canillas]

After power-up, the tvp5150 decoder is in a unknown state until the
RESETB pin is driven LOW which reset all the registers and restarts
the chip's internal state machine.

The init sequence has some timing constraints and the RESETB signal
can only be used if the PDN (Power-down) pin is first released.

So, the initialization sequence is as follows:

1- PDN (active-low) is driven HIGH so the chip is power-up
2- A 20 ms delay is needed before sending a RESETB (active-low) signal.
3- The RESETB pulse duration is 500 ns.
4- A 200 us delay is needed for the I2C client to be active after reset.

This patch used as a reference the logic in the IGEPv2 board file from
the ISEE 2.6.37 vendor tree.

Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 35 +++
 1 file changed, 35 insertions(+)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index caac96a577f8..fed89a811ab7 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -5,6 +5,7 @@
  * This code is placed under the terms of the GNU General Public License v2
  */
 
+#include 
 #include 
 #include 
 #include 
@@ -1197,6 +1198,36 @@ static int tvp5150_detect_version(struct tvp5150 *core)
return 0;
 }
 
+static inline int tvp5150_init(struct i2c_client *c)
+{
+   struct gpio_desc *pdn_gpio;
+   struct gpio_desc *reset_gpio;
+
+   pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", 
GPIOD_OUT_HIGH);
+   if (IS_ERR(pdn_gpio))
+   return PTR_ERR(pdn_gpio);
+
+   if (pdn_gpio) {
+   gpiod_set_value_cansleep(pdn_gpio, 0);
+   /* Delay time between power supplies active and reset */
+   msleep(20);
+   }
+
+   reset_gpio = devm_gpiod_get_optional(>dev, "reset", GPIOD_OUT_HIGH);
+   if (IS_ERR(reset_gpio))
+   return PTR_ERR(reset_gpio);
+
+   if (reset_gpio) {
+   /* RESETB pulse duration */
+   ndelay(500);
+   gpiod_set_value_cansleep(reset_gpio, 0);
+   /* Delay time between end of reset to I2C active */
+   usleep_range(200, 250);
+   }
+
+   return 0;
+}
+
 static int tvp5150_probe(struct i2c_client *c,
 const struct i2c_device_id *id)
 {
@@ -1209,6 +1240,10 @@ static int tvp5150_probe(struct i2c_client *c,
 I2C_FUNC_SMBUS_READ_BYTE | I2C_FUNC_SMBUS_WRITE_BYTE_DATA))
return -EIO;
 
+   res = tvp5150_init(c);
+   if (res)
+   return res;
+
core = devm_kzalloc(>dev, sizeof(*core), GFP_KERNEL);
if (!core)
return -ENOMEM;
-- 
2.4.3

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[PATCH v11 1/3] dt-bindings: binding for jz4780-{nand,bch}

[Harvey Hunt]

From: Alex Smith 

Add DT bindings for NAND devices connected to the NEMC on JZ4780 SoCs,
as well as the hardware BCH controller, used by the jz4780_{nand,bch}
drivers.

Signed-off-by: Alex Smith 
Cc: Zubair Lutfullah Kakakhel 
Cc: David Woodhouse 
Cc: Brian Norris 
Cc: linux-...@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: r...@kernel.org
Signed-off-by: Harvey Hunt 
Acked-by: Rob Herring 
Reviewed-by: Boris Brezillon 
---
v10 -> v11:
 - Added Boris Brezillon's Reviewed-By.

v9 -> v10:
 - Added Rob Herring's Acked-by.

v8 -> v9:
 - Document that partitions are represented as a child node of a NAND chip.

v7 -> v8:
 - Describe how NAND chips are now child nodes of the NAND controller.

v6 -> v7:
 - Add nand-ecc-mode to DT bindings.
 - Add nand-on-flash-bbt to DT bindings.

v5 -> v6:
 - No change.

v4 -> v5:
 - Rename ingenic,bch-device to ingenic,bch-controller to fit with
   existing convention.

v3 -> v4:
 - No change

v2 -> v3:
 - Rebase to 4.0-rc6
 - Changed ingenic,ecc-size to common nand-ecc-step-size
 - Changed ingenic,ecc-strength to common nand-ecc-strength
 - Changed ingenic,busy-gpio to common rb-gpios
 - Changed ingenic,wp-gpio to common wp-gpios

v1 -> v2:
 - Rebase to 4.0-rc3

 .../bindings/mtd/ingenic,jz4780-nand.txt   | 86 ++
 1 file changed, 86 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt

diff --git a/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt 
b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
new file mode 100644
index 000..29ea585
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
@@ -0,0 +1,86 @@
+* Ingenic JZ4780 NAND/BCH
+
+This file documents the device tree bindings for NAND flash devices on the
+JZ4780. NAND devices are connected to the NEMC controller (described in
+memory-controllers/ingenic,jz4780-nemc.txt), and thus NAND device nodes must
+be children of the NEMC node.
+
+Required NAND controller device properties:
+- compatible: Should be set to "ingenic,jz4780-nand".
+- reg: For each bank with a NAND chip attached, should specify a bank number,
+  an offset of 0 and a size of 0x100 (i.e. the whole NEMC bank).
+
+Optional NAND controller device properties:
+- ingenic,bch-controller: To make use of the hardware BCH controller, this
+  property must contain a phandle for the BCH controller node. The required
+  properties for this node are described below. If this is not specified,
+  software BCH will be used instead.
+
+Optional children nodes:
+- Individual NAND chips are children of the NAND controller node.
+
+Required children node properties:
+- reg: An integer ranging from 1 to 6 representing the CS line to use.
+
+Optional children node properties:
+- nand-ecc-step-size: ECC block size in bytes.
+- nand-ecc-strength: ECC strength (max number of correctable bits).
+- nand-ecc-mode: String, operation mode of the NAND ecc mode. "hw" by default
+- nand-on-flash-bbt: boolean to enable on flash bbt option, if not present 
false
+- rb-gpios: GPIO specifier for the busy pin.
+- wp-gpios: GPIO specifier for the write protect pin.
+
+Optional child node of NAND chip nodes:
+- partitions: see Documentation/devicetree/bindings/mtd/partition.txt
+
+Example:
+
+nemc: nemc@1341 {
+   ...
+
+   nandc: nand-controller@1 {
+   compatible = "ingenic,jz4780-nand";
+   reg = <1 0 0x100>;  /* Bank 1 */
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ingenic,bch-controller = <>;
+
+   nand@1 {
+   reg = <1>;
+
+   nand-ecc-step-size = <1024>;
+   nand-ecc-strength = <24>;
+   nand-ecc-mode = "hw";
+   nand-on-flash-bbt;
+
+   rb-gpios = < 20 GPIO_ACTIVE_LOW>;
+   wp-gpios = < 22 GPIO_ACTIVE_LOW>;
+
+   partitions {
+   #address-cells = <2>;
+   #size-cells = <2>;
+   ...
+   }
+   };
+   };
+};
+
+The BCH controller is a separate SoC component used for error correction on
+NAND devices. The following is a description of the device properties for a
+BCH controller.
+
+Required BCH properties:
+- compatible: Should be set to "ingenic,jz4780-bch".
+- reg: Should specify the BCH controller registers location and length.
+- clocks: Clock for the BCH controller.
+
+Example:
+
+bch: bch@134d {
+   compatible = "ingenic,jz4780-bch";
+   reg = <0x134d 0x1>;
+
+   clocks = < JZ4780_CLK_BCH>;
+};
-- 
2.6.4

--
To 

[PATCH v11 0/3] mtd: nand: jz4780: Add NAND and BCH drivers

[Harvey Hunt]

Hi,

This series adds support for the BCH controller and NAND devices on
the Ingenic JZ4780 SoC.

Tested on the MIPS Creator Ci20 board. All dependencies are now in
mainline.

This version of the series is based on l2-mtd/master.

As suggested by Boris [0], refactoring work has been done to treat NAND
chips as children nodes of the NAND controller.

Review and feedback welcome.

Thanks,

Harvey

Cc: devicetree@vger.kernel.org

Alex Smith (3):
  dt-bindings: binding for jz4780-{nand,bch}
  mtd: nand: jz4780: driver for NAND devices on JZ4780 SoCs
  MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes

 .../bindings/mtd/ingenic,jz4780-nand.txt   |  86 +
 arch/mips/boot/dts/ingenic/ci20.dts|  63 +++
 arch/mips/boot/dts/ingenic/jz4780.dtsi |  26 ++
 drivers/mtd/nand/Kconfig   |   7 +
 drivers/mtd/nand/Makefile  |   1 +
 drivers/mtd/nand/jz4780_bch.c  | 380 ++
 drivers/mtd/nand/jz4780_bch.h  |  43 +++
 drivers/mtd/nand/jz4780_nand.c | 424 +
 8 files changed, 1030 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/mtd/ingenic,jz4780-nand.txt
 create mode 100644 drivers/mtd/nand/jz4780_bch.c
 create mode 100644 drivers/mtd/nand/jz4780_bch.h
 create mode 100644 drivers/mtd/nand/jz4780_nand.c

-- 
2.6.4

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[PATCH v11 3/3] MIPS: dts: jz4780/ci20: Add NEMC, BCH and NAND device tree nodes

[Harvey Hunt]

From: Alex Smith 

Add device tree nodes for the NEMC and BCH to the JZ4780 device tree,
and make use of them in the Ci20 device tree to add a node for the
board's NAND.

Note that since the pinctrl driver is not yet upstream, this includes
neither pin configuration nor busy/write-protect GPIO pins for the
NAND. Use of the NAND relies on the boot loader to have left the pins
configured in a usable state, which should be the case when booted
from the NAND.

Signed-off-by: Alex Smith 
Cc: Zubair Lutfullah Kakakhel 
Cc: David Woodhouse 
Cc: Brian Norris 
Cc: Paul Burton 
Cc: linux-...@lists.infradead.org
Cc: devicetree@vger.kernel.org
Cc: linux-ker...@vger.kernel.org
Cc: linux-m...@linux-mips.org
Cc: r...@kernel.org
Signed-off-by: Harvey Hunt 
Reviewed-by: Boris Brezillon 
---
v10 -> v11:
 - Added Boris Brezillon's Reviewed-By.

v9 -> v10:
 - No change.

v8 -> v9:
 - Represent the partition table as a subnode of a NAND chip. 

v7 -> v8:
 - Describe the NAND chips as children nodes of the NAND controller.
 - Remove ingenic, prefix from ECC settings.
 - Renamed some ECC settings.

v6 -> v7:
 - Add nand-ecc-mode to DT.
 - Add nand-on-flash-bbt to DT.

v4 -> v5:
 - New patch adding DT nodes for the NAND so that the driver can be
   tested.

 arch/mips/boot/dts/ingenic/ci20.dts| 63 ++
 arch/mips/boot/dts/ingenic/jz4780.dtsi | 26 ++
 2 files changed, 89 insertions(+)

diff --git a/arch/mips/boot/dts/ingenic/ci20.dts 
b/arch/mips/boot/dts/ingenic/ci20.dts
index 9fcb9e7..782258c 100644
--- a/arch/mips/boot/dts/ingenic/ci20.dts
+++ b/arch/mips/boot/dts/ingenic/ci20.dts
@@ -42,3 +42,66 @@
  {
status = "okay";
 };
+
+ {
+   status = "okay";
+
+   nandc: nand-controller@1 {
+   compatible = "ingenic,jz4780-nand";
+   reg = <1 0 0x100>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   ingenic,bch-controller = <>;
+
+   ingenic,nemc-tAS = <10>;
+   ingenic,nemc-tAH = <5>;
+   ingenic,nemc-tBP = <10>;
+   ingenic,nemc-tAW = <15>;
+   ingenic,nemc-tSTRV = <100>;
+
+   nand@1 {
+   reg = <1>;
+
+   nand-ecc-step-size = <1024>;
+   nand-ecc-strength = <24>;
+   nand-ecc-mode = "hw";
+   nand-on-flash-bbt;
+
+   partitions {
+   #address-cells = <2>;
+   #size-cells = <2>;
+
+   partition@0 {
+   label = "u-boot-spl";
+   reg = <0x0 0x0 0x0 0x80>;
+   };
+
+   partition@0x80 {
+   label = "u-boot";
+   reg = <0x0 0x80 0x0 0x20>;
+   };
+
+   partition@0xa0 {
+   label = "u-boot-env";
+   reg = <0x0 0xa0 0x0 0x20>;
+   };
+
+   partition@0xc0 {
+   label = "boot";
+   reg = <0x0 0xc0 0x0 0x400>;
+   };
+
+   partition@0x8c0 {
+   label = "system";
+   reg = <0x0 0x4c0 0x1 0xfb40>;
+   };
+   };
+   };
+   };
+};
+
+ {
+   status = "okay";
+};
diff --git a/arch/mips/boot/dts/ingenic/jz4780.dtsi 
b/arch/mips/boot/dts/ingenic/jz4780.dtsi
index 65389f6..b868b42 100644
--- a/arch/mips/boot/dts/ingenic/jz4780.dtsi
+++ b/arch/mips/boot/dts/ingenic/jz4780.dtsi
@@ -108,4 +108,30 @@
 
status = "disabled";
};
+
+   nemc: nemc@1341 {
+   compatible = "ingenic,jz4780-nemc";
+   reg = <0x1341 0x1>;
+   #address-cells = <2>;
+   #size-cells = <1>;
+   ranges = <1 0 0x1b00 0x100
+ 2 0 0x1a00 0x100
+ 3 0 0x1900 0x100
+ 4 0 0x1800 0x100
+ 5 0 0x1700 0x100
+ 6 0 0x1600 0x100>;
+
+   clocks = < JZ4780_CLK_NEMC>;
+
+   status = "disabled";
+   };
+
+   bch: bch@134d {
+   compatible = "ingenic,jz4780-bch";
+   reg = <0x134d 

Re: [PATCH v3 3/7] of: reserved_mem: add support for named reserved mem nodes

[Marek Szyprowski]

Hi Rob,

On 2015-12-31 00:25, Rob Herring wrote:

On Wed, Dec 16, 2015 at 9:37 AM, Marek Szyprowski
 wrote:

This patch allows device drivers to initialize more than one reserved
memory region assigned to given device. When driver needs to use more
than one reserved memory region, it should allocate child devices and
initialize regions by index or name for each of its child devices.

Signed-off-by: Marek Szyprowski 
---
  .../bindings/reserved-memory/reserved-memory.txt   |   2 +
  .../devicetree/bindings/resource-names.txt |   1 +
  drivers/of/of_reserved_mem.c   | 104 +
  include/linux/of_reserved_mem.h|  31 +-
  4 files changed, 115 insertions(+), 23 deletions(-)

diff --git 
a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt 
b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
index 3da0ebdba8d9..43a14957fd64 100644
--- a/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
+++ b/Documentation/devicetree/bindings/reserved-memory/reserved-memory.txt
@@ -74,6 +74,8 @@ Regions in the /reserved-memory node may be referenced by 
other device
  nodes by adding a memory-region property to the device node.

  memory-region (optional) - phandle, specifier pairs to children of 
/reserved-memory
+memory-region-names (optional) - supplemental names property, provide array of
+names to identify memory regions

  Example
  ---
diff --git a/Documentation/devicetree/bindings/resource-names.txt 
b/Documentation/devicetree/bindings/resource-names.txt
index e280fef6f265..51823e99b983 100644
--- a/Documentation/devicetree/bindings/resource-names.txt
+++ b/Documentation/devicetree/bindings/resource-names.txt
@@ -12,6 +12,7 @@ Resource Property Supplemental Names Property
  regreg-names
  clocks clock-names
  interrupts interrupt-names
+memory-region  memory-region-names

The other cases of *-names should correspond to actual h/w names for a
h/w block. memory-regions are not really h/w. So I'd prefer to not add
memory-region-names. If you want a name for the region, put it in the
region node. The name for each client node is not going to be
different.


There is a difference between a name in the region node and a name assigned
in client node. Reserved memory region bindings already allows assigning
given region to more than one device. In such case the name put in the
region itself is not really useful.

In my case (Exynos MFC device) the names are related to HW names. The memory
regions are named in the hw documentation (referred as 'left memory bank'
and 'right memory bank'). Using those names in the binding is also simply
convenient (no need to remember which regions is at which index number).

Those names might be also convenient for describing Android's ION related
regions, although I didn't look deep into details of such use case.

Best regards
--
Marek Szyprowski, PhD
Samsung R Institute Poland

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Re: [PATCH 07/10] [media] tvp5150: Add device tree binding document

[Rob Herring]

On Mon, Jan 04, 2016 at 09:25:29AM -0300, Javier Martinez Canillas wrote:
> Add a Device Tree binding document for the TVP5150 video decoder.
> 
> Signed-off-by: Javier Martinez Canillas 
> ---
> 
>  .../devicetree/bindings/media/i2c/tvp5150.txt  | 35 
> ++
>  1 file changed, 35 insertions(+)
>  create mode 100644 Documentation/devicetree/bindings/media/i2c/tvp5150.txt
> 
> diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt 
> b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
> new file mode 100644
> index ..bf0b3f3128ce
> --- /dev/null
> +++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
> @@ -0,0 +1,35 @@
> +* Texas Instruments TVP5150 and TVP5151 video decoders
> +
> +The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL
> +(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV
> +with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats.
> +
> +Required Properties:
> +- compatible: value must be "ti,tvp5150"

What about the 5151? The driver never needs to know if SECAM is 
supported or not?

> +- reg: I2C slave address
> +
> +Optional Properties:
> +- powerdown-gpios: phandle for the GPIO connected to the PDN pin, if any.
> +- reset-gpios: phandle for the GPIO connected to the RESETB pin, if any.
> +
> +The device node must contain one 'port' child node for its digital output
> +video port, in accordance with the video interface bindings defined in
> +Documentation/devicetree/bindings/media/video-interfaces.txt.
> +
> +Example:
> +
> + {
> + ...
> + tvp5150@5c {
> + compatible = "ti,tvp5150";

Too much indentation here.

> + reg = <0x5c>;
> + powerdown-gpios = < 30 GPIO_ACTIVE_LOW>;
> + reset-gpios = < 7 GPIO_ACTIVE_LOW>;
> +
> + port {
> + tvp5150_1: endpoint {
> + remote-endpoint = <_ep>;
> + };
> + };
> + };
> +};
> -- 
> 2.4.3
> 
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[PATCH 08/10] [media] tvp5150: Add OF match table

[Javier Martinez Canillas]

From: Eduard Gavin 

The Documentation/devicetree/bindings/media/i2c/tvp5150.txt DT binding doc
lists "ti,tvp5150" as the device compatible string but the driver does not
have an OF match table. Add the table to the driver so the I2C core can do
an OF style match.

Signed-off-by: Eduard Gavin 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 9 +
 1 file changed, 9 insertions(+)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index 105bd1c6b17f..caac96a577f8 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -1295,8 +1295,17 @@ static const struct i2c_device_id tvp5150_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, tvp5150_id);
 
+#if IS_ENABLED(CONFIG_OF)
+static const struct of_device_id tvp5150_of_match[] = {
+   { .compatible = "ti,tvp5150", },
+   { /* sentinel */ },
+};
+MODULE_DEVICE_TABLE(of, tvp5150_of_match);
+#endif
+
 static struct i2c_driver tvp5150_driver = {
.driver = {
+   .of_match_table = of_match_ptr(tvp5150_of_match),
.name   = "tvp5150",
},
.probe  = tvp5150_probe,
-- 
2.4.3

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Re: [PATCH v2 1/6] arm64: renesas: r8a7795: add usb2_phy device nodes

[Geert Uytterhoeven]

Hi Shimoda-san,

On Fri, Dec 25, 2015 at 12:52 PM, Yoshihiro Shimoda
 wrote:
> Signed-off-by: Yoshihiro Shimoda 
> ---
>  arch/arm64/boot/dts/renesas/r8a7795.dtsi | 34 
> 
>  1 file changed, 34 insertions(+)
>
> diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
> b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> index bb353cd..89393ea 100644
> --- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> +++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
> @@ -775,5 +775,39 @@
> clocks = < CPG_MOD 815>;
> status = "disabled";
> };
> +
> +   usb2_phy0: usb-phy@ee080200 {
> +   compatible = "renesas,usb2-phy-r8a7795";
> +   reg = <0 0xee080200 0 0x700>, <0 0xe6590100 0 0x100>;
> +   reg-names = "usb2_host", "hsusb";
> +   interrupts = ;

Isn't 108 the EHCI0 interrupt?
Cfr. the other usb-phy nodes that don't have interrupts.

> +   clocks = < CPG_MOD 703>, < CPG_MOD 704>;
> +   clock-names = "usb2", "hsusb";
> +   power-domains = <>;

This device has two modules clocks, but the CPG/MSSR driver only manages
the first modulo clock.
Who enables the second clock (HS-USB-IF)?

> +   #phy-cells = <0>;
> +   status = "disabled";
> +   };
> +
> +   usb2_phy1: usb-phy@ee0a0200 {
> +   compatible = "renesas,usb2-phy-r8a7795";
> +   reg = <0 0xee0a0200 0 0x700>;
> +   reg-names = "usb2_host";
> +   clocks = < CPG_MOD 702>;
> +   clock-names = "usb2";
> +   power-domains = <>;
> +   #phy-cells = <0>;
> +   status = "disabled";
> +   };
> +
> +   usb2_phy2: usb-phy@ee0c0200 {
> +   compatible = "renesas,usb2-phy-r8a7795";
> +   reg = <0 0xee0c0200 0 0x700>;
> +   reg-names = "usb2_host";
> +   clocks = < CPG_MOD 701>;
> +   clock-names = "usb2";
> +   power-domains = <>;
> +   #phy-cells = <0>;
> +   status = "disabled";
> +   };
> };
>  };

Gr{oetje,eeting}s,

Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
-- Linus Torvalds
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Re: [PATCH 09/10] [media] tvp5150: Initialize the chip on probe

[Javier Martinez Canillas]

Hello,

On 01/04/2016 09:40 AM, kbuild test robot wrote:
> Hi Javier,
> 
> [auto build test ERROR on linuxtv-media/master]
> [also build test ERROR on v4.4-rc8 next-20151231]
> [if your patch is applied to the wrong git tree, please drop us a note to 
> help improving the system]
> 
> url:
> https://github.com/0day-ci/linux/commits/Javier-Martinez-Canillas/tvp5150-add-MC-and-DT-support/20160104-203224
> base:   git://linuxtv.org/media_tree.git master
> config: x86_64-randconfig-x008-01040711 (attached as .config)
> reproduce:
> # save the attached .config to linux build tree
> make ARCH=x86_64 
> 
> All errors (new ones prefixed by >>):
> 
>drivers/media/i2c/tvp5150.c: In function 'tvp5150_init':
>>> drivers/media/i2c/tvp5150.c:1206:13: error: implicit declaration of 
>>> function 'devm_gpiod_get_optional' [-Werror=implicit-function-declaration]
>  pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", GPIOD_OUT_HIGH);
> ^
>>> drivers/media/i2c/tvp5150.c:1206:59: error: 'GPIOD_OUT_HIGH' undeclared 
>>> (first use in this function)
>  pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", GPIOD_OUT_HIGH);
>   ^
>drivers/media/i2c/tvp5150.c:1206:59: note: each undeclared identifier is 
> reported only once for each function it appears in
>>> drivers/media/i2c/tvp5150.c:1211:3: error: implicit declaration of function 
>>> 'gpiod_set_value_cansleep' [-Werror=implicit-function-declaration]
>   gpiod_set_value_cansleep(pdn_gpio, 0);
>

Sigh, it's caused by a missing include for the  header.

Thanks for reporting, I'll wait a couple of days to see if I get more feedback
and then post a v2 fixing this.

Best regards,
-- 
Javier Martinez Canillas
Open Source Group
Samsung Research America
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Re: [PATCH 2/2] bindings: i2c: Add clock entries for i2c-xiic

[Rob Herring]

On Mon, Jan 04, 2016 at 01:20:34PM +0530, Shubhrajyoti Datta wrote:
> Add clock description for i2c-xiic
> 
> Signed-off-by: Shubhrajyoti Datta 
> ---
>  Documentation/devicetree/bindings/i2c/i2c-xiic.txt |3 +++
>  1 files changed, 3 insertions(+), 0 deletions(-)

Acked-by: Rob Herring 
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[PATCH 05/10] [media] tvp5150: Add s_stream subdev operation support

[Javier Martinez Canillas]

From: Laurent Pinchart 

This patch adds the .s_stream subdev operation to the driver.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 16 
 1 file changed, 16 insertions(+)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index 71473cec236a..fb7a4ddff1fe 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -973,6 +973,21 @@ static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
I2C Command
  /
 
+static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
+{
+   /* Initializes TVP5150 to its default values */
+   /* # set PCLK (27MHz) */
+   tvp5150_write(sd, TVP5150_CONF_SHARED_PIN, 0x00);
+
+   /* Output format: 8-bit ITU-R BT.656 with embedded syncs */
+   if (enable)
+   tvp5150_write(sd, TVP5150_MISC_CTL, 0x09);
+   else
+   tvp5150_write(sd, TVP5150_MISC_CTL, 0x00);
+
+   return 0;
+}
+
 static int tvp5150_s_routing(struct v4l2_subdev *sd,
 u32 input, u32 output, u32 config)
 {
@@ -1094,6 +1109,7 @@ static const struct v4l2_subdev_tuner_ops 
tvp5150_tuner_ops = {
 
 static const struct v4l2_subdev_video_ops tvp5150_video_ops = {
.s_std = tvp5150_s_std,
+   .s_stream = tvp5150_s_stream,
.s_routing = tvp5150_s_routing,
.s_crop = tvp5150_s_crop,
.g_crop = tvp5150_g_crop,
-- 
2.4.3

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[PATCH 02/10] [media] tvp5150: Add tvp5151 support

[Javier Martinez Canillas]

From: Laurent Pinchart 

Expand the version detection code to identity the tvp5151.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index 9e953e5a7ec9..b3b34e24db13 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -1139,6 +1139,8 @@ static int tvp5150_detect_version(struct tvp5150 *core)
 
/* ITU-T BT.656.4 timing */
tvp5150_write(sd, TVP5150_REV_SELECT, 0);
+   } else if (dev_id == 0x5151 && rom_ver == 0x0100) { /* TVP5151 */
+   v4l2_info(sd, "tvp5151 detected.\n");
} else {
v4l2_info(sd, "*** unknown tvp%04x chip detected.\n", dev_id);
}
-- 
2.4.3

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[PATCH 06/10] [media] tvp5150: Add g_mbus_config subdev operation support

[Javier Martinez Canillas]

From: Laurent Pinchart 

This patch adds the .g_mbus_config subdev operation to the driver.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 11 +++
 1 file changed, 11 insertions(+)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index fb7a4ddff1fe..105bd1c6b17f 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -936,6 +936,16 @@ static int tvp5150_cropcap(struct v4l2_subdev *sd, struct 
v4l2_cropcap *a)
return 0;
 }
 
+static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
+struct v4l2_mbus_config *cfg)
+{
+   cfg->type = V4L2_MBUS_BT656;
+   cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
+  | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
+
+   return 0;
+}
+
  /
V4L2 subdev pad ops
  /
@@ -1114,6 +1124,7 @@ static const struct v4l2_subdev_video_ops 
tvp5150_video_ops = {
.s_crop = tvp5150_s_crop,
.g_crop = tvp5150_g_crop,
.cropcap = tvp5150_cropcap,
+   .g_mbus_config = tvp5150_g_mbus_config,
 };
 
 static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = {
-- 
2.4.3

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[PATCH 07/10] [media] tvp5150: Add device tree binding document

[Javier Martinez Canillas]

Add a Device Tree binding document for the TVP5150 video decoder.

Signed-off-by: Javier Martinez Canillas 
---

 .../devicetree/bindings/media/i2c/tvp5150.txt  | 35 ++
 1 file changed, 35 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/media/i2c/tvp5150.txt

diff --git a/Documentation/devicetree/bindings/media/i2c/tvp5150.txt 
b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
new file mode 100644
index ..bf0b3f3128ce
--- /dev/null
+++ b/Documentation/devicetree/bindings/media/i2c/tvp5150.txt
@@ -0,0 +1,35 @@
+* Texas Instruments TVP5150 and TVP5151 video decoders
+
+The TVP5150 and TVP5151 are video decoders that convert baseband NTSC and PAL
+(and also SECAM in the TVP5151 case) video signals to either 8-bit 4:2:2 YUV
+with discrete syncs or 8-bit ITU-R BT.656 with embedded syncs output formats.
+
+Required Properties:
+- compatible: value must be "ti,tvp5150"
+- reg: I2C slave address
+
+Optional Properties:
+- powerdown-gpios: phandle for the GPIO connected to the PDN pin, if any.
+- reset-gpios: phandle for the GPIO connected to the RESETB pin, if any.
+
+The device node must contain one 'port' child node for its digital output
+video port, in accordance with the video interface bindings defined in
+Documentation/devicetree/bindings/media/video-interfaces.txt.
+
+Example:
+
+ {
+   ...
+   tvp5150@5c {
+   compatible = "ti,tvp5150";
+   reg = <0x5c>;
+   powerdown-gpios = < 30 GPIO_ACTIVE_LOW>;
+   reset-gpios = < 7 GPIO_ACTIVE_LOW>;
+
+   port {
+   tvp5150_1: endpoint {
+   remote-endpoint = <_ep>;
+   };
+   };
+   };
+};
-- 
2.4.3

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Re: [RFC PATCH v1 2/2] dt-bindings: add document for rk3229-vop

[Rob Herring]

On Mon, Jan 04, 2016 at 07:50:30PM +0800, Yakir Yang wrote:
> 
> Signed-off-by: Yakir Yang 
> ---
>  Documentation/devicetree/bindings/display/rockchip/rockchip-vop.txt | 1 +
>  1 file changed, 1 insertion(+)

Acked-by: Rob Herring 
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Re: [PATCH v3 1/8] dt-bindings: Add a binding for Mediatek Video Processor

[Rob Herring]

On Mon, Jan 04, 2016 at 06:11:49PM +0800, Tiffany Lin wrote:
> From: Andrew-CT Chen 
> 
> Add a DT binding documentation of Video Processor Unit for the
> MT8173 SoC from Mediatek.
> 
> Signed-off-by: Andrew-CT Chen 
> Signed-off-by: Tiffany Lin 

Please add acks when sending new versions as I already acked the last 
version.

Acked-by: Rob Herring 
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[PATCH 00/10] [media] tvp5150: add MC and DT support

[Javier Martinez Canillas]

Hello,

One of my testing platforms for the MC next gen [0] work has been an OMAP3
board (IGEPv2) with a tvp5151 video decoder attached to the OMAP3ISP block.

I've been using some patches from Laurent Pinchart that adds MC support to
the tvp5150 driver. The patches were never posted to the list and it seems
he doesn't have time to continue working on this so I have taken them from
his personal tree [1] and submitting now for review.

The series also contains patches that adds DT support to the driver so it
can be used in DT based platforms.

To test, the following media pipeline was used:

$ media-ctl -r -l '"tvp5150 1-005c":0->"OMAP3 ISP CCDC":0[1], "OMAP3 ISP 
CCDC":1->"OMAP3 ISP CCDC output":0[1]'
$ media-ctl -v --set-format '"OMAP3 ISP CCDC":0 [UYVY2X8 720x240 
field:alternate]'
$ media-ctl -v --set-format '"OMAP3 ISP CCDC":1 [UYVY2X8 720x240 
field:interlaced-tb]'

And frames captured with the yavta tool:

$ yavta -f UYVY -s 720x480 -n 1 --field interlaced-tb --capture=1 -F /dev/video2
$ raw2rgbpnm -f UYVY -s 720x480 frame-00.bin frame-00.pnm

The patches are on top of [0] not because is a depedency but just to avoid
merge conflicts and I don't expect them to be picked before that anyways.

Best regards,
Javier

[0]: 
http://lists.infradead.org/pipermail/linux-arm-kernel/2015-August/367109.html
[1]: http://git.linuxtv.org/pinchartl/media.git/log/?h=omap3isp/tvp5151


Eduard Gavin (1):
  [media] tvp5150: Add OF match table

Javier Martinez Canillas (3):
  [media] tvp5150: Add device tree binding document
  [media] tvp5150: Initialize the chip on probe
  [media] tvp5150: Configure data interface via pdata or DT

Laurent Pinchart (6):
  [media] tvp5150: Restructure version detection
  [media] tvp5150: Add tvp5151 support
  [media] tvp5150: Add pad-level subdev operations
  [media] tvp5150: Add pixel rate control support
  [media] tvp5150: Add s_stream subdev operation support
  [media] tvp5150: Add g_mbus_config subdev operation support

 .../devicetree/bindings/media/i2c/tvp5150.txt  |  35 +++
 drivers/media/i2c/tvp5150.c| 272 +
 include/media/i2c/tvp5150.h|   5 +
 3 files changed, 263 insertions(+), 49 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/media/i2c/tvp5150.txt

-- 
2.4.3

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[PATCH 01/10] [media] tvp5150: Restructure version detection

[Javier Martinez Canillas]

From: Laurent Pinchart 

Move the version detection code to a separate function and restructure
it to prepare for TVP5151 support.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 79 ++---
 1 file changed, 45 insertions(+), 34 deletions(-)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index dda8b3c000cc..9e953e5a7ec9 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -1105,13 +1105,53 @@ static const struct v4l2_subdev_ops tvp5150_ops = {
I2C Client & Driver
  /
 
+static int tvp5150_detect_version(struct tvp5150 *core)
+{
+   struct v4l2_subdev *sd = >sd;
+   struct i2c_client *c = v4l2_get_subdevdata(sd);
+   unsigned int i;
+   u16 dev_id;
+   u16 rom_ver;
+   u8 regs[4];
+   int res;
+
+   /*
+* Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
+* TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER
+*/
+   for (i = 0; i < 4; i++) {
+   res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i);
+   if (res < 0)
+   return res;
+   regs[i] = res;
+   }
+
+   dev_id = (regs[0] << 8) | regs[1];
+   rom_ver = (regs[2] << 8) | regs[3];
+
+   v4l2_info(sd, "tvp%04x (%u.%u) chip found @ 0x%02x (%s)\n",
+ dev_id, regs[2], regs[3], c->addr << 1, c->adapter->name);
+
+   if (dev_id == 0x5150 && rom_ver == 0x0321) { /* TVP51510A */
+   v4l2_info(sd, "tvp5150a detected.\n");
+   } else if (dev_id == 0x5150 && rom_ver == 0x0400) { /* TVP5150AM1 */
+   v4l2_info(sd, "tvp5150am1 detected.\n");
+
+   /* ITU-T BT.656.4 timing */
+   tvp5150_write(sd, TVP5150_REV_SELECT, 0);
+   } else {
+   v4l2_info(sd, "*** unknown tvp%04x chip detected.\n", dev_id);
+   }
+
+   return 0;
+}
+
 static int tvp5150_probe(struct i2c_client *c,
 const struct i2c_device_id *id)
 {
struct tvp5150 *core;
struct v4l2_subdev *sd;
-   int tvp5150_id[4];
-   int i, res;
+   int res;
 
/* Check if the adapter supports the needed features */
if (!i2c_check_functionality(c->adapter,
@@ -1124,38 +1164,9 @@ static int tvp5150_probe(struct i2c_client *c,
sd = >sd;
v4l2_i2c_subdev_init(sd, c, _ops);
 
-   /* 
-* Read consequent registers - TVP5150_MSB_DEV_ID, TVP5150_LSB_DEV_ID,
-* TVP5150_ROM_MAJOR_VER, TVP5150_ROM_MINOR_VER 
-*/
-   for (i = 0; i < 4; i++) {
-   res = tvp5150_read(sd, TVP5150_MSB_DEV_ID + i);
-   if (res < 0)
-   return res;
-   tvp5150_id[i] = res;
-   }
-
-   v4l_info(c, "chip found @ 0x%02x (%s)\n",
-c->addr << 1, c->adapter->name);
-
-   if (tvp5150_id[2] == 4 && tvp5150_id[3] == 0) { /* Is TVP5150AM1 */
-   v4l2_info(sd, "tvp%02x%02xam1 detected.\n",
- tvp5150_id[0], tvp5150_id[1]);
-
-   /* ITU-T BT.656.4 timing */
-   tvp5150_write(sd, TVP5150_REV_SELECT, 0);
-   } else {
-   /* Is TVP5150A */
-   if (tvp5150_id[2] == 3 || tvp5150_id[3] == 0x21) {
-   v4l2_info(sd, "tvp%02x%02xa detected.\n",
- tvp5150_id[0], tvp5150_id[1]);
-   } else {
-   v4l2_info(sd, "*** unknown tvp%02x%02x chip 
detected.\n",
- tvp5150_id[0], tvp5150_id[1]);
-   v4l2_info(sd, "*** Rom ver is %d.%d\n",
- tvp5150_id[2], tvp5150_id[3]);
-   }
-   }
+   res = tvp5150_detect_version(core);
+   if (res < 0)
+   return res;
 
core->norm = V4L2_STD_ALL;  /* Default is autodetect */
core->input = TVP5150_COMPOSITE1;
-- 
2.4.3

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[PATCH 03/10] [media] tvp5150: Add pad-level subdev operations

[Javier Martinez Canillas]

From: Laurent Pinchart 

This patch enables the tvp5150 decoder driver to be used with the media
controller framework by adding pad-level subdev operations and init the
media entity pad.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 60 +
 1 file changed, 45 insertions(+), 15 deletions(-)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index b3b34e24db13..82fba9d46f30 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -35,6 +35,7 @@ MODULE_PARM_DESC(debug, "Debug level (0-2)");
 
 struct tvp5150 {
struct v4l2_subdev sd;
+   struct media_pad pad;
struct v4l2_ctrl_handler hdl;
struct v4l2_rect rect;
 
@@ -818,17 +819,6 @@ static v4l2_std_id tvp5150_read_std(struct v4l2_subdev *sd)
}
 }
 
-static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
-   struct v4l2_subdev_pad_config *cfg,
-   struct v4l2_subdev_mbus_code_enum *code)
-{
-   if (code->pad || code->index)
-   return -EINVAL;
-
-   code->code = MEDIA_BUS_FMT_UYVY8_2X8;
-   return 0;
-}
-
 static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
struct v4l2_subdev_pad_config *cfg,
struct v4l2_subdev_format *format)
@@ -841,13 +831,11 @@ static int tvp5150_fill_fmt(struct v4l2_subdev *sd,
 
f = >format;
 
-   tvp5150_reset(sd, 0);
-
f->width = decoder->rect.width;
-   f->height = decoder->rect.height;
+   f->height = decoder->rect.height / 2;
 
f->code = MEDIA_BUS_FMT_UYVY8_2X8;
-   f->field = V4L2_FIELD_SEQ_TB;
+   f->field = V4L2_FIELD_ALTERNATE;
f->colorspace = V4L2_COLORSPACE_SMPTE170M;
 
v4l2_dbg(1, debug, sd, "width = %d, height = %d\n", f->width,
@@ -948,6 +936,39 @@ static int tvp5150_cropcap(struct v4l2_subdev *sd, struct 
v4l2_cropcap *a)
return 0;
 }
 
+ /
+   V4L2 subdev pad ops
+ /
+
+static int tvp5150_enum_mbus_code(struct v4l2_subdev *sd,
+ struct v4l2_subdev_pad_config *cfg,
+ struct v4l2_subdev_mbus_code_enum *code)
+{
+   if (code->index)
+   return -EINVAL;
+
+   code->code = MEDIA_BUS_FMT_UYVY8_2X8;
+   return 0;
+}
+
+static int tvp5150_enum_frame_size(struct v4l2_subdev *sd,
+  struct v4l2_subdev_pad_config *cfg,
+  struct v4l2_subdev_frame_size_enum *fse)
+{
+   struct tvp5150 *decoder = to_tvp5150(sd);
+
+   if (fse->index >= 8 || fse->code != MEDIA_BUS_FMT_UYVY8_2X8)
+   return -EINVAL;
+
+   fse->code = MEDIA_BUS_FMT_UYVY8_2X8;
+   fse->min_width = decoder->rect.width;
+   fse->max_width = decoder->rect.width;
+   fse->min_height = decoder->rect.height / 2;
+   fse->max_height = decoder->rect.height / 2;
+
+   return 0;
+}
+
 /
I2C Command
  /
@@ -1088,6 +1109,7 @@ static const struct v4l2_subdev_vbi_ops tvp5150_vbi_ops = 
{
 
 static const struct v4l2_subdev_pad_ops tvp5150_pad_ops = {
.enum_mbus_code = tvp5150_enum_mbus_code,
+   .enum_frame_size = tvp5150_enum_frame_size,
.set_fmt = tvp5150_fill_fmt,
.get_fmt = tvp5150_fill_fmt,
 };
@@ -1165,6 +1187,14 @@ static int tvp5150_probe(struct i2c_client *c,
return -ENOMEM;
sd = >sd;
v4l2_i2c_subdev_init(sd, c, _ops);
+   sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
+
+#if defined(CONFIG_MEDIA_CONTROLLER)
+   core->pad.flags = MEDIA_PAD_FL_SOURCE;
+   res = media_entity_pads_init(>entity, 1, >pad);
+   if (res < 0)
+   return res;
+#endif
 
res = tvp5150_detect_version(core);
if (res < 0)
-- 
2.4.3

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[PATCH 04/10] [media] tvp5150: Add pixel rate control support

[Javier Martinez Canillas]

From: Laurent Pinchart 

This patch adds support for the V4L2_CID_PIXEL_RATE control.

Signed-off-by: Laurent Pinchart 
Signed-off-by: Javier Martinez Canillas 
---

 drivers/media/i2c/tvp5150.c | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index 82fba9d46f30..71473cec236a 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -1204,7 +1204,7 @@ static int tvp5150_probe(struct i2c_client *c,
core->input = TVP5150_COMPOSITE1;
core->enable = 1;
 
-   v4l2_ctrl_handler_init(>hdl, 4);
+   v4l2_ctrl_handler_init(>hdl, 5);
v4l2_ctrl_new_std(>hdl, _ctrl_ops,
V4L2_CID_BRIGHTNESS, 0, 255, 1, 128);
v4l2_ctrl_new_std(>hdl, _ctrl_ops,
@@ -1213,6 +1213,9 @@ static int tvp5150_probe(struct i2c_client *c,
V4L2_CID_SATURATION, 0, 255, 1, 128);
v4l2_ctrl_new_std(>hdl, _ctrl_ops,
V4L2_CID_HUE, -128, 127, 1, 0);
+   v4l2_ctrl_new_std(>hdl, _ctrl_ops,
+   V4L2_CID_PIXEL_RATE, 2700,
+   2700, 1, 2700);
sd->ctrl_handler = >hdl;
if (core->hdl.error) {
res = core->hdl.error;
-- 
2.4.3

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RE: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for Xilinx NWL PCIe Host Controller

[Bharat Kumar Gogada]

Hi Bjorn, can you comment on this. Marc has also replied for query on
irq_dispose_mapping().

> > Subject: RE: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for
> > Xilinx NWL PCIe Host Controller
> >
> > > Subject: Re: [PATCH v11] PCI: Xilinx-NWL-PCIe: Added support for
> > > Xilinx NWL PCIe Host Controller
> > >
> > > [+cc Marc for irq_dispose_mapping() question]
> > >
> > > On Thu, Dec 10, 2015 at 02:10:34PM +, Bharat Kumar Gogada wrote:
> > > I'm trying to figure out what the difference is between these two
> > > checks and why you have both of them:
> > >
> > > > +   if (bus->number == pcie->root_busno && devfn > 0)
> > > > +   if (bus->primary == pcie->root_busno && devfn > 0)
> > >
> > > If I understand correctly, pcie->root_busno is the bus number of the
> > > Root Port device (likely 00).  I think the "bus->number ==
> > > pcie->root_busno && devfn > 0" check means that the Root Port, e.g.,
> > > 00:00.0, is the only device allowed on bus 00.  Often a Root Complex
> > > contains several Root Ports and other integrated devices that
> > > typically are
> > on bus 00.
> > > But in your case, I think you're saying there is only the single
> > > Root Port and no other devices.
> > >
> > > I think that first check takes care of everything on bus 00, so I'm
> > > trying to figure out what the second check is for.  Assume your Root
> > > Port is device
> > > 00:00.0 and it is a bridge to [bus 01-ff].  Then we have two pci_bus
> > > structs with these values:
> > >
> > >   bus->number = 00
> > >   bus->primary = 00
> > >   bus->busn_res = [bus 00-ff]
> > >
> > >   bus->number = 01
> > >   bus->primary = 00
> > >   bus->busn_res = [bus 01-ff]
> > >
> > > Because of the first check, 00:00.0 is the only possible device on
> > > bus 00, and because of the second check, 01:00.0 is the only
> > > possible device on
> > bus 01.
> > > Therefore, you don't support a multifunction device connected to the
> > > Root Port.  Right?
> > >
> > We support multifunction devices also, so this check should not be
> > there, will remove this check in next patch.
> >
> > > > > > +   return false;
> > > > > > +
> > > > > > +   return true;
> > > > > > +}
> > > > > > + * nwl_setup_sspl - Set Slot Power limit
> > > > > > + *
> > > > > > + * @pcie: PCIe port information  */ static int
> > > > > > +nwl_setup_sspl(struct nwl_pcie *pcie)
> > > > >
> > > > The Set_Slot_Power_Limit Message includes a one DW data payload.
> > > > The data payload is copied from the Slot Capabilities register of
> > > > the Downstream Port and is written into the Device Capabilities
> > > > register of the Upstream Port on the other side of the Link. Bits
> > > > 9:8 of the data payload map to the Slot Power Limit Scale field
> > > > and bits 7:0 map to the Slot Power Limit Value field. Bits 31:10
> > > > of the data payload must be set to all 0's by the Transmitter and
> > > > ignored by the
> > Receiver.
> > >
> > > > This Message is sent automatically by the Downstream Port (of a
> > > > Root Complex or a Switch) when one of the following events occurs:
> > > > -> On a Configuration Write to the Slot Capabilities register (see
> > > > Section 7.8.9) when the Data Link Layer reports DL_Up status.
> > >
> > > I interpret this as meaning "the *hardware* automatically sends a
> > > Set_Slot_Power_Limit Message."  There's no mention of software doing
> > > anything other than the configuration write.
> > >
> > > If your hardware doesn't do that, I think it's a defect.  It's fine
> > > to work around it, but we should have a comment to that effect so
> > > people don't copy the code to new drivers that don't need it.
> >
> > Our hardware is not capable of doing it, so we are doing it software.
> > Yes I will add some comments.
> >
> > >
> > > It's a little strange that 7.8.9 talks about writing to this
> > > register when all of its fields are HwInit and supposedly read-only.
> > > I had assumed devices would use strapping or implementation-specific
> > > registers to set the Slot Power values, but maybe some devices use
> > > direct
> > writes to Slot Capabilities instead.
> > >
> > > BTW, I noticed a related lspci bug: it didn't decode the Capture
> > > Slot Power Limit in Device Capabilities of Endpoints.  I posted a
> > > fix for that
> > separately.
> > >
> > > The Slot Power Limit (in Slot Capabilities) indicates how much power
> > > the slot can supply to a downstream device.  That's a function of
> > > the platform design, so it seems like this is something you want to
> > > set via DT or some other mechanism that knows about the platform.
> > > Intercepting all config writes and updating it with whatever the
> > > caller supplies doesn't sound wise.  The value might be coming from
> > > setpci or some other source with no knowledge of the platform.
> >
> > Agreed, but this is what can be done, it is difficult to determine who
> > does what.
> > >
> > > > > > +   status = nwl_bridge_readl(pcie,
> > TX_PCIE_MSG)

Re: [PATCH 09/10] [media] tvp5150: Initialize the chip on probe

[kbuild test robot]

Hi Javier,

[auto build test ERROR on linuxtv-media/master]
[also build test ERROR on v4.4-rc8 next-20151231]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Javier-Martinez-Canillas/tvp5150-add-MC-and-DT-support/20160104-203224
base:   git://linuxtv.org/media_tree.git master
config: x86_64-randconfig-x008-01040711 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=x86_64 

All errors (new ones prefixed by >>):

   drivers/media/i2c/tvp5150.c: In function 'tvp5150_init':
>> drivers/media/i2c/tvp5150.c:1206:13: error: implicit declaration of function 
>> 'devm_gpiod_get_optional' [-Werror=implicit-function-declaration]
 pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", GPIOD_OUT_HIGH);
^
>> drivers/media/i2c/tvp5150.c:1206:59: error: 'GPIOD_OUT_HIGH' undeclared 
>> (first use in this function)
 pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", GPIOD_OUT_HIGH);
  ^
   drivers/media/i2c/tvp5150.c:1206:59: note: each undeclared identifier is 
reported only once for each function it appears in
>> drivers/media/i2c/tvp5150.c:1211:3: error: implicit declaration of function 
>> 'gpiod_set_value_cansleep' [-Werror=implicit-function-declaration]
  gpiod_set_value_cansleep(pdn_gpio, 0);
  ^
   cc1: some warnings being treated as errors

vim +/devm_gpiod_get_optional +1206 drivers/media/i2c/tvp5150.c

  1200  
  1201  static inline int tvp5150_init(struct i2c_client *c)
  1202  {
  1203  struct gpio_desc *pdn_gpio;
  1204  struct gpio_desc *reset_gpio;
  1205  
> 1206  pdn_gpio = devm_gpiod_get_optional(>dev, "powerdown", 
> GPIOD_OUT_HIGH);
  1207  if (IS_ERR(pdn_gpio))
  1208  return PTR_ERR(pdn_gpio);
  1209  
  1210  if (pdn_gpio) {
> 1211  gpiod_set_value_cansleep(pdn_gpio, 0);
  1212  /* Delay time between power supplies active and reset */
  1213  msleep(20);
  1214  }

---
0-DAY kernel test infrastructureOpen Source Technology Center
https://lists.01.org/pipermail/kbuild-all   Intel Corporation


.config.gz
Description: Binary data

Re: [PATCH v3 2/4] devicetree: bindings: let thermal-sensor point to other thermal zones

[Sascha Hauer]

On Wed, Nov 25, 2015 at 03:09:44PM +, Javi Merino wrote:
> The thermal-sensor property of the thermal zone node accepts phandles to
> thermal sensors.  However, thermal zones can be created as an
> aggregation of other thermal zones.  Extend the thermal-sensors property
> to allow phandles to other thermal zones.  This patch also adds an
> example that showcases how a board thermal zone can be created from the
> aggregation of the cpu, gpu and lcd thermal zones.
> 
> Cc: Zhang Rui 
> Cc: Eduardo Valentin 
> Cc: Rob Herring 
> Cc: Pawel Moll 
> Cc: Mark Rutland 
> Cc: Ian Campbell 
> Cc: Kumar Gala 
> Cc: devicetree@vger.kernel.org
> Signed-off-by: Javi Merino 
> ---
> 
> Notes:
> Hi devicetree,
> 
> Is it ok to extend the definition of the thermal-sensors property like
> this?  IOW are phandles strongly typed?
> 
>  .../devicetree/bindings/thermal/thermal.txt| 154 
> -
>  1 file changed, 151 insertions(+), 3 deletions(-)
> 
> diff --git a/Documentation/devicetree/bindings/thermal/thermal.txt 
> b/Documentation/devicetree/bindings/thermal/thermal.txt
> index 41b817f7b670..52b7e9ae3b4d 100644
> --- a/Documentation/devicetree/bindings/thermal/thermal.txt
> +++ b/Documentation/devicetree/bindings/thermal/thermal.txt
> @@ -145,9 +145,12 @@ Required properties:
>Size: one cell
>  
>  - thermal-sensors:   A list of thermal sensor phandles and sensor specifier
> -  Type: list of  used while monitoring the thermal zone.
> -  phandles + sensor
> -  specifier
> +  Type: list of  used while monitoring the thermal zone. The phandles
> +  phandles + sensor  can point to thermal sensors or other thermal zone
> +  specifier  nodes. If it points to other thermal zone
> + nodes you should omit the sensor specifier
> + and set #thermal-sensor-cells to 0 for the
> + thermal zone.
>  
>  - trips: A sub-node which is a container of only trip point nodes
>Type: sub-node required to describe the thermal zone.
> @@ -603,3 +606,148 @@ thermal-zones {
>  The above example is a mix of previous examples, a sensor IP with several 
> internal
>  sensors used to monitor different zones, one of them is composed by several 
> sensors and
>  with different cooling devices.
> +
> +(e) Board thermal with stacked thermal zones
> +
> +Instead of setting up one thermal zone combining multiple thermal
> +zones and multiple trip points for each cooling device, we can create
> +a hierarchy of thermal zones.
> +
> +#include 
> +
> + {
> + ...
> + /*
> +  * An IC with several temperature sensor.
> +  */
> + adc_dummy: sensor@0x50 {
> + ...
> + #thermal-sensor-cells = <1>; /* sensor internal ID */
> + };
> +};
> +
> +thermal-zones {
> +
> +cpu_thermal: cpu_thermal {
> + polling-delay-passive = <1000>; /* milliseconds */
> + polling-delay = <2500>; /* milliseconds */
> +
> + sustainable-power = <2500>;
> +
> + thermal-sensors = <_dummy 0>
> +
> + trips {
> + cpu_trip: cpu-trip {
> + temperature = <6>; /* millicelsius */
> + hysteresis = <2000>; /* millicelsius */
> + type = "passive";
> + };
> +};
> +
> + cooling-maps {
> + map0 {
> + trip = <_trip>;
> + cooling-device = < 0 2>;
> + };
> +};
> +};
> +
> +gpu_thermal: gpu_thermal {
> + polling-delay-passive = <1000>; /* milliseconds */
> + polling-delay = <2500>; /* milliseconds */
> +
> + sustainable-power = <2500>;
> +
> + thermal-sensors = <_dummy 2>
> +
> + trips {
> + gpu_trip: gpu-trip {
> + temperature = <55000>; /* millicelsius */
> + hysteresis = <2000>; /* millicelsius */
> + type = "passive";
> + }
> +};
> +
> + cooling-maps {
> + map0 {
> + trip = <_trip>;
> + cooling-device = < 0 2>;
> + };
> +};
> +};
> +
> +lcd_thermal: lcd_thermal {
> + polling-delay-passive = <1000>; /* milliseconds */
> + polling-delay = <2500>; /* milliseconds */
> +
> + sustainable-power = <2500>;
> +
> + thermal-sensors = <_dummy 1>
> +
> + trips {
> + lcd_trip: lcp-trip {
> +

[PATCH 10/10] [media] tvp5150: Configure data interface via pdata or DT

[Javier Martinez Canillas]

The video decoder supports either 8-bit 4:2:2 YUV with discrete syncs
or 8-bit ITU-R BT.656 with embedded syncs output format but currently
BT.656 it's always reported. Allow to configure the format to use via
either platform data or a device tree definition.

Signed-off-by: Javier Martinez Canillas 

---

 drivers/media/i2c/tvp5150.c | 61 +++--
 include/media/i2c/tvp5150.h |  5 
 2 files changed, 64 insertions(+), 2 deletions(-)

diff --git a/drivers/media/i2c/tvp5150.c b/drivers/media/i2c/tvp5150.c
index fed89a811ab7..8bce45a6e264 100644
--- a/drivers/media/i2c/tvp5150.c
+++ b/drivers/media/i2c/tvp5150.c
@@ -6,6 +6,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -15,6 +16,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #include "tvp5150_reg.h"
 
@@ -39,6 +41,7 @@ struct tvp5150 {
struct media_pad pad;
struct v4l2_ctrl_handler hdl;
struct v4l2_rect rect;
+   struct tvp5150_platform_data *pdata;
 
v4l2_std_id norm;   /* Current set standard */
u32 input;
@@ -757,6 +760,7 @@ static int tvp5150_s_std(struct v4l2_subdev *sd, 
v4l2_std_id std)
 static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
 {
struct tvp5150 *decoder = to_tvp5150(sd);
+   struct tvp5150_platform_data *pdata = decoder->pdata;
 
/* Initializes TVP5150 to its default values */
tvp5150_write_inittab(sd, tvp5150_init_default);
@@ -774,6 +778,10 @@ static int tvp5150_reset(struct v4l2_subdev *sd, u32 val)
v4l2_ctrl_handler_setup(>hdl);
 
tvp5150_set_std(sd, decoder->norm);
+
+   if (pdata && pdata->bus_type == V4L2_MBUS_PARALLEL)
+   tvp5150_write(sd, TVP5150_DATA_RATE_SEL, 0x40);
+
return 0;
 };
 
@@ -940,6 +948,16 @@ static int tvp5150_cropcap(struct v4l2_subdev *sd, struct 
v4l2_cropcap *a)
 static int tvp5150_g_mbus_config(struct v4l2_subdev *sd,
 struct v4l2_mbus_config *cfg)
 {
+   struct tvp5150_platform_data *pdata = to_tvp5150(sd)->pdata;
+
+   if (pdata) {
+   cfg->type = pdata->bus_type;
+   cfg->flags = pdata->parallel_flags;
+
+   return 0;
+   }
+
+   /* Default values if no platform data was provided */
cfg->type = V4L2_MBUS_BT656;
cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_PCLK_SAMPLE_RISING
   | V4L2_MBUS_FIELD_EVEN_LOW | V4L2_MBUS_DATA_ACTIVE_HIGH;
@@ -986,13 +1004,20 @@ static int tvp5150_enum_frame_size(struct v4l2_subdev 
*sd,
 
 static int tvp5150_s_stream(struct v4l2_subdev *sd, int enable)
 {
+   struct tvp5150_platform_data *pdata = to_tvp5150(sd)->pdata;
+   /* Output format: 8-bit ITU-R BT.656 with embedded syncs */
+   int val = 0x09;
+
+   /* Output format: 8-bit 4:2:2 YUV with discrete sync */
+   if (pdata && pdata->bus_type == V4L2_MBUS_PARALLEL)
+   val = 0x0d;
+
/* Initializes TVP5150 to its default values */
/* # set PCLK (27MHz) */
tvp5150_write(sd, TVP5150_CONF_SHARED_PIN, 0x00);
 
-   /* Output format: 8-bit ITU-R BT.656 with embedded syncs */
if (enable)
-   tvp5150_write(sd, TVP5150_MISC_CTL, 0x09);
+   tvp5150_write(sd, TVP5150_MISC_CTL, val);
else
tvp5150_write(sd, TVP5150_MISC_CTL, 0x00);
 
@@ -1228,11 +1253,42 @@ static inline int tvp5150_init(struct i2c_client *c)
return 0;
 }
 
+static struct tvp5150_platform_data *tvp5150_get_pdata(struct device *dev)
+{
+   struct tvp5150_platform_data *pdata = dev_get_platdata(dev);
+   struct v4l2_of_endpoint bus_cfg;
+   struct device_node *ep;
+
+   if (pdata)
+   return pdata;
+
+   if (IS_ENABLED(CONFIG_OF) && dev->of_node) {
+   pdata = devm_kzalloc(dev, sizeof(*pdata), GFP_KERNEL);
+   if (!pdata)
+   return NULL;
+
+   ep = of_graph_get_next_endpoint(dev->of_node, NULL);
+   if (!ep)
+   return NULL;
+
+   v4l2_of_parse_endpoint(ep, _cfg);
+
+   pdata->bus_type = bus_cfg.bus_type;
+   pdata->parallel_flags = bus_cfg.bus.parallel.flags;
+
+   of_node_put(ep);
+   return pdata;
+   }
+
+   return NULL;
+}
+
 static int tvp5150_probe(struct i2c_client *c,
 const struct i2c_device_id *id)
 {
struct tvp5150 *core;
struct v4l2_subdev *sd;
+   struct tvp5150_platform_data *pdata = tvp5150_get_pdata(>dev);
int res;
 
/* Check if the adapter supports the needed features */
@@ -1262,6 +1318,7 @@ static int tvp5150_probe(struct i2c_client *c,
if (res < 0)
return res;
 
+   core->pdata = pdata;
core->norm = V4L2_STD_ALL;  /* Default is autodetect */
core->input = TVP5150_COMPOSITE1;
core->enable = 1;
diff --git 

Re: [PATCH 4/4] soc: mediatek: Add MT2701/MT7623 scpsys driver

[James Liao]

Hi Matthias,
On Wed, 2015-12-30 at 18:49 +0100, Matthias Brugger wrote:
> > On Wed, 2015-12-30 at 17:01 +0800, Daniel Kurtz wrote:
> >> On Wed, Dec 30, 2015 at 2:41 PM, James Liao  
> >> wrote:
> >>>
> >>> From: Shunli Wang 
> >>>
> >>> Add scpsys driver for MT2701 and MT7623.
> >>>
> >>> Signed-off-by: Shunli Wang 
> >>> Signed-off-by: James Liao 
> >>> ---
> >>>   drivers/soc/mediatek/Kconfig |  11 +++
> >>>   drivers/soc/mediatek/Makefile|   1 +
> >>>   drivers/soc/mediatek/mtk-scpsys-mt2701.c | 161 
> >>> +++
> >>>   3 files changed, 173 insertions(+)
> >>>   create mode 100644 drivers/soc/mediatek/mtk-scpsys-mt2701.c
> >>>
> >>> diff --git a/drivers/soc/mediatek/Kconfig b/drivers/soc/mediatek/Kconfig
> >>> index eca6fb7..92cf838 100644
> >>> --- a/drivers/soc/mediatek/Kconfig
> >>> +++ b/drivers/soc/mediatek/Kconfig
> >>> @@ -39,3 +39,14 @@ config MTK_SCPSYS_MT8173
> >>>driver.
> >>>The System Control Processor System (SCPSYS) has several power
> >>>management related tasks in the system.
> >>> +
> >>> +config MTK_SCPSYS_MT2701
> >>> +   bool "SCPSYS Support MediaTek MT2701 and MT7623"
> >>> +   depends on ARCH_MEDIATEK || COMPILE_TEST
> >>> +   select MTK_SCPSYS
> >>> +   default ARCH_MEDIATEK
> >>> +   help
> >>> + Say yes here to add support for the MT2701/MT7623 SCPSYS power
> >>> + domain driver.
> >>> + The System Control Processor System (SCPSYS) has several power
> >>> + management related tasks in the system.
> >>
> >> I don't think we really want different drivers and Kconfig options.
> >>
> >> Can we just use different compatibles to select the appropriate 
> >> scp_domain_data?
> >
> > Yes, we can. All scpsys drivers are built-in by default, and they will
> > be activate by specific compatible string.
> >
> > But some projects don't want to build unused drivers into kernel to save
> > code size. Use different Kconfig options for each SoC so that these
> > projects can disable unused drivers.
> >
> 
> Scpsys is a bool right now, you can disable it if you don't need it for 
> your project.
> 
> I don't think the impact of adding scp_domain_data justifies adding SoC 
> specific scpsys drivers and bloat the drivers/soc/mediatek folder.

So you prefer to enable MT8173 and MT2701 scpsys drivers at the same
time if MTK_SCPSYS is true?

BTW, this patchset is based on 4.4-rc7, which lacks two patches from
your v4.4-next/soc. Should I rebase to v4.4-next/soc when I send v2
patch?


Best regards,

James


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[PATCH v5 3/3] dt/bindings: qcom_nandc: Add DT bindings

[Archit Taneja]

Add DT bindings document for the Qualcomm NAND controller driver.

Cc: devicetree@vger.kernel.org
Cc: Rob Herring 
Signed-off-by: Archit Taneja 
---
v5:
- Make changes to incorporate chip select sub nodes (brcmnand taken as
  reference)

v3:
- Don't use '0x' when specifying nand controller address space
- Add optional property for on-flash bbt usage

 .../devicetree/bindings/mtd/qcom_nandc.txt | 84 ++
 1 file changed, 84 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mtd/qcom_nandc.txt

diff --git a/Documentation/devicetree/bindings/mtd/qcom_nandc.txt 
b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
new file mode 100644
index 000..b2cf2d9
--- /dev/null
+++ b/Documentation/devicetree/bindings/mtd/qcom_nandc.txt
@@ -0,0 +1,84 @@
+* Qualcomm NAND controller
+
+Required properties:
+- compatible:  should be "qcom,ebi2-nand" for IPQ806x
+- reg: MMIO address range
+- clocks:  must contain core clock and always on clock
+- clock-names: must contain "core" for the core clock and "aon" for the
+   always on clock
+- dmas:DMA specifier, consisting of a phandle to the 
ADM DMA
+   controller node and the channel number to be used for
+   NAND. Refer to dma.txt and qcom_adm.txt for more details
+- dma-names:   must be "rxtx"
+- qcom,cmd-crci:   must contain the ADM command type CRCI block instance
+   number specified for the NAND controller on the given
+   platform
+- qcom,data-crci:  must contain the ADM data type CRCI block instance
+   number specified for the NAND controller on the given
+   platform
+- #address-cells:  <1> - subnodes give the chip-select number
+- #size-cells: <0>
+
+* NAND chip-select
+
+Each controller may contain one or more subnodes to represent enabled
+chip-selects which (may) contain NAND flash chips. Their properties are as
+follows.
+
+Required properties:
+- compatible:  should contain "qcom,nandcs"
+- reg: a single integer representing the chip-select
+   number (e.g., 0, 1, 2, etc.)
+- #address-cells:  see partition.txt
+- #size-cells: see partition.txt
+- nand-ecc-strength:   number of bits to correct per ECC step. Must be 4 or 8
+   bits.
+- nand-ecc-step-size:  bytes of data per ECC step. Must be 512.
+
+Optional properties:
+- nand-bus-width:  bus width. Must be 8 or 16. If not present, 8 is chosen
+   as default
+
+Each nandcs device node may optionally contain sub-nodes describing the flash
+partition mapping. See partition.txt for more detail.
+
+Example:
+
+nand@1ac0 {
+   compatible = "qcom,ebi2-nandc";
+   reg = <0x1ac0 0x800>;
+
+   clocks = < EBI2_CLK>,
+< EBI2_AON_CLK>;
+   clock-names = "core", "aon";
+
+   dmas = <_dma 3>;
+   dma-names = "rxtx";
+   qcom,cmd-crci = <15>;
+   qcom,data-crci = <3>;
+
+   #address-cells = <1>;
+   #size-cells = <0>;
+
+   nandcs@0 {
+   compatible = "qcom,nandcs";
+   reg = <0>;
+
+   nand-ecc-strength = <4>;
+   nand-ecc-step-size = <512>;
+   nand-bus-width = <8>;
+
+   #address-cells = <1>;
+   #size-cells = <1>;
+
+   partition@0 {
+   label = "boot-nand";
+   reg = <0 0x58a>;
+   };
+
+   partition@58a {
+   label = "fs-nand";
+   reg = <0x58a 0x400>;
+   };
+   };
+};
-- 
The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum,
hosted by The Linux Foundation

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[PATCH v2 6/6] reset: mediatek: mt2701 reset driver

[James Liao]

From: Shunli Wang 

In infrasys and perifsys, there are many reset
control bits for kinds of modules. These bits are
used as actual reset controllers to be registered
into kernel's generic reset controller framework.

Signed-off-by: Shunli Wang 
---
 drivers/clk/mediatek/clk-mt2701.c | 4 
 1 file changed, 4 insertions(+)

diff --git a/drivers/clk/mediatek/clk-mt2701.c 
b/drivers/clk/mediatek/clk-mt2701.c
index 2f521f4..39472e4 100644
--- a/drivers/clk/mediatek/clk-mt2701.c
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -665,6 +665,8 @@ static void __init mtk_infrasys_init(struct device_node 
*node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+   mtk_register_reset_controller(node, 2, 0x30);
 }
 CLK_OF_DECLARE(mtk_infrasys, "mediatek,mt2701-infracfg", mtk_infrasys_init);
 
@@ -782,6 +784,8 @@ static void __init mtk_pericfg_init(struct device_node 
*node)
if (r)
pr_err("%s(): could not register clock provider: %d\n",
__func__, r);
+
+   mtk_register_reset_controller(node, 2, 0x0);
 }
 CLK_OF_DECLARE(mtk_pericfg, "mediatek,mt2701-pericfg", mtk_pericfg_init);
 
-- 
1.9.1

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[PATCH v2 5/6] reset: mediatek: mt2701 reset controller dt-binding file

[James Liao]

From: Shunli Wang 

Dt-binding file about reset controller is used to provide
kinds of definition, which is referenced by dts file and
IC-specified reset controller driver code.

Signed-off-by: Shunli Wang 
---
 .../dt-bindings/reset-controller/mt2701-resets.h   | 74 ++
 1 file changed, 74 insertions(+)
 create mode 100644 include/dt-bindings/reset-controller/mt2701-resets.h

diff --git a/include/dt-bindings/reset-controller/mt2701-resets.h 
b/include/dt-bindings/reset-controller/mt2701-resets.h
new file mode 100644
index 000..00efeb0
--- /dev/null
+++ b/include/dt-bindings/reset-controller/mt2701-resets.h
@@ -0,0 +1,74 @@
+/*
+ * Copyright (c) 2015 MediaTek, Shunli Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_RESET_CONTROLLER_MT2701
+#define _DT_BINDINGS_RESET_CONTROLLER_MT2701
+
+/* INFRACFG resets */
+#define MT2701_INFRA_EMI_REG_RST   0
+#define MT2701_INFRA_DRAMC0_A0_RST 1
+#define MT2701_INFRA_FHCTL_RST 2
+#define MT2701_INFRA_APCIRQ_EINT_RST   3
+#define MT2701_INFRA_APXGPT_RST4
+#define MT2701_INFRA_SCPSYS_RST5
+#define MT2701_INFRA_KP_RST6
+#define MT2701_INFRA_PMIC_WRAP_RST 7
+#define MT2701_INFRA_MIPI_RST  8
+#define MT2701_INFRA_IRRX_RST  9
+#define MT2701_INFRA_CEC_RST   10
+#define MT2701_INFRA_EMI_RST   32
+#define MT2701_INFRA_DRAMC0_RST34
+#define MT2701_INFRA_TRNG_RST  37
+#define MT2701_INFRA_SYSIRQ_RST38
+
+/*  PERICFG resets */
+#define MT2701_PERI_UART0_SW_RST   0
+#define MT2701_PERI_UART1_SW_RST   1
+#define MT2701_PERI_UART2_SW_RST   2
+#define MT2701_PERI_UART3_SW_RST   3
+#define MT2701_PERI_GCPU_SW_RST5
+#define MT2701_PERI_BTIF_SW_RST6
+#define MT2701_PERI_PWM_SW_RST 8
+#define MT2701_PERI_AUXADC_SW_RST  10
+#define MT2701_PERI_DMA_SW_RST 11
+#define MT2701_PERI_NFI_SW_RST 14
+#define MT2701_PERI_NLI_SW_RST 15
+#define MT2701_PERI_THERM_SW_RST   16
+#define MT2701_PERI_MSDC2_SW_RST   17
+#define MT2701_PERI_MSDC0_SW_RST   19
+#define MT2701_PERI_MSDC1_SW_RST   20
+#define MT2701_PERI_I2C0_SW_RST22
+#define MT2701_PERI_I2C1_SW_RST23
+#define MT2701_PERI_I2C2_SW_RST24
+#define MT2701_PERI_I2C3_SW_RST25
+#define MT2701_PERI_USB_SW_RST 28
+#define MT2701_PERI_ETH_SW_RST 29
+#define MT2701_PERI_SPI0_SW_RST33
+
+/* TOPRGU resets */
+#define MT2701_TOPRGU_INFRA_RST0
+#define MT2701_TOPRGU_MM_RST   1
+#define MT2701_TOPRGU_MFG_RST  2
+#define MT2701_TOPRGU_ETHDMA_RST   3
+#define MT2701_TOPRGU_VDEC_RST 4
+#define MT2701_TOPRGU_VENC_IMG_RST 5
+#define MT2701_TOPRGU_DDRPHY_RST   6
+#define MT2701_TOPRGU_MD_RST   7
+#define MT2701_TOPRGU_INFRA_AO_RST 8
+#define MT2701_TOPRGU_CONN_RST 9
+#define MT2701_TOPRGU_APMIXED_RST  10
+#define MT2701_TOPRGU_HIFSYS_RST   11
+#define MT2701_TOPRGU_CONN_MCU_RST 12
+#define MT2701_TOPRGU_BDP_DISP_RST 13
+
+#endif  /* _DT_BINDINGS_RESET_CONTROLLER_MT2701 */
-- 
1.9.1

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Re: [PATCH v5 0/5] Add memory mapped read support for ti-qspi

[Vignesh R]

Hi Brian,

On 12/11/2015 09:39 AM, Vignesh R wrote:
> Changes since v4:
> Use syscon to access system control module register in ti-qspi driver.
> 

Gentle ping...
Are you ok with MTD side changes of this patch series?

> Changes since v3:
> Rework to introduce spi_flash_read_message struct.
> Support different opcode/addr/data formats as per Brian's suggestion
> here: https://lkml.org/lkml/2015/11/11/454
> 
> Changes since v2:
> Remove mmap_lock_mutex.
> Optimize enable/disable of mmap mode.
> 
> Changes since v1:
> Introduce API in SPI core that MTD flash driver can call for mmap read
> instead of directly calling spi-master driver callback. This API makes
> sure that SPI core msg queue is locked during mmap transfers.
> v1: https://lkml.org/lkml/2015/9/4/103
> 
> 
> Cover letter:
> 
> This patch series adds support for memory mapped read port of ti-qspi.
> ti-qspi has a special memory mapped port through which SPI flash
> memories can be accessed directly via SoC specific memory region.
> 
> First patch adds a method to pass flash specific information like read
> opcode, dummy bytes etc and to request mmap read. Second patch
> implements mmap read method in ti-qspi driver. Patch 3 adapts m25p80 to
> use mmap read method before trying normal SPI transfer. Patch 4 and 5
> add memory map region DT entries for DRA7xx and AM43xx SoCs.
> 
> This patch series is based on the discussions here:
> http://www.spinics.net/lists/linux-spi/msg04796.html
> 
> Tested on DRA74 EVM and AM437x-SK.
> Read performance increases from ~100kB/s to ~2.5MB/s.
> 
> Vignesh R (5):
>   spi: introduce accelerated read support for spi flash devices
>   spi: spi-ti-qspi: add mmap mode read support
>   mtd: devices: m25p80: add support for mmap read request
>   ARM: dts: DRA7: add entry for qspi mmap region
>   ARM: dts: AM4372: add entry for qspi mmap region
> 
>  Documentation/devicetree/bindings/spi/ti_qspi.txt |  22 +++-
>  arch/arm/boot/dts/am4372.dtsi |   4 +-
>  arch/arm/boot/dts/dra7.dtsi   |   6 +-
>  drivers/mtd/devices/m25p80.c  |  20 
>  drivers/spi/spi-ti-qspi.c | 139 
> +-
>  drivers/spi/spi.c |  45 +++
>  include/linux/spi/spi.h   |  41 +++
>  7 files changed, 243 insertions(+), 34 deletions(-)
> 

-- 
Regards
Vignesh
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[PATCH v2 4/6] clk: mediatek: Add MT2701 clock support

[James Liao]

From: Shunli Wang 

Add MT2701 clock support, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Shunli Wang 
Signed-off-by: James Liao 
---
 drivers/clk/mediatek/Kconfig  |8 +
 drivers/clk/mediatek/Makefile |1 +
 drivers/clk/mediatek/clk-gate.c   |   56 ++
 drivers/clk/mediatek/clk-gate.h   |2 +
 drivers/clk/mediatek/clk-mt2701.c | 1210 +
 drivers/clk/mediatek/clk-mtk.c|   25 +
 drivers/clk/mediatek/clk-mtk.h|   35 +-
 7 files changed, 1334 insertions(+), 3 deletions(-)
 create mode 100644 drivers/clk/mediatek/clk-mt2701.c

diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
index dc224e6..6c7cdc0 100644
--- a/drivers/clk/mediatek/Kconfig
+++ b/drivers/clk/mediatek/Kconfig
@@ -6,6 +6,14 @@ config COMMON_CLK_MEDIATEK
---help---
  Mediatek SoCs' clock support.
 
+config COMMON_CLK_MT2701
+   bool "Clock driver for Mediatek MT2701 and MT7623"
+   depends on COMMON_CLK
+   select COMMON_CLK_MEDIATEK
+   default ARCH_MEDIATEK
+   ---help---
+ This driver supports Mediatek MT2701 and MT7623 clocks.
+
 config COMMON_CLK_MT8135
bool "Clock driver for Mediatek MT8135"
depends on COMMON_CLK
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 32e7222..5b2b91b 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,4 +1,5 @@
 obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o 
clk-apmixed.o
 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
+obj-$(CONFIG_COMMON_CLK_MT2701) += clk-mt2701.o
 obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o
 obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o
diff --git a/drivers/clk/mediatek/clk-gate.c b/drivers/clk/mediatek/clk-gate.c
index 576bdb7..38badb4 100644
--- a/drivers/clk/mediatek/clk-gate.c
+++ b/drivers/clk/mediatek/clk-gate.c
@@ -61,6 +61,26 @@ static void mtk_cg_clr_bit(struct clk_hw *hw)
regmap_write(cg->regmap, cg->clr_ofs, BIT(cg->bit));
 }
 
+static void mtk_cg_set_bit_no_setclr(struct clk_hw *hw)
+{
+   struct mtk_clk_gate *cg = to_clk_gate(hw);
+   u32 val;
+
+   regmap_read(cg->regmap, cg->sta_ofs, );
+   val |= BIT(cg->bit);
+   regmap_write(cg->regmap, cg->sta_ofs, val);
+}
+
+static void mtk_cg_clr_bit_no_setclr(struct clk_hw *hw)
+{
+   struct mtk_clk_gate *cg = to_clk_gate(hw);
+   u32 val;
+
+   regmap_read(cg->regmap, cg->sta_ofs, );
+   val &= ~(BIT(cg->bit));
+   regmap_write(cg->regmap, cg->sta_ofs, val);
+}
+
 static int mtk_cg_enable(struct clk_hw *hw)
 {
mtk_cg_clr_bit(hw);
@@ -85,6 +105,30 @@ static void mtk_cg_disable_inv(struct clk_hw *hw)
mtk_cg_clr_bit(hw);
 }
 
+static int mtk_cg_enable_no_setclr(struct clk_hw *hw)
+{
+   mtk_cg_clr_bit_no_setclr(hw);
+
+   return 0;
+}
+
+static void mtk_cg_disable_no_setclr(struct clk_hw *hw)
+{
+   mtk_cg_set_bit_no_setclr(hw);
+}
+
+static int mtk_cg_enable_inv_no_setclr(struct clk_hw *hw)
+{
+   mtk_cg_set_bit_no_setclr(hw);
+
+   return 0;
+}
+
+static void mtk_cg_disable_inv_no_setclr(struct clk_hw *hw)
+{
+   mtk_cg_clr_bit_no_setclr(hw);
+}
+
 const struct clk_ops mtk_clk_gate_ops_setclr = {
.is_enabled = mtk_cg_bit_is_cleared,
.enable = mtk_cg_enable,
@@ -97,6 +141,18 @@ const struct clk_ops mtk_clk_gate_ops_setclr_inv = {
.disable= mtk_cg_disable_inv,
 };
 
+const struct clk_ops mtk_clk_gate_ops_no_setclr = {
+   .is_enabled = mtk_cg_bit_is_cleared,
+   .enable = mtk_cg_enable_no_setclr,
+   .disable= mtk_cg_disable_no_setclr,
+};
+
+const struct clk_ops mtk_clk_gate_ops_no_setclr_inv = {
+   .is_enabled = mtk_cg_bit_is_set,
+   .enable = mtk_cg_enable_inv_no_setclr,
+   .disable= mtk_cg_disable_inv_no_setclr,
+};
+
 struct clk * __init mtk_clk_register_gate(
const char *name,
const char *parent_name,
diff --git a/drivers/clk/mediatek/clk-gate.h b/drivers/clk/mediatek/clk-gate.h
index 11e25c9..7f7ef34 100644
--- a/drivers/clk/mediatek/clk-gate.h
+++ b/drivers/clk/mediatek/clk-gate.h
@@ -36,6 +36,8 @@ static inline struct mtk_clk_gate *to_clk_gate(struct clk_hw 
*hw)
 
 extern const struct clk_ops mtk_clk_gate_ops_setclr;
 extern const struct clk_ops mtk_clk_gate_ops_setclr_inv;
+extern const struct clk_ops mtk_clk_gate_ops_no_setclr;
+extern const struct clk_ops mtk_clk_gate_ops_no_setclr_inv;
 
 struct clk *mtk_clk_register_gate(
const char *name,
diff --git a/drivers/clk/mediatek/clk-mt2701.c 
b/drivers/clk/mediatek/clk-mt2701.c
new file mode 100644
index 000..2f521f4
--- /dev/null
+++ b/drivers/clk/mediatek/clk-mt2701.c
@@ -0,0 +1,1210 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Shunli Wang 
+ *
+ * 

[PATCH v2 3/6] clk: mediatek: Add dt-bindings for MT2701 clocks

[James Liao]

From: Shunli Wang 

Add MT2701 clock dt-bindings, include topckgen, apmixedsys,
infracfg, pericfg and subsystem clocks.

Signed-off-by: Shunli Wang 
Signed-off-by: James Liao 
---
 include/dt-bindings/clock/mt2701-clk.h | 481 +
 1 file changed, 481 insertions(+)
 create mode 100644 include/dt-bindings/clock/mt2701-clk.h

diff --git a/include/dt-bindings/clock/mt2701-clk.h 
b/include/dt-bindings/clock/mt2701-clk.h
new file mode 100644
index 000..50972d1
--- /dev/null
+++ b/include/dt-bindings/clock/mt2701-clk.h
@@ -0,0 +1,481 @@
+/*
+ * Copyright (c) 2014 MediaTek Inc.
+ * Author: Shunli Wang 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_CLK_MT2701_H
+#define _DT_BINDINGS_CLK_MT2701_H
+
+/* TOPCKGEN */
+#define CLK_TOP_SYSPLL 1
+#define CLK_TOP_SYSPLL_D2  2
+#define CLK_TOP_SYSPLL_D3  3
+#define CLK_TOP_SYSPLL_D5  4
+#define CLK_TOP_SYSPLL_D7  5
+#define CLK_TOP_SYSPLL1_D2 6
+#define CLK_TOP_SYSPLL1_D4 7
+#define CLK_TOP_SYSPLL1_D8 8
+#define CLK_TOP_SYSPLL1_D169
+#define CLK_TOP_SYSPLL2_D2 10
+#define CLK_TOP_SYSPLL2_D4 11
+#define CLK_TOP_SYSPLL2_D8 12
+#define CLK_TOP_SYSPLL3_D2 13
+#define CLK_TOP_SYSPLL3_D4 14
+#define CLK_TOP_SYSPLL4_D2 15
+#define CLK_TOP_SYSPLL4_D4 16
+#define CLK_TOP_UNIVPLL17
+#define CLK_TOP_UNIVPLL_D2 18
+#define CLK_TOP_UNIVPLL_D3 19
+#define CLK_TOP_UNIVPLL_D5 20
+#define CLK_TOP_UNIVPLL_D7 21
+#define CLK_TOP_UNIVPLL_D2622
+#define CLK_TOP_UNIVPLL_D5223
+#define CLK_TOP_UNIVPLL_D108   24
+#define CLK_TOP_USB_PHY48M 25
+#define CLK_TOP_UNIVPLL1_D226
+#define CLK_TOP_UNIVPLL1_D427
+#define CLK_TOP_UNIVPLL1_D828
+#define CLK_TOP_UNIVPLL2_D229
+#define CLK_TOP_UNIVPLL2_D430
+#define CLK_TOP_UNIVPLL2_D831
+#define CLK_TOP_UNIVPLL2_D16   32
+#define CLK_TOP_UNIVPLL2_D32   33
+#define CLK_TOP_UNIVPLL3_D234
+#define CLK_TOP_UNIVPLL3_D435
+#define CLK_TOP_UNIVPLL3_D836
+#define CLK_TOP_MSDCPLL37
+#define CLK_TOP_MSDCPLL_D2 38
+#define CLK_TOP_MSDCPLL_D4 39
+#define CLK_TOP_MSDCPLL_D8 40
+#define CLK_TOP_MMPLL  41
+#define CLK_TOP_MMPLL_D2   42
+#define CLK_TOP_DMPLL  43
+#define CLK_TOP_DMPLL_D2   44
+#define CLK_TOP_DMPLL_D4   45
+#define CLK_TOP_DMPLL_X2   46
+#define CLK_TOP_TVDPLL 47
+#define CLK_TOP_TVDPLL_D2  48
+#define CLK_TOP_TVDPLL_D4  49
+#define CLK_TOP_TVD2PLL50
+#define CLK_TOP_TVD2PLL_D2 51
+#define CLK_TOP_HADDS2PLL_98M  52
+#define CLK_TOP_HADDS2PLL_294M 53
+#define CLK_TOP_HADDS2_FB  54
+#define CLK_TOP_MIPIPLL_D2 55
+#define CLK_TOP_MIPIPLL_D4 56
+#define CLK_TOP_HDMIPLL57
+#define CLK_TOP_HDMIPLL_D2 58
+#define CLK_TOP_HDMIPLL_D3 59
+#define CLK_TOP_HDMI_SCL_RX60
+#define CLK_TOP_HDMI_0_PIX340M 61
+#define CLK_TOP_HDMI_0_DEEP340M62
+#define CLK_TOP_HDMI_0_PLL340M 63
+#define CLK_TOP_AUD1PLL_98M64
+#define CLK_TOP_AUD2PLL_90M65
+#define CLK_TOP_AUDPLL 66
+#define CLK_TOP_AUDPLL_D4  67
+#define CLK_TOP_AUDPLL_D8  68
+#define CLK_TOP_AUDPLL_D16 69
+#define CLK_TOP_AUDPLL_D24 70
+#define CLK_TOP_ETHPLL_500M71
+#define CLK_TOP_VDECPLL72

[PATCH v2 0/6] Add clock support for Mediatek MT2701

[James Liao]

This patchset is based on 4.4-rc7, add clock and reset controller support
for Mediatek MT2701.

This patchset also refined makefile and Kconfig to support configurable
multiple SoC clock support.

changes since v1:
- Document MT2701 compatible strings.

James Liao (2):
  clk: mediatek: Refine the makefile to support multiple clock drivers
  dt-bindings: ARM: Mediatek: Document bindings for MT2701

Shunli Wang (4):
  clk: mediatek: Add dt-bindings for MT2701 clocks
  clk: mediatek: Add MT2701 clock support
  reset: mediatek: mt2701 reset controller dt-binding file
  reset: mediatek: mt2701 reset driver

 .../bindings/arm/mediatek/mediatek,apmixedsys.txt  |1 +
 .../bindings/arm/mediatek/mediatek,bdpsys.txt  |   22 +
 .../bindings/arm/mediatek/mediatek,ethsys.txt  |   22 +
 .../bindings/arm/mediatek/mediatek,hifsys.txt  |   22 +
 .../bindings/arm/mediatek/mediatek,imgsys.txt  |1 +
 .../bindings/arm/mediatek/mediatek,infracfg.txt|1 +
 .../bindings/arm/mediatek/mediatek,mmsys.txt   |1 +
 .../bindings/arm/mediatek/mediatek,pericfg.txt |1 +
 .../bindings/arm/mediatek/mediatek,topckgen.txt|1 +
 .../bindings/arm/mediatek/mediatek,vdecsys.txt |1 +
 drivers/clk/Kconfig|1 +
 drivers/clk/mediatek/Kconfig   |   31 +
 drivers/clk/mediatek/Makefile  |7 +-
 drivers/clk/mediatek/clk-gate.c|   56 +
 drivers/clk/mediatek/clk-gate.h|2 +
 drivers/clk/mediatek/clk-mt2701.c  | 1214 
 drivers/clk/mediatek/clk-mtk.c |   25 +
 drivers/clk/mediatek/clk-mtk.h |   35 +-
 include/dt-bindings/clock/mt2701-clk.h |  481 
 .../dt-bindings/reset-controller/mt2701-resets.h   |   74 ++
 20 files changed, 1993 insertions(+), 6 deletions(-)
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt
 create mode 100644 drivers/clk/mediatek/Kconfig
 create mode 100644 drivers/clk/mediatek/clk-mt2701.c
 create mode 100644 include/dt-bindings/clock/mt2701-clk.h
 create mode 100644 include/dt-bindings/reset-controller/mt2701-resets.h

--
1.9.1

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[PATCH v2 1/6] clk: mediatek: Refine the makefile to support multiple clock drivers

[James Liao]

Add a Kconfig to define clock configuration for each SoC, and
modify the Makefile to build drivers that only selected in config.

Signed-off-by: Shunli Wang 
Signed-off-by: James Liao 
---
 drivers/clk/Kconfig   |  1 +
 drivers/clk/mediatek/Kconfig  | 23 +++
 drivers/clk/mediatek/Makefile |  6 +++---
 3 files changed, 27 insertions(+), 3 deletions(-)
 create mode 100644 drivers/clk/mediatek/Kconfig

diff --git a/drivers/clk/Kconfig b/drivers/clk/Kconfig
index c3e3a02..b7a37dc 100644
--- a/drivers/clk/Kconfig
+++ b/drivers/clk/Kconfig
@@ -198,3 +198,4 @@ source "drivers/clk/mvebu/Kconfig"
 
 source "drivers/clk/samsung/Kconfig"
 source "drivers/clk/tegra/Kconfig"
+source "drivers/clk/mediatek/Kconfig"
diff --git a/drivers/clk/mediatek/Kconfig b/drivers/clk/mediatek/Kconfig
new file mode 100644
index 000..dc224e6
--- /dev/null
+++ b/drivers/clk/mediatek/Kconfig
@@ -0,0 +1,23 @@
+#
+# MediaTek SoC drivers
+#
+config COMMON_CLK_MEDIATEK
+   bool
+   ---help---
+ Mediatek SoCs' clock support.
+
+config COMMON_CLK_MT8135
+   bool "Clock driver for Mediatek MT8135"
+   depends on COMMON_CLK
+   select COMMON_CLK_MEDIATEK
+   default ARCH_MEDIATEK
+   ---help---
+ This driver supports Mediatek MT8135 clocks.
+
+config COMMON_CLK_MT8173
+   bool "Clock driver for Mediatek MT8173"
+   depends on COMMON_CLK
+   select COMMON_CLK_MEDIATEK
+   default ARCH_MEDIATEK
+   ---help---
+ This driver supports Mediatek MT8173 clocks.
diff --git a/drivers/clk/mediatek/Makefile b/drivers/clk/mediatek/Makefile
index 95fdfac..32e7222 100644
--- a/drivers/clk/mediatek/Makefile
+++ b/drivers/clk/mediatek/Makefile
@@ -1,4 +1,4 @@
-obj-y += clk-mtk.o clk-pll.o clk-gate.o clk-apmixed.o
+obj-$(CONFIG_COMMON_CLK_MEDIATEK) += clk-mtk.o clk-pll.o clk-gate.o 
clk-apmixed.o
 obj-$(CONFIG_RESET_CONTROLLER) += reset.o
-obj-y += clk-mt8135.o
-obj-y += clk-mt8173.o
+obj-$(CONFIG_COMMON_CLK_MT8135) += clk-mt8135.o
+obj-$(CONFIG_COMMON_CLK_MT8173) += clk-mt8173.o
-- 
1.9.1

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Re: [PATCH v4 1/6] clk: hisilicon: add CRG driver for hi3519 soc

[xuejiancheng]

Hi Mike,
   Happy new year to you!
   Thank you for taking time to reply.

On 2015/12/31 8:23, Michael Turquette wrote:
> Hello Jiancheng Xue,
> 
> Quoting Jiancheng Xue (2015-12-29 17:43:47)
>> The CRG(Clock and Reset Generator) block provides clock
>> and reset signals for other modules in hi3519 soc.
>>
>> Signed-off-by: Jiancheng Xue 
>> ---
>>  .../devicetree/bindings/clock/hi3519-crg.txt   |  46 +++
>>  drivers/clk/hisilicon/Kconfig  |   7 +
>>  drivers/clk/hisilicon/Makefile |   2 +
>>  drivers/clk/hisilicon/clk-hi3519.c | 103 ++
>>  drivers/clk/hisilicon/reset.c  | 149 
>> +
>>  drivers/clk/hisilicon/reset.h  |  32 +
>>  include/dt-bindings/clock/hi3519-clock.h   |  43 ++
>>  7 files changed, 382 insertions(+)
>>  create mode 100644 Documentation/devicetree/bindings/clock/hi3519-crg.txt
>>  create mode 100644 drivers/clk/hisilicon/clk-hi3519.c
>>  create mode 100644 drivers/clk/hisilicon/reset.c
>>  create mode 100644 drivers/clk/hisilicon/reset.h
>>  create mode 100644 include/dt-bindings/clock/hi3519-clock.h
> 
> Please keep Philipp Zabel Cc'd for reset-related patches. I've added
> him to Cc.
> 
OK.

>>
>> diff --git a/Documentation/devicetree/bindings/clock/hi3519-crg.txt 
>> b/Documentation/devicetree/bindings/clock/hi3519-crg.txt
>> new file mode 100644
>> index 000..2d23950
>> --- /dev/null
>> +++ b/Documentation/devicetree/bindings/clock/hi3519-crg.txt
>> @@ -0,0 +1,46 @@
>> +* Hisilicon Hi3519 Clock and Reset Generator(CRG)
>> +
>> +The Hi3519 CRG module provides clock and reset signals to various
>> +controllers within the SoC.
>> +
>> +This binding uses the following bindings:
>> +Documentation/devicetree/bindings/clock/clock-bindings.txt
>> +Documentation/devicetree/bindings/reset/reset.txt
>> +
>> +Required Properties:
>> +
>> +- compatible: should be one of the following.
>> +  - "hisilicon,hi3519-crg" - controller compatible with Hi3519 SoC.
>> +
>> +- reg: physical base address of the controller and length of memory mapped
>> +  region.
>> +
>> +- #clock-cells: should be 1.
>> +
>> +Each clock is assigned an identifier and client nodes use this identifier
>> +to specify the clock which they consume.
>> +
>> +All these identifier could be found in .
>> +
>> +- #reset-cells: should be 2.
>> +
>> +A reset signal can be controlled by writing a bit register in the CRG 
>> module.
>> +The reset specifier consists of two cells. The first cell represents the
>> +register offset relative to the base address. The second cell represents the
>> +bit index in the register.
>> +
>> +Example: CRG nodes
>> +CRG: clock-reset-controller@1201 {
>> +   compatible = "hisilicon,hi3519-crg";
>> +reg = <0x1201 0x1>;
>> +#clock-cells = <1>;
>> +#reset-cells = <2>;
>> +};
>> +
>> +Example: consumer nodes
>> +i2c0: i2c@1211 {
>> +   compatible = "hisilicon,hi3519-i2c";
>> +reg = <0x1211 0x1000>;
>> +clocks = < HI3519_I2C0_RST>;*/
>> +resets = < 0xe4 0>;
>> +};
>> diff --git a/drivers/clk/hisilicon/Kconfig b/drivers/clk/hisilicon/Kconfig
>> index e434854..b6baebf 100644
>> --- a/drivers/clk/hisilicon/Kconfig
>> +++ b/drivers/clk/hisilicon/Kconfig
>> @@ -1,3 +1,10 @@
>> +config COMMON_CLK_HI3519
>> +   tristate "Clock Driver for Hi3519"
>> +   depends on ARCH_HISI
>> +   default y
>> +   help
>> + Build the clock driver for hi3519.
>> +
>>  config COMMON_CLK_HI6220
>> bool "Hi6220 Clock Driver"
>> depends on ARCH_HISI || COMPILE_TEST
>> diff --git a/drivers/clk/hisilicon/Makefile b/drivers/clk/hisilicon/Makefile
>> index 74dba31..3f57b09 100644
>> --- a/drivers/clk/hisilicon/Makefile
>> +++ b/drivers/clk/hisilicon/Makefile
>> @@ -4,8 +4,10 @@
>>  
>>  obj-y  += clk.o clkgate-separated.o clkdivider-hi6220.o
>>  
>> +obj-$(CONFIG_RESET_CONTROLLER) += reset.o
>>  obj-$(CONFIG_ARCH_HI3xxx)  += clk-hi3620.o
>>  obj-$(CONFIG_ARCH_HIP04)   += clk-hip04.o
>>  obj-$(CONFIG_ARCH_HIX5HD2) += clk-hix5hd2.o
>>  obj-$(CONFIG_COMMON_CLK_HI6220)+= clk-hi6220.o
>>  obj-$(CONFIG_STUB_CLK_HI6220)  += clk-hi6220-stub.o
>> +obj-$(CONFIG_COMMON_CLK_HI3519)+= clk-hi3519.o
>> diff --git a/drivers/clk/hisilicon/clk-hi3519.c 
>> b/drivers/clk/hisilicon/clk-hi3519.c
>> new file mode 100644
>> index 000..e220234
>> --- /dev/null
>> +++ b/drivers/clk/hisilicon/clk-hi3519.c
>> @@ -0,0 +1,103 @@
>> +/*
>> + * Copyright (c) 2015 HiSilicon Technologies Co., Ltd.
>> + *
>> + * This program is free software; you can redistribute it and/or modify
>> + * it under the terms of the GNU General Public License as published by
>> + * the Free Software Foundation; either version 2 of the License, or
>> + * (at your option) any later version.
>> + *
>> + * This program is distributed in the hope that it will be useful,
>> 

[PATCH v2 2/6] dt-bindings: ARM: Mediatek: Document bindings for MT2701

[James Liao]

This patch adds the binding documentation for apmixedsys, bdpsys,
ethsys, hifsys, imgsys, infracfg, mmsys, pericfg, topckgen and
vdecsys for Mediatek MT2701.

Signed-off-by: James Liao 
---
 .../bindings/arm/mediatek/mediatek,apmixedsys.txt  |  1 +
 .../bindings/arm/mediatek/mediatek,bdpsys.txt  | 22 ++
 .../bindings/arm/mediatek/mediatek,ethsys.txt  | 22 ++
 .../bindings/arm/mediatek/mediatek,hifsys.txt  | 22 ++
 .../bindings/arm/mediatek/mediatek,imgsys.txt  |  1 +
 .../bindings/arm/mediatek/mediatek,infracfg.txt|  1 +
 .../bindings/arm/mediatek/mediatek,mmsys.txt   |  1 +
 .../bindings/arm/mediatek/mediatek,pericfg.txt |  1 +
 .../bindings/arm/mediatek/mediatek,topckgen.txt|  1 +
 .../bindings/arm/mediatek/mediatek,vdecsys.txt |  1 +
 10 files changed, 73 insertions(+)
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
 create mode 100644 
Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt

diff --git 
a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt 
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
index 936166f..a701e19 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,apmixedsys.txt
@@ -6,6 +6,7 @@ The Mediatek apmixedsys controller provides the PLLs to the 
system.
 Required Properties:
 
 - compatible: Should be:
+   - "mediatek,mt2701-apmixedsys"
- "mediatek,mt8135-apmixedsys"
- "mediatek,mt8173-apmixedsys"
 - #clock-cells: Must be 1
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt 
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt
new file mode 100644
index 000..4137196
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,bdpsys.txt
@@ -0,0 +1,22 @@
+Mediatek bdpsys controller
+
+
+The Mediatek bdpsys controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+   - "mediatek,mt2701-bdpsys", "syscon"
+- #clock-cells: Must be 1
+
+The bdpsys controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+bdpsys: clock-controller@1c00 {
+   compatible = "mediatek,mt2701-bdpsys", "syscon";
+   reg = <0 0x1c00 0 0x1000>;
+   #clock-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt 
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
new file mode 100644
index 000..768f3a5
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,ethsys.txt
@@ -0,0 +1,22 @@
+Mediatek ethsys controller
+
+
+The Mediatek ethsys controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+   - "mediatek,mt2701-ethsys", "syscon"
+- #clock-cells: Must be 1
+
+The ethsys controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+ethsys: clock-controller@1b00 {
+   compatible = "mediatek,mt2701-ethsys", "syscon";
+   reg = <0 0x1b00 0 0x1000>;
+   #clock-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt 
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt
new file mode 100644
index 000..b7a39b6
--- /dev/null
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,hifsys.txt
@@ -0,0 +1,22 @@
+Mediatek hifsys controller
+
+
+The Mediatek hifsys controller provides various clocks to the system.
+
+Required Properties:
+
+- compatible: Should be:
+   - "mediatek,mt2701-hifsys", "syscon"
+- #clock-cells: Must be 1
+
+The hifsys controller uses the common clk binding from
+Documentation/devicetree/bindings/clock/clock-bindings.txt
+The available clocks are defined in dt-bindings/clock/mt*-clk.h.
+
+Example:
+
+hifsys: clock-controller@1a00 {
+   compatible = "mediatek,mt2701-hifsys", "syscon";
+   reg = <0 0x1a00 0 0x1000>;
+   #clock-cells = <1>;
+};
diff --git a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt 
b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt
index b1f2ce1..9bda7f7 100644
--- a/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt
+++ b/Documentation/devicetree/bindings/arm/mediatek/mediatek,imgsys.txt
@@ -6,6 +6,7 @@ The Mediatek imgsys controller provides various clocks to the 
system.
 Required Properties:
 
 - compatible: 

[PATCH 10/10] i2c: pca954x: get rid of the i2c deadlock workaround

[Peter Rosin]

From: Peter Rosin 

Signed-off-by: Peter Rosin 
---
 drivers/i2c/muxes/i2c-mux-pca954x.c | 32 ++--
 1 file changed, 10 insertions(+), 22 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca954x.c 
b/drivers/i2c/muxes/i2c-mux-pca954x.c
index bd89da42b417..929ce28bc657 100644
--- a/drivers/i2c/muxes/i2c-mux-pca954x.c
+++ b/drivers/i2c/muxes/i2c-mux-pca954x.c
@@ -119,32 +119,19 @@ static const struct i2c_device_id pca954x_id[] = {
 };
 MODULE_DEVICE_TABLE(i2c, pca954x_id);
 
-/* Write to mux register. Don't use i2c_transfer()/i2c_smbus_xfer()
-   for this as they will try to lock adapter a second time */
 static int pca954x_reg_write(struct i2c_adapter *adap,
 struct i2c_client *client, u8 val)
 {
-   int ret = -ENODEV;
-
-   if (adap->algo->master_xfer) {
-   struct i2c_msg msg;
-   char buf[1];
-
-   msg.addr = client->addr;
-   msg.flags = 0;
-   msg.len = 1;
-   buf[0] = val;
-   msg.buf = buf;
-   ret = __i2c_transfer(adap, , 1);
-   } else {
-   union i2c_smbus_data data;
-   ret = adap->algo->smbus_xfer(adap, client->addr,
-client->flags,
-I2C_SMBUS_WRITE,
-val, I2C_SMBUS_BYTE, );
-   }
+   union i2c_smbus_data data;
 
-   return ret;
+   if (i2c_check_functionality(adap, I2C_FUNC_SMBUS_QUICK))
+   return i2c_smbus_xfer(adap, client->addr, client->flags,
+ I2C_SMBUS_WRITE, val,
+ I2C_SMBUS_QUICK, NULL);
+   else
+   return i2c_smbus_xfer(adap, client->addr, client->flags,
+ I2C_SMBUS_WRITE, val,
+ I2C_SMBUS_BYTE, );
 }
 
 static int pca954x_select_chan(struct i2c_mux_core *muxc, u32 chan)
@@ -227,6 +214,7 @@ static int pca954x_probe(struct i2c_client *client,
return -ENODEV;
}
 
+   muxc->i2c_controlled = true;
muxc->parent = adap;
muxc->select = pca954x_select_chan;
muxc->deselect = pca954x_deselect_mux;
-- 
2.1.4

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[PATCH 09/10] i2c: pca9541: get rid of the i2c deadlock workaround

[Peter Rosin]

From: Peter Rosin 

Signed-off-by: Peter Rosin 
---
 drivers/i2c/muxes/i2c-mux-pca9541.c | 82 +++--
 1 file changed, 15 insertions(+), 67 deletions(-)

diff --git a/drivers/i2c/muxes/i2c-mux-pca9541.c 
b/drivers/i2c/muxes/i2c-mux-pca9541.c
index 9ee0d8b70283..7d2e5dbd8617 100644
--- a/drivers/i2c/muxes/i2c-mux-pca9541.c
+++ b/drivers/i2c/muxes/i2c-mux-pca9541.c
@@ -85,81 +85,28 @@ static const struct i2c_device_id pca9541_id[] = {
 
 MODULE_DEVICE_TABLE(i2c, pca9541_id);
 
-/*
- * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
- * as they will try to lock the adapter a second time.
- */
 static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
 {
-   struct i2c_adapter *adap = client->adapter;
-   int ret;
-
-   if (adap->algo->master_xfer) {
-   struct i2c_msg msg;
-   char buf[2];
-
-   msg.addr = client->addr;
-   msg.flags = 0;
-   msg.len = 2;
-   buf[0] = command;
-   buf[1] = val;
-   msg.buf = buf;
-   ret = __i2c_transfer(adap, , 1);
-   } else {
-   union i2c_smbus_data data;
-
-   data.byte = val;
-   ret = adap->algo->smbus_xfer(adap, client->addr,
-client->flags,
-I2C_SMBUS_WRITE,
-command,
-I2C_SMBUS_BYTE_DATA, );
-   }
+   struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+   union i2c_smbus_data data;
 
-   return ret;
+   data.byte = val;
+   return i2c_smbus_xfer(muxc->parent, client->addr, client->flags,
+ I2C_SMBUS_WRITE, command,
+ I2C_SMBUS_BYTE_DATA, );
 }
 
-/*
- * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
- * as they will try to lock adapter a second time.
- */
 static int pca9541_reg_read(struct i2c_client *client, u8 command)
 {
-   struct i2c_adapter *adap = client->adapter;
+   struct i2c_mux_core *muxc = i2c_get_clientdata(client);
+   union i2c_smbus_data data;
int ret;
-   u8 val;
-
-   if (adap->algo->master_xfer) {
-   struct i2c_msg msg[2] = {
-   {
-   .addr = client->addr,
-   .flags = 0,
-   .len = 1,
-   .buf = 
-   },
-   {
-   .addr = client->addr,
-   .flags = I2C_M_RD,
-   .len = 1,
-   .buf = 
-   }
-   };
-   ret = __i2c_transfer(adap, msg, 2);
-   if (ret == 2)
-   ret = val;
-   else if (ret >= 0)
-   ret = -EIO;
-   } else {
-   union i2c_smbus_data data;
-
-   ret = adap->algo->smbus_xfer(adap, client->addr,
-client->flags,
-I2C_SMBUS_READ,
-command,
-I2C_SMBUS_BYTE_DATA, );
-   if (!ret)
-   ret = data.byte;
-   }
+
+   ret = i2c_smbus_xfer(muxc->parent, client->addr, client->flags,
+I2C_SMBUS_READ, command,
+I2C_SMBUS_BYTE_DATA, );
+   if (!ret)
+   ret = data.byte;
return ret;
 }
 
@@ -347,6 +294,7 @@ static int pca9541_probe(struct i2c_client *client,
i2c_set_clientdata(client, muxc);
 
data->client = client;
+   muxc->i2c_controlled = true;
muxc->parent = adap;
muxc->select = pca9541_select_chan;
muxc->deselect = pca9541_release_chan;
-- 
2.1.4

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[PATCH 07/10] i2c: muxes always lock the parent adapter

[Peter Rosin]

From: Peter Rosin 

Instead of checking for i2c parent adapters for every lock/unlock, simply
override the locking for muxes to always lock/unlock the parent adapter
directly.

Signed-off-by: Peter Rosin 
---
 drivers/i2c/i2c-core.c | 21 +++--
 drivers/i2c/i2c-mux.c  | 27 +++
 2 files changed, 30 insertions(+), 18 deletions(-)

diff --git a/drivers/i2c/i2c-core.c b/drivers/i2c/i2c-core.c
index 34a7748b4652..4683777f81ca 100644
--- a/drivers/i2c/i2c-core.c
+++ b/drivers/i2c/i2c-core.c
@@ -963,12 +963,7 @@ static int i2c_check_addr_busy(struct i2c_adapter 
*adapter, int addr)
  */
 static void i2c_adapter_lock_bus(struct i2c_adapter *adapter, int flags)
 {
-   struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
-
-   if (parent)
-   i2c_lock_adapter(parent);
-   else
-   rt_mutex_lock(>bus_lock);
+   rt_mutex_lock(>bus_lock);
 }
 
 /**
@@ -977,12 +972,7 @@ static void i2c_adapter_lock_bus(struct i2c_adapter 
*adapter, int flags)
  */
 static int i2c_adapter_trylock_bus(struct i2c_adapter *adapter, int flags)
 {
-   struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
-
-   if (parent)
-   return parent->trylock_bus(parent, flags);
-   else
-   return rt_mutex_trylock(>bus_lock);
+   return rt_mutex_trylock(>bus_lock);
 }
 
 /**
@@ -991,12 +981,7 @@ static int i2c_adapter_trylock_bus(struct i2c_adapter 
*adapter, int flags)
  */
 static void i2c_adapter_unlock_bus(struct i2c_adapter *adapter, int flags)
 {
-   struct i2c_adapter *parent = i2c_parent_is_i2c_adapter(adapter);
-
-   if (parent)
-   i2c_unlock_adapter(parent);
-   else
-   rt_mutex_unlock(>bus_lock);
+   rt_mutex_unlock(>bus_lock);
 }
 
 static void i2c_dev_set_name(struct i2c_adapter *adap,
diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index b507a799f222..605333757a5e 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -98,6 +98,30 @@ static unsigned int i2c_mux_parent_classes(struct 
i2c_adapter *parent)
return class;
 }
 
+static void i2c_parent_lock_bus(struct i2c_adapter *adapter, int flags)
+{
+   struct i2c_mux_priv *priv = adapter->algo_data;
+   struct i2c_adapter *parent = priv->muxc->parent;
+
+   parent->lock_bus(parent, flags);
+}
+
+static int i2c_parent_trylock_bus(struct i2c_adapter *adapter, int flags)
+{
+   struct i2c_mux_priv *priv = adapter->algo_data;
+   struct i2c_adapter *parent = priv->muxc->parent;
+
+   return parent->trylock_bus(parent, flags);
+}
+
+static void i2c_parent_unlock_bus(struct i2c_adapter *adapter, int flags)
+{
+   struct i2c_mux_priv *priv = adapter->algo_data;
+   struct i2c_adapter *parent = priv->muxc->parent;
+
+   parent->unlock_bus(parent, flags);
+}
+
 int i2c_mux_reserve_adapters(struct i2c_mux_core *muxc, int adapters)
 {
struct i2c_adapter **adapter;
@@ -188,6 +212,9 @@ int i2c_add_mux_adapter(struct i2c_mux_core *muxc,
priv->adap.retries = parent->retries;
priv->adap.timeout = parent->timeout;
priv->adap.quirks = parent->quirks;
+   priv->adap.lock_bus = i2c_parent_lock_bus;
+   priv->adap.trylock_bus = i2c_parent_trylock_bus;
+   priv->adap.unlock_bus = i2c_parent_unlock_bus;
 
/* Sanity check on class */
if (i2c_mux_parent_classes(parent) & class)
-- 
2.1.4

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Re: [PATCH 10/10] i2c: pca954x: get rid of the i2c deadlock workaround

[Peter Rosin]

On 2016-01-04 16:19, Lars-Peter Clausen wrote:
> On 01/04/2016 04:10 PM, Peter Rosin wrote:
>> From: Peter Rosin 
>>
>> Signed-off-by: Peter Rosin 
> 
> It would be quite good if the commit messaged said why it is now safe to
> remove the workaround.

Right, hmm, the two last patches seemed obvious at the time I wrote them,
but now I see a problem.

E.g. if two pca954x devices that depends on being idle when client devices
are not accessed happen to sit on the same bus (perhaps because the muxes
are used to hide a bunch of identical devices), it is indeed not safe to
make this change.

Thanks for making my think, and consider 9/10 and 10/10 dropped.

Cheers,
Peter
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Re: [PATCH v5 1/5] PCI: designware: ensure ATU is enabled before IO/conf space accesses

[Stanimir Varbanov]

On 12/18/2015 04:41 PM, Pratyush Anand wrote:
> On Fri, Dec 18, 2015 at 6:08 PM, Stanimir Varbanov
>  wrote:
>> There is no guarantees that enabling ATU will hit the hardware
>> immediately, and subsequent accesses to configuration / IO spaces
>> are reliable. So fixing this by read back PCIE_ATU_CR2 register
>> just after writing.
>>
>> Without such a fix the PCI device enumeration during kernel boot
>> is not reliable, and reading configuration space for particular
>> PCI device on the bus returns zero aka no device.
>>
>> Signed-off-by: Stanimir Varbanov 
> 
> Acked-by: Pratyush Anand 

Bjorn, Do you want to resend the whole patchset with collected acks and
tested tags?


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Stan
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[PATCH 00/10] i2c mux cleanup and locking update

[Peter Rosin]

From: Peter Rosin 

Hi!

I have a pair of boards with this i2c topology:

   GPIO ---|  -- BAT1
|  v /
   I2C  -+--B---+ MUX
 |   \
   EEPROM -- BAT2

(B denotes the boundary between the boards)

The problem with this is that the GPIO controller sits on the same i2c bus
that it MUXes. For pca954x devices this is worked around by using unlocked
transfers when updating the MUX. I have no such luck as the GPIO is a general
purpose IO expander and the MUX is just a random bidirectional MUX, unaware
of the fact that it is muxing an i2c bus, and extending unlocked transfers
into the GPIO subsystem is too ugly to even think about. But the general hw
approach is sane in my opinion, with the number of connections between the
two boards minimized. To put is plainly, I need support for it.

So, I observe that while it is needed to have the i2c bus locked during the
actual MUX update in order to avoid random garbage on the slave side, it
is not strictly a must to have it locked over the whole sequence of a full
select-transfer-deselect operation. The MUX itself needs to be locked, so
transfers to clients behind the mux are serialized, and the MUX needs to be
stable during all i2c traffic (otherwise individual mux slave segments
might see garbage).

This series accomplishes this by adding a dt property to i2c-mux-gpio and
i2c-mux-pinctrl that can be used to state that the mux is updated by means
of the muxed master bus, and that the select-transfer-deselect operations
should be locked individually. When this holds, the i2c bus *is* locked
during muxing, since the muxing happens as part of i2c transfers. This
is true even if the MUX is updated with several transfers to the GPIO (at
least as long as *all* MUX changes are using the i2s master bus). A lock
is added to the mux so that transfers through the mux are serialized.

Concerns:
- The locking is perhaps too complex?
- I worry about the priority inheritance aspect of the adapter lock. When
  the transfers behind the mux are divided into select-transfer-deselect all
  locked individually, low priority transfers get more chances to interfere
  with high priority transfers.
- When doing an i2c_transfer() in_atomic() context of with irqs_disabled(),
  there is a higher possibility that the mux is not returned to its idle
  state after a failed (-EAGAIN) transfer due to trylock.

To summarize the series, there's some i2c-mux infrastructure cleanup work
first (I think that part stands by itself as desireable regardless), the
locking changes are in the second half of the series, with the real meat
in 8/10. The tail of the series cleans up the open-coded unlocked i2c-
transfers in the pca9541 and pca954x drivers.

Further work: Looking at i2c_adapter_lock users in drivers/, it seems that
at least some of them are there just so that the driver can work behind an
i2c controlled mux (e.g. media/dvb-frontends/rtl2830.c). Those kind of
kludges can be removed. Other users lump several transfers together to
prevent mishaps, and at least some of those could probably be converted to
lock the i2c segment instead of the master bus adapter, so that the driver
doesn't deadlock even if the device sits behind an i2c controlled mux.

PS. needs a bunch of testing, I do not have access to all the involved hw

Cheers,
Peter

Peter Rosin (10):
  i2c-mux: add common core data for every mux instance
  i2c-mux: move select and deselect ops to i2c_mux_core
  i2c-mux: move the slave side adapter management to i2c_mux_core
  i2c-mux: remove the mux dev pointer from the mux per channel data
  i2c-mux: pinctrl: get rid of the driver private struct device pointer
  i2c: allow adapter drivers to override the adapter locking
  i2c: muxes always lock the parent adapter
  i2c-mux: relax locking of the top i2c adapter during i2c controlled
muxing
  i2c: pca9541: get rid of the i2c deadlock workaround
  i2c: pca954x: get rid of the i2c deadlock workaround

 .../devicetree/bindings/i2c/i2c-mux-gpio.txt   |   2 +
 .../devicetree/bindings/i2c/i2c-mux-pinctrl.txt|   4 +
 drivers/i2c/i2c-core.c |  59 ++---
 drivers/i2c/i2c-mux.c  | 279 +
 drivers/i2c/muxes/i2c-arb-gpio-challenge.c |  46 ++--
 drivers/i2c/muxes/i2c-mux-gpio.c   |  58 ++---
 drivers/i2c/muxes/i2c-mux-pca9541.c| 141 ---
 drivers/i2c/muxes/i2c-mux-pca954x.c| 104 
 drivers/i2c/muxes/i2c-mux-pinctrl.c|  85 +++
 drivers/i2c/muxes/i2c-mux-reg.c|  63 ++---
 include/linux/i2c-mux-gpio.h   |   2 +
 include/linux/i2c-mux-pinctrl.h|   2 +
 include/linux/i2c-mux.h|  39 ++-
 include/linux/i2c.h|  28 ++-
 14 files changed, 

Re: [PATCH] ASoC: cs35l32: avoid uninitialized variable access

[Russell King - ARM Linux]

On Mon, Jan 04, 2016 at 04:17:47PM +0100, Arnd Bergmann wrote:
> On Saturday 02 January 2016 14:17:46 Mark Brown wrote:
> > On Sat, Jan 02, 2016 at 12:19:52AM +0100, Arnd Bergmann wrote:
> > 
> > > - if (i2c_client->dev.of_node) {
> > > + if (IS_ENABLED(CONFIG_OF) && i2c_client->dev.of_node) {
> > 
> > This would be a lot nicer if there was an __always_null annotation we
> > could put on of_node for !OF configurations, that'd Just Work and this
> > can't be the only case where we have this idiom.
> > 
> 
> How about an inline helper like
> 
> static inline struct device_node *dev_of_node(struct device *dev)
> {
>   if (IS_ENABLED(CONFIG_OF))
>   return dev->of_node;

ITYM:

return IS_ENABLED(CONFIG_OF) ? dev->of_node : NULL;

or

if (IS_ENABLED(CONFIG_OF))
return dev->of_node;
else
return NULL;

> }
> 
>   Arnd
> 
> ___
> linux-arm-kernel mailing list
> linux-arm-ker...@lists.infradead.org
> http://lists.infradead.org/mailman/listinfo/linux-arm-kernel

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Re: [PATCH 02/10] i2c-mux: move select and deselect ops to i2c_mux_core

[kbuild test robot]

Hi Peter,

[auto build test ERROR on wsa/i2c/for-next]
[also build test ERROR on v4.4-rc8 next-20160104]
[if your patch is applied to the wrong git tree, please drop us a note to help 
improving the system]

url:
https://github.com/0day-ci/linux/commits/Peter-Rosin/i2c-mux-cleanup-and-locking-update/20160104-231355
base:   https://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux i2c/for-next
config: i386-randconfig-i0-01042049 (attached as .config)
reproduce:
# save the attached .config to linux build tree
make ARCH=i386 

All error/warnings (new ones prefixed by >>):

   drivers/iio/imu/inv_mpu6050/inv_mpu_core.c: In function 'inv_mpu_probe':
   drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:845:40: warning: passing argument 
1 of 'i2c_add_mux_adapter' from incompatible pointer type 
[-Wincompatible-pointer-types]
 st->mux_adapter = i2c_add_mux_adapter(client->adapter,
   ^
   In file included from drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:26:0:
   include/linux/i2c-mux.h:53:21: note: expected 'struct i2c_mux_core *' but 
argument is of type 'struct i2c_adapter *'
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^
>> drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:847:12: warning: passing argument 
>> 3 of 'i2c_add_mux_adapter' makes integer from pointer without a cast 
>> [-Wint-conversion]
   indio_dev,
   ^
   In file included from drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:26:0:
   include/linux/i2c-mux.h:53:21: note: expected 'u32 {aka unsigned int}' but 
argument is of type 'struct iio_dev *'
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^
>> drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:845:20: error: too many arguments 
>> to function 'i2c_add_mux_adapter'
 st->mux_adapter = i2c_add_mux_adapter(client->adapter,
   ^
   In file included from drivers/iio/imu/inv_mpu6050/inv_mpu_core.c:26:0:
   include/linux/i2c-mux.h:53:21: note: declared here
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^
--
   drivers/of/unittest.c: In function 'unittest_i2c_mux_probe':
   drivers/of/unittest.c:1730:38: warning: passing argument 1 of 
'i2c_add_mux_adapter' from incompatible pointer type 
[-Wincompatible-pointer-types]
  stm->adap[i] = i2c_add_mux_adapter(adap, dev, client,
 ^
   In file included from drivers/of/unittest.c:24:0:
   include/linux/i2c-mux.h:53:21: note: expected 'struct i2c_mux_core *' but 
argument is of type 'struct i2c_adapter *'
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^
>> drivers/of/unittest.c:1730:49: warning: passing argument 3 of 
>> 'i2c_add_mux_adapter' makes integer from pointer without a cast 
>> [-Wint-conversion]
  stm->adap[i] = i2c_add_mux_adapter(adap, dev, client,
^
   In file included from drivers/of/unittest.c:24:0:
   include/linux/i2c-mux.h:53:21: note: expected 'u32 {aka unsigned int}' but 
argument is of type 'struct i2c_client *'
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^
>> drivers/of/unittest.c:1730:18: error: too many arguments to function 
>> 'i2c_add_mux_adapter'
  stm->adap[i] = i2c_add_mux_adapter(adap, dev, client,
 ^
   In file included from drivers/of/unittest.c:24:0:
   include/linux/i2c-mux.h:53:21: note: declared here
struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
^

vim +/i2c_add_mux_adapter +845 drivers/iio/imu/inv_mpu6050/inv_mpu_core.c

09a642b7 Ge Gao  2013-02-02  839result = 
iio_device_register(indio_dev);
09a642b7 Ge Gao  2013-02-02  840if (result) {
09a642b7 Ge Gao  2013-02-02  841
dev_err(>client->dev, "IIO register fail %d\n", result);
09a642b7 Ge Gao  2013-02-02  842goto out_remove_trigger;
09a642b7 Ge Gao  2013-02-02  843}
09a642b7 Ge Gao  2013-02-02  844  
3a2ecc3d Srinivas Pandruvada 2014-12-05 @845st->mux_adapter = 
i2c_add_mux_adapter(client->adapter,
3a2ecc3d Srinivas Pandruvada 2014-12-05  846
  >dev,
3a2ecc3d Srinivas Pandruvada 2014-12-05 @847
  indio_dev,
3a2ecc3d Srinivas Pandruvada 2014-12-05  848
  0, 0, 0,
3a2ecc3d Srinivas Pandruvada 2014-12-05  849
  inv_mpu6050_select_bypass,
3a2ecc3d Srinivas Pandruvada 2014-12-05  850
  inv_mpu6050_deselect_bypass);

:: The code at line 845 was first intr

[PATCH 02/10] i2c-mux: move select and deselect ops to i2c_mux_core

[Peter Rosin]

From: Peter Rosin 

The mux select and deselect ops are common to the mux most of the time,
so store the ops in the mux core.

Change the select and deselect op to work in terms of the mux core instead
of the child adapter. No driver uses the child adapter anyway, and if it
is needed in a future mux driver it can be worked out from the channel id.

i2c-arb-gpio-challenge is special in that it needs the mux device pointer
in the select op, so store that device pointer in the mux core as well.
This pointer is going to get further use in later commits.

i2c-mux-pca954x is special since it does not add its deselect op to all
its child adapters, handle this by adding a mask that makes the deselect
op a no-operation for child adapters not wishing to deselect the mux.

Signed-off-by: Peter Rosin 
---
 drivers/i2c/i2c-mux.c  | 31 ++
 drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 18 -
 drivers/i2c/muxes/i2c-mux-gpio.c   | 19 +-
 drivers/i2c/muxes/i2c-mux-pca9541.c| 18 +
 drivers/i2c/muxes/i2c-mux-pca954x.c| 30 +
 drivers/i2c/muxes/i2c-mux-pinctrl.c| 20 ---
 drivers/i2c/muxes/i2c-mux-reg.c| 21 +---
 include/linux/i2c-mux.h| 15 ---
 8 files changed, 81 insertions(+), 91 deletions(-)

diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index 99fd9106abc6..00ffbdba2cf8 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -32,13 +32,8 @@ struct i2c_mux_priv {
struct i2c_adapter adap;
struct i2c_algorithm algo;
struct i2c_mux_core *muxc;
-
struct device *mux_dev;
-   void *mux_priv;
u32 chan_id;
-
-   int (*select)(struct i2c_adapter *, void *mux_priv, u32 chan_id);
-   int (*deselect)(struct i2c_adapter *, void *mux_priv, u32 chan_id);
 };
 
 static int i2c_mux_master_xfer(struct i2c_adapter *adap,
@@ -51,11 +46,11 @@ static int i2c_mux_master_xfer(struct i2c_adapter *adap,
 
/* Switch to the right mux port and perform the transfer. */
 
-   ret = priv->select(parent, priv->mux_priv, priv->chan_id);
+   ret = muxc->select(muxc, priv->chan_id);
if (ret >= 0)
ret = __i2c_transfer(parent, msgs, num);
-   if (priv->deselect)
-   priv->deselect(parent, priv->mux_priv, priv->chan_id);
+   if (muxc->deselect)
+   muxc->deselect(muxc, priv->chan_id);
 
return ret;
 }
@@ -72,12 +67,12 @@ static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,
 
/* Select the right mux port and perform the transfer. */
 
-   ret = priv->select(parent, priv->mux_priv, priv->chan_id);
+   ret = muxc->select(muxc, priv->chan_id);
if (ret >= 0)
ret = parent->algo->smbus_xfer(parent, addr, flags,
read_write, command, size, data);
-   if (priv->deselect)
-   priv->deselect(parent, priv->mux_priv, priv->chan_id);
+   if (muxc->deselect)
+   muxc->deselect(muxc, priv->chan_id);
 
return ret;
 }
@@ -116,6 +111,7 @@ struct i2c_mux_core *i2c_mux_alloc(struct device *dev, int 
sizeof_priv)
if (!muxc->priv)
goto fail;
}
+   muxc->dev = dev;
return muxc;
 
 fail:
@@ -125,13 +121,9 @@ fail:
 EXPORT_SYMBOL_GPL(i2c_mux_alloc);
 
 struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
-   struct device *mux_dev,
-   void *mux_priv, u32 force_nr, u32 chan_id,
-   unsigned int class,
-   int (*select) (struct i2c_adapter *,
-  void *, u32),
-   int (*deselect) (struct i2c_adapter *,
-void *, u32))
+   struct device *mux_dev,
+   u32 force_nr, u32 chan_id,
+   unsigned int class)
 {
struct i2c_adapter *parent = muxc->parent;
struct i2c_mux_priv *priv;
@@ -145,10 +137,7 @@ struct i2c_adapter *i2c_add_mux_adapter(struct 
i2c_mux_core *muxc,
/* Set up private adapter data */
priv->muxc = muxc;
priv->mux_dev = mux_dev;
-   priv->mux_priv = mux_priv;
priv->chan_id = chan_id;
-   priv->select = select;
-   priv->deselect = deselect;
 
/* Need to do algo dynamically because we don't know ahead
 * of time what sort of physical adapter we'll be dealing with.
diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c 
b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
index dd616c0280ad..1c4741cf290f 100644
--- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
+++ 

Re: [PATCH 10/10] i2c: pca954x: get rid of the i2c deadlock workaround

[Lars-Peter Clausen]

On 01/04/2016 04:10 PM, Peter Rosin wrote:
> From: Peter Rosin 
> 
> Signed-off-by: Peter Rosin 

It would be quite good if the commit messaged said why it is now safe to
remove the workaround.

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Re: [PATCH] ASoC: cs35l32: avoid uninitialized variable access

[Mark Brown]

On Mon, Jan 04, 2016 at 04:17:47PM +0100, Arnd Bergmann wrote:
> On Saturday 02 January 2016 14:17:46 Mark Brown wrote:

> > This would be a lot nicer if there was an __always_null annotation we
> > could put on of_node for !OF configurations, that'd Just Work and this
> > can't be the only case where we have this idiom.

> How about an inline helper like

> static inline struct device_node *dev_of_node(struct device *dev)
> {
>   if (IS_ENABLED(CONFIG_OF))
>   return dev->of_node;
> }

Yeah, that'd work as well (with the correction Russell mentioned) - it's
a bit more typing but we already do similar things for the ID tables and
it looks nicer than the IS_ENABLED() in code does.


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Re: [PATCH v1 3/3] ARM64 LPC: update binding doc

[Rongrong Zou]

在 2016/1/4 19:13, Arnd Bergmann 写道:

On Sunday 03 January 2016 20:24:14 Rongrong Zou wrote:

在 2015/12/31 23:00, Rongrong Zou 写道:

2015-12-31 22:40 GMT+08:00 Arnd Bergmann >:
  > On Thursday 31 December 2015 22:12:19 Rongrong Zou wrote:
  > > 在 2015/12/30 17:06, Arnd Bergmann 写道:
  > > > On Tuesday 29 December 2015 21:33:52 Rongrong Zou wrote:
  >
  > The DT sample above looks good in principle. I believe what you are missing
  > here is code in your driver to scan the child nodes to create the platform
  > devices. of_bus_isa_translate() should work with your definition here
  > and create the correct IORESOURCE_IO resources. You don't have any MMIO
  > resources, so the absence of a ranges property is ok. Maybe all you
  > are missing is a call to of_platform_populate() or of_platform_bus_probe()?
  >

You are right. thanks, i'll try on test board .  if i get the correct result , 
the new patch
will be sent later. By the way, it's my another email account use when i at 
home.


I tried, and there need some additional changes.

isa@a01b {

/*the node name should start with "isa", because of below definition
* static int of_bus_isa_match(struct device_node *np)
* {
*   return !strcmp(np->name, "isa");
* }


Looks good. It would be nicer to match on device_type than on name,
but this is ancient code and it's probably best not to touch it
so we don't accidentally break some old SPARC or PPC system.


*/
compatible = "low-pin-count";
device_type = "isa";
#address-cells = <2>;
#size-cells = <1>;
reg = <0x0 0xa01b 0x0 0x1>;
ranges = <0x1 0x0 0x0 0x0 0x1000>;
/*
*  ranges is required, then i can get the IORESOURCE_IO <0xe4,4> from "reg = <0x1, 
0x00e4, 4>".
*
*/
ipmi_0:ipmi@00e4{
device_type = "ipmi";
compatible = "ipmi-bt";
reg = <0x1 0x00e4 0x4>;
};



This looks wrong: the property above says that the I/O port range is
translated to MMIO address 0x to 0x0001, which is not
true on your hardware. I think this needs to be changed in the code
so the ranges property is not required for I/O ports.


Ranges property can set empty, but this means 1:1 translation. the I/O 
port range is translated to MMIO address 0x0001  to 
0x0001 0004, it looks wrong else. I wonder if anyone get legacy 
I/O port resource from dts.


For ipmi driver, I can get I/O port resource by DMI rather than dts.




drivers\of\address.c
static int __of_address_to_resource(struct device_node *dev,
  const __be32 *addrp, u64 size, unsigned int flags,
  const char *name, struct resource *r)
{
  u64 taddr;

  if ((flags & (IORESOURCE_IO | IORESOURCE_MEM)) == 0)
  return -EINVAL;
  taddr = of_translate_address(dev, addrp);
  if (taddr == OF_BAD_ADDR)
  return -EINVAL;
  memset(r, 0, sizeof(struct resource));
  if (flags & IORESOURCE_IO) {
  unsigned long port;

/*/
/*legacy port(< 0x1000) is reserved, and need no translation here*/
/*/
  if(taddr + size < PCIBIOS_MIN_IO){
  r->start = taddr;
  r->end = taddr + size - 1;
  }


I don't like having a special case based on the address here,
the same kind of hack might be needed for PCI I/O spaces in
hardware that uses an indirect method like your LPC bus
does, and the code above will not work on any LPC implementation
that correctly multiplexes its I/O ports with the first PCI domain.

I think it would be better to avoid translating the port into
a physical address to start with just to translate it back into
a port number, what we need instead is the offset between the
bus specific port number and the linux port number. I've added
Liviu to Cc, he wrote this code originally and may have some idea
of how we could do that.

Arnd


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[PATCH 01/10] i2c-mux: add common core data for every mux instance

[Peter Rosin]

From: Peter Rosin 

The initial core mux structure starts off small with only the parent
adapter pointer, which all muxes have, and a priv pointer for mux
driver private data.

Add i2c_mux_alloc function to unify the creation of a mux.

Where appropriate, pass around the mux core structure instead of the
parent adapter or the driver private data.

Remove the parent adapter pointer from the driver private data for all
mux drivers.

Signed-off-by: Peter Rosin 
---
 drivers/i2c/i2c-mux.c  | 35 -
 drivers/i2c/muxes/i2c-arb-gpio-challenge.c | 24 +++-
 drivers/i2c/muxes/i2c-mux-gpio.c   | 20 +
 drivers/i2c/muxes/i2c-mux-pca9541.c| 36 --
 drivers/i2c/muxes/i2c-mux-pca954x.c| 22 +-
 drivers/i2c/muxes/i2c-mux-pinctrl.c| 24 +++-
 drivers/i2c/muxes/i2c-mux-reg.c| 25 -
 include/linux/i2c-mux.h| 14 +++-
 8 files changed, 129 insertions(+), 71 deletions(-)

diff --git a/drivers/i2c/i2c-mux.c b/drivers/i2c/i2c-mux.c
index 00fc5b1c7b66..99fd9106abc6 100644
--- a/drivers/i2c/i2c-mux.c
+++ b/drivers/i2c/i2c-mux.c
@@ -31,8 +31,8 @@
 struct i2c_mux_priv {
struct i2c_adapter adap;
struct i2c_algorithm algo;
+   struct i2c_mux_core *muxc;
 
-   struct i2c_adapter *parent;
struct device *mux_dev;
void *mux_priv;
u32 chan_id;
@@ -45,7 +45,8 @@ static int i2c_mux_master_xfer(struct i2c_adapter *adap,
   struct i2c_msg msgs[], int num)
 {
struct i2c_mux_priv *priv = adap->algo_data;
-   struct i2c_adapter *parent = priv->parent;
+   struct i2c_mux_core *muxc = priv->muxc;
+   struct i2c_adapter *parent = muxc->parent;
int ret;
 
/* Switch to the right mux port and perform the transfer. */
@@ -65,7 +66,8 @@ static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,
  int size, union i2c_smbus_data *data)
 {
struct i2c_mux_priv *priv = adap->algo_data;
-   struct i2c_adapter *parent = priv->parent;
+   struct i2c_mux_core *muxc = priv->muxc;
+   struct i2c_adapter *parent = muxc->parent;
int ret;
 
/* Select the right mux port and perform the transfer. */
@@ -84,7 +86,7 @@ static int i2c_mux_smbus_xfer(struct i2c_adapter *adap,
 static u32 i2c_mux_functionality(struct i2c_adapter *adap)
 {
struct i2c_mux_priv *priv = adap->algo_data;
-   struct i2c_adapter *parent = priv->parent;
+   struct i2c_adapter *parent = priv->muxc->parent;
 
return parent->algo->functionality(parent);
 }
@@ -102,7 +104,27 @@ static unsigned int i2c_mux_parent_classes(struct 
i2c_adapter *parent)
return class;
 }
 
-struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter *parent,
+struct i2c_mux_core *i2c_mux_alloc(struct device *dev, int sizeof_priv)
+{
+   struct i2c_mux_core *muxc;
+
+   muxc = devm_kzalloc(dev, sizeof(*muxc), GFP_KERNEL);
+   if (!muxc)
+   return NULL;
+   if (sizeof_priv) {
+   muxc->priv = devm_kzalloc(dev, sizeof_priv, GFP_KERNEL);
+   if (!muxc->priv)
+   goto fail;
+   }
+   return muxc;
+
+fail:
+   devm_kfree(dev, muxc);
+   return NULL;
+}
+EXPORT_SYMBOL_GPL(i2c_mux_alloc);
+
+struct i2c_adapter *i2c_add_mux_adapter(struct i2c_mux_core *muxc,
struct device *mux_dev,
void *mux_priv, u32 force_nr, u32 chan_id,
unsigned int class,
@@ -111,6 +133,7 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter 
*parent,
int (*deselect) (struct i2c_adapter *,
 void *, u32))
 {
+   struct i2c_adapter *parent = muxc->parent;
struct i2c_mux_priv *priv;
char symlink_name[20];
int ret;
@@ -120,7 +143,7 @@ struct i2c_adapter *i2c_add_mux_adapter(struct i2c_adapter 
*parent,
return NULL;
 
/* Set up private adapter data */
-   priv->parent = parent;
+   priv->muxc = muxc;
priv->mux_dev = mux_dev;
priv->mux_priv = mux_priv;
priv->chan_id = chan_id;
diff --git a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c 
b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
index 402e3a6c671a..dd616c0280ad 100644
--- a/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
+++ b/drivers/i2c/muxes/i2c-arb-gpio-challenge.c
@@ -42,7 +42,6 @@
  */
 
 struct i2c_arbitrator_data {
-   struct i2c_adapter *parent;
struct i2c_adapter *child;
int our_gpio;
int our_gpio_release;
@@ -119,6 +118,7 @@ static int i2c_arbitrator_probe(struct platform_device 
*pdev)
struct device *dev = >dev;
struct device_node *np = dev->of_node;
struct