Re: [PATCH 11/25] drm/msm/dpu: use dpu_sw_pipe for dpu_hw_sspp callbacks

[Abhinav Kumar]

On 2/9/2022 9:25 AM, Dmitry Baryshkov wrote:

Where feasible, use dpu_sw_pipe rather than a combo of dpu_hw_pipe and
multirect_index/_mode arguments.

Signed-off-by: Dmitry Baryshkov 

Reviewed-by: Abhinav Kumar 

---
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 59 ++--
  drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 46 ++-
  drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c   | 62 +
  drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h   |  9 ++-
  4 files changed, 77 insertions(+), 99 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 8714ee767346..d8120168f974 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -168,17 +168,16 @@ static int _sspp_subblk_offset(struct dpu_hw_pipe *ctx,
return rc;
  }
  
-static void dpu_hw_sspp_setup_multirect(struct dpu_hw_pipe *ctx,

-   enum dpu_sspp_multirect_index index,
-   enum dpu_sspp_multirect_mode mode)
+static void dpu_hw_sspp_setup_multirect(struct dpu_sw_pipe *pipe)
  {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
u32 mode_mask;
u32 idx;
  
  	if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, ))

return;
  
-	if (index == DPU_SSPP_RECT_SOLO) {

+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {
/**
 * if rect index is RECT_SOLO, we cannot expect a
 * virtual plane sharing the same SSPP id. So we go
@@ -187,8 +186,8 @@ static void dpu_hw_sspp_setup_multirect(struct dpu_hw_pipe 
*ctx,
mode_mask = 0;
} else {
mode_mask = DPU_REG_READ(>hw, SSPP_MULTIRECT_OPMODE + idx);
-   mode_mask |= index;
-   if (mode == DPU_SSPP_MULTIRECT_TIME_MX)
+   mode_mask |= pipe->multirect_index;
+   if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_TIME_MX)
mode_mask |= BIT(2);
else
mode_mask &= ~BIT(2);
@@ -239,10 +238,10 @@ static void _sspp_setup_csc10_opmode(struct dpu_hw_pipe 
*ctx,
  /*
   * Setup source pixel format, flip,
   */
-static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx,
-   const struct dpu_format *fmt, u32 flags,
-   enum dpu_sspp_multirect_index rect_mode)
+static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,
+   const struct dpu_format *fmt, u32 flags)
  {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
struct dpu_hw_blk_reg_map *c;
u32 chroma_samp, unpack, src_format;
u32 opmode = 0;
@@ -253,7 +252,8 @@ static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe 
*ctx,
if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, ) || !fmt)
return;
  
-	if (rect_mode == DPU_SSPP_RECT_SOLO || rect_mode == DPU_SSPP_RECT_0) {

+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||
+   pipe->multirect_index == DPU_SSPP_RECT_0) {
op_mode_off = SSPP_SRC_OP_MODE;
unpack_pat_off = SSPP_SRC_UNPACK_PATTERN;
format_off = SSPP_SRC_FORMAT;
@@ -443,10 +443,10 @@ static u32 _dpu_hw_sspp_get_scaler3_ver(struct 
dpu_hw_pipe *ctx)
  /*
   * dpu_hw_sspp_setup_rects()
   */
-static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
-   struct dpu_hw_pipe_cfg *cfg,
-   enum dpu_sspp_multirect_index rect_index)
+static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe,
+   struct dpu_hw_pipe_cfg *cfg)
  {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
struct dpu_hw_blk_reg_map *c;
u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1;
u32 src_size_off, src_xy_off, out_size_off, out_xy_off;
@@ -457,7 +457,8 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
  
  	c = >hw;
  
-	if (rect_index == DPU_SSPP_RECT_SOLO || rect_index == DPU_SSPP_RECT_0) {

+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||
+   pipe->multirect_index == DPU_SSPP_RECT_0) {
src_size_off = SSPP_SRC_SIZE;
src_xy_off = SSPP_SRC_XY;
out_size_off = SSPP_OUT_SIZE;
@@ -478,7 +479,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
dst_size = (drm_rect_height(>dst_rect) << 16) |
drm_rect_width(>dst_rect);
  
-	if (rect_index == DPU_SSPP_RECT_SOLO) {

+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {
ystride0 = (cfg->layout.plane_pitch[0]) |
(cfg->layout.plane_pitch[1] << 16);
ystride1 = (cfg->layout.plane_pitch[2]) |
@@ -487,7 +488,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
ystride0 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE0 + idx);
ystride1 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE1 + idx);
  
-		if (rect_index == DPU_SSPP_RECT_0) {

+   if 

[PATCH 11/25] drm/msm/dpu: use dpu_sw_pipe for dpu_hw_sspp callbacks

[Dmitry Baryshkov]

Where feasible, use dpu_sw_pipe rather than a combo of dpu_hw_pipe and
multirect_index/_mode arguments.

Signed-off-by: Dmitry Baryshkov 
---
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c | 59 ++--
 drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.h | 46 ++-
 drivers/gpu/drm/msm/disp/dpu1/dpu_plane.c   | 62 +
 drivers/gpu/drm/msm/disp/dpu1/dpu_trace.h   |  9 ++-
 4 files changed, 77 insertions(+), 99 deletions(-)

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c 
b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
index 8714ee767346..d8120168f974 100644
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_hw_sspp.c
@@ -168,17 +168,16 @@ static int _sspp_subblk_offset(struct dpu_hw_pipe *ctx,
return rc;
 }
 
-static void dpu_hw_sspp_setup_multirect(struct dpu_hw_pipe *ctx,
-   enum dpu_sspp_multirect_index index,
-   enum dpu_sspp_multirect_mode mode)
+static void dpu_hw_sspp_setup_multirect(struct dpu_sw_pipe *pipe)
 {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
u32 mode_mask;
u32 idx;
 
if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, ))
return;
 
-   if (index == DPU_SSPP_RECT_SOLO) {
+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {
/**
 * if rect index is RECT_SOLO, we cannot expect a
 * virtual plane sharing the same SSPP id. So we go
@@ -187,8 +186,8 @@ static void dpu_hw_sspp_setup_multirect(struct dpu_hw_pipe 
*ctx,
mode_mask = 0;
} else {
mode_mask = DPU_REG_READ(>hw, SSPP_MULTIRECT_OPMODE + idx);
-   mode_mask |= index;
-   if (mode == DPU_SSPP_MULTIRECT_TIME_MX)
+   mode_mask |= pipe->multirect_index;
+   if (pipe->multirect_mode == DPU_SSPP_MULTIRECT_TIME_MX)
mode_mask |= BIT(2);
else
mode_mask &= ~BIT(2);
@@ -239,10 +238,10 @@ static void _sspp_setup_csc10_opmode(struct dpu_hw_pipe 
*ctx,
 /*
  * Setup source pixel format, flip,
  */
-static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe *ctx,
-   const struct dpu_format *fmt, u32 flags,
-   enum dpu_sspp_multirect_index rect_mode)
+static void dpu_hw_sspp_setup_format(struct dpu_sw_pipe *pipe,
+   const struct dpu_format *fmt, u32 flags)
 {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
struct dpu_hw_blk_reg_map *c;
u32 chroma_samp, unpack, src_format;
u32 opmode = 0;
@@ -253,7 +252,8 @@ static void dpu_hw_sspp_setup_format(struct dpu_hw_pipe 
*ctx,
if (_sspp_subblk_offset(ctx, DPU_SSPP_SRC, ) || !fmt)
return;
 
-   if (rect_mode == DPU_SSPP_RECT_SOLO || rect_mode == DPU_SSPP_RECT_0) {
+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||
+   pipe->multirect_index == DPU_SSPP_RECT_0) {
op_mode_off = SSPP_SRC_OP_MODE;
unpack_pat_off = SSPP_SRC_UNPACK_PATTERN;
format_off = SSPP_SRC_FORMAT;
@@ -443,10 +443,10 @@ static u32 _dpu_hw_sspp_get_scaler3_ver(struct 
dpu_hw_pipe *ctx)
 /*
  * dpu_hw_sspp_setup_rects()
  */
-static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
-   struct dpu_hw_pipe_cfg *cfg,
-   enum dpu_sspp_multirect_index rect_index)
+static void dpu_hw_sspp_setup_rects(struct dpu_sw_pipe *pipe,
+   struct dpu_hw_pipe_cfg *cfg)
 {
+   struct dpu_hw_pipe *ctx = pipe->sspp;
struct dpu_hw_blk_reg_map *c;
u32 src_size, src_xy, dst_size, dst_xy, ystride0, ystride1;
u32 src_size_off, src_xy_off, out_size_off, out_xy_off;
@@ -457,7 +457,8 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
 
c = >hw;
 
-   if (rect_index == DPU_SSPP_RECT_SOLO || rect_index == DPU_SSPP_RECT_0) {
+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO ||
+   pipe->multirect_index == DPU_SSPP_RECT_0) {
src_size_off = SSPP_SRC_SIZE;
src_xy_off = SSPP_SRC_XY;
out_size_off = SSPP_OUT_SIZE;
@@ -478,7 +479,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
dst_size = (drm_rect_height(>dst_rect) << 16) |
drm_rect_width(>dst_rect);
 
-   if (rect_index == DPU_SSPP_RECT_SOLO) {
+   if (pipe->multirect_index == DPU_SSPP_RECT_SOLO) {
ystride0 = (cfg->layout.plane_pitch[0]) |
(cfg->layout.plane_pitch[1] << 16);
ystride1 = (cfg->layout.plane_pitch[2]) |
@@ -487,7 +488,7 @@ static void dpu_hw_sspp_setup_rects(struct dpu_hw_pipe *ctx,
ystride0 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE0 + idx);
ystride1 = DPU_REG_READ(c, SSPP_SRC_YSTRIDE1 + idx);
 
-   if (rect_index == DPU_SSPP_RECT_0) {
+   if (pipe->multirect_index == DPU_SSPP_RECT_0) {
ystride0 =