[PATCH] radeon/kms: fix powerpc/rn50 untiled behaviour.

2010-06-10 Thread Dave Airlie 
From: Dave Airlie airl...@redhat.com

Installing 2.6.34 on a Power5/rn50 combo machine, X showed buggy sw rendering,
enabling tiling in the DDX fixed it. Investigation showed that a further /16
was needed in the untiled case on this chipset. Need further investigations
on what other chips this could affect, possibly rv100-rv280.

Signed-off-by: Dave Airlie airl...@redhat.com
---
 drivers/gpu/drm/radeon/r100.c |   20 ++--
 1 files changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index cf89aa2..1930db6 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -2604,12 +2604,6 @@ int r100_set_surface_reg(struct radeon_device *rdev, int 
reg,
int surf_index = reg * 16;
int flags = 0;
 
-   /* r100/r200 divide by 16 */
-   if (rdev-family  CHIP_R300)
-   flags = pitch / 16;
-   else
-   flags = pitch / 8;
-
if (rdev-family = CHIP_RS200) {
if ((tiling_flags  (RADEON_TILING_MACRO|RADEON_TILING_MICRO))
 == (RADEON_TILING_MACRO|RADEON_TILING_MICRO))
@@ -2633,6 +2627,20 @@ int r100_set_surface_reg(struct radeon_device *rdev, int 
reg,
if (tiling_flags  RADEON_TILING_SWAP_32BIT)
flags |= RADEON_SURF_AP0_SWP_32BPP | RADEON_SURF_AP1_SWP_32BPP;
 
+   /* when we aren't tiling the pitch seems to needs to be furtherdivided 
down. - tested on power5 + rn50 server */
+   if (tiling_flags  (RADEON_TILING_SWAP_16BIT | 
RADEON_TILING_SWAP_32BIT)) {
+   if (!(tiling_flags  (RADEON_TILING_MACRO | 
RADEON_TILING_MICRO)))
+   if (ASIC_IS_RN50(rdev))
+   pitch /= 16;
+   }
+
+   /* r100/r200 divide by 16 */
+   if (rdev-family  CHIP_R300)
+   flags |= pitch / 16;
+   else
+   flags |= pitch / 8;
+
+
DRM_DEBUG(writing surface %d %d %x %x\n, reg, flags, offset, 
offset+obj_size-1);
WREG32(RADEON_SURFACE0_INFO + surf_index, flags);
WREG32(RADEON_SURFACE0_LOWER_BOUND + surf_index, offset);
-- 
1.6.5.2


--
ThinkGeek and WIRED's GeekDad team up for the Ultimate 
GeekDad Father's Day Giveaway. ONE MASSIVE PRIZE to the 
lucky parental unit.  See the prize list and enter to win: 
http://p.sf.net/sfu/thinkgeek-promo
--
___
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel

[PATCH] drm/radeon: add fake RN50 table for powerpc

2010-06-10 Thread Dave Airlie 
From: root r...@ibm-js21-01.lab.bos.redhat.com

This needs more work, esp testing on later servers like js22.

on the js21 I tested on I can't find any answer on any DDC lines.

Signed-off-by: Dave Airlie airl...@redhat.com
---
 drivers/gpu/drm/radeon/radeon_combios.c |   32 +++
 drivers/gpu/drm/radeon/radeon_mode.h|1 +
 2 files changed, 33 insertions(+), 0 deletions(-)

diff --git a/drivers/gpu/drm/radeon/radeon_combios.c 
b/drivers/gpu/drm/radeon/radeon_combios.c
index 102c744..1aaa0b5 100644
--- a/drivers/gpu/drm/radeon/radeon_combios.c
+++ b/drivers/gpu/drm/radeon/radeon_combios.c
@@ -1411,6 +1411,11 @@ bool radeon_get_legacy_connector_info_from_table(struct 
drm_device *dev)
rdev-mode_info.connector_table = CT_IMAC_G5_ISIGHT;
} else
 #endif /* CONFIG_PPC_PMAC */
+#ifdef CONFIG_PPC64
+   if (ASIC_IS_RN50(rdev))
+   rdev-mode_info.connector_table = CT_RN50_POWER;
+   else
+#endif
rdev-mode_info.connector_table = CT_GENERIC;
}
 
@@ -1853,6 +1858,33 @@ bool radeon_get_legacy_connector_info_from_table(struct 
drm_device *dev)
CONNECTOR_OBJECT_ID_SVIDEO,
hpd);
break;
+   case CT_RN50_POWER:
+   DRM_INFO(Connector Table: %d (rn50-power)\n,
+rdev-mode_info.connector_table);
+   /* VGA - primary dac */
+   ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_VGA_DDC);
+   hpd.hpd = RADEON_HPD_NONE;
+   radeon_add_legacy_encoder(dev,
+ radeon_get_encoder_id(dev,
+   
ATOM_DEVICE_CRT1_SUPPORT,
+   1),
+ ATOM_DEVICE_CRT1_SUPPORT);
+   radeon_add_legacy_connector(dev, 0, ATOM_DEVICE_CRT1_SUPPORT,
+   DRM_MODE_CONNECTOR_VGA, ddc_i2c,
+   CONNECTOR_OBJECT_ID_VGA,
+   hpd);
+   ddc_i2c = combios_setup_i2c_bus(rdev, RADEON_GPIO_CRT2_DDC);
+   hpd.hpd = RADEON_HPD_NONE;
+   radeon_add_legacy_encoder(dev,
+ radeon_get_encoder_id(dev,
+   
ATOM_DEVICE_CRT2_SUPPORT,
+   2),
+ ATOM_DEVICE_CRT2_SUPPORT);
+   radeon_add_legacy_connector(dev, 1, ATOM_DEVICE_CRT2_SUPPORT,
+   DRM_MODE_CONNECTOR_VGA, ddc_i2c,
+   CONNECTOR_OBJECT_ID_VGA,
+   hpd);
+   break;
default:
DRM_INFO(Connector table: %d (invalid)\n,
 rdev-mode_info.connector_table);
diff --git a/drivers/gpu/drm/radeon/radeon_mode.h 
b/drivers/gpu/drm/radeon/radeon_mode.h
index 67358ba..95696aa 100644
--- a/drivers/gpu/drm/radeon/radeon_mode.h
+++ b/drivers/gpu/drm/radeon/radeon_mode.h
@@ -206,6 +206,7 @@ enum radeon_connector_table {
CT_MINI_INTERNAL,
CT_IMAC_G5_ISIGHT,
CT_EMAC,
+   CT_RN50_POWER,
 };
 
 enum radeon_dvo_chip {
-- 
1.5.5.6


--
ThinkGeek and WIRED's GeekDad team up for the Ultimate 
GeekDad Father's Day Giveaway. ONE MASSIVE PRIZE to the 
lucky parental unit.  See the prize list and enter to win: 
http://p.sf.net/sfu/thinkgeek-promo
--
___
Dri-devel mailing list
Dri-devel@lists.sourceforge.net
https://lists.sourceforge.net/lists/listinfo/dri-devel