Re: RFI Problems with Certified Computers

1996-04-19 Thread Mike Violette
Hi folks,

I've enjoyed the discussion on the subject of ferrites and Vcc and
feel compelled to throw in another two cents worth. 

We have tested numerous products with the ferrite bead in series with
the Vcc island that feeds power to a chip. In an overwhelming
majority of those cases, we were able to trace emissions problems back
to this practice.

By bonding the island back to the main Vcc plane (copper tape and 
solder wick), we have noted significant improvement in emissions--
when this has been found to be the source of the problem. 

From our empirical observations, we have formulated two mechanisms
that may explain why this practice can be harmful:

Situation #1:  RF return impedance 

Since the Vcc plane forms part of the RF return path, inserting an
impedance in series with this path raises the impedance of the circuit
return path. As the currents must return to their source (and thus
travel through this impedance), a voltage potential is developed
between the island structure and the rest of the circuit. This
potential elevates the isolated circuitry with respect to the rest
of the circuit. An RF voltage hill develops (that the only way I can
describe it). This can be easily detected around such an island using
an E-field stub sniffer and a spectrum analyzer.


Situation #2: Induced voltage due to bead currents

When a gate switches, it pulls current through the bead, regardless of
how well-decoupled the Vcc island is. This current generates a voltage
across the impedance of the bead. This voltage appears essentially as
RF ripple on the Vcc structure (which powers the gates in the
isolated circuit); thus, this RF energy is coupled to every gate in
the isolated circuit. An emissions problem occurs when these gates
drive signals OFF of the isolated area (to other areas of the circuit
board), and, regardless of the frequency of the intended signal, the
ripple is passed along to the rest of the board.

This would not be a problem if:

  - The 0V plane had a zero impedance (Situation #1), and
  - Decoupling capacitors were perfect (Situation #2)

Alas, this is not the case. At RF in general (and in EMC in 
particular), what may offer a benefit on paper may work in opposition
in practice.

A logic gate, when switched, requires a tremendous inrush current to
support the voltage transition. This charge must be available in the
immediate local area of the chip, and a good bit of it is supplied in
the capacitance of the Vcc/0V plane (a bit is supplied by the local
decoupling caps). As these charges are depleted, current flows from
the remainder of the Vcc/0V circuit, decoupling capacitors and power
supply to replace and equalize the voltage. 

If one supplies a large enough contiguous Vcc/0V structure to support
this charge demand, the high frequency voltage developed during the
transition will be minimum. By creating an island one reduces the
available supply of charges. By inserting an impedance, one puts more
demands on the local decoupling capacitor AND creates a voltage drop
across the impedance.

The best source of this current is a fully contiguous, low Z Vcc and
0V structure.

Finally, a historical observation: This concept of ferrites and power
bus filtering arose in the early 80's when a clock speed of a few MHz 
was state-of-the art, and the upper frequency of emissions problems
was some tens of  MHz. I think that the design practice has become
ingrained to a certain extent and wherein it didn't matter what you
did `in the old days', with 100 MHz fundamental frequencies, these RF
problems arise.

Mike Violette
Washington Labs
mi...@wll.com


RFI Problems with Certified Computers

1996-04-19 Thread Barry Ma
 
 Hi Ladies/Gentlemen,
 
 I have been reading with interest the discussion articles on this 
 subject. Since Mike Violette 04/15/96 presented his opinion on VCC/GND 
 plane layout in multilayer board, the discussion seems to be focused 
 on PCB EMC design.  Max Kelson 04/16/96 wrote: 
 
 [snip]
 What this ferrite/cap configuration would do is to force the  
 oscillator to draw all transient current from the capacitor.  Or, in  
 otherwords, the rest of the caps on the board would be unable to  help 
 provide fast-transient current because of the ferrite.  This  would 
 keep the current loop (power AND GROUND) small and prevent it  from 
 infecting the rest of the board.  The path for the transient  current 
 surges would be from the capacitor to the IC's power pin,  out the 
 IC's ground pin and back to the negative side of the  capacitor (a 
 relatively small loop). 
 [snip]
 
 
 It might be worthwhile to pay attention to research work done by 
 professors at the Univ. of Missouri-Rolla. In the article Power Bus   
 Decoupling on Multilayer Printed Circuit Board, IEEE Trans. on EMC, 
 vol. 37, pp. 155-166, May 995, they wrote:
 
 [snip]
 VI. Conclusion.
 Unlike boards without internal power and ground planes, multilayer 
 boards have a built-in capacitance that is a more effective source of 
 current than surface decoupling capacitors at high frequencies. In the 
 time-domain, this means that most of the initial current supplied to a 
 fast switching device is provided by the interplane capacitance.
 [snip]
 
 
 Regards,
 Barry Ma
 
 


Re: RFI problems with PC's ...

1996-04-19 Thread janos vajda
Regarding segmented ground planes if you want to read an interesting 
article:

Common mode currents induced on wires attached to multilayer PCBs 
with segmented ground planes 

by: R. Lee_Hill and others, IEEE Transactions on Electromagnetic 
Compatibility, 4/94 (0-7803-1398)

What they say is basically the same that one of the forum participants 
already wrote: sometimes it helps, sometimes it does not. Sometimes 
it helps for immunity and adversely effects radiation. It may be 
beneficial for low frequency applications, for power supplies, analog 
circuits, but it could be bad for high frequency circuits.

Regards: Janos Vajda