http://gcc.gnu.org/bugzilla/show_bug.cgi?id=59634
Bug ID: 59634
Summary: Documentation (info/man page): lack of information for
cache size parameters (--param)
Product: gcc
Version: unknown
Status: UNCONFIRMED
Severity: normal
Priority: P3
Component: web
Assignee: unassigned at gcc dot gnu.org
Reporter: ytrezq at myopera dot com
gcc have several --param for suggesting cache size (l1-cache-line-size
l1-cache-size l2-cache-size)
However some processors/SoC (like the BCM6358) have separates caches for
instructions and data. The documentation don't say which size to consider.
For example if you have a processor where you get those info with dmesg:
Primary instruction cache 32kB, VIPT, 2-way, linesize 16 bytes and Primary
data cache 16kB, 2-way, VIPT, cache aliases, linesize 16 bytes
You know the value for --param l1-cache-line-size is 16 but for l1-cache-size
you don't know if it is 32Kb or 16Kb.