Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2013-01-04 Thread Leif Ekblad
OK. I know I can do that, but I would need to do it for every syscall since 
every syscall can potentially clobber rbx.


Also, it is very strange that it is only one of the inlines the compiler 
complains about. I have another inline (which uses rbx as input), but that 
doesn't generate any error:


#define RdosUserGateEbxEdiEcxParRetEax(nr, rbx, rdi, rcx, res) do { \
 register int _id asm("r14") = nr; \
 register typeof(rbx) _rbx asm("rbx") = (rbx); \
 register typeof(rdi) _rdi asm("rdi") = (rdi); \
 register typeof(rcx) _rcx asm("r8") = (rcx); \
 register int _size asm("r12") = (rcx); \
 asm volatile ( \
   "syscall\n\t" \
   "jnc 1f\n\t" \
   "xorq %%rax,%%rax\n\t" \
   "1: \n\t" \
   : "=a" (res) :  "r" (_id), "r" (_rbx), "r" (_rdi), "r" (_rcx), "r" 
(_size) : "rdx", "rsi" \

 ); \
} while(0);


inline int RdosWriteFile(int Handle, void *Buf, int Size)
{
   int res;
   RdosUserGateEbxEdiEcxParRetEax(usergate_read_file, Handle, Buf, Size, 
res);

   return res;
}

Why is not this inline causing the problem? Might that be because it will 
not use rbx, but instead another register? OTOH, the code seems to work and 
rbx is not assigned to PIC at the point of the call, but to the defined 
parameter.


Regards,
Leif Ekblad


- Original Message - 
From: "Jakub Jelinek" 

To: "Leif Ekblad" 
Cc: "Uros Bizjak" ; "Richard Henderson" ; 
"Andi Kleen" ; "Mike Frysinger" ; 
; ; "H.J. Lu" 

Sent: Friday, January 04, 2013 10:42 PM
Subject: Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on 
x86_64




On Fri, Jan 04, 2013 at 10:39:05PM +0100, Leif Ekblad wrote:

I just tried the patch, but it seems to produce some problems for
me. The other patch which used a 64-bit specific register (r15)
instead of rbx was easier to adapt to. The problem for me is that
syscalls might clobber higher-half of all 32-bit registers, and that
I cannot use the stack to preserve rbx in the call because of the
red-zone.


Of course you can use the stack, just subtract the red zone size (plus
whatever you need) from %rsp first, then save to stack, do syscall,
then restore from stack and finally increment %rsp back.

Jakub 




Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2013-01-04 Thread Jakub Jelinek
On Fri, Jan 04, 2013 at 10:39:05PM +0100, Leif Ekblad wrote:
> I just tried the patch, but it seems to produce some problems for
> me. The other patch which used a 64-bit specific register (r15)
> instead of rbx was easier to adapt to. The problem for me is that
> syscalls might clobber higher-half of all 32-bit registers, and that
> I cannot use the stack to preserve rbx in the call because of the
> red-zone.

Of course you can use the stack, just subtract the red zone size (plus
whatever you need) from %rsp first, then save to stack, do syscall,
then restore from stack and finally increment %rsp back.

Jakub


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2013-01-04 Thread Leif Ekblad
I just tried the patch, but it seems to produce some problems for me. The 
other patch which used a 64-bit specific register (r15) instead of rbx was 
easier to adapt to. The problem for me is that syscalls might clobber 
higher-half of all 32-bit registers, and that I cannot use the stack to 
preserve rbx in the call because of the red-zone.


Problem code:

#define RdosUserGateEdiEcxPar0RetEbx(nr, rdi, rcx, size, res) do { \
 register int _id asm("r14") = nr; \
 register typeof(rdi) _rdi asm("rdi") = (rdi); \
 register typeof(rcx) _rcx asm("r8") = (rcx); \
 register int _size asm("r12") = (size); \
 asm volatile ( \
   "syscall\n\t" \
   "jc 1f\n\t" \
   "movzx %%bx,%%rax\n\t" \
   "jmp 2f\n\t" \
   "1: \n\t" \
   "xorq %%rax,%%rax\n\t" \
   "2: \n\t" \
   : "=a" (res) : "r" (_id), "r" (_rdi), "r" (_rcx), "r" (_size) : "rbx", 
"rdx", "rsi" \

 ); \
} while(0);

inline volatile int RdosCreateFile(const char *FileName, int Attrib)
{
   int res;
   int size = strlen(FileName) + 1;
   RdosUserGateEdiEcxPar0RetEbx(usergate_create_file, FileName, Attrib, 
size, res);

   return res;
}

Error log:

$ rdos-gcc test.c -o test.exe
In file included from /usr/local/rdos/include/rdos.h:719:0,
from test.c:1:
/usr/local/rdos/include/rdosgcc.h: In function 'main':
/usr/local/rdos/include/rdosgcc.h:236:5: error: PIC register clobbered by 
'rbx' in 'asm'
RdosUserGateEdiEcxPar0RetEbx(usergate_open_file, FileName, Access, size, 
res);

^

I would prefer to change PIC register to r15 instead, or alternatively make 
this an target-option.


Regards,
Leif Ekblad


----- Original Message ----- 
From: "Uros Bizjak" 

To: "Richard Henderson" 
Cc: "Andi Kleen" ; "Mike Frysinger" 
; ; "Leif Ekblad" 
; "Jakub Jelinek" ; ; "H.J. Lu" 


Sent: Sunday, December 30, 2012 8:08 PM
Subject: Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on 
x86_64




On Fri, Dec 28, 2012 at 9:27 PM, Richard Henderson  wrote:

On 12/27/2012 12:08 AM, Uros Bizjak wrote:

The alternative approach is changing cpuid definition in cpuid.h (as
in attached patch) to preserve %rbx, but we can't detect various code
model settings there. Since the change depends on the definition of
__PIC__, we unnecessary preserve %rbx also for -mcmodel=small.


Certainly we can.  We also control the preprocessor defines.
All that's needed is that we create one for the code model.


Something like attached?

I have also included all suggestions (earlyclobber and operand prefix
on temporary register).

2012-12-30  Uros Bizjak  

PR target/55712
* config/i386/i386-c.c (ix86_target_macros_internal): Depending on
selected code model, define __code_mode_small__, __code_model_medium__,
__code_model_large__, __code_model_32__ or __code_model_kernel__.
* config/i386/cpuid.h (__cpuid, __cpuid_count) [__i386__]: Prefix
xchg temporary register with %k.  Declare temporary register as
early clobbered.
[__x86_64__]: For medium and large code models, preserve %rbx register.

Tested on x86_64-pc-linux-gnu {,-m32}.

Uros.





Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-30 Thread Uros Bizjak
On Fri, Dec 28, 2012 at 9:27 PM, Richard Henderson  wrote:
> On 12/27/2012 12:08 AM, Uros Bizjak wrote:
>> The alternative approach is changing cpuid definition in cpuid.h (as
>> in attached patch) to preserve %rbx, but we can't detect various code
>> model settings there. Since the change depends on the definition of
>> __PIC__, we unnecessary preserve %rbx also for -mcmodel=small.
>
> Certainly we can.  We also control the preprocessor defines.
> All that's needed is that we create one for the code model.

Something like attached?

I have also included all suggestions (earlyclobber and operand prefix
on temporary register).

2012-12-30  Uros Bizjak  

PR target/55712
* config/i386/i386-c.c (ix86_target_macros_internal): Depending on
selected code model, define __code_mode_small__, __code_model_medium__,
__code_model_large__, __code_model_32__ or __code_model_kernel__.
* config/i386/cpuid.h (__cpuid, __cpuid_count) [__i386__]: Prefix
xchg temporary register with %k.  Declare temporary register as
early clobbered.
[__x86_64__]: For medium and large code models, preserve %rbx register.

Tested on x86_64-pc-linux-gnu {,-m32}.

Uros.
Index: config/i386/cpuid.h
===
--- config/i386/cpuid.h (revision 194757)
+++ config/i386/cpuid.h (working copy)
@@ -136,35 +136,50 @@
 /* %ebx may be the PIC register.  */
 #if __GNUC__ >= 3
 #define __cpuid(level, a, b, c, d) \
-  __asm__ ("xchg{l}\t{%%}ebx, %1\n\t"  \
+  __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
   "cpuid\n\t"  \
-  "xchg{l}\t{%%}ebx, %1\n\t"   \
-  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  "xchg{l}\t{%%}ebx, %k1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
   : "0" (level))
 
 #define __cpuid_count(level, count, a, b, c, d)\
-  __asm__ ("xchg{l}\t{%%}ebx, %1\n\t"  \
+  __asm__ ("xchg{l}\t{%%}ebx, %k1\n\t" \
   "cpuid\n\t"  \
-  "xchg{l}\t{%%}ebx, %1\n\t"   \
-  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  "xchg{l}\t{%%}ebx, %k1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
   : "0" (level), "2" (count))
 #else
 /* Host GCCs older than 3.0 weren't supporting Intel asm syntax
nor alternatives in i386 code.  */
 #define __cpuid(level, a, b, c, d) \
-  __asm__ ("xchgl\t%%ebx, %1\n\t"  \
+  __asm__ ("xchgl\t%%ebx, %k1\n\t" \
   "cpuid\n\t"  \
-  "xchgl\t%%ebx, %1\n\t"   \
-  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  "xchgl\t%%ebx, %k1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
   : "0" (level))
 
 #define __cpuid_count(level, count, a, b, c, d)\
-  __asm__ ("xchgl\t%%ebx, %1\n\t"  \
+  __asm__ ("xchgl\t%%ebx, %k1\n\t" \
   "cpuid\n\t"  \
-  "xchgl\t%%ebx, %1\n\t"   \
-  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  "xchgl\t%%ebx, %k1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
   : "0" (level), "2" (count))
 #endif
+#elif defined(__x86_64__) && (defined(__code_model_medium__) || 
defined(__code_model_large__)) && defined(__PIC__)
+/* %ebx may be the PIC register.  */
+#define __cpuid(level, a, b, c, d) \
+  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
+  "cpuid\n\t"  \
+  "xchg{q}\t{%%}rbx, %q1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
+  : "0" (level))
+
+#define __cpuid_count(level, count, a, b, c, d)\
+  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
+  "cpuid\n\t"  \
+  "xchg{q}\t{%%}rbx, %q1\n\t"  \
+  : "=a" (a), "=&r" (b), "=c" (c), "=d" (d)\
+  : "0" (level), "2" (count))
 #else
 #define __cpuid(level, a, b, c, d) \
   __asm__ ("cpuid\n\t" \
Index: config/i386/i386-c.c
===
--- config/i386/i386-c.c(revision 194757)
+++ config/i386/i386-c.c(working copy)
@@ -243,6 +243,30 @@ ix86_target_macros_internal (HOST_WIDE_INT isa_fla
   break;
 }
 
+  switch (ix86_cmodel)
+{
+case CM_SMALL:
+case CM_SMALL_PIC:
+  def_or_undef (parse_in, "__code_model_small__");
+  break;
+case CM_MEDIUM:
+case CM_MEDIUM

Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-28 Thread Richard Henderson
On 12/27/2012 12:08 AM, Uros Bizjak wrote:
> The alternative approach is changing cpuid definition in cpuid.h (as
> in attached patch) to preserve %rbx, but we can't detect various code
> model settings there. Since the change depends on the definition of
> __PIC__, we unnecessary preserve %rbx also for -mcmodel=small.

Certainly we can.  We also control the preprocessor defines.
All that's needed is that we create one for the code model.


r~


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-27 Thread Uros Bizjak
On Thu, Dec 27, 2012 at 10:10 AM, Florian Weimer  wrote:
> * Uros Bizjak:
>
>> +#elif defined(__x86_64__)
>> +#define __cpuid(level, a, b, c, d)   \
>> +  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t"   \
>> +"cpuid\n\t"  \
>> +"xchg{q}\t{%%}rbx, %q1\n\t"  \
>> +: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
>> +: "0" (level))
>> +
>> +#define __cpuid_count(level, count, a, b, c, d)  \
>> +  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t"   \
>> +"cpuid\n\t"  \
>> +"xchg{q}\t{%%}rbx, %q1\n\t"  \
>> +: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
>> +: "0" (level), "2" (count))
>> +#endif
>
> Shouldn't the constraint for b be "=&r"?

Technically yes, but all input operands are matched to outputs, so in
practice it doesn't really matter.

Uros.


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-27 Thread Florian Weimer
* Uros Bizjak:

> +#elif defined(__x86_64__)
> +#define __cpuid(level, a, b, c, d)   \
> +  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t"   \
> +"cpuid\n\t"  \
> +"xchg{q}\t{%%}rbx, %q1\n\t"  \
> +: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
> +: "0" (level))
> +
> +#define __cpuid_count(level, count, a, b, c, d)  \
> +  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t"   \
> +"cpuid\n\t"  \
> +"xchg{q}\t{%%}rbx, %q1\n\t"  \
> +: "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
> +: "0" (level), "2" (count))
> +#endif

Shouldn't the constraint for b be "=&r"?


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-27 Thread Uros Bizjak
On Thu, Dec 27, 2012 at 9:08 AM, Uros Bizjak  wrote:
> On Wed, Dec 26, 2012 at 9:16 PM, Andi Kleen  wrote:
>>> Can you please post a real-world example, where using %r15 would break
>>> existing code?
>>
>> I used to run into problems like this when porting code to gcc from icc or 
>> VC.
>> A lot of hyper optimized inline assembler snippets wants to use all registers
>> and icc/VC support that. With gcc usually had to add some manual
>> push/pops. In older gcc versions usually more than one because reload
>> tended to error out otherwise.
>>
>> So by try and error used the non fixed registers, but let the compiler know
>> about the others. This case would break.
>>
>> In 64bit it was less a problem than on 32bit, but could still happen.
>>
>> Admittedly medium is somewhat obscure and rarely used (and very slow),
>> but someone could be still using it.
>
> The alternative approach is changing cpuid definition in cpuid.h (as
> in attached patch) to preserve %rbx, but we can't detect various code
> model settings there. Since the change depends on the definition of
> __PIC__, we unnecessary preserve %rbx also for -mcmodel=small.
> However, code that involves cpuid is rarely performance critical, so
> perhaps we can live with this tradeoff.
>
> IMO, this patch can be used on 4.7 branch, too.

Now with the patch ...

Uros.
Index: i386/cpuid.h
===
--- i386/cpuid.h(revision 194723)
+++ i386/cpuid.h(working copy)
@@ -132,8 +132,9 @@
 #define signature_VORTEX_ecx   0x436f5320
 #define signature_VORTEX_edx   0x36387865
 
-#if defined(__i386__) && defined(__PIC__)
+#if defined(__PIC__)
 /* %ebx may be the PIC register.  */
+#if defined(__i386__)
 #if __GNUC__ >= 3
 #define __cpuid(level, a, b, c, d) \
   __asm__ ("xchg{l}\t{%%}ebx, %1\n\t"  \
@@ -165,6 +166,21 @@
   : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
   : "0" (level), "2" (count))
 #endif
+#elif defined(__x86_64__)
+#define __cpuid(level, a, b, c, d) \
+  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
+  "cpuid\n\t"  \
+  "xchg{q}\t{%%}rbx, %q1\n\t"  \
+  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  : "0" (level))
+
+#define __cpuid_count(level, count, a, b, c, d)\
+  __asm__ ("xchg{q}\t{%%}rbx, %q1\n\t" \
+  "cpuid\n\t"  \
+  "xchg{q}\t{%%}rbx, %q1\n\t"  \
+  : "=a" (a), "=r" (b), "=c" (c), "=d" (d) \
+  : "0" (level), "2" (count))
+#endif
 #else
 #define __cpuid(level, a, b, c, d) \
   __asm__ ("cpuid\n\t" \


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-27 Thread Uros Bizjak
On Wed, Dec 26, 2012 at 9:16 PM, Andi Kleen  wrote:
>> Can you please post a real-world example, where using %r15 would break
>> existing code?
>
> I used to run into problems like this when porting code to gcc from icc or VC.
> A lot of hyper optimized inline assembler snippets wants to use all registers
> and icc/VC support that. With gcc usually had to add some manual
> push/pops. In older gcc versions usually more than one because reload
> tended to error out otherwise.
>
> So by try and error used the non fixed registers, but let the compiler know
> about the others. This case would break.
>
> In 64bit it was less a problem than on 32bit, but could still happen.
>
> Admittedly medium is somewhat obscure and rarely used (and very slow),
> but someone could be still using it.

The alternative approach is changing cpuid definition in cpuid.h (as
in attached patch) to preserve %rbx, but we can't detect various code
model settings there. Since the change depends on the definition of
__PIC__, we unnecessary preserve %rbx also for -mcmodel=small.
However, code that involves cpuid is rarely performance critical, so
perhaps we can live with this tradeoff.

IMO, this patch can be used on 4.7 branch, too.

Uros.


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-26 Thread Andi Kleen
> Can you please post a real-world example, where using %r15 would break
> existing code?

I used to run into problems like this when porting code to gcc from icc or VC.
A lot of hyper optimized inline assembler snippets wants to use all registers
and icc/VC support that. With gcc usually had to add some manual
push/pops. In older gcc versions usually more than one because reload
tended to error out otherwise. 

So by try and error used the non fixed registers, but let the compiler know
about the others. This case would break.

In 64bit it was less a problem than on 32bit, but could still happen.

Admittedly medium is somewhat obscure and rarely used (and very slow),
but someone could be still using it.

-Andi


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-26 Thread Uros Bizjak
On Tue, Dec 25, 2012 at 8:27 PM, Mike Frysinger  wrote:

>> >> In the case of cpuid, the code is hardly performance sensitive, and
>> >> probably runs only at startup. An alternative solution for the broken
>> >> code here is to move the result from rbx to another register, and to
>> >> save/restore rbx. Currently, this is the only place in libgcc and
>> >> newlib affected by this problem.
>> >
>> > it's not a question of performance.  i can't remember how many various
>> > projects i've had to tweak the inline asm code to work with __PIC__
>> > (either because it's going into shared library code or it's being built
>> > as a PIE). Andi's point is now we have to redo all of that work a 2nd
>> > time and handle two different cases depending on gcc version ?  it'd be
>> > a _lot_ better if gcc were intelligent and end users didn't have to code
>> > crap like stuffing %ebx somewhere temporarily.
>>
>> Please note that we are not talking about 32bit code, where this would
>> make a difference, but for 64bit targets with -mcmodel=medium and
>> -mcmodel=large exclusively. The default x64_64 -mcmodel=small doesn't
>> use PIC register, other code models are rarely used, so I sincerely
>> doubt that any %rbx workarounds were needed in the past for x86_64.
>
> i'm aware.  the comment still applies.  you're breaking asm code that used to
> work because the gcc inline asm code isn't intelligent enough (currently) to
> transparently handle the PIC register for the user.

Can you please post a real-world example, where using %r15 would break
existing code?

Uros.


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-25 Thread Mike Frysinger
On Tuesday 25 December 2012 14:12:09 Uros Bizjak wrote:
> On Tue, Dec 25, 2012 at 6:54 AM, Mike Frysinger  wrote:
> > On Monday 24 December 2012 17:26:47 Leif Ekblad wrote:
> >> In the case of cpuid, the code is hardly performance sensitive, and
> >> probably runs only at startup. An alternative solution for the broken
> >> code here is to move the result from rbx to another register, and to
> >> save/restore rbx. Currently, this is the only place in libgcc and
> >> newlib affected by this problem.
> > 
> > it's not a question of performance.  i can't remember how many various
> > projects i've had to tweak the inline asm code to work with __PIC__
> > (either because it's going into shared library code or it's being built
> > as a PIE). Andi's point is now we have to redo all of that work a 2nd
> > time and handle two different cases depending on gcc version ?  it'd be
> > a _lot_ better if gcc were intelligent and end users didn't have to code
> > crap like stuffing %ebx somewhere temporarily.
> 
> Please note that we are not talking about 32bit code, where this would
> make a difference, but for 64bit targets with -mcmodel=medium and
> -mcmodel=large exclusively. The default x64_64 -mcmodel=small doesn't
> use PIC register, other code models are rarely used, so I sincerely
> doubt that any %rbx workarounds were needed in the past for x86_64.

i'm aware.  the comment still applies.  you're breaking asm code that used to 
work because the gcc inline asm code isn't intelligent enough (currently) to 
transparently handle the PIC register for the user.
-mike


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Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-25 Thread Uros Bizjak
On Tue, Dec 25, 2012 at 6:54 AM, Mike Frysinger  wrote:
> On Monday 24 December 2012 17:26:47 Leif Ekblad wrote:
>> In the case of cpuid, the code is hardly performance sensitive, and
>> probably runs only at startup. An alternative solution for the broken code
>> here is to move the result from rbx to another register, and to
>> save/restore rbx. Currently, this is the only place in libgcc and newlib
>> affected by this problem.
>
> it's not a question of performance.  i can't remember how many various
> projects i've had to tweak the inline asm code to work with __PIC__ (either
> because it's going into shared library code or it's being built as a PIE).
> Andi's point is now we have to redo all of that work a 2nd time and handle two
> different cases depending on gcc version ?  it'd be a _lot_ better if gcc were
> intelligent and end users didn't have to code crap like stuffing %ebx 
> somewhere
> temporarily.

Please note that we are not talking about 32bit code, where this would
make a difference, but for 64bit targets with -mcmodel=medium and
-mcmodel=large exclusively. The default x64_64 -mcmodel=small doesn't
use PIC register, other code models are rarely used, so I sincerely
doubt that any %rbx workarounds were needed in the past for x86_64.

Uros.


Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-24 Thread Mike Frysinger
On Monday 24 December 2012 17:26:47 Leif Ekblad wrote:
> In the case of cpuid, the code is hardly performance sensitive, and
> probably runs only at startup. An alternative solution for the broken code
> here is to move the result from rbx to another register, and to
> save/restore rbx. Currently, this is the only place in libgcc and newlib
> affected by this problem.

it's not a question of performance.  i can't remember how many various 
projects i've had to tweak the inline asm code to work with __PIC__ (either 
because it's going into shared library code or it's being built as a PIE).  
Andi's point is now we have to redo all of that work a 2nd time and handle two 
different cases depending on gcc version ?  it'd be a _lot_ better if gcc were 
intelligent and end users didn't have to code crap like stuffing %ebx somewhere 
temporarily.
-mike


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Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-24 Thread Leif Ekblad
In the case of cpuid, the code is hardly performance sensitive, and probably 
runs only at startup. An alternative solution for the broken code here is to 
move the result from rbx to another register, and to save/restore rbx. 
Currently, this is the only place in libgcc and newlib affected by this 
problem.


Leif Ekblad

- Original Message - 
From: "Andi Kleen" 

To: "Uros Bizjak" 
Cc: ; "Richard Henderson" ; "Jakub 
Jelinek" ; ; "H.J. Lu" 

Sent: Monday, December 24, 2012 10:32 PM
Subject: Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on 
x86_64




Uros Bizjak  writes:


Hello!

Currently, we use %rbx as REAL_PIC_OFFSET_TABLE_REGNUM on x86_64.
Since this register gets marked as fixed reg in
ix86_conditional_register_usage, we get into troubles with insns that
use %rbx (cmpxchg, cpuid). According to x86_64 psABI, we are free to
use any register, so attached patch changes %rbx with %r15 (also
following the example in the psABI). This patch has no implications on
small code model (that doesn't use REAL_PIC_OFFSET_TABLE_REGNUM
anyway), but on medium and large code model fixes usage of cpuid.h
(please see PR 55712 [1]) and avoids a pair of xchgs around cmpxchg or
cpuid instructions.


So everyone who worked around this and use r15 now broke.

It would be probably better to just teach the register allocator
to spill those registers as needed, to handle some asm() statement.
Not sure how hard that would be.

-Andi

--
a...@linux.intel.com -- Speaking for myself only 




Re: [RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-24 Thread Andi Kleen
Uros Bizjak  writes:

> Hello!
>
> Currently, we use %rbx as REAL_PIC_OFFSET_TABLE_REGNUM on x86_64.
> Since this register gets marked as fixed reg in
> ix86_conditional_register_usage, we get into troubles with insns that
> use %rbx (cmpxchg, cpuid). According to x86_64 psABI, we are free to
> use any register, so attached patch changes %rbx with %r15 (also
> following the example in the psABI). This patch has no implications on
> small code model (that doesn't use REAL_PIC_OFFSET_TABLE_REGNUM
> anyway), but on medium and large code model fixes usage of cpuid.h
> (please see PR 55712 [1]) and avoids a pair of xchgs around cmpxchg or
> cpuid instructions.

So everyone who worked around this and use r15 now broke.

It would be probably better to just teach the register allocator
to spill those registers as needed, to handle some asm() statement.
Not sure how hard that would be.

-Andi

-- 
a...@linux.intel.com -- Speaking for myself only


[RFC PATCH, i386]: Use %r15 for REAL_PIC_OFFSET_TABLE_REGNUM on x86_64

2012-12-24 Thread Uros Bizjak
Hello!

Currently, we use %rbx as REAL_PIC_OFFSET_TABLE_REGNUM on x86_64.
Since this register gets marked as fixed reg in
ix86_conditional_register_usage, we get into troubles with insns that
use %rbx (cmpxchg, cpuid). According to x86_64 psABI, we are free to
use any register, so attached patch changes %rbx with %r15 (also
following the example in the psABI). This patch has no implications on
small code model (that doesn't use REAL_PIC_OFFSET_TABLE_REGNUM
anyway), but on medium and large code model fixes usage of cpuid.h
(please see PR 55712 [1]) and avoids a pair of xchgs around cmpxchg or
cpuid instructions.

Probably, we can also enhance ix86_select_alt_pic_regnum for x86_64,
but this is 4.9 material.

2012-12-24  Uros Bizjak  

* config/i386/i386.md (R14_REG, R15_REG): New constants.
* config/i386/i386.h (REAL_PIC_OFFSET_TABLE_REGNUM): Use R15_REG
for 64bit targets.

[1] http://gcc.gnu.org/bugzilla/show_bug.cgi?id=55712

Patch was bootstrapped and regression tested on x86_64-linux-gnu {,-m32}.

Uros.
Index: i386.h
===
--- i386.h  (revision 194703)
+++ i386.h  (working copy)
@@ -1173,7 +1173,7 @@
the pic register when possible.  The change is visible after the
prologue has been emitted.  */
 
-#define REAL_PIC_OFFSET_TABLE_REGNUM  BX_REG
+#define REAL_PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? R15_REG : BX_REG)
 
 #define PIC_OFFSET_TABLE_REGNUM\
   ((TARGET_64BIT && ix86_cmodel == CM_SMALL_PIC)   \
Index: i386.md
===
--- i386.md (revision 194703)
+++ i386.md (working copy)
@@ -301,6 +301,8 @@
(R11_REG40)
(R12_REG41)
(R13_REG42)
+   (R14_REG43)
+   (R15_REG44)
(XMM8_REG   45)
(XMM9_REG   46)
(XMM10_REG  47)