Re: gEDA-user: Design with a 144 pin QFP

2008-02-03 Thread ST de Feber
Hello All,

Thanks for the advice.
I'll give it a go.

The device in mind is an Altera Cyclone-3 FPGA.
Most probably the ep3c5.

As for the function, it will do audio-dsp like
functions. I2S in, 3 to 4 channel FIR filtering
(1024-tap) and I2S out. When not filled completely i
will try to add a simple uc.

grtz

Simon






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Re: gEDA-user: Design with a 144 pin QFP

2008-02-03 Thread Larry Doolittle
Simon -

On Sun, Feb 03, 2008 at 01:26:40PM +, ST de Feber wrote:
 The device in mind is an Altera Cyclone-3 FPGA.
 Most probably the ep3c5.

FPGAs are the easiest chips to lay out, as long as you keep
an open mind about pin assignments until you're halfway
through the layout.  Unless there is some other complex
part of the board, four layers is probably enough.
One for power, one for ground, and the top layer has
most of the routing away from the FPGA to its peripherals.
That leaves one layer for anything that doesn't quite
fit on the other three.

Stare at a PCI Ethernet or SCSI card for inspiration on
how routing is supposed to look.  I use graphics cards
as a model for boards with higher pin-count FPGAs.

 As for the function, it will do audio-dsp like
 functions. I2S in, 3 to 4 channel FIR filtering
 (1024-tap) and I2S out. When not filled completely i
 will try to add a simple uc.

I suggest reading Jan Gray's essays (now all historical)
on uc design in FPGAs: fpgacpu.org.  He's a Xilinx partisan,
but many of the concepts still apply to Altera.

- Larry


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Re: gEDA-user: Design with a 144 pin QFP

2008-02-03 Thread Ben Jackson
On Sun, Feb 03, 2008 at 01:26:40PM +, ST de Feber wrote:
 
 The device in mind is an Altera Cyclone-3 FPGA.
 Most probably the ep3c5.

My board has an EP2C8.  Assuming you have a single IO voltage plus
the core you can do this in 4 layers.  I had GND and 3.3V on the
planes.  The 1.2V is made from 3.3V near one of the corners and a
big fat trace on the top layer goes in the corner and around the
perimeter of the chip.  Almost all of the decoupling is underneath.
The PLL voltages are made with caps+beads from the core voltage.

Read the datasheet carefully because modern FPGAs have many rules
for special use pins.

-- 
Ben Jackson AD7GD
[EMAIL PROTECTED]
http://www.ben.com/


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Re: gEDA-user: Design with a 144 pin QFP

2008-02-03 Thread Daniel O'Connor
On Mon, 4 Feb 2008, Larry Doolittle wrote:
 On Sun, Feb 03, 2008 at 01:26:40PM +, ST de Feber wrote:
  The device in mind is an Altera Cyclone-3 FPGA.
  Most probably the ep3c5.

 FPGAs are the easiest chips to lay out, as long as you keep
 an open mind about pin assignments until you're halfway
 through the layout.  Unless there is some other complex
 part of the board, four layers is probably enough.
 One for power, one for ground, and the top layer has
 most of the routing away from the FPGA to its peripherals.
 That leaves one layer for anything that doesn't quite
 fit on the other three.

A little while ago I laid out a QFP144 Spartan 3 on a 2 layer board 
without too much difficulty.

The bypass network underneath was a bit of a hassle but it didn't take 
that long.

Recently it got redesigned so that the top and bottom layers were 
covered with ground polys, again not too difficulty.

I imagine 4 layers would be better but if you're on a budget 2 layers 
might be worth it :)

-- 
Daniel O'Connor software and network engineer
for Genesis Software - http://www.gsoft.com.au
The nice thing about standards is that there
are so many of them to choose from.
  -- Andrew Tanenbaum
GPG Fingerprint - 5596 B766 97C0 0E94 4347 295E E593 DC20 7B3F CE8C


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gEDA-user: Design with a 144 pin QFP

2008-02-02 Thread ST de Feber
Dear all,

Has any one of you designed a PCB with a 144 pin
QFP/TQFP package ? (with or without exposed die pad)

If so, is one of you so kind to show me the PCB files
?

How many layers will such a board have ?

Until recently i designed boards with a max of 44 (ic)
pins. So i do not feel confident with larger packages.

best regards

Simon




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Re: gEDA-user: Design with a 144 pin QFP

2008-02-02 Thread Steve Meier
Simon,

Get your confidence up 144 pin qfp is very standard.

Layers.

Maybe 3 for power and ground (Vcci, Vccio and ground)

3 for signals Top, bottom and one in the middle.

Even if you need analog then you can either add a few more layers or
carefully manage the layers that you have.

i.e if the analog section is kept distinctly seperate from the digital
then you can resuse the power and signal planes.

Just like you other boards plan your layout ahead of time.

Steve Meier

ST de Feber wrote:
 Dear all,

 Has any one of you designed a PCB with a 144 pin
 QFP/TQFP package ? (with or without exposed die pad)

 If so, is one of you so kind to show me the PCB files
 ?

 How many layers will such a board have ?

 Until recently i designed boards with a max of 44 (ic)
 pins. So i do not feel confident with larger packages.

 best regards

 Simon




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Re: gEDA-user: Design with a 144 pin QFP

2008-02-02 Thread Dave McGuire
On Feb 2, 2008, at 7:09 AM, ST de Feber wrote:
 Has any one of you designed a PCB with a 144 pin
 QFP/TQFP package ? (with or without exposed die pad)

 If so, is one of you so kind to show me the PCB files
 ?

 How many layers will such a board have ?

 Until recently i designed boards with a max of 44 (ic)
 pins. So i do not feel confident with larger packages.

   I have done a board with a 144-pin LQFP on it, double-sided.  It  
is not difficult with PCB and it won't give you any trouble.

 -Dave

-- 
Dave McGuire
Port Charlotte, FL




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Re: gEDA-user: Design with a 144 pin QFP

2008-02-02 Thread Ben Jackson
On Sat, Feb 02, 2008 at 12:09:37PM +, ST de Feber wrote:
 
 Has any one of you designed a PCB with a 144 pin
 QFP/TQFP package ? (with or without exposed die pad)

I just made a board with a QFP208 (0.5mm), 100 (0.65mm rectangular) and
80 (0.65mm square).

 How many layers will such a board have ?

It depends entirely on the function of the chips.  If it's a digital chip
and only uses a single power supply you might be able to use just two
layers.  If it's fast digital and/or analog and has multiple supplies
you will probably need at least 4 layers.  If it's an FPGA you can simplify
your routing because most of the pins are interchangable.  If it's a
CPU you might need more layers to get the connections to the right places.
I probably could not have routed my two SRAM chips on less than 4 layers
(just too many power and ground pins plus the need to bus together the
A and D lines) but if I'd only used one, larger SRAM I might have gotten
away with 2.

-- 
Ben Jackson AD7GD
[EMAIL PROTECTED]
http://www.ben.com/


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