[gem5-dev] Change in gem5/gem5[develop]: arch, kern: Rename some function events to have better names.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/26703 )
Change subject: arch,kern: Rename some function events to have better names.
..
arch,kern: Rename some function events to have better names.
Rename many of the Event classes to have more succinct or
consistent names, and fix various style issues.
Change-Id: Ib322da31d81e7a245a00d21786c2aa417c9f2cde
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26703
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/arch/arm/freebsd/fs_workload.cc
M src/arch/arm/freebsd/fs_workload.hh
M src/arch/arm/linux/fs_workload.cc
M src/arch/arm/linux/fs_workload.hh
M src/arch/mips/linux/system.cc
M src/arch/mips/linux/system.hh
M src/kern/freebsd/events.cc
M src/kern/freebsd/events.hh
M src/kern/linux/events.cc
M src/kern/linux/events.hh
M src/kern/system_events.hh
11 files changed, 111 insertions(+), 106 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/freebsd/fs_workload.cc
b/src/arch/arm/freebsd/fs_workload.cc
index 1792273..33e0126 100644
--- a/src/arch/arm/freebsd/fs_workload.cc
+++ b/src/arch/arm/freebsd/fs_workload.cc
@@ -56,20 +56,20 @@
enableContextSwitchStatsDump(p->enable_context_switch_stats_dump)
{
if (p->panic_on_panic) {
-kernelPanicEvent = addKernelFuncEventOrPanic(
+kernelPanic = addKernelFuncEventOrPanic(
"panic", "Kernel panic in simulated kernel");
} else {
#ifndef NDEBUG
-kernelPanicEvent =
addKernelFuncEventOrPanic("panic");
+kernelPanic = addKernelFuncEventOrPanic("panic");
#endif
}
if (p->panic_on_oops) {
-kernelOopsEvent = addKernelFuncEventOrPanic(
+kernelOops = addKernelFuncEventOrPanic(
"oops_exit", "Kernel oops in guest");
}
-uDelaySkipEvent = addKernelFuncEvent>(
+skipUDelay = addKernelFuncEvent>(
"DELAY", "DELAY", 1000, 0);
}
@@ -123,7 +123,7 @@
FsFreebsd::~FsFreebsd()
{
-delete uDelaySkipEvent;
+delete skipUDelay;
}
} // namespace ArmISA
diff --git a/src/arch/arm/freebsd/fs_workload.hh
b/src/arch/arm/freebsd/fs_workload.hh
index 0e767a5..b7d8e26 100644
--- a/src/arch/arm/freebsd/fs_workload.hh
+++ b/src/arch/arm/freebsd/fs_workload.hh
@@ -78,17 +78,17 @@
private:
/** Event to halt the simulator if the kernel calls panic() */
-PCEvent *kernelPanicEvent = nullptr;
+PCEvent *kernelPanic = nullptr;
/** Event to halt the simulator if the kernel calls oopses */
-PCEvent *kernelOopsEvent = nullptr;
+PCEvent *kernelOops = nullptr;
/**
* PC based event to skip udelay() calls and quiesce the
* processor for the appropriate amount of time. This is not
functionally
* required but does speed up simulation.
*/
-FreeBSD::UDelayEvent *uDelaySkipEvent = nullptr;
+FreeBSD::SkipUDelay *skipUDelay = nullptr;
/** These variables store addresses of important data structures
* that are normaly kept coherent at boot with cache mainetence
operations.
diff --git a/src/arch/arm/linux/fs_workload.cc
b/src/arch/arm/linux/fs_workload.cc
index e6058ba..9390a46 100644
--- a/src/arch/arm/linux/fs_workload.cc
+++ b/src/arch/arm/linux/fs_workload.cc
@@ -169,11 +169,13 @@
FsLinux::~FsLinux()
{
-delete uDelaySkipEvent;
-delete constUDelaySkipEvent;
+delete skipUDelay;
+delete skipConstUDelay;
+delete kernelOops;
+delete kernelPanic;
-delete dumpStatsPCEvent;
-delete debugPrintkEvent;
+delete dumpStats;
+delete debugPrintk;
}
void
@@ -183,15 +185,12 @@
auto *arm_sys = dynamic_cast(system);
if (enableContextSwitchStatsDump) {
-if (!arm_sys->highestELIs64()) {
-dumpStatsPCEvent =
-addKernelFuncEvent("__switch_to");
-} else {
-dumpStatsPCEvent =
-addKernelFuncEvent("__switch_to");
-}
+if (!arm_sys->highestELIs64())
+dumpStats = addKernelFuncEvent("__switch_to");
+else
+dumpStats = addKernelFuncEvent("__switch_to");
-panic_if(!dumpStatsPCEvent, "dumpStatsPCEvent not created!");
+panic_if(!dumpStats, "dumpStats not created!");
std::string task_filename = "tasks.txt";
taskFile = simout.create(name() + "." + task_filename);
@@ -207,40 +206,39 @@
const std::string dmesg_output = name() + ".dmesg";
if (params()->panic_on_panic) {
-kernelPanicEvent =
addKernelFuncEventOrPanic(
+kernelPanic = addKernelFuncEventOrPanic(
"panic", "Kernel panic in simulated kernel", dmesg_output);
} else {
-kernelPanicEvent =
addKernelFuncEventOrPanic(
+kernelPanic = addKernelFuncEventOrPanic(
"panic", "Kernel panic in simula
[gem5-dev] Change in gem5/gem5[develop]: tests: Use relative path for python3 compliance
Jiajie Chen has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/26743 ) Change subject: tests: Use relative path for python3 compliance .. tests: Use relative path for python3 compliance Change-Id: Ie18c52982e2083d0fc2723147f2493b39bcb3786 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26743 Reviewed-by: Jason Lowe-Power Reviewed-by: Bobby R. Bruce Maintainer: Bobby R. Bruce Tested-by: kokoro --- M tests/testing/tests.py M tests/testing/units.py 2 files changed, 3 insertions(+), 3 deletions(-) Approvals: Jason Lowe-Power: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/testing/tests.py b/tests/testing/tests.py index 98c9a66..29bfa78 100755 --- a/tests/testing/tests.py +++ b/tests/testing/tests.py @@ -38,7 +38,7 @@ from abc import ABCMeta, abstractmethod import os from collections import namedtuple -from units import * +from .units import * from .helpers import FileIgnoreList from .results import TestResult import shutil diff --git a/tests/testing/units.py b/tests/testing/units.py index 0139b31..9c9c1e5 100644 --- a/tests/testing/units.py +++ b/tests/testing/units.py @@ -45,8 +45,8 @@ import sys import traceback -from results import UnitResult -from helpers import * +from .results import UnitResult +from .helpers import * _test_base = os.path.join(os.path.dirname(__file__), "..") -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/26743 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ie18c52982e2083d0fc2723147f2493b39bcb3786 Gerrit-Change-Number: 26743 Gerrit-PatchSet: 2 Gerrit-Owner: Jiajie Chen Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Jiajie Chen Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[develop]: sim-se: Update mmap, munmap, mremap to use MemState
Matthew Poremba has uploaded this change for review. (
https://gem5-review.googlesource.com/c/public/gem5/+/26863 )
Change subject: sim-se: Update mmap, munmap, mremap to use MemState
..
sim-se: Update mmap, munmap, mremap to use MemState
This updates the syscalls for mmap, munmap, and mremap. The mmap
changes now create a virtual memory area through the MemState class
to allow for lazy allocation of mmapped regions. This provides
substantial performance boost for sparse usage of mmaps. The munmap
syscall is added to reclaim the virtual memory area reserved for the
mmapped region. The mremap syscall moves or resizes an mmapped region
and updates the corresponding virtual memory area region to keep the
page tables in sync.
Change-Id: Ide158e69cdff19bc81157e3e9826bcabc2a51140
---
M src/sim/syscall_emul.cc
M src/sim/syscall_emul.hh
2 files changed, 112 insertions(+), 116 deletions(-)
diff --git a/src/sim/syscall_emul.cc b/src/sim/syscall_emul.cc
index 66cc629..7c36c54 100644
--- a/src/sim/syscall_emul.cc
+++ b/src/sim/syscall_emul.cc
@@ -331,11 +331,23 @@
SyscallReturn
-munmapFunc(SyscallDesc *desc, int num, ThreadContext *tc)
+munmapFunc(SyscallDesc *desc, int num, ThreadContext *tc, Addr start,
+ size_t length)
{
-// With mmap more fully implemented, it might be worthwhile to bite
-// the bullet and implement munmap. Should allow us to reuse simulated
-// memory.
+// Even if the system is currently not capable of recycling physical
+// pages, there is no reason we can't unmap them so that we trigger
+// appropriate seg faults when the application mistakenly tries to
+// access them again.
+auto p = tc->getProcessPtr();
+
+if (start & (tc->getSystemPtr()->getPageBytes() - 1) || !length) {
+return -EINVAL;
+}
+
+length = roundUp(length, tc->getSystemPtr()->getPageBytes());
+
+p->memState->unmapRegion(start, length);
+
return 0;
}
diff --git a/src/sim/syscall_emul.hh b/src/sim/syscall_emul.hh
index f999e45..cd57e3e 100644
--- a/src/sim/syscall_emul.hh
+++ b/src/sim/syscall_emul.hh
@@ -169,7 +169,8 @@
uint32_t offset_low, Addr result_ptr, int
whence);
/// Target munmap() handler.
-SyscallReturn munmapFunc(SyscallDesc *desc, int num, ThreadContext *tc);
+SyscallReturn munmapFunc(SyscallDesc *desc, int num, ThreadContext *tc,
+ Addr start, size_t length);
/// Target shutdown() handler.
SyscallReturn shutdownFunc(SyscallDesc *desc, int num, ThreadContext *tc,
@@ -1123,32 +1124,32 @@
Addr start, uint64_t old_length, uint64_t new_length, uint64_t
flags,
GuestABI::VarArgs varargs)
{
-auto process = tc->getProcessPtr();
+auto p = tc->getProcessPtr();
+Addr page_bytes = tc->getSystemPtr()->getPageBytes();
uint64_t provided_address = 0;
bool use_provided_address = flags & OS::TGT_MREMAP_FIXED;
if (use_provided_address)
provided_address = varargs.get();
-if ((start % TheISA::PageBytes != 0) ||
-(provided_address % TheISA::PageBytes != 0)) {
+if ((start % page_bytes != 0) ||
+(provided_address % page_bytes != 0)) {
warn("mremap failing: arguments not page aligned");
return -EINVAL;
}
-new_length = roundUp(new_length, TheISA::PageBytes);
+new_length = roundUp(new_length, page_bytes);
if (new_length > old_length) {
-std::shared_ptr mem_state = process->memState;
-Addr mmap_end = mem_state->getMmapEnd();
+Addr mmap_end = p->memState->getMmapEnd();
if ((start + old_length) == mmap_end &&
(!use_provided_address || provided_address == start)) {
// This case cannot occur when growing downward, as
// start is greater than or equal to mmap_end.
uint64_t diff = new_length - old_length;
-process->allocateMem(mmap_end, diff);
-mem_state->setMmapEnd(mmap_end + diff);
+p->memState->mapRegion(mmap_end, diff, "remapped");
+p->memState->setMmapEnd(mmap_end + diff);
return start;
} else {
if (!use_provided_address && !(flags &
OS::TGT_MREMAP_MAYMOVE)) {
@@ -1157,38 +1158,45 @@
} else {
uint64_t new_start = provided_address;
if (!use_provided_address) {
-new_start = process->mmapGrowsDown() ?
+new_start = p->mmapGrowsDown() ?
mmap_end - new_length : mmap_end;
-mmap_end = process->mmapGrowsDown() ?
+mmap_end = p->mmapGrowsDown() ?
new_start : mmap_end + new_length;
-mem_state->setMmapEnd(mmap_end);
+p->memState->setMmapEnd(mmap_end);
}
-process->pTable->remap(start, old_length, new
[gem5-dev] Change in gem5/gem5[develop]: base: Do not treat addresses < 10 specially
Boris Shingarov has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/26605 )
Change subject: base: Do not treat addresses < 10 specially
..
base: Do not treat addresses < 10 specially
The RSP stub (base/remote_gdb.cc) treats virtual addresses below 0x000A as
meaning "the address used in the previous m-packet". This leads to nasty
surprises, and is not justified by neither the RSP protocol documentation
nor other existing RSP implementations.
Jira Issue: https://gem5.atlassian.net/browse/GEM5-407
Change-Id: I5fccc10a58d9af8566d45418905c0f47ffab
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26605
Maintainer: Gabe Black
Tested-by: kokoro
Reviewed-by: Gabe Black
---
M src/base/remote_gdb.cc
1 file changed, 0 insertions(+), 16 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/base/remote_gdb.cc b/src/base/remote_gdb.cc
index add903e..ada5e27 100644
--- a/src/base/remote_gdb.cc
+++ b/src/base/remote_gdb.cc
@@ -604,14 +604,6 @@
bool
BaseRemoteGDB::read(Addr vaddr, size_t size, char *data)
{
-static Addr lastaddr = 0;
-static size_t lastsize = 0;
-
-if (vaddr < 10) {
- DPRINTF(GDBRead, "read: reading memory location zero!\n");
- vaddr = lastaddr + lastsize;
-}
-
DPRINTF(GDBRead, "read: addr=%#x, size=%d", vaddr, size);
PortProxy &proxy = tc->getVirtProxy();
@@ -635,14 +627,6 @@
bool
BaseRemoteGDB::write(Addr vaddr, size_t size, const char *data)
{
-static Addr lastaddr = 0;
-static size_t lastsize = 0;
-
-if (vaddr < 10) {
- DPRINTF(GDBWrite, "write: writing memory location zero!\n");
- vaddr = lastaddr + lastsize;
-}
-
if (DTRACE(GDBWrite)) {
DPRINTFN("write: addr=%#x, size=%d", vaddr, size);
if (DTRACE(GDBExtra)) {
--
To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/26605
To unsubscribe, or for help writing mail filters, visit
https://gem5-review.googlesource.com/settings
Gerrit-Project: public/gem5
Gerrit-Branch: develop
Gerrit-Change-Id: I5fccc10a58d9af8566d45418905c0f47ffab
Gerrit-Change-Number: 26605
Gerrit-PatchSet: 2
Gerrit-Owner: Boris Shingarov
Gerrit-Reviewer: Boris Shingarov
Gerrit-Reviewer: Gabe Black
Gerrit-Reviewer: kokoro
Gerrit-CC: Bobby R. Bruce
Gerrit-MessageType: merged
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[gem5-dev] Change in gem5/gem5[develop]: tests: Increased Kokoro's timeout to 5 hours
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/26843 ) Change subject: tests: Increased Kokoro's timeout to 5 hours .. tests: Increased Kokoro's timeout to 5 hours Change-Id: Ice9fc5f17dfa06f61bc5583ecca15c54742bc254 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26843 Reviewed-by: Jason Lowe-Power Maintainer: Jason Lowe-Power Tested-by: kokoro --- M tests/jenkins/presubmit.cfg 1 file changed, 1 insertion(+), 1 deletion(-) Approvals: Jason Lowe-Power: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/tests/jenkins/presubmit.cfg b/tests/jenkins/presubmit.cfg index 6c9296e..76bdb04 100644 --- a/tests/jenkins/presubmit.cfg +++ b/tests/jenkins/presubmit.cfg @@ -3,4 +3,4 @@ # Location of the continuous batch script in repository. build_file: "jenkins-gem5-prod/tests/jenkins/presubmit.sh" -timeout_mins: 240 +timeout_mins: 300 # 5 hours -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/26843 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Ice9fc5f17dfa06f61bc5583ecca15c54742bc254 Gerrit-Change-Number: 26843 Gerrit-PatchSet: 2 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Giacomo Travaglini Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Kokoro timing out
Giacomo, I've added some changes that will help: https://gem5-review.googlesource.com/c/public/gem5/+/26843 . Once merged you can hopefully proceed. Kind regards, Bobby -- Dr. Bobby R. Bruce Room 2235, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Tue, Mar 17, 2020 at 11:10 AM Bobby Bruce wrote: > I'm currently working on a solution. Will push soon :) > > -- > Dr. Bobby R. Bruce > Room 2235, > Kemper Hall, UC Davis > Davis, > CA, 95616 > > web: https://www.bobbybruce.net > > > On Tue, Mar 17, 2020 at 11:04 AM Jason Lowe-Power > wrote: > >> Hey Giacomo, >> >> I'm not sure what's going on here or how to fix it. We could bump the >> timeout again, but this isn't a long-term solution. We really need to >> figure out how to get our tests off of kokoro, but that's blocked on google >> right now. >> >> Jason >> >> On Tue, Mar 17, 2020 at 7:24 AM Giacomo Travaglini < >> giacomo.travagl...@arm.com> wrote: >> >>> Hi Jason and Bobby >>> >>> I keep trying to merge an arch-arm patch but it seems like I cannot pass >>> regressions because of a timeout. >>> >>> >>> https://source.cloud.google.com/results/invocations/a52ffb1b-813d-4f86-bd8b-e1d5a42ea29c/targets/gem5%2Fgcp_ubuntu%2Fpresubmit/log >>> >>> I am running regressions internally and they pass, so I doubt there is >>> something wrong with my patch: >>> >>> https://gem5-review.googlesource.com/c/public/gem5/+/26723 >>> >>> I think by porting the entire regression list we are hitting again the >>> old issue of not having enought time to run >>> everything. Do you have an idea on how to fix this? >>> >>> Giacomo >>> IMPORTANT NOTICE: The contents of this email and any attachments are >>> confidential and may also be privileged. If you are not the intended >>> recipient, please notify the sender immediately and do not disclose the >>> contents to any other person, use it for any purpose, or store or copy the >>> information in any medium. Thank you. >>> >> ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Kokoro timing out
I'm currently working on a solution. Will push soon :) -- Dr. Bobby R. Bruce Room 2235, Kemper Hall, UC Davis Davis, CA, 95616 web: https://www.bobbybruce.net On Tue, Mar 17, 2020 at 11:04 AM Jason Lowe-Power wrote: > Hey Giacomo, > > I'm not sure what's going on here or how to fix it. We could bump the > timeout again, but this isn't a long-term solution. We really need to > figure out how to get our tests off of kokoro, but that's blocked on google > right now. > > Jason > > On Tue, Mar 17, 2020 at 7:24 AM Giacomo Travaglini < > giacomo.travagl...@arm.com> wrote: > >> Hi Jason and Bobby >> >> I keep trying to merge an arch-arm patch but it seems like I cannot pass >> regressions because of a timeout. >> >> >> https://source.cloud.google.com/results/invocations/a52ffb1b-813d-4f86-bd8b-e1d5a42ea29c/targets/gem5%2Fgcp_ubuntu%2Fpresubmit/log >> >> I am running regressions internally and they pass, so I doubt there is >> something wrong with my patch: >> >> https://gem5-review.googlesource.com/c/public/gem5/+/26723 >> >> I think by porting the entire regression list we are hitting again the >> old issue of not having enought time to run >> everything. Do you have an idea on how to fix this? >> >> Giacomo >> IMPORTANT NOTICE: The contents of this email and any attachments are >> confidential and may also be privileged. If you are not the intended >> recipient, please notify the sender immediately and do not disclose the >> contents to any other person, use it for any purpose, or store or copy the >> information in any medium. Thank you. >> > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
Re: [gem5-dev] Kokoro timing out
Hey Giacomo, I'm not sure what's going on here or how to fix it. We could bump the timeout again, but this isn't a long-term solution. We really need to figure out how to get our tests off of kokoro, but that's blocked on google right now. Jason On Tue, Mar 17, 2020 at 7:24 AM Giacomo Travaglini < giacomo.travagl...@arm.com> wrote: > Hi Jason and Bobby > > I keep trying to merge an arch-arm patch but it seems like I cannot pass > regressions because of a timeout. > > > https://source.cloud.google.com/results/invocations/a52ffb1b-813d-4f86-bd8b-e1d5a42ea29c/targets/gem5%2Fgcp_ubuntu%2Fpresubmit/log > > I am running regressions internally and they pass, so I doubt there is > something wrong with my patch: > > https://gem5-review.googlesource.com/c/public/gem5/+/26723 > > I think by porting the entire regression list we are hitting again the old > issue of not having enought time to run > everything. Do you have an idea on how to fix this? > > Giacomo > IMPORTANT NOTICE: The contents of this email and any attachments are > confidential and may also be privileged. If you are not the intended > recipient, please notify the sender immediately and do not disclose the > contents to any other person, use it for any purpose, or store or copy the > information in any medium. Thank you. > ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[develop]: tests: Migrated 40.m5threads-test-atomic scons tests to testlib
Bobby R. Bruce has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/25824 )
Change subject: tests: Migrated 40.m5threads-test-atomic scons tests to
testlib
..
tests: Migrated 40.m5threads-test-atomic scons tests to testlib
At present, the 40.m5threads-test-atomic tests fail as the SPARC binary
(generated from `tests/test-progs/pthread/src/test_atomic.cpp`) is not
present. This has been noted in:
https://gem5.atlassian.net/browse/GEM5-368
Change-Id: I7865826388be46cec06a201712081146a58518f2
Jira: https://gem5.atlassian.net/browse/GEM5-109
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25824
Reviewed-by: Ayaz Akram
Maintainer: Bobby R. Bruce
Tested-by: kokoro
---
M tests/gem5/.testignore
A tests/gem5/m5threads_test_atomic/atomic_system.py
A tests/gem5/m5threads_test_atomic/ref/sparc/linux/simout
A tests/gem5/m5threads_test_atomic/test.py
4 files changed, 224 insertions(+), 0 deletions(-)
Approvals:
Ayaz Akram: Looks good to me, approved
Bobby R. Bruce: Looks good to me, approved
kokoro: Regressions pass
diff --git a/tests/gem5/.testignore b/tests/gem5/.testignore
index 6d52d3f..cc61aa6 100644
--- a/tests/gem5/.testignore
+++ b/tests/gem5/.testignore
@@ -187,3 +187,21 @@
test-hello-linux-TimingSimpleCPU-ALPHA-i386-opt
test-hello-linux-AtomicSimpleCPU-ALPHA-i386-opt
test-hello-linux-DerivO3CPU-ALPHA-i386-opt
+test-atomic-DerivO3CPU-SPARC-x86_64-opt
+test-atomic-TimingSimpleCPU-SPARC-x86_64-opt
+test-atomic-DerivO3CPU-SPARC-x86_64-debug
+test-atomic-TimingSimpleCPU-SPARC-x86_64-debug
+test-atomic-DerivO3CPU-SPARC-x86_64-fast
+test-atomic-TimingSimpleCPU-SPARC-x86_64-fast
+test-atomic-DerivO3CPU-SPARC-arch64-opt
+test-atomic-TimingSimpleCPU-SPARC-arch64-opt
+test-atomic-DerivO3CPU-SPARC-arch64-debug
+test-atomic-TimingSimpleCPU-SPARC-arch64-debug
+test-atomic-DerivO3CPU-SPARC-arch64-fast
+test-atomic-TimingSimpleCPU-SPARC-arch64-fast
+test-atomic-DerivO3CPU-SPARC-i386-opt
+test-atomic-TimingSimpleCPU-SPARC-i386-opt
+test-atomic-DerivO3CPU-SPARC-i386-debug
+test-atomic-TimingSimpleCPU-SPARC-i386-debug
+test-atomic-DerivO3CPU-SPARC-i386-fast
+test-atomic-TimingSimpleCPU-SPARC-i386-fast
diff --git a/tests/gem5/m5threads_test_atomic/atomic_system.py
b/tests/gem5/m5threads_test_atomic/atomic_system.py
new file mode 100644
index 000..2f4ae8e
--- /dev/null
+++ b/tests/gem5/m5threads_test_atomic/atomic_system.py
@@ -0,0 +1,64 @@
+# Copyright (c) 2020 The Regents of the University of California
+# All Rights Reserved.
+#
+# Redistribution and use in source and binary forms, with or without
+# modification, are permitted provided that the following conditions are
+# met: redistributions of source code must retain the above copyright
+# notice, this list of conditions and the following disclaimer;
+# redistributions in binary form must reproduce the above copyright
+# notice, this list of conditions and the following disclaimer in the
+# documentation and/or other materials provided with the distribution;
+# neither the name of the copyright holders nor the names of its
+# contributors may be used to endorse or promote products derived from
+# this software without specific prior written permission.
+#
+# THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
+# "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
+# LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
+# A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
+# OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
+# SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
+# LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
+# DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
+# THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+# (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
+# OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+
+import m5
+from m5.objects import *
+import sys
+import argparse
+
+parser = argparse.ArgumentParser(description='m5threads atomic tester')
+parser.add_argument('--cpu-type', default='DerivO3CPU')
+parser.add_argument('--num-cores', default='8')
+parser.add_argument('--cmd')
+
+args = parser.parse_args()
+
+root = Root(full_system = False)
+root.system = System()
+
+root.system.clk_domain = SrcClockDomain()
+root.system.clk_domain.clock = '3GHz'
+root.system.clk_domain.voltage_domain = VoltageDomain()
+root.system.mem_mode = 'timing'
+
+if args.cpu_type == 'DerivO3CPU':
+root.system.cpu = [DerivO3CPU(cpu_id = i)
+ for i in range (int(args.num_cores))]
+elif args.cpu_type == 'TimingSimpleCPU':
+root.system.cpu = [TimingSimpleCPU(cpu_id=i)
+ for i in range(int(args.num_cores))]
+else:
+print("ERROR: CPU Type '" + args.cpu_type + "' not supported")
+
[gem5-dev] Change in gem5/gem5[develop]: tests: Removed old scon-based 40.m5threads-test-atomic tests
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/25843 ) Change subject: tests: Removed old scon-based 40.m5threads-test-atomic tests .. tests: Removed old scon-based 40.m5threads-test-atomic tests These have been migrated to be run via testlib. Change-Id: I186e4048096f718c0de378033924cd23328168d7 Jira: https://gem5.atlassian.net/browse/GEM5-109 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/25843 Reviewed-by: Bobby R. Bruce Maintainer: Bobby R. Bruce Tested-by: kokoro --- D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/config.ini D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simerr D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/simout D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/o3-timing-mp/stats.txt D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/config.ini D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simerr D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/simout D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-atomic-mp/stats.txt D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/config.ini D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simerr D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/simout D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/skip D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp-ruby/stats.txt D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/config.ini D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simerr D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/simout D tests/quick/se/40.m5threads-test-atomic/ref/sparc/linux/simple-timing-mp/stats.txt D tests/quick/se/40.m5threads-test-atomic/test.py 18 files changed, 0 insertions(+), 10,608 deletions(-) Approvals: Bobby R. Bruce: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/25843 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: I186e4048096f718c0de378033924cd23328168d7 Gerrit-Change-Number: 25843 Gerrit-PatchSet: 4 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Ayaz Akram Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Hoa Nguyen Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[develop]: tests, arch-alpha: Removing ALPHA ISA from testlib config
Bobby R. Bruce has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/26823 ) Change subject: tests,arch-alpha: Removing ALPHA ISA from testlib config .. tests,arch-alpha: Removing ALPHA ISA from testlib config Change-Id: Icded5f4aec7bc212a818a97c4de5d7b8f8757121 Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/26823 Reviewed-by: Gabe Black Maintainer: Bobby R. Bruce Tested-by: kokoro --- M ext/testlib/config.py 1 file changed, 0 insertions(+), 3 deletions(-) Approvals: Gabe Black: Looks good to me, approved Bobby R. Bruce: Looks good to me, approved kokoro: Regressions pass diff --git a/ext/testlib/config.py b/ext/testlib/config.py index 643ef68..39d6a24 100644 --- a/ext/testlib/config.py +++ b/ext/testlib/config.py @@ -235,7 +235,6 @@ constants.isa_tag_type = 'isa' constants.x86_tag = 'X86' constants.sparc_tag = 'SPARC' -constants.alpha_tag = 'ALPHA' constants.riscv_tag = 'RISCV' constants.arm_tag = 'ARM' constants.mips_tag = 'MIPS' @@ -260,7 +259,6 @@ constants.isa_tag_type : ( constants.x86_tag, constants.sparc_tag, -constants.alpha_tag, constants.riscv_tag, constants.arm_tag, constants.mips_tag, @@ -289,7 +287,6 @@ constants.arm_tag : (constants.host_arm_tag,), constants.x86_tag : (constants.host_x86_64_tag, constants.host_i386_tag), constants.sparc_tag : (constants.host_x86_64_tag, constants.host_i386_tag), -constants.alpha_tag : (constants.host_x86_64_tag, constants.host_i386_tag), constants.riscv_tag : (constants.host_x86_64_tag, constants.host_i386_tag), constants.mips_tag : (constants.host_x86_64_tag, constants.host_i386_tag), constants.power_tag : (constants.host_x86_64_tag, constants.host_i386_tag), -- To view, visit https://gem5-review.googlesource.com/c/public/gem5/+/26823 To unsubscribe, or for help writing mail filters, visit https://gem5-review.googlesource.com/settings Gerrit-Project: public/gem5 Gerrit-Branch: develop Gerrit-Change-Id: Icded5f4aec7bc212a818a97c4de5d7b8f8757121 Gerrit-Change-Number: 26823 Gerrit-PatchSet: 2 Gerrit-Owner: Bobby R. Bruce Gerrit-Reviewer: Bobby R. Bruce Gerrit-Reviewer: Gabe Black Gerrit-Reviewer: Jason Lowe-Power Gerrit-Reviewer: Mahyar Samani Gerrit-Reviewer: kokoro Gerrit-MessageType: merged ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Kokoro timing out
Hi Jason and Bobby I keep trying to merge an arch-arm patch but it seems like I cannot pass regressions because of a timeout. https://source.cloud.google.com/results/invocations/a52ffb1b-813d-4f86-bd8b-e1d5a42ea29c/targets/gem5%2Fgcp_ubuntu%2Fpresubmit/log I am running regressions internally and they pass, so I doubt there is something wrong with my patch: https://gem5-review.googlesource.com/c/public/gem5/+/26723 I think by porting the entire regression list we are hitting again the old issue of not having enought time to run everything. Do you have an idea on how to fix this? Giacomo IMPORTANT NOTICE: The contents of this email and any attachments are confidential and may also be privileged. If you are not the intended recipient, please notify the sender immediately and do not disclose the contents to any other person, use it for any purpose, or store or copy the information in any medium. Thank you. ___ gem5-dev mailing list gem5-dev@gem5.org http://m5sim.org/mailman/listinfo/gem5-dev
[gem5-dev] Change in gem5/gem5[develop]: kern, arch: Refactor SkipFuncEvent to not use skipFunction.
Gabe Black has submitted this change. (
https://gem5-review.googlesource.com/c/public/gem5/+/24111 )
Change subject: kern,arch: Refactor SkipFuncEvent to not use skipFunction.
..
kern,arch: Refactor SkipFuncEvent to not use skipFunction.
Replace it with a new virtual function.
Change-Id: I9d516d21ab3b1d1d70ea1297f984f868d3e7c3fb
Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/24111
Reviewed-by: Gabe Black
Maintainer: Gabe Black
Tested-by: kokoro
---
M src/arch/arm/freebsd/fs_workload.cc
M src/arch/arm/freebsd/fs_workload.hh
M src/arch/arm/fs_workload.cc
M src/arch/arm/fs_workload.hh
M src/arch/arm/linux/fs_workload.cc
M src/arch/arm/linux/fs_workload.hh
M src/arch/arm/utility.cc
M src/arch/arm/utility.hh
M src/arch/mips/linux/system.cc
M src/arch/mips/linux/system.hh
M src/arch/mips/system.cc
M src/arch/mips/system.hh
M src/arch/mips/utility.cc
M src/arch/mips/utility.hh
M src/arch/power/utility.cc
M src/arch/power/utility.hh
M src/arch/riscv/utility.hh
M src/arch/sparc/utility.cc
M src/arch/sparc/utility.hh
M src/arch/x86/utility.cc
M src/arch/x86/utility.hh
M src/kern/freebsd/events.cc
M src/kern/freebsd/events.hh
M src/kern/linux/events.cc
M src/kern/linux/events.hh
M src/kern/system_events.cc
M src/kern/system_events.hh
27 files changed, 143 insertions(+), 134 deletions(-)
Approvals:
Gabe Black: Looks good to me, approved; Looks good to me, approved
kokoro: Regressions pass
diff --git a/src/arch/arm/freebsd/fs_workload.cc
b/src/arch/arm/freebsd/fs_workload.cc
index c248ff6..1792273 100644
--- a/src/arch/arm/freebsd/fs_workload.cc
+++ b/src/arch/arm/freebsd/fs_workload.cc
@@ -69,7 +69,7 @@
"oops_exit", "Kernel oops in guest");
}
-uDelaySkipEvent = addKernelFuncEvent(
+uDelaySkipEvent = addKernelFuncEvent>(
"DELAY", "DELAY", 1000, 0);
}
diff --git a/src/arch/arm/freebsd/fs_workload.hh
b/src/arch/arm/freebsd/fs_workload.hh
index 7f0ac08..0e767a5 100644
--- a/src/arch/arm/freebsd/fs_workload.hh
+++ b/src/arch/arm/freebsd/fs_workload.hh
@@ -88,7 +88,7 @@
* processor for the appropriate amount of time. This is not
functionally
* required but does speed up simulation.
*/
-FreeBSD::UDelayEvent *uDelaySkipEvent = nullptr;
+FreeBSD::UDelayEvent *uDelaySkipEvent = nullptr;
/** These variables store addresses of important data structures
* that are normaly kept coherent at boot with cache mainetence
operations.
diff --git a/src/arch/arm/fs_workload.cc b/src/arch/arm/fs_workload.cc
index ce9c464..b3dd6b5 100644
--- a/src/arch/arm/fs_workload.cc
+++ b/src/arch/arm/fs_workload.cc
@@ -51,6 +51,24 @@
namespace ArmISA
{
+void
+SkipFunc::returnFromFuncIn(ThreadContext *tc)
+{
+PCState newPC = tc->pcState();
+if (inAArch64(tc)) {
+newPC.set(tc->readIntReg(INTREG_X30));
+} else {
+newPC.set(tc->readIntReg(ReturnAddressReg) & ~ULL(1));
+}
+
+CheckerCPU *checker = tc->getCheckerCpuPtr();
+if (checker) {
+tc->pcStateNoRecord(newPC);
+} else {
+tc->pcState(newPC);
+}
+}
+
FsWorkload::FsWorkload(Params *p) : OsKernel(*p)
{
bootLoaders.reserve(p->boot_loader.size());
diff --git a/src/arch/arm/fs_workload.hh b/src/arch/arm/fs_workload.hh
index 936ddd7..5e97bba 100644
--- a/src/arch/arm/fs_workload.hh
+++ b/src/arch/arm/fs_workload.hh
@@ -52,6 +52,13 @@
namespace ArmISA
{
+class SkipFunc : public SkipFuncBase
+{
+ public:
+using SkipFuncBase::SkipFuncBase;
+void returnFromFuncIn(ThreadContext *tc) override;
+};
+
class FsWorkload : public OsKernel
{
protected:
diff --git a/src/arch/arm/linux/fs_workload.cc
b/src/arch/arm/linux/fs_workload.cc
index 3f5744b..e6058ba 100644
--- a/src/arch/arm/linux/fs_workload.cc
+++ b/src/arch/arm/linux/fs_workload.cc
@@ -224,21 +224,23 @@
// With ARM udelay() is #defined to __udelay
// newer kernels use __loop_udelay and __loop_const_udelay symbols
-uDelaySkipEvent = addKernelFuncEvent(
+uDelaySkipEvent = addKernelFuncEvent>(
"__loop_udelay", "__udelay", 1000, 0);
if (!uDelaySkipEvent)
-uDelaySkipEvent = addKernelFuncEventOrPanic(
+uDelaySkipEvent = addKernelFuncEventOrPanic>(
"__udelay", "__udelay", 1000, 0);
// constant arguments to udelay() have some precomputation done ahead
of
// time. Constant comes from code.
-constUDelaySkipEvent = addKernelFuncEvent(
+constUDelaySkipEvent = addKernelFuncEvent>(
"__loop_const_udelay", "__const_udelay", 1000, 107374);
if (!constUDelaySkipEvent)
-constUDelaySkipEvent = addKernelFuncEventOrPanic(
+constUDelaySkipEvent =
+addKernelFuncEventOrPanic>(
"__const_udelay", "__const_udelay", 1000, 107374);
-debugPrintkEvent = addKernelFuncEvent("dprintk");
+debugPrintkEvent =
+addKernelFuncEvent>("dprintk");
}
void
diff --git a/src/arch/
