[gem5-dev] Change in gem5/gem5[develop]: arch,cpu: Stop using << and to_number for VecReg serialization.
Gabe Black has uploaded this change for review. ( https://gem5-review.googlesource.com/c/public/gem5/+/41994 ) Change subject: arch,cpu: Stop using << and to_number for VecReg serialization. .. arch,cpu: Stop using << and to_number for VecReg serialization. Override ParseParam<>::parse and ShowParam<>::parse directly. This will allow using a different format for serializing and displaying registers. Also get rid of the print() methods. When any cprintf based mechanism is used (like DPRINTF), the underlying mechanism will use << to output the value. Since we already override <<, there's no reason to wrap that in a method which calls csprintf which calls << anyway. Change-Id: Id65b9a657507f2f2cdf9673fd961cfeb0590f48c --- M src/arch/generic/vec_reg.hh M src/cpu/o3/regfile.hh M src/cpu/simple_thread.hh 3 files changed, 38 insertions(+), 44 deletions(-) diff --git a/src/arch/generic/vec_reg.hh b/src/arch/generic/vec_reg.hh index c8e7938..48cd4bd 100644 --- a/src/arch/generic/vec_reg.hh +++ b/src/arch/generic/vec_reg.hh @@ -97,14 +97,13 @@ #define __ARCH_GENERIC_VEC_REG_HH__ #include -#include #include #include #include -#include #include "base/cprintf.hh" #include "base/logging.hh" +#include "sim/serialize_handlers.hh" constexpr unsigned MaxVecRegLenInBytes = 4096; @@ -175,8 +174,6 @@ return os; } -const std::string print() const { return csprintf("%s", *this); } - /** * Cast to VecRegContainer& * It is useful to get the reference to the container for ISA tricks, @@ -211,12 +208,6 @@ public: VecRegContainer() {} VecRegContainer(const VecRegContainer &) = default; -/* This is required for de-serialisation. */ -VecRegContainer(const std::vector& that) -{ -assert(that.size() >= SIZE); -std::memcpy(container.data(), &that[0], SIZE); -} /** Zero the container. */ void zero() { memset(container.data(), 0, SIZE); } @@ -239,17 +230,6 @@ std::memcpy(container.data(), that.data(), SIZE); return *this; } - -/** From vector. - * This is required for de-serialisation. - * */ -MyClass& -operator=(const std::vector& that) -{ -assert(that.size() >= SIZE); -std::memcpy(container.data(), that.data(), SIZE); -return *this; -} /** @} */ /** Equality operator. @@ -272,7 +252,6 @@ return !operator==(that); } -const std::string print() const { return csprintf("%s", *this); } /** Get pointer to bytes. */ template const Ret* raw_ptr() const { return (const Ret*)container.data(); } @@ -313,19 +292,20 @@ return VecRegT(*this); } -/** @} */ -/** - * Output operator. - * Used for serialization. - */ friend std::ostream& operator<<(std::ostream& os, const MyClass& v) { for (auto& b: v.container) { -os << csprintf("%02x", b); +ccprintf(os, "%02x", b); } return os; } + +/** @} */ +/** + * Used for serialization. + */ +friend ShowParam; }; /** @@ -333,20 +313,34 @@ */ /** @{ */ template -inline bool -to_number(const std::string& value, VecRegContainer& v) +struct ParseParam> { -fatal_if(value.size() > 2 * VecRegContainer::size(), - "Vector register value overflow at unserialize"); +static bool +parse(const std::string &s, VecRegContainer &value) +{ +fatal_if(s.size() > 2 * Sz, + "Vector register value overflow at unserialize"); -for (int i = 0; i < VecRegContainer::size(); i++) { -uint8_t b = 0; -if (2 * i < value.size()) -b = stoul(value.substr(i * 2, 2), nullptr, 16); -v.template raw_ptr()[i] = b; +for (int i = 0; i < Sz; i++) { +uint8_t b = 0; +if (2 * i < value.size()) +b = stoul(s.substr(i * 2, 2), nullptr, 16); +value.template raw_ptr()[i] = b; +} +return true; } -return true; -} +}; + +template +struct ShowParam> +{ +static void +show(std::ostream &os, const VecRegContainer &value) +{ +for (auto& b: value.container) +ccprintf(os, "%02x", b); +} +}; /** @} */ /** diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index 71f2e72..6c6b9b3 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -203,7 +203,7 @@ DPRINTF(IEW, "RegFile: Access to vector register %i, has " "data %s\n", int(phys_reg->index()), -vectorRegFile[phys_reg->index()].print()); +vectorRegFile[phys_reg->index()]); return vectorRegFile[phys_reg->index()]; } @@ -296,7 +296,7 @@ assert(phys_reg->isVectorPhysReg()); DPRINTF(IEW, "RegFile: Setting vector register %i to %s\n", -int(phys_reg->index()
[gem5-dev] Change in gem5/gem5[develop]: arch,cpu: Stop using << and to_number for VecReg serialization.
Gabe Black has submitted this change. ( https://gem5-review.googlesource.com/c/public/gem5/+/41994 ) Change subject: arch,cpu: Stop using << and to_number for VecReg serialization. .. arch,cpu: Stop using << and to_number for VecReg serialization. Override ParseParam<>::parse and ShowParam<>::parse directly. This will allow using a different format for serializing and displaying registers. Also get rid of the print() methods. When any cprintf based mechanism is used (like DPRINTF), the underlying mechanism will use << to output the value. Since we already override <<, there's no reason to wrap that in a method which calls csprintf which calls << anyway. Change-Id: Id65b9a657507f2f2cdf9673fd961cfeb0590f48c Reviewed-on: https://gem5-review.googlesource.com/c/public/gem5/+/41994 Tested-by: kokoro Reviewed-by: Giacomo Travaglini Maintainer: Giacomo Travaglini --- M src/arch/generic/vec_reg.hh M src/cpu/o3/regfile.hh M src/cpu/simple_thread.hh 3 files changed, 38 insertions(+), 44 deletions(-) Approvals: Giacomo Travaglini: Looks good to me, approved; Looks good to me, approved kokoro: Regressions pass diff --git a/src/arch/generic/vec_reg.hh b/src/arch/generic/vec_reg.hh index 379de28..64c131f 100644 --- a/src/arch/generic/vec_reg.hh +++ b/src/arch/generic/vec_reg.hh @@ -97,14 +97,13 @@ #define __ARCH_GENERIC_VEC_REG_HH__ #include -#include #include #include #include -#include #include "base/cprintf.hh" #include "base/logging.hh" +#include "sim/serialize_handlers.hh" constexpr unsigned MaxVecRegLenInBytes = 4096; @@ -175,8 +174,6 @@ return os; } -const std::string print() const { return csprintf("%s", *this); } - /** * Cast to VecRegContainer& * It is useful to get the reference to the container for ISA tricks, @@ -211,12 +208,6 @@ public: VecRegContainer() {} VecRegContainer(const VecRegContainer &) = default; -/* This is required for de-serialisation. */ -VecRegContainer(const std::vector& that) -{ -assert(that.size() >= SIZE); -std::memcpy(container.data(), &that[0], SIZE); -} /** Zero the container. */ void zero() { memset(container.data(), 0, SIZE); } @@ -239,17 +230,6 @@ std::memcpy(container.data(), that.data(), SIZE); return *this; } - -/** From vector. - * This is required for de-serialisation. - * */ -MyClass& -operator=(const std::vector& that) -{ -assert(that.size() >= SIZE); -std::memcpy(container.data(), that.data(), SIZE); -return *this; -} /** @} */ /** Equality operator. @@ -272,7 +252,6 @@ return !operator==(that); } -const std::string print() const { return csprintf("%s", *this); } /** Get pointer to bytes. */ template const Ret* raw_ptr() const { return (const Ret*)container.data(); } @@ -313,19 +292,20 @@ return VecRegT(*this); } -/** @} */ -/** - * Output operator. - * Used for serialization. - */ friend std::ostream& operator<<(std::ostream& os, const MyClass& v) { for (auto& b: v.container) { -os << csprintf("%02x", b); +ccprintf(os, "%02x", b); } return os; } + +/** @} */ +/** + * Used for serialization. + */ +friend ShowParam; }; /** @@ -333,20 +313,34 @@ */ /** @{ */ template -inline bool -to_number(const std::string& value, VecRegContainer& v) +struct ParseParam> { -fatal_if(value.size() > 2 * VecRegContainer::size(), - "Vector register value overflow at unserialize"); +static bool +parse(const std::string &str, VecRegContainer &value) +{ +fatal_if(str.size() > 2 * Sz, + "Vector register value overflow at unserialize"); -for (int i = 0; i < VecRegContainer::size(); i++) { -uint8_t b = 0; -if (2 * i < value.size()) -b = stoul(value.substr(i * 2, 2), nullptr, 16); -v.template raw_ptr()[i] = b; +for (int i = 0; i < Sz; i++) { +uint8_t b = 0; +if (2 * i < value.size()) +b = stoul(str.substr(i * 2, 2), nullptr, 16); +value.template raw_ptr()[i] = b; +} +return true; } -return true; -} +}; + +template +struct ShowParam> +{ +static void +show(std::ostream &os, const VecRegContainer &value) +{ +for (auto& b: value.container) +ccprintf(os, "%02x", b); +} +}; /** @} */ /** diff --git a/src/cpu/o3/regfile.hh b/src/cpu/o3/regfile.hh index 71f2e72..6c6b9b3 100644 --- a/src/cpu/o3/regfile.hh +++ b/src/cpu/o3/regfile.hh @@ -203,7 +203,7 @@ DPRINTF(IEW, "RegFile: Access to vector register %i, has " "data %s\n", int(phys_reg->index()), -vectorRegFile[phys_reg->index()].print()); +