Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context
Hi Chris, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Avoid-repeatedly-harming-the-same-innocent-context/20180401-022503 base: git://anongit.freedesktop.org/drm-intel for-linux-next reproduce: # apt-get install sparse make ARCH=x86_64 allmodconfig make C=1 CF=-D__CHECK_ENDIAN__ sparse warnings: (new ones prefixed by >>) drivers/gpu/drm/i915/selftests/intel_hangcheck.c:988:33: sparse: undefined identifier 'GEM_TRACE_DUMP' >> drivers/gpu/drm/i915/selftests/intel_hangcheck.c:988:47: sparse: call with >> no type! In file included from drivers/gpu/drm/i915/intel_hangcheck.c:465:0: drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 'igt_reset_queue': drivers/gpu/drm/i915/selftests/intel_hangcheck.c:988:5: error: implicit declaration of function 'GEM_TRACE_DUMP'; did you mean 'GEM_TRACE'? [-Werror=implicit-function-declaration] GEM_TRACE_DUMP(); ^~ GEM_TRACE cc1: some warnings being treated as errors vim +988 drivers/gpu/drm/i915/selftests/intel_hangcheck.c 922 923 static int igt_reset_queue(void *arg) 924 { 925 struct drm_i915_private *i915 = arg; 926 struct intel_engine_cs *engine; 927 enum intel_engine_id id; 928 struct hang h; 929 int err; 930 931 /* Check that we replay pending requests following a hang */ 932 933 global_reset_lock(i915); 934 935 mutex_lock(&i915->drm.struct_mutex); 936 err = hang_init(&h, i915); 937 if (err) 938 goto unlock; 939 940 for_each_engine(engine, i915, id) { 941 struct i915_request *prev; 942 IGT_TIMEOUT(end_time); 943 unsigned int count; 944 945 if (!intel_engine_can_store_dword(engine)) 946 continue; 947 948 prev = hang_create_request(&h, engine); 949 if (IS_ERR(prev)) { 950 err = PTR_ERR(prev); 951 goto fini; 952 } 953 954 i915_request_get(prev); 955 __i915_request_add(prev, true); 956 957 count = 0; 958 do { 959 struct i915_request *rq; 960 unsigned int reset_count; 961 962 rq = hang_create_request(&h, engine); 963 if (IS_ERR(rq)) { 964 err = PTR_ERR(rq); 965 goto fini; 966 } 967 968 i915_request_get(rq); 969 __i915_request_add(rq, true); 970 971 /* 972 * XXX We don't handle resetting the kernel context 973 * very well. If we trigger a device reset twice in 974 * quick succession while the kernel context is 975 * executing, we may end up skipping the breadcrumb. 976 * This is really only a problem for the selftest as 977 * normally there is a large interlude between resets 978 * (hangcheck), or we focus on resetting just one 979 * engine and so avoid repeatedly resetting innocents. 980 */ 981 err = wait_for_others(i915, engine); 982 if (err) { 983 pr_err("%s(%s): Failed to idle other inactive engines after device reset\n", 984 __func__, engine->name); 985 i915_request_put(rq); 986 i915_request_put(prev); 987 > 988 GEM_TRACE_DUMP(); 989 i915_gem_set_wedged(i915); 990 goto fini; 991 } 992 993 if (!wait_for_hang(&h, prev)) { 994 struct drm_printer p = drm_info_printer(i915->drm.dev); 995 996 pr_err("%s(%s): Failed to start request %x, at %x\n", 997 __func__, engine->name, 998 prev->fen
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context
Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Avoid-repeatedly-harming-the-same-innocent-context/20180401-022503 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: x86_64-randconfig-x011-201813 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=x86_64 All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/i915/intel_hangcheck.c:465:0: drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 'igt_reset_queue': >> drivers/gpu/drm/i915/selftests/intel_hangcheck.c:988:5: error: implicit >> declaration of function 'GEM_TRACE_DUMP'; did you mean 'GEM_TRACE'? >> [-Werror=implicit-function-declaration] GEM_TRACE_DUMP(); ^~ GEM_TRACE cc1: some warnings being treated as errors vim +988 drivers/gpu/drm/i915/selftests/intel_hangcheck.c 922 923 static int igt_reset_queue(void *arg) 924 { 925 struct drm_i915_private *i915 = arg; 926 struct intel_engine_cs *engine; 927 enum intel_engine_id id; 928 struct hang h; 929 int err; 930 931 /* Check that we replay pending requests following a hang */ 932 933 global_reset_lock(i915); 934 935 mutex_lock(&i915->drm.struct_mutex); 936 err = hang_init(&h, i915); 937 if (err) 938 goto unlock; 939 940 for_each_engine(engine, i915, id) { 941 struct i915_request *prev; 942 IGT_TIMEOUT(end_time); 943 unsigned int count; 944 945 if (!intel_engine_can_store_dword(engine)) 946 continue; 947 948 prev = hang_create_request(&h, engine); 949 if (IS_ERR(prev)) { 950 err = PTR_ERR(prev); 951 goto fini; 952 } 953 954 i915_request_get(prev); 955 __i915_request_add(prev, true); 956 957 count = 0; 958 do { 959 struct i915_request *rq; 960 unsigned int reset_count; 961 962 rq = hang_create_request(&h, engine); 963 if (IS_ERR(rq)) { 964 err = PTR_ERR(rq); 965 goto fini; 966 } 967 968 i915_request_get(rq); 969 __i915_request_add(rq, true); 970 971 /* 972 * XXX We don't handle resetting the kernel context 973 * very well. If we trigger a device reset twice in 974 * quick succession while the kernel context is 975 * executing, we may end up skipping the breadcrumb. 976 * This is really only a problem for the selftest as 977 * normally there is a large interlude between resets 978 * (hangcheck), or we focus on resetting just one 979 * engine and so avoid repeatedly resetting innocents. 980 */ 981 err = wait_for_others(i915, engine); 982 if (err) { 983 pr_err("%s(%s): Failed to idle other inactive engines after device reset\n", 984 __func__, engine->name); 985 i915_request_put(rq); 986 i915_request_put(prev); 987 > 988 GEM_TRACE_DUMP(); 989 i915_gem_set_wedged(i915); 990 goto fini; 991 } 992 993 if (!wait_for_hang(&h, prev)) { 994 struct drm_printer p = drm_info_printer(i915->drm.dev); 995 996 pr_err("%s(%s): Failed to start request %x, at %x\n", 997 __func__, engine->name, 998 prev->fence.seqno, hws_seqno(&h, prev)); 999 intel_engine_dump(engine, &p, 1000
Re: [Intel-gfx] [PATCH] drm/i915/selftests: Avoid repeatedly harming the same innocent context
Hi Chris, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Chris-Wilson/drm-i915-selftests-Avoid-repeatedly-harming-the-same-innocent-context/20180401-022503 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-b0-04010137 (attached as .config) compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): In file included from drivers/gpu/drm/i915/intel_hangcheck.c:465:0: drivers/gpu/drm/i915/selftests/intel_hangcheck.c: In function 'igt_reset_queue': >> drivers/gpu/drm/i915/selftests/intel_hangcheck.c:988:5: error: implicit >> declaration of function 'GEM_TRACE_DUMP' >> [-Werror=implicit-function-declaration] GEM_TRACE_DUMP(); ^ cc1: all warnings being treated as errors vim +/GEM_TRACE_DUMP +988 drivers/gpu/drm/i915/selftests/intel_hangcheck.c 922 923 static int igt_reset_queue(void *arg) 924 { 925 struct drm_i915_private *i915 = arg; 926 struct intel_engine_cs *engine; 927 enum intel_engine_id id; 928 struct hang h; 929 int err; 930 931 /* Check that we replay pending requests following a hang */ 932 933 global_reset_lock(i915); 934 935 mutex_lock(&i915->drm.struct_mutex); 936 err = hang_init(&h, i915); 937 if (err) 938 goto unlock; 939 940 for_each_engine(engine, i915, id) { 941 struct i915_request *prev; 942 IGT_TIMEOUT(end_time); 943 unsigned int count; 944 945 if (!intel_engine_can_store_dword(engine)) 946 continue; 947 948 prev = hang_create_request(&h, engine); 949 if (IS_ERR(prev)) { 950 err = PTR_ERR(prev); 951 goto fini; 952 } 953 954 i915_request_get(prev); 955 __i915_request_add(prev, true); 956 957 count = 0; 958 do { 959 struct i915_request *rq; 960 unsigned int reset_count; 961 962 rq = hang_create_request(&h, engine); 963 if (IS_ERR(rq)) { 964 err = PTR_ERR(rq); 965 goto fini; 966 } 967 968 i915_request_get(rq); 969 __i915_request_add(rq, true); 970 971 /* 972 * XXX We don't handle resetting the kernel context 973 * very well. If we trigger a device reset twice in 974 * quick succession while the kernel context is 975 * executing, we may end up skipping the breadcrumb. 976 * This is really only a problem for the selftest as 977 * normally there is a large interlude between resets 978 * (hangcheck), or we focus on resetting just one 979 * engine and so avoid repeatedly resetting innocents. 980 */ 981 err = wait_for_others(i915, engine); 982 if (err) { 983 pr_err("%s(%s): Failed to idle other inactive engines after device reset\n", 984 __func__, engine->name); 985 i915_request_put(rq); 986 i915_request_put(prev); 987 > 988 GEM_TRACE_DUMP(); 989 i915_gem_set_wedged(i915); 990 goto fini; 991 } 992 993 if (!wait_for_hang(&h, prev)) { 994 struct drm_printer p = drm_info_printer(i915->drm.dev); 995 996 pr_err("%s(%s): Failed to start request %x, at %x\n", 997 __func__, engine->name, 998 prev->fence.seqno, hws_seqno(&h, prev)); 999 intel_engine_dump(engine, &p, 1000"%s\n", engine->na
Re: [Intel-gfx] [PATCH v1] drm/i915: Add Exec param to control data port coherency.
Hi Tomasz, Thank you for the patch! Perhaps something to improve: [auto build test WARNING on drm-intel/for-linux-next] [also build test WARNING on v4.16-rc7 next-20180329] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Tomasz-Lis/drm-i915-Add-Exec-param-to-control-data-port-coherency/20180401-021313 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-x010-201813 (attached as .config) compiler: gcc-7 (Debian 7.3.0-1) 7.3.0 reproduce: # save the attached .config to linux build tree make ARCH=i386 All warnings (new ones prefixed by >>): In file included from drivers/gpu//drm/i915/i915_request.h:30:0, from drivers/gpu//drm/i915/i915_gem_timeline.h:30, from drivers/gpu//drm/i915/intel_ringbuffer.h:8, from drivers/gpu//drm/i915/intel_lrc.h:27, from drivers/gpu//drm/i915/i915_drv.h:63, from drivers/gpu//drm/i915/i915_gem_execbuffer.c:38: drivers/gpu//drm/i915/i915_gem_execbuffer.c: In function 'i915_gem_do_execbuffer': drivers/gpu//drm/i915/i915_gem.h:47:54: warning: statement with no effect [-Wunused-value] #define GEM_WARN_ON(expr) (BUILD_BUG_ON_INVALID(expr), 0) ~~~^~~~ >> drivers/gpu//drm/i915/i915_gem_execbuffer.c:2389:2: note: in expansion of >> macro 'GEM_WARN_ON' GEM_WARN_ON(err); ^~~ vim +/GEM_WARN_ON +2389 drivers/gpu//drm/i915/i915_gem_execbuffer.c 2182 2183 static int 2184 i915_gem_do_execbuffer(struct drm_device *dev, 2185 struct drm_file *file, 2186 struct drm_i915_gem_execbuffer2 *args, 2187 struct drm_i915_gem_exec_object2 *exec, 2188 struct drm_syncobj **fences) 2189 { 2190 struct i915_execbuffer eb; 2191 struct dma_fence *in_fence = NULL; 2192 struct sync_file *out_fence = NULL; 2193 int out_fence_fd = -1; 2194 int err; 2195 2196 BUILD_BUG_ON(__EXEC_INTERNAL_FLAGS & ~__I915_EXEC_ILLEGAL_FLAGS); 2197 BUILD_BUG_ON(__EXEC_OBJECT_INTERNAL_FLAGS & 2198 ~__EXEC_OBJECT_UNKNOWN_FLAGS); 2199 2200 eb.i915 = to_i915(dev); 2201 eb.file = file; 2202 eb.args = args; 2203 if (DBG_FORCE_RELOC || !(args->flags & I915_EXEC_NO_RELOC)) 2204 args->flags |= __EXEC_HAS_RELOC; 2205 2206 eb.exec = exec; 2207 eb.vma = (struct i915_vma **)(exec + args->buffer_count + 1); 2208 eb.vma[0] = NULL; 2209 eb.flags = (unsigned int *)(eb.vma + args->buffer_count + 1); 2210 2211 eb.invalid_flags = __EXEC_OBJECT_UNKNOWN_FLAGS; 2212 if (USES_FULL_PPGTT(eb.i915)) 2213 eb.invalid_flags |= EXEC_OBJECT_NEEDS_GTT; 2214 reloc_cache_init(&eb.reloc_cache, eb.i915); 2215 2216 eb.buffer_count = args->buffer_count; 2217 eb.batch_start_offset = args->batch_start_offset; 2218 eb.batch_len = args->batch_len; 2219 2220 eb.batch_flags = 0; 2221 if (args->flags & I915_EXEC_SECURE) { if (!drm_is_current_master(file) || !capable(CAP_SYS_ADMIN)) 2223 return -EPERM; 2224 2225 eb.batch_flags |= I915_DISPATCH_SECURE; 2226 } 2227 if (args->flags & I915_EXEC_IS_PINNED) 2228 eb.batch_flags |= I915_DISPATCH_PINNED; 2229 2230 eb.engine = eb_select_engine(eb.i915, file, args); 2231 if (!eb.engine) 2232 return -EINVAL; 2233 2234 if (args->flags & I915_EXEC_RESOURCE_STREAMER) { 2235 if (!HAS_RESOURCE_STREAMER(eb.i915)) { 2236 DRM_DEBUG("RS is only allowed for Haswell, Gen8 and above\n"); 2237 return -EINVAL; 2238 } 2239 if (eb.engine->id != RCS) { 2240 DRM_DEBUG("RS is not available on %s\n", 2241 eb.engine->name); 2242 return -EINVAL; 2243 } 2244 2245 eb.batch_flags |= I915_DISPATCH_RS; 2246 } 2247 2248 if (args->flags & I915_EXEC_DATA_PORT_COHERENT) { 2249 if (INTEL_GEN(eb.i915) < 9) { 2250 DRM_DEBUG("Data Port Coherency is only allowed for Gen9 and above\n"); 2251 return -EINVAL; 2252 } 2253 if (eb.engine->class != RENDER_CLASS) { 2254 DRM_DEBUG("Data Port Coherency is not available on %s\n", 225
[Intel-gfx] ✗ Fi.CI.IGT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : failure == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend: dmesg-warn -> PASS (shard-snb) Test kms_cursor_legacy: Subgroup cursor-vs-flip-toggle: pass -> FAIL (shard-hsw) Known issues: Test gem_softpin: Subgroup noreloc-s3: incomplete -> PASS (shard-hsw) fdo#103540 +1 Test kms_cursor_legacy: Subgroup 2x-long-flip-vs-cursor-atomic: pass -> FAIL (shard-hsw) fdo#104873 Test kms_flip: Subgroup 2x-blocking-wf_vblank: pass -> FAIL (shard-hsw) fdo#100368 +2 Test kms_frontbuffer_tracking: Subgroup fbc-1p-primscrn-shrfb-msflip-blt: dmesg-fail -> PASS (shard-apl) fdo#104727 Test kms_rotation_crc: Subgroup sprite-rotation-180: pass -> FAIL (shard-hsw) fdo#103925 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#104873 https://bugs.freedesktop.org/show_bug.cgi?id=104873 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727 fdo#103925 https://bugs.freedesktop.org/show_bug.cgi?id=103925 shard-apltotal:3495 pass:1831 dwarn:1 dfail:0 fail:7 skip:1655 time:12840s shard-hswtotal:3449 pass:1759 dwarn:1 dfail:0 fail:7 skip:1680 time:10961s shard-snbtotal:3495 pass:1374 dwarn:1 dfail:0 fail:3 skip:2117 time:7017s Blacklisted hosts: shard-kbltotal:3495 pass:1959 dwarn:1 dfail:0 fail:7 skip:1528 time:9258s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8558/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : success == Summary == Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences https://patchwork.freedesktop.org/api/1.0/series/40870/revisions/2/mbox/ Known issues: Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: fail -> PASS (fi-gdg-551) fdo#102575 Test kms_pipe_crc_basic: Subgroup suspend-read-crc-pipe-b: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 Test prime_vgem: Subgroup basic-fence-flip: pass -> FAIL (fi-ilk-650) fdo#104008 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:431s fi-bdw-gvtdvmtotal:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:442s fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:382s fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:537s fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:295s fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:512s fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:516s fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:521s fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:509s fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:411s fi-cfl-s3total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:559s fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:511s fi-cnl-y3total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:589s fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:418s fi-gdg-551 total:285 pass:177 dwarn:0 dfail:0 fail:0 skip:108 time:319s fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:535s fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:403s fi-ilk-650 total:285 pass:224 dwarn:0 dfail:0 fail:1 skip:60 time:421s fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:480s fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:430s fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:471s fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:460s fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:509s fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:664s fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:440s fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:539s fi-skl-6700k2total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:506s fi-skl-6770hqtotal:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:506s fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:432s fi-skl-gvtdvmtotal:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:443s fi-snb-2520m total:242 pass:208 dwarn:0 dfail:0 fail:0 skip:33 fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:401s Blacklisted hosts: fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:516s fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:483s c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest 9930dadfffba drm/i915/execlists: Track begin/end of execlists submission sequences == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8558/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.BAT: failure for drm/i915/execlists: Track begin/end of execlists submission sequences (rev2)
== Series Details == Series: drm/i915/execlists: Track begin/end of execlists submission sequences (rev2) URL : https://patchwork.freedesktop.org/series/40870/ State : failure == Summary == Series 40870v2 drm/i915/execlists: Track begin/end of execlists submission sequences https://patchwork.freedesktop.org/api/1.0/series/40870/revisions/2/mbox/ Possible new issues: Test kms_flip: Subgroup basic-flip-vs-modeset: pass -> INCOMPLETE (fi-cnl-y3) Known issues: Test debugfs_test: Subgroup read_all_entries: pass -> INCOMPLETE (fi-snb-2520m) fdo#103713 fdo#103713 https://bugs.freedesktop.org/show_bug.cgi?id=103713 fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:431s fi-bdw-gvtdvmtotal:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:439s fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:379s fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:538s fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:294s fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:512s fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:512s fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:519s fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:506s fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:413s fi-cfl-s3total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:556s fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:515s fi-cnl-y3total:217 pass:196 dwarn:0 dfail:0 fail:0 skip:20 fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:426s fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:317s fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:403s fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:421s fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:470s fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:436s fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:470s fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:464s fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:509s fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:665s fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:448s fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:533s fi-skl-6700k2total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:503s fi-skl-6770hqtotal:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:510s fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:432s fi-skl-gvtdvmtotal:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:442s fi-snb-2520m total:3pass:2dwarn:0 dfail:0 fail:0 skip:0 fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:399s Blacklisted hosts: fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:523s fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:486s c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest cd193e310ed5 drm/i915/execlists: Track begin/end of execlists submission sequences == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8557/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.IGT: failure for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset
== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : failure == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend: dmesg-warn -> PASS (shard-snb) Test kms_cursor_legacy: Subgroup cursor-vs-flip-toggle: pass -> FAIL (shard-hsw) Known issues: Test gem_softpin: Subgroup noreloc-s3: incomplete -> PASS (shard-hsw) fdo#103540 +1 Test kms_flip_tiling: Subgroup flip-to-yf-tiled: pass -> FAIL (shard-apl) fdo#103822 Test kms_frontbuffer_tracking: Subgroup fbc-1p-primscrn-shrfb-msflip-blt: dmesg-fail -> PASS (shard-apl) fdo#104727 Test kms_sysfs_edid_timing: warn -> PASS (shard-apl) fdo#100047 Test kms_vblank: Subgroup pipe-a-accuracy-idle: pass -> FAIL (shard-hsw) fdo#102583 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#103822 https://bugs.freedesktop.org/show_bug.cgi?id=103822 fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727 fdo#100047 https://bugs.freedesktop.org/show_bug.cgi?id=100047 fdo#102583 https://bugs.freedesktop.org/show_bug.cgi?id=102583 shard-apltotal:3495 pass:1831 dwarn:1 dfail:0 fail:8 skip:1655 time:12859s shard-hswtotal:3454 pass:1761 dwarn:1 dfail:0 fail:3 skip:1687 time:11262s shard-snbtotal:3495 pass:1374 dwarn:1 dfail:0 fail:3 skip:2117 time:6957s Blacklisted hosts: shard-kbltotal:3495 pass:1959 dwarn:1 dfail:0 fail:7 skip:1528 time:9276s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8556/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH v2] drm/i915/execlists: Track begin/end of execlists submission sequences
We would like to start doing some bookkeeping at the beginning, between contexts and at the end of execlists submission. We already mark the beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication when the HW is idle. This give us a pair of sequence points we can then expand on for further bookkeeping. v2: Refactor guc submission to share the same begin/end. Signed-off-by: Chris Wilson Cc: Mika Kuoppala Cc: Francisco Jerez Reviewed-by: Francisco Jerez #v1 --- drivers/gpu/drm/i915/intel_guc_submission.c | 17 ++ drivers/gpu/drm/i915/intel_lrc.c| 50 ++--- drivers/gpu/drm/i915/intel_ringbuffer.h | 15 - 3 files changed, 63 insertions(+), 19 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_guc_submission.c b/drivers/gpu/drm/i915/intel_guc_submission.c index 207cda062626..749f27916a02 100644 --- a/drivers/gpu/drm/i915/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/intel_guc_submission.c @@ -728,7 +728,7 @@ static void guc_dequeue(struct intel_engine_cs *engine) execlists->first = rb; if (submit) { port_assign(port, last); - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER); + execlists_user_begin(execlists, execlists->port); guc_submit(engine); } @@ -748,17 +748,20 @@ static void guc_submission_tasklet(unsigned long data) struct execlist_port *port = execlists->port; struct i915_request *rq; - rq = port_request(&port[0]); + rq = port_request(port); while (rq && i915_request_completed(rq)) { trace_i915_request_out(rq); i915_request_put(rq); - execlists_port_complete(execlists, port); - - rq = port_request(&port[0]); + port = execlists_port_complete(execlists, port); + if (port_isset(port)) { + execlists_user_begin(execlists, port); + rq = port_request(port); + } else { + execlists_user_end(execlists); + rq = NULL; + } } - if (!rq) - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER); if (execlists_is_active(execlists, EXECLISTS_ACTIVE_PREEMPT) && intel_read_status_page(engine, I915_GEM_HWS_PREEMPT_INDEX) == diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index f60b61bf8b3b..4d08875422b6 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -374,6 +374,19 @@ execlists_context_status_change(struct i915_request *rq, unsigned long status) status, rq); } +inline void +execlists_user_begin(struct intel_engine_execlists *execlists, +const struct execlist_port *port) +{ + execlists_set_active_once(execlists, EXECLISTS_ACTIVE_USER); +} + +inline void +execlists_user_end(struct intel_engine_execlists *execlists) +{ + execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER); +} + static inline void execlists_context_schedule_in(struct i915_request *rq) { @@ -711,7 +724,7 @@ static void execlists_dequeue(struct intel_engine_cs *engine) spin_unlock_irq(&engine->timeline->lock); if (submit) { - execlists_set_active(execlists, EXECLISTS_ACTIVE_USER); + execlists_user_begin(execlists, execlists->port); execlists_submit_ports(engine); } @@ -742,7 +755,7 @@ execlists_cancel_port_requests(struct intel_engine_execlists * const execlists) port++; } - execlists_clear_active(execlists, EXECLISTS_ACTIVE_USER); + execlists_user_end(execlists); } static void clear_gtiir(struct intel_engine_cs *engine) @@ -873,7 +886,7 @@ static void execlists_submission_tasklet(unsigned long data) { struct intel_engine_cs * const engine = (struct intel_engine_cs *)data; struct intel_engine_execlists * const execlists = &engine->execlists; - struct execlist_port * const port = execlists->port; + struct execlist_port *port = execlists->port; struct drm_i915_private *dev_priv = engine->i915; bool fw = false; @@ -1012,10 +1025,28 @@ static void execlists_submission_tasklet(unsigned long data) GEM_BUG_ON(count == 0); if (--count == 0) { + /* +* On the final event corresponding to the +* submission of this context, we expect either +* an element-switch event or a completion +* event (and on completion, the active-idle +* marker). No more preemptions, lite-restore +* or otherwise. +*/
Re: [Intel-gfx] [PATCH] drm/i915/execlists: Track begin/end of execlists submission sequences
Quoting Francisco Jerez (2018-03-29 18:20:23) > Chris Wilson writes: > > > We would like to start doing some bookkeeping at the beginning, between > > contexts and at the end of execlists submission. We already mark the > > beginning and end using EXECLISTS_ACTIVE_USER, to provide an indication > > when the HW is idle. This give us a pair of sequence points we can then > > expand on for further bookkeeping. > > > > Signed-off-by: Chris Wilson > > Cc: Mika Kuoppala > > Cc: Francisco Jerez > > Do we want to update the EXECLISTS_ACTIVE_USER tracking done in > intel_guc_submission.c to use the same wrappers? Either way looks okay > to me: Yeah, looking at what's in the pipeline, the hook from guc will be used in the same way. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.BAT: success for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset
== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : success == Summary == Series 40983v1 series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset https://patchwork.freedesktop.org/api/1.0/series/40983/revisions/1/mbox/ Known issues: Test kms_flip: Subgroup basic-flip-vs-wf_vblank: pass -> FAIL (fi-cfl-s3) fdo#100368 Test kms_pipe_crc_basic: Subgroup nonblocking-crc-pipe-b-frame-sequence: pass -> FAIL (fi-skl-guc) fdo#103191 Subgroup suspend-read-crc-pipe-c: pass -> INCOMPLETE (fi-bxt-dsi) fdo#103927 Test prime_vgem: Subgroup basic-fence-flip: pass -> FAIL (fi-ilk-650) fdo#104008 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#103191 https://bugs.freedesktop.org/show_bug.cgi?id=103191 fdo#103927 https://bugs.freedesktop.org/show_bug.cgi?id=103927 fdo#104008 https://bugs.freedesktop.org/show_bug.cgi?id=104008 fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:430s fi-bdw-gvtdvmtotal:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:438s fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:380s fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:537s fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:296s fi-bxt-dsi total:243 pass:216 dwarn:0 dfail:0 fail:0 skip:26 fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:510s fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:518s fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:509s fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:413s fi-cfl-s3total:285 pass:258 dwarn:0 dfail:0 fail:1 skip:26 time:545s fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:516s fi-cnl-y3total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:590s fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:421s fi-gdg-551 total:285 pass:176 dwarn:0 dfail:0 fail:1 skip:108 time:316s fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:539s fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:410s fi-ilk-650 total:285 pass:224 dwarn:0 dfail:0 fail:1 skip:60 time:421s fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:480s fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:428s fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:472s fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:463s fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:510s fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:663s fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:442s fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:529s fi-skl-6700k2total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:501s fi-skl-6770hqtotal:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:498s fi-skl-guc total:285 pass:256 dwarn:0 dfail:0 fail:1 skip:28 time:431s fi-skl-gvtdvmtotal:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:446s fi-snb-2520m total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:589s fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:396s Blacklisted hosts: fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:520s fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:484s c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest c744cd907ad6 drm/i915: Always assume the GPU reset occurs 39dc3c1c4ddd drm/i915: Only call finish_reset after a prepare_reset == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8556/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✗ Fi.CI.CHECKPATCH: warning for series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset
== Series Details == Series: series starting with [1/2] drm/i915: Only call finish_reset after a prepare_reset URL : https://patchwork.freedesktop.org/series/40983/ State : warning == Summary == $ dim checkpatch origin/drm-tip 39dc3c1c4ddd drm/i915: Only call finish_reset after a prepare_reset c744cd907ad6 drm/i915: Always assume the GPU reset occurs -:9: WARNING:TYPO_SPELLING: 'occured' may be misspelled - perhaps 'occurred'? #9: Don't trust the user controlled i915.reset, but assume the reset occured total: 0 errors, 1 warnings, 0 checks, 9 lines checked ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] ✓ Fi.CI.IGT: success for drm/i915: Store preemption capability in engine->flags
== Series Details == Series: drm/i915: Store preemption capability in engine->flags URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Possible new issues: Test kms_cursor_crc: Subgroup cursor-64x64-suspend: dmesg-warn -> PASS (shard-snb) Known issues: Test gem_softpin: Subgroup noreloc-s3: incomplete -> PASS (shard-hsw) fdo#103540 Test kms_flip: Subgroup 2x-plain-flip-ts-check-interruptible: pass -> FAIL (shard-hsw) fdo#100368 Subgroup flip-vs-expired-vblank: pass -> FAIL (shard-hsw) fdo#102887 +1 Test kms_frontbuffer_tracking: Subgroup fbc-1p-primscrn-shrfb-msflip-blt: dmesg-fail -> PASS (shard-apl) fdo#104727 fdo#103540 https://bugs.freedesktop.org/show_bug.cgi?id=103540 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fdo#102887 https://bugs.freedesktop.org/show_bug.cgi?id=102887 fdo#104727 https://bugs.freedesktop.org/show_bug.cgi?id=104727 shard-apltotal:3495 pass:1831 dwarn:1 dfail:0 fail:7 skip:1655 time:12870s shard-hswtotal:3495 pass:1780 dwarn:1 dfail:0 fail:4 skip:1709 time:11701s shard-snbtotal:3495 pass:1374 dwarn:1 dfail:0 fail:3 skip:2117 time:6982s Blacklisted hosts: shard-kbltotal:3495 pass:1958 dwarn:1 dfail:0 fail:8 skip:1528 time:9227s == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8555/shards.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 2/2] drm/i915: Always assume the GPU reset occurs
Don't trust the user controlled i915.reset, but assume the reset occured and always clear the state beforehand and do a full recovery afterwards. Testcase: igt/gem_eio Signed-off-by: Chris Wilson Cc: Ville Syrjälä --- drivers/gpu/drm/i915/intel_display.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 9c6156216e5e..2168611c593b 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3666,8 +3666,7 @@ __intel_display_resume(struct drm_device *dev, static bool gpu_reset_clobbers_display(struct drm_i915_private *dev_priv) { - return intel_has_gpu_reset(dev_priv) && - INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv); + return INTEL_GEN(dev_priv) < 5 && !IS_G4X(dev_priv); } void intel_prepare_reset(struct drm_i915_private *dev_priv) -- 2.16.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH 1/2] drm/i915: Only call finish_reset after a prepare_reset
If we skip the intel_prepare_reset(), we should also skip the intel_display_reset(). If we we use a flag set by intel_prepare_reset() then we do not have to second guess based on external user controlled state whether or not the prepare was called before deciding to finish it after the reset. igt/gem_eio is one such example that may tweak i915.reset faster than the code is expecting, leading to [ 190.233528] = [ 190.233534] WARNING: bad unlock balance detected! [ 190.233540] 4.16.0-rc7-g335ef9849310-drmtip_10+ #1 Tainted: G U [ 190.233547] - [ 190.233553] gem_eio/1348 is trying to release lock (crtc_ww_class_acquire) at: [ 190.233569] [] drm_modeset_acquire_fini+0x0/0x60 [ 190.233575] but there are no more locks to release! [ 190.233580] other info that might help us debug this: [ 190.233588] 3 locks held by gem_eio/1348: [ 190.233592] #0: (&f->f_pos_lock){+.+.}, at: [] __fdget_pos+0x3a/0x50 [ 190.233607] #1: (sb_writers#11){.+.+}, at: [ ] vfs_write+0x188/0x1a0 [ 190.233622] #2: (&attr->mutex){+.+.}, at: [<11f40afe>] simple_attr_write+0x36/0xd0 [ 190.233635] stack backtrace: [ 190.233644] CPU: 0 PID: 1348 Comm: gem_eio Tainted: G U 4.16.0-rc7-g335ef9849310-drmtip_10+ #1 [ 190.233655] Hardware name: Dell Inc. OptiPlex GX280 /0G8310, BIOS A04 02/09/2005 [ 190.233664] Call Trace: [ 190.233674] dump_stack+0x67/0x95 [ 190.233682] ? drm_modeset_backoff+0x1b0/0x1b0 [ 190.233690] print_unlock_imbalance_bug+0xd2/0xe0 [ 190.233698] ? drm_modeset_backoff+0x1b0/0x1b0 [ 190.233704] lock_release+0x23e/0x300 [ 190.233712] drm_modeset_acquire_fini+0x16/0x60 [ 190.233835] intel_finish_reset+0x72/0x160 [i915] [ 190.233894] i915_reset_device+0x1e9/0x240 [i915] [ 190.233953] ? __intel_get_crtc_scanline+0x1c0/0x1c0 [i915] [ 190.233962] ? work_on_cpu_safe+0x50/0x50 [ 190.234020] i915_handle_error+0x1f2/0x470 [i915] [ 190.234031] ? __might_fault+0x39/0x90 [ 190.234037] ? __might_fault+0x39/0x90 [ 190.234099] i915_wedged_set+0x7f/0xc0 [i915] [ 190.234107] simple_attr_write+0xb0/0xd0 [ 190.234117] full_proxy_write+0x51/0x80 [ 190.234125] __vfs_write+0x21/0x140 [ 190.234133] ? rcu_read_lock_sched_held+0x6f/0x80 [ 190.234140] ? rcu_sync_lockdep_assert+0x29/0x50 [ 190.234147] ? __sb_start_write+0x152/0x1f0 [ 190.234152] ? __sb_start_write+0x168/0x1f0 [ 190.234159] vfs_write+0xbd/0x1a0 [ 190.234166] SyS_write+0x40/0xa0 [ 190.234173] ? do_syscall_64+0x19/0x1b0 [ 190.234180] do_syscall_64+0x6b/0x1b0 [ 190.234188] entry_SYSCALL_64_after_hwframe+0x42/0xb7 [ 190.234196] RIP: 0033:0x7f84c1b392b7 [ 190.234201] RSP: 002b:7f84b6755b00 EFLAGS: 0293 ORIG_RAX: 0001 [ 190.234211] RAX: ffda RBX: 0046 RCX: 7f84c1b392b7 [ 190.234218] RDX: 0002 RSI: 55ec20abc8d6 RDI: 0046 [ 190.234225] RBP: 55ec20abc8d6 R08: R09: [ 190.234231] R10: R11: 0293 R12: 0002 [ 190.234238] R13: R14: 7f84bb20 R15: 55ec20ce4eb8 Testcase: igt/gem_eio Signed-off-by: Chris Wilson Cc: Ville Syrjälä Cc: Maarten Lankhorst --- drivers/gpu/drm/i915/intel_display.c | 9 +++-- 1 file changed, 3 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 415fb8cf2cf4..9c6156216e5e 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -3677,7 +3677,6 @@ void intel_prepare_reset(struct drm_i915_private *dev_priv) struct drm_atomic_state *state; int ret; - /* reset doesn't touch the display */ if (!i915_modparams.force_reset_modeset_test && !gpu_reset_clobbers_display(dev_priv)) @@ -3731,19 +3730,17 @@ void intel_finish_reset(struct drm_i915_private *dev_priv) { struct drm_device *dev = &dev_priv->drm; struct drm_modeset_acquire_ctx *ctx = &dev_priv->reset_ctx; - struct drm_atomic_state *state = dev_priv->modeset_restore_state; + struct drm_atomic_state *state; int ret; /* reset doesn't touch the display */ - if (!i915_modparams.force_reset_modeset_test && - !gpu_reset_clobbers_display(dev_priv)) + if (!test_bit(I915_RESET_MODESET, &dev_priv->gpu_error.flags)) return; + state = fetch_and_zero(&dev_priv->modeset_restore_state); if (!state) goto unlock; - dev_priv->modeset_restore_state = NULL; - /* reset doesn't touch the display */ if (!gpu_reset_clobbers_display(dev_priv)) { /* for testing only restore the display */ -- 2.16.3 ___ Intel-gfx mailing list Intel-gfx@lists.fr
[Intel-gfx] ✓ Fi.CI.BAT: success for drm/i915: Store preemption capability in engine->flags
== Series Details == Series: drm/i915: Store preemption capability in engine->flags URL : https://patchwork.freedesktop.org/series/40982/ State : success == Summary == Series 40982v1 drm/i915: Store preemption capability in engine->flags https://patchwork.freedesktop.org/api/1.0/series/40982/revisions/1/mbox/ Known issues: Test gem_mmap_gtt: Subgroup basic-small-bo-tiledx: fail -> PASS (fi-gdg-551) fdo#102575 Test kms_flip: Subgroup basic-flip-vs-wf_vblank: pass -> FAIL (fi-cfl-s3) fdo#100368 fdo#102575 https://bugs.freedesktop.org/show_bug.cgi?id=102575 fdo#100368 https://bugs.freedesktop.org/show_bug.cgi?id=100368 fi-bdw-5557u total:285 pass:264 dwarn:0 dfail:0 fail:0 skip:21 time:434s fi-bdw-gvtdvmtotal:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:440s fi-blb-e6850 total:285 pass:220 dwarn:1 dfail:0 fail:0 skip:64 time:379s fi-bsw-n3050 total:285 pass:239 dwarn:0 dfail:0 fail:0 skip:46 time:536s fi-bwr-2160 total:285 pass:180 dwarn:0 dfail:0 fail:0 skip:105 time:296s fi-bxt-dsi total:285 pass:255 dwarn:0 dfail:0 fail:0 skip:30 time:512s fi-bxt-j4205 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:518s fi-byt-j1900 total:285 pass:250 dwarn:0 dfail:0 fail:0 skip:35 time:516s fi-byt-n2820 total:285 pass:246 dwarn:0 dfail:0 fail:0 skip:39 time:508s fi-cfl-8700k total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:410s fi-cfl-s3total:285 pass:258 dwarn:0 dfail:0 fail:1 skip:26 time:557s fi-cfl-u total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:513s fi-cnl-y3total:285 pass:259 dwarn:0 dfail:0 fail:0 skip:26 time:584s fi-elk-e7500 total:285 pass:225 dwarn:1 dfail:0 fail:0 skip:59 time:422s fi-gdg-551 total:285 pass:177 dwarn:0 dfail:0 fail:0 skip:108 time:318s fi-glk-1 total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:538s fi-hsw-4770 total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:406s fi-ilk-650 total:285 pass:225 dwarn:0 dfail:0 fail:0 skip:60 time:420s fi-ivb-3520m total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:472s fi-ivb-3770 total:285 pass:252 dwarn:0 dfail:0 fail:0 skip:33 time:432s fi-kbl-7500u total:285 pass:260 dwarn:1 dfail:0 fail:0 skip:24 time:471s fi-kbl-7567u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:464s fi-kbl-r total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:508s fi-pnv-d510 total:285 pass:219 dwarn:1 dfail:0 fail:0 skip:65 time:665s fi-skl-6260u total:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:444s fi-skl-6600u total:285 pass:258 dwarn:0 dfail:0 fail:0 skip:27 time:532s fi-skl-6700k2total:285 pass:261 dwarn:0 dfail:0 fail:0 skip:24 time:503s fi-skl-6770hqtotal:285 pass:265 dwarn:0 dfail:0 fail:0 skip:20 time:523s fi-skl-guc total:285 pass:257 dwarn:0 dfail:0 fail:0 skip:28 time:427s fi-skl-gvtdvmtotal:285 pass:262 dwarn:0 dfail:0 fail:0 skip:23 time:445s fi-snb-2520m total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:555s fi-snb-2600 total:285 pass:245 dwarn:0 dfail:0 fail:0 skip:40 time:401s Blacklisted hosts: fi-cnl-psr total:285 pass:256 dwarn:3 dfail:0 fail:0 skip:26 time:541s fi-glk-j4005 total:285 pass:256 dwarn:0 dfail:0 fail:0 skip:29 time:483s c46052cde6a50c5459e00791ffc4d5aa1ec58a9e drm-tip: 2018y-03m-30d-18h-56m-26s UTC integration manifest f22f558cca4d drm/i915: Store preemption capability in engine->flags == Logs == For more details see: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_8555/issues.html ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
[Intel-gfx] [PATCH] drm/i915: Store preemption capability in engine->flags
Let's avoid having to delve down the pointer chain to see if the i915 device has support for preemption and store that on the engine, which made the decision in the first place! Signed-off-by: Chris Wilson Cc: Tomasz Lis Cc: Daniele Ceraolo Spurio Cc: Michał Winiarski Cc: Tvrtko Ursulin --- drivers/gpu/drm/i915/intel_lrc.c| 7 +-- drivers/gpu/drm/i915/intel_ringbuffer.h | 13 +++-- 2 files changed, 16 insertions(+), 4 deletions(-) diff --git a/drivers/gpu/drm/i915/intel_lrc.c b/drivers/gpu/drm/i915/intel_lrc.c index f60b61bf8b3b..48073987214f 100644 --- a/drivers/gpu/drm/i915/intel_lrc.c +++ b/drivers/gpu/drm/i915/intel_lrc.c @@ -183,7 +183,8 @@ static inline bool need_preempt(const struct intel_engine_cs *engine, const struct i915_request *last, int prio) { - return engine->i915->preempt_context && prio > max(rq_prio(last), 0); + return (intel_engine_has_preemption(engine) && + prio > max(rq_prio(last), 0)); } /** @@ -2089,11 +2090,13 @@ static void execlists_set_default_submission(struct intel_engine_cs *engine) engine->unpark = NULL; engine->flags |= I915_ENGINE_SUPPORTS_STATS; + if (engine->i915->preempt_context) + engine->flags |= I915_ENGINE_HAS_PREEMPTION; engine->i915->caps.scheduler = I915_SCHEDULER_CAP_ENABLED | I915_SCHEDULER_CAP_PRIORITY; - if (engine->i915->preempt_context) + if (intel_engine_has_preemption(engine)) engine->i915->caps.scheduler |= I915_SCHEDULER_CAP_PREEMPTION; } diff --git a/drivers/gpu/drm/i915/intel_ringbuffer.h b/drivers/gpu/drm/i915/intel_ringbuffer.h index a02c7b3b9d55..1079254e6b89 100644 --- a/drivers/gpu/drm/i915/intel_ringbuffer.h +++ b/drivers/gpu/drm/i915/intel_ringbuffer.h @@ -562,6 +562,7 @@ struct intel_engine_cs { #define I915_ENGINE_NEEDS_CMD_PARSER BIT(0) #define I915_ENGINE_SUPPORTS_STATS BIT(1) +#define I915_ENGINE_HAS_PREEMPTION BIT(2) unsigned int flags; /* @@ -621,16 +622,24 @@ struct intel_engine_cs { } stats; }; -static inline bool intel_engine_needs_cmd_parser(struct intel_engine_cs *engine) +static inline bool +intel_engine_needs_cmd_parser(const struct intel_engine_cs *engine) { return engine->flags & I915_ENGINE_NEEDS_CMD_PARSER; } -static inline bool intel_engine_supports_stats(struct intel_engine_cs *engine) +static inline bool +intel_engine_supports_stats(const struct intel_engine_cs *engine) { return engine->flags & I915_ENGINE_SUPPORTS_STATS; } +static inline bool +intel_engine_has_preemption(const struct intel_engine_cs *engine) +{ + return engine->flags & I915_ENGINE_HAS_PREEMPTION; +} + static inline void execlists_set_active(struct intel_engine_execlists *execlists, unsigned int bit) -- 2.16.3 ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 7/8] drm/i915/icl: Implement voltage swing programming sequence for Combo PHY DDI
Hi Manasi, Thank you for the patch! Yet something to improve: [auto build test ERROR on drm-intel/for-linux-next] [also build test ERROR on next-20180329] [cannot apply to v4.16-rc7] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Paulo-Zanoni/ICL-PLLs-DP-HDMI-and-misc-display-v2/20180330-131619 base: git://anongit.freedesktop.org/drm-intel for-linux-next config: i386-randconfig-h0-03311214 (attached as .config) compiler: gcc-4.9 (Debian 4.9.4-2) 4.9.4 reproduce: # save the attached .config to linux build tree make ARCH=i386 All errors (new ones prefixed by >>): ^ In file included from include/linux/list.h:9:0, from include/linux/kobject.h:19, from include/linux/device.h:16, from include/linux/i2c.h:30, from include/drm/drm_scdc_helper.h:27, from drivers/gpu//drm/i915/intel_ddi.c:28: drivers/gpu//drm/i915/intel_ddi.c:784:28: error: 'icl_combo_phy_ddi_translations_dp_hdmi_1_05V' undeclared (first use in this function) *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hdmi_1_05V); ^ include/linux/kernel.h:71:33: note: in definition of macro 'ARRAY_SIZE' #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) ^ In file included from include/linux/kernel.h:15:0, from include/linux/list.h:9, from include/linux/kobject.h:19, from include/linux/device.h:16, from include/linux/i2c.h:30, from include/drm/drm_scdc_helper.h:27, from drivers/gpu//drm/i915/intel_ddi.c:28: include/linux/build_bug.h:29:45: error: bit-field '' width not an integer constant #define BUILD_BUG_ON_ZERO(e) (sizeof(struct { int:(-!!(e)); })) ^ include/linux/compiler-gcc.h:65:28: note: in expansion of macro 'BUILD_BUG_ON_ZERO' #define __must_be_array(a) BUILD_BUG_ON_ZERO(__same_type((a), &(a)[0])) ^ include/linux/kernel.h:71:59: note: in expansion of macro '__must_be_array' #define ARRAY_SIZE(arr) (sizeof(arr) / sizeof((arr)[0]) + __must_be_array(arr)) ^ drivers/gpu//drm/i915/intel_ddi.c:784:17: note: in expansion of macro 'ARRAY_SIZE' *n_entries = ARRAY_SIZE(icl_combo_phy_ddi_translations_dp_hdmi_1_05V); ^ drivers/gpu//drm/i915/intel_ddi.c: In function 'icl_pll_to_ddi_pll_sel': drivers/gpu//drm/i915/intel_ddi.c:939:35: error: 'const struct intel_shared_dpll' has no member named 'info' const enum intel_dpll_id id = pll->info->id; ^ drivers/gpu//drm/i915/intel_ddi.c: In function 'icl_ddi_combo_vswing_program': drivers/gpu//drm/i915/intel_ddi.c:2142:2: error: implicit declaration of function 'ICL_PORT_TX_DW5_LN0' [-Werror=implicit-function-declaration] val = I915_READ(ICL_PORT_TX_DW5_LN0(port)); ^ In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0: drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl' #define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true) ^ drivers/gpu//drm/i915/intel_ddi.c:2142:8: note: in expansion of macro 'I915_READ' val = I915_READ(ICL_PORT_TX_DW5_LN0(port)); ^ drivers/gpu//drm/i915/intel_ddi.c:2142:2: note: expected 'i915_reg_t' but argument is of type 'int' val = I915_READ(ICL_PORT_TX_DW5_LN0(port)); ^ drivers/gpu//drm/i915/intel_ddi.c:2145:2: error: implicit declaration of function 'ICL_PORT_TX_DW5_GRP' [-Werror=implicit-function-declaration] I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val); ^ In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0: drivers/gpu//drm/i915/i915_drv.h:3858:30: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_writel' #define I915_WRITE(reg, val) dev_priv->uncore.funcs.mmio_writel(dev_priv, (reg), (val), true) ^ drivers/gpu//drm/i915/intel_ddi.c:2145:2: note: in expansion of macro 'I915_WRITE' I915_WRITE(ICL_PORT_TX_DW5_GRP(port), val); ^ drivers/gpu//drm/i915/intel_ddi.c:2145:2: note: expected 'i915_reg_t' but argument is of type 'int' In file included from drivers/gpu//drm/i915/intel_ddi.c:29:0: drivers/gpu//drm/i915/i915_drv.h:3857:25: error: incompatible type for argument 2 of 'dev_priv->uncore.funcs.mmio_readl' #define I915_READ(reg) dev_priv->uncore.funcs.mmio_readl(dev_priv, (reg), true) ^ drivers/gpu//drm/i915/intel_ddi.c:2148:8: no
Re: [Intel-gfx] [PATCH 7/7] drm/i915: Engine queues query
Quoting Lionel Landwerlin (2018-03-31 02:04:26) > On 19/03/18 18:16, Tvrtko Ursulin wrote: > > From: Tvrtko Ursulin > > > > As well as exposing active requests on engines via PMU, we can also export > > the current raw values (as tracked by i915 command submission) via a > > dedicated query. > > > > This is to satisfy customers who have userspace load balancing solutions > > implemented on top of their custom kernel patches. > > > > Userspace is now able to include DRM_I915_QUERY_ENGINE_QUEUES in their > > query list, pointing to initialized struct drm_i915_query_engine_queues > > entry. Fields describing engine class and instance userspace would like to > > know about need to be filled in, and i915 will fill in the rest. > > > > Multiple engines can be queried in one go by having multiple queries in > > the query list. > > > > Signed-off-by: Tvrtko Ursulin > > Cc: Dmitry Rogozhkin > > --- > > drivers/gpu/drm/i915/i915_query.c | 43 > > +++ > > include/uapi/drm/i915_drm.h | 26 +++ > > 2 files changed, 69 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/i915_query.c > > b/drivers/gpu/drm/i915/i915_query.c > > index 3ace929dd90f..b3bc69e8deb7 100644 > > --- a/drivers/gpu/drm/i915/i915_query.c > > +++ b/drivers/gpu/drm/i915/i915_query.c > > @@ -82,9 +82,52 @@ static int query_topology_info(struct drm_i915_private > > *dev_priv, > > return total_length; > > } > > > > +static int > > +query_engine_queues(struct drm_i915_private *i915, > > + struct drm_i915_query_item *query_item) > > +{ > > + struct drm_i915_query_engine_queues __user *query_ptr = > > + u64_to_user_ptr(query_item->data_ptr); > > + struct drm_i915_query_engine_queues query; > > + struct intel_engine_cs *engine; > > + const int len = sizeof(query); > > + unsigned int i; > > + > > + if (query_item->flags) > > + return -EINVAL; > > + > > + if (!query_item->length) > > + return len; > > + else if (query_item->length < len) > > + return -ENOSPC; > > topology returns EINVAL in that case. I think ENOSPC makes more sense, > do we need to change topology? I suggest -EINVAL, we are still doing user parameter checking. I think we will find more useful cases for -ENOSPC later and so would prefer to keep it clear. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx
Re: [Intel-gfx] [PATCH 3/4] drm/i915: Use full serialisation around engine->irq_posted
Quoting Chris Wilson (2018-03-31 00:08:47) > Quoting Chris Wilson (2018-03-22 07:35:32) > > Using engine->irq_posted for execlists, we are not always serialised by > > the tasklet as we supposed. On the reset paths, the tasklet is disabled > > and ignored. Instead, we manipulate the engine->irq_posted directly to > > account for the reset, but if an interrupt fired before the reset and so > > wrote to engine->irq_posted, that write may not be flushed from the > > local CPU's cacheline until much later as the tasklet is already active > > and so does not generate a mb(). To correctly serialise the interrupt > > with reset, we need serialisation on the set_bit() itself. > > > > And at last Mika can be happy. > > > > Signed-off-by: Chris Wilson > > Cc: Mika Kuoppala > > Cc: Michał Winiarski > > CC: Michel Thierry > > Cc: Jeff McGee > > Cc: Tvrtko Ursulin > > --- > > drivers/gpu/drm/i915/i915_irq.c | 7 +++ > > 1 file changed, 3 insertions(+), 4 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/i915_irq.c > > b/drivers/gpu/drm/i915/i915_irq.c > > index fa7310766217..27aee25429b7 100644 > > --- a/drivers/gpu/drm/i915/i915_irq.c > > +++ b/drivers/gpu/drm/i915/i915_irq.c > > @@ -1405,10 +1405,9 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, > > u32 iir) > > bool tasklet = false; > > > > if (iir & GT_CONTEXT_SWITCH_INTERRUPT) { > > - if (READ_ONCE(engine->execlists.active)) { > > - __set_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted); > > - tasklet = true; > > - } > > + if (READ_ONCE(engine->execlists.active)) > > + tasklet = !test_and_set_bit(ENGINE_IRQ_EXECLIST, > > + &engine->irq_posted); > > This is driving me mad. A very rare missed interrupt unless we > unconditionally kick tasklet: > > if (iir & GT_CONTEXT_SWITCH_INTERRUPT) { > - if (READ_ONCE(engine->execlists.active)) > - tasklet = !test_and_set_bit(ENGINE_IRQ_EXECLIST, > - &engine->irq_posted); > + if (READ_ONCE(engine->execlists.active)) { > + set_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted); > + tasklet = true; > + } > } > > I can't see why. > > Hmm, I wonder if we are seeing READ_ONCE(execlsts->active) false > negatives. Fortunately, doesn't appear to be that. @@ -1405,9 +1405,10 @@ gen8_cs_irq_handler(struct intel_engine_cs *engine, u32 iir) bool tasklet = false; if (iir & GT_CONTEXT_SWITCH_INTERRUPT) { - if (READ_ONCE(engine->execlists.active)) - tasklet = !test_and_set_bit(ENGINE_IRQ_EXECLIST, - &engine->irq_posted); + GEM_BUG_ON(!READ_ONCE(execlists->tasklet.state) && + test_bit(ENGINE_IRQ_EXECLIST, &engine->irq_posted)); + tasklet = !test_and_set_bit(ENGINE_IRQ_EXECLIST, + &engine->irq_posted); } Hasn't even hit a BUG, which is a little disconcerting. -Chris ___ Intel-gfx mailing list Intel-gfx@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/intel-gfx