On Thu, Nov 17, 2022 at 02:24:46PM -0800, Matt Atwood wrote:
> Wa_18018764978 applies to specific steppings of DG2 (G10 C0+,
> G11 and G12 A0+).
>
> Bspec: 66622
>
> Signed-off-by: Matt Atwood
> ---
> drivers/gpu/drm/i915/gt/intel_gt_regs.h | 3 +++
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 +
> 2 files changed, 8 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> index c3cd926917957..1711dbf9dd462 100644
> --- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> +++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
> @@ -457,6 +457,9 @@
> #define GEN8_L3CNTLREG _MMIO(0x7034)
> #define GEN8_ERRDETBCTRL (1 << 9)
>
> +#define PSS_MODE2_MMIO(0x703c)
> +#define SCOREBOARD_STALL_FLUSH_CONTROL REG_BIT(5)
> +
> #define GEN7_SC_INSTDONE _MMIO(0x7100)
> #define GEN12_SC_INSTDONE_EXTRA _MMIO(0x7104)
> #define GEN12_SC_INSTDONE_EXTRA2 _MMIO(0x7108)
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 1bd8d63ad4f3f..483fd2a83ca19 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -774,6 +774,11 @@ static void dg2_ctx_workarounds_init(struct
> intel_engine_cs *engine,
> IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
> wa_masked_field_set(wal, VF_PREEMPTION,
> PREEMPTION_VERTEX_COUNT, 0x4000);
>
> + /* Wa_18018764978:dg2 */
> + if (IS_DG2_GRAPHICS_STEP(engine->i915, G10, STEP_C0, STEP_FOREVER) ||
> + IS_DG2_G11(engine->i915) || IS_DG2_G12(engine->i915))
With the fix to align this line match the open parenthesis,
Reviewed-by: Gustavo Sousa
> + wa_masked_en(wal, PSS_MODE2, SCOREBOARD_STALL_FLUSH_CONTROL);
> +
> /* Wa_15010599737:dg2 */
> wa_masked_en(wal, CHICKEN_RASTER_1, DIS_SF_ROUND_NEAREST_EVEN);
> }
> --
> 2.38.1
>
