RE: [PATCH] drm/i915/opregion: add intel_opregion_vbt_present() stub for ACPI=n

[Jani Nikula]

On Tue, 12 Mar 2024, "Sripada, Radhakrishna"  
wrote:
> LGTM,
> Reviewed-by: Radhakrishna Sripada 

Thanks for the review, pushed to drm-intel-next.

BR,
Jani.

-- 
Jani Nikula, Intel

Re: [RFC 0/5] Introduce drm sharpening property

[Pekka Paalanen]

On Tue, 12 Mar 2024 16:26:00 +0200
Pekka Paalanen  wrote:

> On Tue, 12 Mar 2024 08:30:34 +
> "Garg, Nemesa"  wrote:
> 
> > This  KMS property is not implementing any formula  
> 
> Sure it is. Maybe Intel just does not want to tell what the algorithm
> is, or maybe it's even patented.
> 
> > and the values
> > that are being used are based on empirical analysis and certain
> > experiments done on the hardware. These values are fixed and is not
> > expected to change and this can change from vendor to vendor. The
> > client can choose any sharpness value on the scale and on the basis
> > of it the sharpness will be set. The sharpness effect can be changed
> > from content to content and from display to display so user needs to
> > adjust the optimum intensity value so as to get good experience on
> > the screen.
> >   
> 
> IOW, it's an opaque box operation, and there is no way to reproduce its
> results without the specific Intel hardware. Definitely no way to
> reproduce its results in free open source software alone.
> 
> Such opaque box operations can only occur after KMS blending, at the
> CRTC or later stage. They cannot appear before blending, not in the new
> KMS color pipeline design at least. The reason is that the modern way
> to use KMS planes is opportunistic composition off-loading.
> Opportunistic means that userspace decides from time to time whether it
> composes the final picture using KMS or some other rendering method
> (usually GPU and shaders). Since userspace will arbitrarily switch
> between KMS and render composition, both must result in the exact same
> image, or end users will observe unwanted flicker.
> 
> Such opaque box operations are fine after blending, because there they
> can be configured once and remain on forever. No switching, no flicker.

If you want to see how sharpness property would apply in Wayland
design, it would be in step 5 "Adjust (settings UI)" of
https://gitlab.freedesktop.org/pq/color-and-hdr/-/blob/main/doc/color-management-model.md#compositor-color-management-model

To relate that diagram to KMS color processing, you can identify step 3
"Compose" as the KMS blending step. Everything before step 3 happens in
KMS plane color processing, and steps 4-5 happen in KMS CRTC color
processing.

Sharpening would essentially be a "compositor color effect", it just
happens to be implementable only by specific Intel hardware.

If a color effect is dynamic or content-dependant, it will preclude
colorimetric monitor calibration.


Thanks,
pq


> Where does "sharpeness" operation occur in the Intel color processing
> chain? Is it before or after blending?
> 
> What kind of transfer characteristics does it expect from the image,
> and can those be realized with KMS CRTC properties if KMS is configured
> such that the blending happens using some other characteristics (e.g.
> blending in optical space)?
> 
> What about SDR vs. HDR imagery?
> 
> 
> Thanks,
> pq
> 
> > > -Original Message-
> > > From: dri-devel  On Behalf Of 
> > > Simon
> > > Ser
> > > Sent: Monday, March 4, 2024 7:46 PM
> > > To: Garg, Nemesa 
> > > Cc: Pekka Paalanen ; intel-
> > > g...@lists.freedesktop.org; dri-de...@lists.freedesktop.org; G M, Adarsh
> > > 
> > > Subject: RE: [RFC 0/5] Introduce drm sharpening property
> > > 
> > > On Monday, March 4th, 2024 at 15:04, Garg, Nemesa 
> > > wrote:
> > > 
> > > > This is generic as sharpness effect is applied post blending.
> > > > Depending on the color gamut, pixel format and other inputs the image
> > > > gets blended and once we get blended output it can be sharpened based
> > > > on strength value provided by the user.
> > > 
> > > It would really help if you could provide the exact mathematical formula 
> > > applied
> > > by this KMS property.
> 



pgp20wB1nJmfJ.pgp
Description: OpenPGP digital signature

Re: [PATCH] drm/i915: add intel_opregion_vbt_present() stub function

[Jani Nikula]

On Wed, 13 Mar 2024, Arnd Bergmann  wrote:
> From: Arnd Bergmann 
>
> The newly added function is not available without CONFIG_ACPI, causing
> a build failure:
>
> drivers/gpu/drm/i915/display/intel_bios.c:3424:24: error: implicit 
> declaration of function 'intel_opregion_vbt_present'; did you mean 
> 'intel_opregion_asle_present'? [-Werror=implicit-function-declaration]
>
> Add an empty stub in the same place as the other stubs.
>
> Fixes: 9d9bb71f3e11 ("drm/i915: Extract opregion vbt presence check")
> Signed-off-by: Arnd Bergmann 

Thanks, but just applied the identical [1].

BR,
Jani.


[1] https://lore.kernel.org/r/20240312115757.683584-1-jani.nik...@intel.com

> ---
>  drivers/gpu/drm/i915/display/intel_opregion.h | 5 +
>  1 file changed, 5 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h 
> b/drivers/gpu/drm/i915/display/intel_opregion.h
> index 63573c38d735..4b2b8e752632 100644
> --- a/drivers/gpu/drm/i915/display/intel_opregion.h
> +++ b/drivers/gpu/drm/i915/display/intel_opregion.h
> @@ -120,6 +120,11 @@ intel_opregion_get_edid(struct intel_connector 
> *connector)
>   return NULL;
>  }
>  
> +static inline bool intel_opregion_vbt_present(struct drm_i915_private *i915)
> +{
> + return false;
> +}
> +
>  static inline const void *
>  intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size)
>  {

-- 
Jani Nikula, Intel

RE: ✗ Fi.CI.IGT: failure for drm/i915/hwmon: Fix locking inversion in sysfs getter (rev2)

[Illipilli, TejasreeX]

Hi,

https://patchwork.freedesktop.org/series/130966/ - Re-reported.

Thanks,
Tejasree

-Original Message-
From: Janusz Krzysztofik  
Sent: Tuesday, March 12, 2024 8:45 PM
To: LGCI Bug Filing 
Cc: intel-gfx@lists.freedesktop.org
Subject: Re: ✗ Fi.CI.IGT: failure for drm/i915/hwmon: Fix locking inversion in 
sysfs getter (rev2)

Hi Bug Filing,

On Tuesday, 12 March 2024 11:02:19 CET Patchwork wrote:
> == Series Details ==
> 
> Series: drm/i915/hwmon: Fix locking inversion in sysfs getter (rev2)
> URL   : https://patchwork.freedesktop.org/series/130966/
> State : failure
> 
> == Summary ==
> 
> CI Bug Log - changes from CI_DRM_14420_full -> Patchwork_130966v2_full
> 
> 
> Summary
> ---
> 
>   **FAILURE**
> 
>   Serious unknown changes coming with Patchwork_130966v2_full absolutely need 
> to be
>   verified manually.
>   
>   If you think the reported changes have nothing to do with the changes
>   introduced in Patchwork_130966v2_full, please notify your bug team 
> (i915-ci-in...@lists.freedesktop.org) to allow them
>   to document this new failure mode, which will reduce false positives in CI.
> 
>   
> 
> Participating hosts (8 -> 9)
> --
> 
>   Additional (1): shard-snb-0 
> 
> Possible new issues
> ---
> 
>   Here are the unknown changes that may have been introduced in 
> Patchwork_130966v2_full:
> 
> ### IGT changes ###
> 
>  Possible regressions 
> 
>   * igt@kms_cursor_edge_walk@256x256-top-bottom@pipe-a-hdmi-a-4:
> - shard-dg1:  [PASS][1] -> [INCOMPLETE][2]
>[1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14420/shard-dg1-16/igt@kms_cursor_edge_walk@256x256-top-bot...@pipe-a-hdmi-a-4.html
>[2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg1-14/igt@kms_cursor_edge_walk@256x256-top-bot...@pipe-a-hdmi-a-4.html

In CI buglog there are quite a few incompletes from kms_* tests executed on 
DG1 with no filters assigned yet, and one of them specifically from a very 
similar igt@kms_cursor_edge_walk@256x256-left-edge subtest.  Since kms_* tests 
are not related to i915 hwmon code touched by my patch, I think that's an 
unrelated issue reported here as a possible regression.  Please update CI 
buglog filters and re-report.

Thanks,
Janusz


> New tests
> -
> 
>   New tests have been introduced between CI_DRM_14420_full and 
> Patchwork_130966v2_full:
> 
> ### New IGT tests (1) ###
> 
>   * igt@kms_cursor_crc@cursor-rapid-movement-256x256@pipe-d-dp-4:
> - Statuses : 1 pass(s)
> - Exec time: [0.40] s
> 
>   
> 
> Known issues
> 
> 
>   Here are the changes found in Patchwork_130966v2_full that come from known 
> issues:
> 
> ### IGT changes ###
> 
>  Issues hit 
> 
>   * igt@api_intel_bb@blit-reloc-purge-cache:
> - shard-dg2:  NOTRUN -> [SKIP][3] ([i915#8411])
>[3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg2-11/igt@api_intel...@blit-reloc-purge-cache.html
> 
>   * igt@device_reset@cold-reset-bound:
> - shard-dg1:  NOTRUN -> [SKIP][4] ([i915#7701])
>[4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg1-18/igt@device_re...@cold-reset-bound.html
> 
>   * igt@drm_fdinfo@busy-hang@rcs0:
> - shard-mtlp: NOTRUN -> [SKIP][5] ([i915#8414]) +12 other tests 
> skip
>[5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-mtlp-7/igt@drm_fdinfo@busy-h...@rcs0.html
> 
>   * igt@drm_fdinfo@busy-idle-check-all@vcs1:
> - shard-dg1:  NOTRUN -> [SKIP][6] ([i915#8414]) +11 other tests 
> skip
>[6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg1-17/igt@drm_fdinfo@busy-idle-check-...@vcs1.html
> 
>   * igt@drm_fdinfo@busy-idle@bcs0:
> - shard-dg2:  NOTRUN -> [SKIP][7] ([i915#8414]) +20 other tests 
> skip
>[7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg2-7/igt@drm_fdinfo@busy-i...@bcs0.html
> 
>   * igt@drm_fdinfo@virtual-idle:
> - shard-rkl:  [PASS][8] -> [FAIL][9] ([i915#7742])
>[8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14420/shard-rkl-5/igt@drm_fdi...@virtual-idle.html
>[9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-rkl-3/igt@drm_fdi...@virtual-idle.html
> 
>   * igt@gem_busy@semaphore:
> - shard-dg2:  NOTRUN -> [SKIP][10] ([i915#3936])
>[10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg2-7/igt@gem_b...@semaphore.html
> - shard-dg1:  NOTRUN -> [SKIP][11] ([i915#3936])
>[11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130966v2/shard-dg1-19/igt@gem_b...@semaphore.html
> 
>   * igt@gem_ccs@block-copy-compressed:
> - shard-mtlp: NOTRUN -> [SKIP][12] ([i915#3555] / [i915#9323])
>[12]: 
> 

RE: ✗ Fi.CI.BAT: failure for drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev4)

[Illipilli, TejasreeX]

Hi,

https://patchwork.freedesktop.org/series/130643/ - Re-reported.

Thanks,
Tejasree

From: Chauhan, Shekhar 
Sent: Wednesday, March 13, 2024 9:25 AM
To: LGCI Bug Filing 
Cc: intel-gfx@lists.freedesktop.org; Roper, Matthew D 

Subject: RE: ✗ Fi.CI.BAT: failure for drm/i915/dp: Increase idle pattern wait 
timeout to 2ms (rev4)

Below failures are False positive, please help to re-report.

-shekhar

From: Patchwork 
mailto:patchw...@emeril.freedesktop.org>>
Sent: Tuesday, March 12, 2024 05:10
To: Chauhan, Shekhar 
mailto:shekhar.chau...@intel.com>>
Cc: intel-gfx@lists.freedesktop.org
Subject: ✗ Fi.CI.BAT: failure for drm/i915/dp: Increase idle pattern wait 
timeout to 2ms (rev4)

Patch Details
Series:
drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev4)
URL:
https://patchwork.freedesktop.org/series/130643/
State:
failure
Details:
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/index.html
CI Bug Log - changes from CI_DRM_14420 -> Patchwork_130643v4
Summary

FAILURE

Serious unknown changes coming with Patchwork_130643v4 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_130643v4, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org)
 to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/index.html

Participating hosts (34 -> 36)

Additional (3): fi-glk-j4005 bat-kbl-2 bat-mtlp-8
Missing (1): fi-snb-2520m

Possible new issues

Here are the unknown changes that may have been introduced in 
Patchwork_130643v4:

IGT changes
Possible regressions

·   igt@kms_force_connector_basic@force-edid:
o   bat-dg2-8: 
PASS
 -> 
INCOMPLETE

·   igt@vgem_basic@unload:
o   bat-arls-2: 
PASS
 -> 
INCOMPLETE
Known issues

Here are the changes found in Patchwork_130643v4 that come from known issues:

IGT changes
Issues hit

·   igt@debugfs_test@basic-hwmon:
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#9318)

·   igt@fbdev@info:
o   bat-kbl-2: NOTRUN -> 
SKIP
 (i915#1849)

·   igt@gem_huc_copy@huc-copy:
o   fi-glk-j4005: NOTRUN -> 
SKIP
 (i915#2190)

·   igt@gem_lmem_swapping@parallel-random-engines:
o   bat-kbl-2: NOTRUN -> 
SKIP
 +39 other tests skip
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#4613) +3 other 
tests skip
o   fi-glk-j4005: NOTRUN -> 
SKIP
 (i915#4613) +3 other 
tests skip

·   igt@gem_mmap@basic:
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#4083)

·   igt@gem_render_tiled_blits@basic:
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#4079) +1 other 
test skip

·   igt@gem_tiled_fence_blits@basic:
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#4077) +2 other 
tests skip

·   igt@i915_pm_rps@basic-api:
o   bat-mtlp-8: NOTRUN -> 
SKIP
 (i915#6621)

·   igt@i915_selftest@live@hangcheck:
o   bat-dg2-14: 

Re: [PATCH 2/6] drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()

[Lisovskiy, Stanislav]

On Tue, Mar 12, 2024 at 09:36:22PM -0700, Manasi Navare wrote:
> Thanks Stan for the cleanup around post disable non MST case, one comment 
> below
> 
> On Fri, Mar 8, 2024 at 5:11 AM Stanislav Lisovskiy
>  wrote:
> >
> > Extract the "not-MST" stuff from intel_ddi_post_disable() so that
> > the whole thing isn't so cluttered.
> >
> > The bigjoiner slave handling was outside of the !MST check,
> > but it really should have been inside it as its the counterpart
> > to the master handling inside the check. So we pull that
> > in as well. There is no functional change here as we don't
> > currently support bigjoiner+MST anyway.
> 
> 
> >
> > Signed-off-by: Ville Syrjälä 
> > Signed-off-by: Stanislav Lisovskiy 
> > Credits-to: Ville Syrjälä 
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c | 37 +++-
> >  1 file changed, 23 insertions(+), 14 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index bbce74f011d40..5628a4ab608d4 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3095,28 +3095,26 @@ static void intel_ddi_post_disable_hdmi(struct 
> > intel_atomic_state *state,
> > intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
> >  }
> >
> > -static void intel_ddi_post_disable(struct intel_atomic_state *state,
> > -  struct intel_encoder *encoder,
> > -  const struct intel_crtc_state 
> > *old_crtc_state,
> > -  const struct drm_connector_state 
> > *old_conn_state)
> > +static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state 
> > *state,
> > +  struct intel_encoder 
> > *encoder,
> > +  const struct 
> > intel_crtc_state *old_master_crtc_state,
> > +  const struct 
> > drm_connector_state *old_conn_state)
> >  {
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > struct intel_crtc *slave_crtc;
> >
> > -   if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
> > -   intel_crtc_vblank_off(old_crtc_state);
> > +   intel_crtc_vblank_off(old_crtc_state);
> >
> > -   intel_disable_transcoder(old_crtc_state);
> > +   intel_disable_transcoder(old_crtc_state);
> >
> > -   intel_ddi_disable_transcoder_func(old_crtc_state);
> > +   intel_ddi_disable_transcoder_func(old_crtc_state);
> >
> > -   intel_dsc_disable(old_crtc_state);
> > +   intel_dsc_disable(old_crtc_state);
> >
> > -   if (DISPLAY_VER(dev_priv) >= 9)
> > -   skl_scaler_disable(old_crtc_state);
> > -   else
> > -   ilk_pfit_disable(old_crtc_state);
> > -   }
> > +   if (DISPLAY_VER(dev_priv) >= 9)
> > +   skl_scaler_disable(old_crtc_state);
> > +   else
> > +   ilk_pfit_disable(old_crtc_state);
> >
> > for_each_intel_crtc_in_pipe_mask(_priv->drm, slave_crtc,
> >  
> > intel_crtc_bigjoiner_slave_pipes(old_crtc_state)) {
> 
> This bigjoiner slave handling for MST path will be added later to the
> intel_ddi_post_post_disable()
> when we enable bigjoiner for MST?
> 
> Manasi

Hi Manasi, yes, currently I'm evaluating what would be the best way
to do that.


Stan

> 
> > @@ -3128,6 +3126,17 @@ static void intel_ddi_post_disable(struct 
> > intel_atomic_state *state,
> > intel_dsc_disable(old_slave_crtc_state);
> > skl_scaler_disable(old_slave_crtc_state);
> > }
> > +}
> > +
> > +static void intel_ddi_post_disable(struct intel_atomic_state *state,
> > +  struct intel_encoder *encoder,
> > +  const struct intel_crtc_state 
> > *old_crtc_state,
> > +  const struct drm_connector_state 
> > *old_conn_state)
> > +{
> > +
> > +   if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST))
> > +   intel_ddi_post_disable_hdmi_or_sst(state, encoder,
> > +  old_crtc_state, 
> > old_conn_state);
> >
> > /*
> >  * When called from DP MST code:
> > --
> > 2.37.3
> >

[PATCH 2/6] drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()

[Stanislav Lisovskiy]

Extract the "not-MST" stuff from intel_ddi_post_disable() so that
the whole thing isn't so cluttered.

The bigjoiner slave handling was outside of the !MST check,
but it really should have been inside it as its the counterpart
to the master handling inside the check. So we pull that
in as well. There is no functional change here as we don't
currently support bigjoiner+MST anyway.

Signed-off-by: Ville Syrjälä 
Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 37 +++-
 1 file changed, 23 insertions(+), 14 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index bbce74f011d40..5628a4ab608d4 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3095,28 +3095,26 @@ static void intel_ddi_post_disable_hdmi(struct 
intel_atomic_state *state,
intel_dp_dual_mode_set_tmds_output(intel_hdmi, false);
 }
 
-static void intel_ddi_post_disable(struct intel_atomic_state *state,
-  struct intel_encoder *encoder,
-  const struct intel_crtc_state 
*old_crtc_state,
-  const struct drm_connector_state 
*old_conn_state)
+static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state 
*state,
+  struct intel_encoder *encoder,
+  const struct intel_crtc_state 
*old_master_crtc_state,
+  const struct drm_connector_state 
*old_conn_state)
 {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_crtc *slave_crtc;
 
-   if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST)) {
-   intel_crtc_vblank_off(old_crtc_state);
+   intel_crtc_vblank_off(old_crtc_state);
 
-   intel_disable_transcoder(old_crtc_state);
+   intel_disable_transcoder(old_crtc_state);
 
-   intel_ddi_disable_transcoder_func(old_crtc_state);
+   intel_ddi_disable_transcoder_func(old_crtc_state);
 
-   intel_dsc_disable(old_crtc_state);
+   intel_dsc_disable(old_crtc_state);
 
-   if (DISPLAY_VER(dev_priv) >= 9)
-   skl_scaler_disable(old_crtc_state);
-   else
-   ilk_pfit_disable(old_crtc_state);
-   }
+   if (DISPLAY_VER(dev_priv) >= 9)
+   skl_scaler_disable(old_crtc_state);
+   else
+   ilk_pfit_disable(old_crtc_state);
 
for_each_intel_crtc_in_pipe_mask(_priv->drm, slave_crtc,
 
intel_crtc_bigjoiner_slave_pipes(old_crtc_state)) {
@@ -3128,6 +3126,17 @@ static void intel_ddi_post_disable(struct 
intel_atomic_state *state,
intel_dsc_disable(old_slave_crtc_state);
skl_scaler_disable(old_slave_crtc_state);
}
+}
+
+static void intel_ddi_post_disable(struct intel_atomic_state *state,
+  struct intel_encoder *encoder,
+  const struct intel_crtc_state 
*old_crtc_state,
+  const struct drm_connector_state 
*old_conn_state)
+{
+
+   if (!intel_crtc_has_type(old_crtc_state, INTEL_OUTPUT_DP_MST))
+   intel_ddi_post_disable_hdmi_or_sst(state, encoder,
+  old_crtc_state, 
old_conn_state);
 
/*
 * When called from DP MST code:
-- 
2.37.3

[PATCH 5/6] drm/i915: Handle joined pipes inside hsw_crtc_enable()

[Stanislav Lisovskiy]

Handle only bigjoiner masters in skl_commit_modeset_enables/disables,
slave crtcs should be handled by master hooks. Same for encoders.
That way we can also remove a bunch of checks like 
intel_crtc_is_bigjoiner_slave.

v2: - Moved skl_pfit_enable, intel_dsc_enable, intel_crtc_vblank_on to 
intel_enable_ddi,
  so that it is now finally symmetrical with the disable case, because 
currently
  for some weird reason we are calling those from 
skl_commit_modeset_enables, while
  for the disable case those are called from the ddi disable hooks.

v3: - Create intel_ddi_enable_hdmi_or_sst symmetrical to
  intel_ddi_post_disable_hdmi_or_sst and move it also under non-mst check.

Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_ddi.c |  30 +++-
 drivers/gpu/drm/i915/display/intel_display.c | 162 +--
 drivers/gpu/drm/i915/display/intel_display.h |   7 +
 3 files changed, 115 insertions(+), 84 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 15441674c6f58..edfd22bea9e7a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3366,6 +3366,30 @@ static void intel_enable_ddi_hdmi(struct 
intel_atomic_state *state,
intel_wait_ddi_buf_active(dev_priv, port);
 }
 
+static void intel_ddi_enable_hdmi_or_sst(struct intel_atomic_state *state,
+struct intel_encoder *encoder,
+const struct intel_crtc_state 
*crtc_state,
+const struct drm_connector_state 
*conn_state)
+{
+   struct drm_i915_private *i915 = to_i915(encoder->base.dev);
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
+   struct intel_crtc *crtc;
+
+   for_each_intel_crtc_in_pipe_mask_reverse(>drm, crtc, pipe_mask) {
+   const struct intel_crtc_state *new_crtc_state =
+   intel_atomic_get_new_crtc_state(state, crtc);
+
+   intel_dsc_enable(new_crtc_state);
+
+   if (DISPLAY_VER(i915) >= 9)
+   skl_pfit_enable(new_crtc_state);
+   else
+   ilk_pfit_enable(new_crtc_state);
+
+   intel_crtc_vblank_on(new_crtc_state);
+   }
+}
+
 static void intel_enable_ddi(struct intel_atomic_state *state,
 struct intel_encoder *encoder,
 const struct intel_crtc_state *crtc_state,
@@ -3373,8 +3397,7 @@ static void intel_enable_ddi(struct intel_atomic_state 
*state,
 {
drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
 
-   if (!intel_crtc_is_bigjoiner_slave(crtc_state))
-   intel_ddi_enable_transcoder_func(encoder, crtc_state);
+   intel_ddi_enable_transcoder_func(encoder, crtc_state);
 
/* Enable/Disable DP2.0 SDP split config before transcoder */
intel_audio_sdp_split_update(crtc_state);
@@ -3383,7 +3406,8 @@ static void intel_enable_ddi(struct intel_atomic_state 
*state,
 
intel_ddi_wait_for_fec_status(encoder, crtc_state, true);
 
-   intel_crtc_vblank_on(crtc_state);
+   if (!intel_crtc_has_type(crtc_state, INTEL_OUTPUT_DP_MST))
+   intel_ddi_enable_hdmi_or_sst(state, encoder, crtc_state, 
conn_state);
 
if (intel_crtc_has_type(crtc_state, INTEL_OUTPUT_HDMI))
intel_enable_ddi_hdmi(state, encoder, crtc_state, conn_state);
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 3120fc80f0a67..8fa4f93700151 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -794,7 +794,7 @@ intel_get_crtc_new_encoder(const struct intel_atomic_state 
*state,
return encoder;
 }
 
-static void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
+void ilk_pfit_enable(const struct intel_crtc_state *crtc_state)
 {
struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
struct drm_i915_private *dev_priv = to_i915(crtc->base.dev);
@@ -1593,24 +1593,6 @@ static void hsw_set_frame_start_delay(const struct 
intel_crtc_state *crtc_state)
 HSW_FRAME_START_DELAY(crtc_state->framestart_delay - 1));
 }
 
-static void icl_ddi_bigjoiner_pre_enable(struct intel_atomic_state *state,
-const struct intel_crtc_state 
*crtc_state)
-{
-   struct intel_crtc *master_crtc = intel_master_crtc(crtc_state);
-
-   /*
-* Enable sequence steps 1-7 on bigjoiner master
-*/
-   if (intel_crtc_is_bigjoiner_slave(crtc_state))
-   intel_encoders_pre_pll_enable(state, master_crtc);
-
-   if (crtc_state->shared_dpll)
-   intel_enable_shared_dpll(crtc_state);
-
-   if (intel_crtc_is_bigjoiner_slave(crtc_state))
-   intel_encoders_pre_enable(state, 

[PATCH 6/6] drm/i915: Allow bigjoiner for MST

[Stanislav Lisovskiy]

From: Vidya Srinivas 

We need bigjoiner support with MST functionality
for MST monitor resolutions > 5K to work.
Adding support for the same.

v2: Addressed review comments from Jani.
Revert rejection of MST bigjoiner modes and add
functionality

v3: Fixed pipe_mismatch WARN for mst_master_transcoder
Credits-to: Manasi Navare 

v4: Utilize intel_crtc_joined_pipe_mask() also for handling
bigjoiner slave pipes for MST case(Stan)

Signed-off-by: Vidya Srinivas 
Reviewed-by: Manasi Navare 
---
 drivers/gpu/drm/i915/display/intel_ddi.c|  6 ++-
 drivers/gpu/drm/i915/display/intel_dp_mst.c | 57 +++--
 2 files changed, 46 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index edfd22bea9e7a..0f9b0123df39a 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3934,9 +3934,11 @@ static void intel_ddi_read_func_ctl(struct intel_encoder 
*encoder,
pipe_config->lane_count =
((temp & DDI_PORT_WIDTH_MASK) >> DDI_PORT_WIDTH_SHIFT) 
+ 1;
 
-   if (DISPLAY_VER(dev_priv) >= 12)
-   pipe_config->mst_master_transcoder =
+   if (DISPLAY_VER(dev_priv) >= 12) {
+   if (!intel_crtc_is_bigjoiner_slave(pipe_config))
+   pipe_config->mst_master_transcoder =

REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
+   }
 
intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder,
   _config->dp_m_n);
diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
b/drivers/gpu/drm/i915/display/intel_dp_mst.c
index 53aec023ce92f..c8dc4c7bf53cf 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
@@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct intel_encoder 
*encoder,
 {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
struct intel_atomic_state *state = 
to_intel_atomic_state(conn_state->state);
+   struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
struct intel_dp *intel_dp = _mst->primary->dp;
const struct intel_connector *connector =
@@ -542,6 +543,10 @@ static int intel_dp_mst_compute_config(struct 
intel_encoder *encoder,
if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
return -EINVAL;
 
+   if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
+   adjusted_mode->crtc_clock))
+   pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, 
crtc->pipe);
+
pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
pipe_config->has_pch_encoder = false;
@@ -955,6 +960,8 @@ static void intel_mst_post_disable_dp(struct 
intel_atomic_state *state,
drm_atomic_get_mst_payload_state(new_mst_state, 
connector->port);
struct drm_i915_private *dev_priv = to_i915(connector->base.dev);
bool last_mst_stream;
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(old_crtc_state);
+   struct intel_crtc *crtc;
 
intel_dp->active_mst_links--;
last_mst_stream = intel_dp->active_mst_links == 0;
@@ -962,7 +969,12 @@ static void intel_mst_post_disable_dp(struct 
intel_atomic_state *state,
DISPLAY_VER(dev_priv) >= 12 && last_mst_stream &&
!intel_dp_mst_is_master_trans(old_crtc_state));
 
-   intel_crtc_vblank_off(old_crtc_state);
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, crtc, pipe_mask) {
+   const struct intel_crtc_state *_old_crtc_state =
+   intel_atomic_get_old_crtc_state(state, crtc);
+
+   intel_crtc_vblank_off(_old_crtc_state);
+   }
 
intel_disable_transcoder(old_crtc_state);
 
@@ -980,12 +992,17 @@ static void intel_mst_post_disable_dp(struct 
intel_atomic_state *state,
 
intel_ddi_disable_transcoder_func(old_crtc_state);
 
-   intel_dsc_disable(old_crtc_state);
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, crtc, pipe_mask) {
+   const struct intel_crtc_state *_old_crtc_state =
+   intel_atomic_get_old_crtc_state(state, crtc);
 
-   if (DISPLAY_VER(dev_priv) >= 9)
-   skl_scaler_disable(old_crtc_state);
-   else
-   ilk_pfit_disable(old_crtc_state);
+   intel_dsc_disable(_old_crtc_state);
+
+   if (DISPLAY_VER(dev_priv) >= 9)
+   skl_scaler_disable(_old_crtc_state);
+   else
+   ilk_pfit_disable(_old_crtc_state);
+   }
 
/*
 * Power down mst path before disabling the port, 

[PATCH 3/6] drm/i915: Utilize intel_crtc_joined_pipe_mask() more

[Stanislav Lisovskiy]

Unify the master vs. slave handling in
intel_ddi_post_disable_hdmi_or_sst() by looping over all the
pipes in one go.

This also lets us move the intel_crtc_vblank_off() calls to
happen in a consistent place vs. the transcoder disable.
Previously we did the master vs. slaves on different sides
of that.

Signed-off-by: Ville Syrjälä 
Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 34 
 1 file changed, 17 insertions(+), 17 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index 5628a4ab608d4..15441674c6f58 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3097,34 +3097,34 @@ static void intel_ddi_post_disable_hdmi(struct 
intel_atomic_state *state,
 
 static void intel_ddi_post_disable_hdmi_or_sst(struct intel_atomic_state 
*state,
   struct intel_encoder *encoder,
-  const struct intel_crtc_state 
*old_master_crtc_state,
+  const struct intel_crtc_state 
*old_crtc_state,
   const struct drm_connector_state 
*old_conn_state)
 {
struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
-   struct intel_crtc *slave_crtc;
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(old_crtc_state);
+   struct intel_crtc *crtc;
+
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, crtc, pipe_mask) {
+   const struct intel_crtc_state *_old_crtc_state =
+   intel_atomic_get_old_crtc_state(state, crtc);
 
-   intel_crtc_vblank_off(old_crtc_state);
+   intel_crtc_vblank_off(_old_crtc_state);
+   }
 
intel_disable_transcoder(old_crtc_state);
 
intel_ddi_disable_transcoder_func(old_crtc_state);
 
-   intel_dsc_disable(old_crtc_state);
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, crtc, pipe_mask) {
+   const struct intel_crtc_state *_old_crtc_state =
+   intel_atomic_get_old_crtc_state(state, crtc);
 
-   if (DISPLAY_VER(dev_priv) >= 9)
-   skl_scaler_disable(old_crtc_state);
-   else
-   ilk_pfit_disable(old_crtc_state);
+   intel_dsc_disable(_old_crtc_state);
 
-   for_each_intel_crtc_in_pipe_mask(_priv->drm, slave_crtc,
-
intel_crtc_bigjoiner_slave_pipes(old_crtc_state)) {
-   const struct intel_crtc_state *old_slave_crtc_state =
-   intel_atomic_get_old_crtc_state(state, slave_crtc);
-
-   intel_crtc_vblank_off(old_slave_crtc_state);
-
-   intel_dsc_disable(old_slave_crtc_state);
-   skl_scaler_disable(old_slave_crtc_state);
+   if (DISPLAY_VER(dev_priv) >= 9)
+   skl_scaler_disable(_old_crtc_state);
+   else
+   ilk_pfit_disable(_old_crtc_state);
}
 }
 
-- 
2.37.3

[PATCH 4/6] drm/i915: Handle joined pipes inside hsw_crtc_disable()

[Stanislav Lisovskiy]

Reorganize the crtc disable path to only deal with the
master pipes/transcoders in intel_old_crtc_state_disables()
and offload the handling of joined pipes to hsw_crtc_disable().
This makes the whole thing much more sensible since we can
actually control the order in which we do the per-pipe vs.
per-transcoder modeset steps.

v2: Fixed rebase conflict(intel_crtc_state_disables signature had changed)

Signed-off-by: Ville Syrjälä 
Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_display.c | 62 +++-
 1 file changed, 35 insertions(+), 27 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index 021db26a630af..3120fc80f0a67 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -1793,29 +1793,23 @@ static void hsw_crtc_disable(struct intel_atomic_state 
*state,
const struct intel_crtc_state *old_crtc_state =
intel_atomic_get_old_crtc_state(state, crtc);
struct drm_i915_private *i915 = to_i915(crtc->base.dev);
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(old_crtc_state);
+   struct intel_crtc *pipe_mask_crtc;
 
-   /*
-* FIXME collapse everything to one hook.
-* Need care with mst->ddi interactions.
-*/
-   if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) {
-   intel_encoders_disable(state, crtc);
-   intel_encoders_post_disable(state, crtc);
-   }
-
-   intel_disable_shared_dpll(old_crtc_state);
+   intel_encoders_disable(state, crtc);
+   intel_encoders_post_disable(state, crtc);
 
-   if (!intel_crtc_is_bigjoiner_slave(old_crtc_state)) {
-   struct intel_crtc *slave_crtc;
+   for_each_intel_crtc_in_pipe_mask(>drm, pipe_mask_crtc, pipe_mask) 
{
+   const struct intel_crtc_state *pipe_mask_crtc_state =
+   intel_atomic_get_old_crtc_state(state, pipe_mask_crtc);
 
-   intel_encoders_post_pll_disable(state, crtc);
+   intel_disable_shared_dpll(pipe_mask_crtc_state);
+   }
 
-   intel_dmc_disable_pipe(i915, crtc->pipe);
+   intel_encoders_post_pll_disable(state, crtc);
 
-   for_each_intel_crtc_in_pipe_mask(>drm, slave_crtc,
-
intel_crtc_bigjoiner_slave_pipes(old_crtc_state))
-   intel_dmc_disable_pipe(i915, slave_crtc->pipe);
-   }
+   for_each_intel_crtc_in_pipe_mask(>drm, pipe_mask_crtc, pipe_mask)
+   intel_dmc_disable_pipe(i915, pipe_mask_crtc->pipe);
 }
 
 static void i9xx_pfit_enable(const struct intel_crtc_state *crtc_state)
@@ -6758,19 +6752,28 @@ static void intel_old_crtc_state_disables(struct 
intel_atomic_state *state,
struct drm_i915_private *dev_priv = to_i915(state->base.dev);
const struct intel_crtc_state *new_crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(new_crtc_state);
+   struct intel_crtc *pipe_mask_crtc;
 
/*
 * We need to disable pipe CRC before disabling the pipe,
 * or we race against vblank off.
 */
-   intel_crtc_disable_pipe_crc(crtc);
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, pipe_mask_crtc, 
pipe_mask)
+   intel_crtc_disable_pipe_crc(pipe_mask_crtc);
 
dev_priv->display.funcs.display->crtc_disable(state, crtc);
-   crtc->active = false;
-   intel_fbc_disable(crtc);
 
-   if (!new_crtc_state->hw.active)
-   intel_initial_watermarks(state, crtc);
+   for_each_intel_crtc_in_pipe_mask(_priv->drm, pipe_mask_crtc, 
pipe_mask) {
+   const struct intel_crtc_state *pipe_mask_crtc_state =
+   intel_atomic_get_new_crtc_state(state, pipe_mask_crtc);
+
+   pipe_mask_crtc->active = false;
+   intel_fbc_disable(pipe_mask_crtc);
+
+   if (!pipe_mask_crtc_state->hw.active)
+   intel_initial_watermarks(state, pipe_mask_crtc);
+   }
 }
 
 static void intel_commit_modeset_disables(struct intel_atomic_state *state)
@@ -6810,19 +6813,21 @@ static void intel_commit_modeset_disables(struct 
intel_atomic_state *state)
if ((disable_pipes & BIT(crtc->pipe)) == 0)
continue;
 
+   if (intel_crtc_is_bigjoiner_slave(old_crtc_state))
+   continue;
+
/* In case of Transcoder port Sync master slave CRTCs can be
 * assigned in any order and we need to make sure that
 * slave CRTCs are disabled first and then master CRTC since
 * Slave vblanks are masked till Master Vblanks.
 */
if (!is_trans_port_sync_slave(old_crtc_state) &&
-   !intel_dp_mst_is_slave_trans(old_crtc_state) &&
- 

[PATCH 0/6] Bigjoiner refactoring

[Stanislav Lisovskiy]

There are few things we need to do for bigjoiner, in order
to improve code maintenance and also make testing for Bigjoiner
easier.
Those series contain addition of bigjoiner force debugfs option,
in order to be able to force bigjoiner even if there is no display
support, also we refactor pipe vs transcoder logic, as currently
it is a bit scattered between *_commit_modeset_enables/disables
and *_crtc_enable/disable functions. Same applies to encoders.
We made a decision to handle all the slaves in correspondent master
hook, so slaves and slave checks no longer would be in modesetting
level logic.

Stanislav Lisovskiy (5):
  drm/i915: Add a small helper to compute the set of pipes for crtc
  drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()
  drm/i915: Utilize intel_crtc_joined_pipe_mask() more
  drm/i915: Handle joined pipes inside hsw_crtc_disable()
  drm/i915: Handle joined pipes inside hsw_crtc_enable()

Vidya Srinivas (1):
  drm/i915: Allow bigjoiner for MST

 drivers/gpu/drm/i915/display/intel_ddi.c |  96 +---
 drivers/gpu/drm/i915/display/intel_display.c | 231 ++-
 drivers/gpu/drm/i915/display/intel_display.h |   8 +
 drivers/gpu/drm/i915/display/intel_dp_mst.c  |  57 +++--
 4 files changed, 238 insertions(+), 154 deletions(-)

-- 
2.37.3

[PATCH 1/6] drm/i915: Add a small helper to compute the set of pipes for crtc

[Stanislav Lisovskiy]

And we have at least one trivial place in
intel_ddi_update_active_dpll() where we can use it
immediately, so let's do that.

v2: - Fixed conflicts, part of patch didn't apply, because of master_crtc
  rename(Stan)

Signed-off-by: Ville Syrjälä 
Signed-off-by: Stanislav Lisovskiy 
---
 drivers/gpu/drm/i915/display/intel_ddi.c | 9 -
 drivers/gpu/drm/i915/display/intel_display.c | 7 +++
 drivers/gpu/drm/i915/display/intel_display.h | 1 +
 3 files changed, 12 insertions(+), 5 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
b/drivers/gpu/drm/i915/display/intel_ddi.c
index c587a8efeafcf..bbce74f011d40 100644
--- a/drivers/gpu/drm/i915/display/intel_ddi.c
+++ b/drivers/gpu/drm/i915/display/intel_ddi.c
@@ -3472,17 +3472,16 @@ void intel_ddi_update_active_dpll(struct 
intel_atomic_state *state,
struct drm_i915_private *i915 = to_i915(encoder->base.dev);
struct intel_crtc_state *crtc_state =
intel_atomic_get_new_crtc_state(state, crtc);
-   struct intel_crtc *slave_crtc;
+   struct intel_crtc *pipe_mask_crtc;
+   u8 pipe_mask = intel_crtc_joined_pipe_mask(crtc_state);
enum phy phy = intel_port_to_phy(i915, encoder->port);
 
/* FIXME: Add MTL pll_mgr */
if (DISPLAY_VER(i915) >= 14 || !intel_phy_is_tc(i915, phy))
return;
 
-   intel_update_active_dpll(state, crtc, encoder);
-   for_each_intel_crtc_in_pipe_mask(>drm, slave_crtc,
-
intel_crtc_bigjoiner_slave_pipes(crtc_state))
-   intel_update_active_dpll(state, slave_crtc, encoder);
+   for_each_intel_crtc_in_pipe_mask(>drm, pipe_mask_crtc, pipe_mask)
+   intel_update_active_dpll(state, pipe_mask_crtc, encoder);
 }
 
 static void
diff --git a/drivers/gpu/drm/i915/display/intel_display.c 
b/drivers/gpu/drm/i915/display/intel_display.c
index b88f214e111ae..021db26a630af 100644
--- a/drivers/gpu/drm/i915/display/intel_display.c
+++ b/drivers/gpu/drm/i915/display/intel_display.c
@@ -275,6 +275,13 @@ static int intel_bigjoiner_num_pipes(const struct 
intel_crtc_state *crtc_state)
return hweight8(crtc_state->bigjoiner_pipes);
 }
 
+u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state)
+{
+   struct intel_crtc *crtc = to_intel_crtc(crtc_state->uapi.crtc);
+
+   return BIT(crtc->pipe) | crtc_state->bigjoiner_pipes;
+}
+
 struct intel_crtc *intel_master_crtc(const struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
diff --git a/drivers/gpu/drm/i915/display/intel_display.h 
b/drivers/gpu/drm/i915/display/intel_display.h
index f4a0773f0fca8..631218c954a47 100644
--- a/drivers/gpu/drm/i915/display/intel_display.h
+++ b/drivers/gpu/drm/i915/display/intel_display.h
@@ -410,6 +410,7 @@ bool is_trans_port_sync_mode(const struct intel_crtc_state 
*state);
 bool is_trans_port_sync_master(const struct intel_crtc_state *state);
 bool intel_crtc_is_bigjoiner_slave(const struct intel_crtc_state *crtc_state);
 bool intel_crtc_is_bigjoiner_master(const struct intel_crtc_state *crtc_state);
+u8 intel_crtc_joined_pipe_mask(const struct intel_crtc_state *crtc_state);
 u8 intel_crtc_bigjoiner_slave_pipes(const struct intel_crtc_state *crtc_state);
 struct intel_crtc *intel_master_crtc(const struct intel_crtc_state 
*crtc_state);
 bool intel_crtc_get_pipe_config(struct intel_crtc_state *crtc_state);
-- 
2.37.3

[PATCH] drm/i915: add intel_opregion_vbt_present() stub function

[Arnd Bergmann]

From: Arnd Bergmann 

The newly added function is not available without CONFIG_ACPI, causing
a build failure:

drivers/gpu/drm/i915/display/intel_bios.c:3424:24: error: implicit declaration 
of function 'intel_opregion_vbt_present'; did you mean 
'intel_opregion_asle_present'? [-Werror=implicit-function-declaration]

Add an empty stub in the same place as the other stubs.

Fixes: 9d9bb71f3e11 ("drm/i915: Extract opregion vbt presence check")
Signed-off-by: Arnd Bergmann 
---
 drivers/gpu/drm/i915/display/intel_opregion.h | 5 +
 1 file changed, 5 insertions(+)

diff --git a/drivers/gpu/drm/i915/display/intel_opregion.h 
b/drivers/gpu/drm/i915/display/intel_opregion.h
index 63573c38d735..4b2b8e752632 100644
--- a/drivers/gpu/drm/i915/display/intel_opregion.h
+++ b/drivers/gpu/drm/i915/display/intel_opregion.h
@@ -120,6 +120,11 @@ intel_opregion_get_edid(struct intel_connector *connector)
return NULL;
 }
 
+static inline bool intel_opregion_vbt_present(struct drm_i915_private *i915)
+{
+   return false;
+}
+
 static inline const void *
 intel_opregion_get_vbt(struct drm_i915_private *i915, size_t *size)
 {
-- 
2.39.2

Re: [PATCH v5 5/5] drm/i915/display: Increase number of fast wake precharge pulses

[Hogander, Jouni]

On Tue, 2024-03-12 at 18:44 +0200, Ville Syrjälä wrote:
> On Fri, Mar 08, 2024 at 01:00:39PM +0200, Jouni Högander wrote:
> > Increasing number of fast wake sync pulses seem to fix problems
> > with
> > certain PSR panels. This should be ok for other panels as well as
> > the eDP
> > specification allows 10...16 precharge pulses and we are still
> > within that
> > range.
> > 
> > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9739
> > Signed-off-by: Jouni Högander 
> > ---
> >  drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
> >  1 file changed, 1 insertion(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > index 7e69be100d90..5dff1bc85d61 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> > @@ -145,7 +145,7 @@ static int intel_dp_aux_sync_len(void)
> >  
> >  int intel_dp_aux_fw_sync_len(void)
> >  {
> > -   int precharge = 10; /* 10-16 */
> > +   int precharge = 12; /* 10-16 */
> 
> This is still giving me allergies because Windows doesn't have
> anything like this. So the mystery is how does Windows work?
> This was an actual production machine I take it?

Not sure if it's already on market. To my understanding it's production
machine.

The problematic panel here is successfully used on older platform (RPL)
but now we are seeing glitches when used on MTL. More discussion about
the issue : https://gitlab.freedesktop.org/drm/intel/-/issues/9739

> 
> Did we have look at the error bits in PSR2_DEBUG to see if there
> is some difference between the working and non-working values?

There is no error bits in PSR2_DEBUG. Just bit 13 indicating "FastWake
Done"
> 
> Anyways, this at least needs a proper comment to explain why
> we're not usign the standard value.

Ok, I will add that comment and send a new version.

BR,

Jouni Högander

> 
> > int preamble = 8;
> >  
> > return precharge + preamble;
> > -- 
> > 2.34.1
> 

✓ Fi.CI.BAT: success for drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev4)

[Patchwork]

== Series Details ==

Series: drm/i915/dp: Increase idle pattern wait timeout to 2ms (rev4)
URL   : https://patchwork.freedesktop.org/series/130643/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14420 -> Patchwork_130643v4


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/index.html

Participating hosts (34 -> 36)
--

  Additional (3): fi-glk-j4005 bat-kbl-2 bat-mtlp-8 
  Missing(1): fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130643v4 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][1] ([i915#9318])
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][2] ([i915#1849])
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-kbl-2/igt@fb...@info.html

  * igt@gem_huc_copy@huc-copy:
- fi-glk-j4005:   NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][4] +39 other tests skip
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@gem_lmem_swapp...@parallel-random-engines.html
- fi-glk-j4005:   NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/fi-glk-j4005/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4079]) +1 other test skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@gem_tiled_fence_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4077]) +2 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@gem_tiled_fence_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@hangcheck:
- bat-dg2-14: [PASS][11] -> [ABORT][12] ([i915#10366])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14420/bat-dg2-14/igt@i915_selftest@l...@hangcheck.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-dg2-14/igt@i915_selftest@l...@hangcheck.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#5190])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4212]) +8 other tests skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4213]) +1 other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#3555] / [i915#3840] / 
[i915#9159])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-edid:
- bat-dg2-8:  [PASS][17] -> [INCOMPLETE][18] ([i915#10419])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14420/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-mtlp-8: NOTRUN -> [SKIP][19]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130643v4/bat-mtlp-8/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-mtlp-8: NOTRUN -> [SKIP][20] ([i915#5274])
   [20]: 

Re: [PATCH 6/6] drm/i915: Allow bigjoiner for MST

[Lisovskiy, Stanislav]

On Tue, Mar 12, 2024 at 09:48:33PM -0700, Manasi Navare wrote:
> Now when we enable bigjoiner for MST, in MST case
> intel_ddi_post_disable_hdmi_or_sst() function wont get called,
> Do we need similar changes for MST case to loop over the joined pipes
> in MST bigjoiner case?
> 
> Manasi

Hi Manasi, check now my latest series, that should handle this.


Stan

> 
> On Fri, Mar 8, 2024 at 5:12 AM Stanislav Lisovskiy
>  wrote:
> >
> > From: Vidya Srinivas 
> >
> > We need bigjoiner support with MST functionality
> > for MST monitor resolutions > 5K to work.
> > Adding support for the same.
> >
> > v2: Addressed review comments from Jani.
> > Revert rejection of MST bigjoiner modes and add
> > functionality
> >
> > v3: Fixed pipe_mismatch WARN for mst_master_transcoder
> > Credits-to: Manasi Navare 
> >
> > Signed-off-by: Vidya Srinivas 
> > Reviewed-by: Manasi Navare 
> > ---
> >  drivers/gpu/drm/i915/display/intel_ddi.c|  6 --
> >  drivers/gpu/drm/i915/display/intel_dp_mst.c | 17 +
> >  2 files changed, 13 insertions(+), 10 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c 
> > b/drivers/gpu/drm/i915/display/intel_ddi.c
> > index 3756975bd561c..3bf8941107473 100644
> > --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> > @@ -3924,9 +3924,11 @@ static void intel_ddi_read_func_ctl(struct 
> > intel_encoder *encoder,
> > pipe_config->lane_count =
> > ((temp & DDI_PORT_WIDTH_MASK) >> 
> > DDI_PORT_WIDTH_SHIFT) + 1;
> >
> > -   if (DISPLAY_VER(dev_priv) >= 12)
> > -   pipe_config->mst_master_transcoder =
> > +   if (DISPLAY_VER(dev_priv) >= 12) {
> > +   if (!intel_crtc_is_bigjoiner_slave(pipe_config))
> > +   pipe_config->mst_master_transcoder =
> > 
> > REG_FIELD_GET(TRANS_DDI_MST_TRANSPORT_SELECT_MASK, temp);
> > +   }
> >
> > intel_cpu_transcoder_get_m1_n1(crtc, cpu_transcoder,
> >_config->dp_m_n);
> > diff --git a/drivers/gpu/drm/i915/display/intel_dp_mst.c 
> > b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > index 53aec023ce92f..3e6e2cd08d3ab 100644
> > --- a/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > +++ b/drivers/gpu/drm/i915/display/intel_dp_mst.c
> > @@ -525,6 +525,7 @@ static int intel_dp_mst_compute_config(struct 
> > intel_encoder *encoder,
> >  {
> > struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> > struct intel_atomic_state *state = 
> > to_intel_atomic_state(conn_state->state);
> > +   struct intel_crtc *crtc = to_intel_crtc(pipe_config->uapi.crtc);
> > struct intel_dp_mst_encoder *intel_mst = enc_to_mst(encoder);
> > struct intel_dp *intel_dp = _mst->primary->dp;
> > const struct intel_connector *connector =
> > @@ -542,6 +543,10 @@ static int intel_dp_mst_compute_config(struct 
> > intel_encoder *encoder,
> > if (adjusted_mode->flags & DRM_MODE_FLAG_DBLSCAN)
> > return -EINVAL;
> >
> > +   if (intel_dp_need_bigjoiner(intel_dp, adjusted_mode->crtc_hdisplay,
> > +   adjusted_mode->crtc_clock))
> > +   pipe_config->bigjoiner_pipes = GENMASK(crtc->pipe + 1, 
> > crtc->pipe);
> > +
> > pipe_config->sink_format = INTEL_OUTPUT_FORMAT_RGB;
> > pipe_config->output_format = INTEL_OUTPUT_FORMAT_RGB;
> > pipe_config->has_pch_encoder = false;
> > @@ -1330,12 +1335,6 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
> > *connector,
> >  *   corresponding link capabilities of the sink) in case the
> >  *   stream is uncompressed for it by the last branch device.
> >  */
> > -   if (mode_rate > max_rate || mode->clock > max_dotclk ||
> > -   drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > 
> > port->full_pbn) {
> > -   *status = MODE_CLOCK_HIGH;
> > -   return 0;
> > -   }
> > -
> > if (mode->clock < 1) {
> > *status = MODE_CLOCK_LOW;
> > return 0;
> > @@ -1349,8 +1348,10 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
> > *connector,
> > if (intel_dp_need_bigjoiner(intel_dp, mode->hdisplay, 
> > target_clock)) {
> > bigjoiner = true;
> > max_dotclk *= 2;
> > +   }
> >
> > -   /* TODO: add support for bigjoiner */
> > +   if (mode_rate > max_rate || mode->clock > max_dotclk ||
> > +   drm_dp_calc_pbn_mode(mode->clock, min_bpp << 4) > 
> > port->full_pbn) {
> > *status = MODE_CLOCK_HIGH;
> > return 0;
> > }
> > @@ -1397,7 +1398,7 @@ intel_dp_mst_mode_valid_ctx(struct drm_connector 
> > *connector,
> > return 0;
> > }
> >
> > -   *status = 

Re: ✗ Fi.CI.IGT: failure for Enable LNL display (rev2)

[Gustavo Sousa]

Quoting Patchwork (2024-03-12 22:30:46-03:00)
>== Series Details ==
>
>Series: Enable LNL display (rev2)
>URL   : https://patchwork.freedesktop.org/series/130689/
>State : failure
>
>== Summary ==
>
>CI Bug Log - changes from CI_DRM_14421_full -> Patchwork_130689v2_full
>
>
>Summary
>---
>
>  **FAILURE**
>
>  Serious unknown changes coming with Patchwork_130689v2_full absolutely need 
> to be
>  verified manually.
>  
>  If you think the reported changes have nothing to do with the changes
>  introduced in Patchwork_130689v2_full, please notify your bug team 
> (i915-ci-in...@lists.freedesktop.org) to allow them
>  to document this new failure mode, which will reduce false positives in CI.
>
>  
>
>Participating hosts (8 -> 8)
>--
>
>  No changes in participating hosts
>
>Possible new issues
>---
>
>  Here are the unknown changes that may have been introduced in 
> Patchwork_130689v2_full:
>
>### IGT changes ###
>
> Possible regressions 
>
>  * igt@i915_module_load@reload-with-fault-injection:
>- shard-tglu: [PASS][1] -> [INCOMPLETE][2]
>   [1]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14421/shard-tglu-4/igt@i915_module_l...@reload-with-fault-injection.html
>   [2]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-tglu-8/igt@i915_module_l...@reload-with-fault-injection.html

Fault injection is not done in sequences for CDCLK or MBus. This
shouldn't be related to this patch.

>
>  * igt@kms_pipe_crc_basic@hang-read-crc@pipe-a-hdmi-a-3:
>- shard-dg2:  NOTRUN -> [ABORT][3]
>   [3]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg2-6/igt@kms_pipe_crc_basic@hang-read-...@pipe-a-hdmi-a-3.html

Not related. This was already happening prior to this patch. See
examples:

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1519/bat-dg2-8/igt@kms_pipe_crc_basic@hang-read-...@pipe-a-dp-1.html

https://intel-gfx-ci.01.org/tree/drm-tip/drmtip_1519/bat-dg2-14/igt@kms_pipe_crc_basic@hang-read-...@pipe-a-hdmi-a-2.html

--
Gustavo Sousa

>
>  
>New tests
>-
>
>  New tests have been introduced between CI_DRM_14421_full and 
> Patchwork_130689v2_full:
>
>### New IGT tests (2) ###
>
>  * igt@kms_cursor_crc@cursor-onscreen-256x85@pipe-d-dp-4:
>- Statuses : 1 pass(s)
>- Exec time: [2.70] s
>
>  * igt@kms_cursor_crc@cursor-random-64x64@pipe-d-dp-4:
>- Statuses : 1 pass(s)
>- Exec time: [4.40] s
>
>  
>
>Known issues
>
>
>  Here are the changes found in Patchwork_130689v2_full that come from known 
> issues:
>
>### IGT changes ###
>
> Issues hit 
>
>  * igt@api_intel_bb@crc32:
>- shard-dg1:  NOTRUN -> [SKIP][4] ([i915#6230])
>   [4]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg1-16/igt@api_intel...@crc32.html
>
>  * igt@drm_fdinfo@busy-check-all@bcs0:
>- shard-dg1:  NOTRUN -> [SKIP][5] ([i915#8414]) +11 other tests 
> skip
>   [5]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg1-15/igt@drm_fdinfo@busy-check-...@bcs0.html
>
>  * igt@drm_fdinfo@most-busy-idle-check-all@rcs0:
>- shard-rkl:  [PASS][6] -> [FAIL][7] ([i915#7742])
>   [6]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14421/shard-rkl-5/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
>   [7]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-rkl-7/igt@drm_fdinfo@most-busy-idle-check-...@rcs0.html
>
>  * igt@drm_fdinfo@virtual-busy-all:
>- shard-dg2:  NOTRUN -> [SKIP][8] ([i915#8414])
>   [8]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg2-8/igt@drm_fdi...@virtual-busy-all.html
>
>  * igt@gem_busy@semaphore:
>- shard-dg1:  NOTRUN -> [SKIP][9] ([i915#3936])
>   [9]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg1-17/igt@gem_b...@semaphore.html
>
>  * igt@gem_ccs@block-multicopy-inplace:
>- shard-dg1:  NOTRUN -> [SKIP][10] ([i915#3555] / [i915#9323]) +1 
> other test skip
>   [10]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-dg1-15/igt@gem_...@block-multicopy-inplace.html
>
>  * igt@gem_ccs@suspend-resume:
>- shard-rkl:  NOTRUN -> [SKIP][11] ([i915#9323])
>   [11]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-rkl-5/igt@gem_...@suspend-resume.html
>
>  * igt@gem_ctx_persistence@engines-hostile-preempt:
>- shard-snb:  NOTRUN -> [SKIP][12] ([i915#1099])
>   [12]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-snb5/igt@gem_ctx_persiste...@engines-hostile-preempt.html
>
>  * igt@gem_ctx_sseu@invalid-sseu:
>- shard-rkl:  NOTRUN -> [SKIP][13] ([i915#280])
>   [13]: 
> https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130689v2/shard-rkl-5/igt@gem_ctx_s...@invalid-sseu.html
>
>  * igt@gem_eio@kms:
>- shard-dg1:  NOTRUN -> [FAIL][14] ([i915#5784])

Re: [PATCH v4 0/4] TTM unlockable restartable LRU list iteration

[Thomas Hellström]

Hi!

On Mon, 2024-03-11 at 14:07 +0100, Thomas Hellström wrote:
> On Fri, 2024-03-08 at 13:13 +0530, Somalapuram, Amaranath wrote:
> > Patches are tested on AMD platform.
> > Repeated stress test on Unigine Heaven, memory full (VRAM + GTT +
> > system 
> > SWAP), then free.
> > No errors/warning in kernel log.
> > Any suggestion specific tests?
> 
> We are testing locally against Intel Xe CI and Intel i915 CI which
> should give rather good coverage. If there are some amdgpu tests that
> exercise eviction / swapping also with a lot of local objects (Vulkan
> apps?) that would be great.
> 
> Thanks,
> Thomas
> 

Any updates on this?

FWIW, For patch 3, IMO after looking a bit at other solutions, IMO this
is the preferred solution mostly because it is self-contained. In
particular if we allow drivers to iterate over the LRU lists with this
interface, most likely if we add semantics like "You must block any
bulk lru bumping if unlocking the lru_lock" That becomes pretty nasty
and will most likely end up incorrect. It might well be that we've
traversed well into a bulk move lru sublist before we try to unlock.

/Thomas

Re: [PATCH v2 2/8] drm/i915/cdclk: Add and use mdclk_source_is_cdclk_pll()

[Lucas De Marchi]

On Tue, Mar 12, 2024 at 09:49:05AM -0700, Matt Roper wrote:

On Tue, Mar 12, 2024 at 01:36:33PM -0300, Gustavo Sousa wrote:

Currently, only Xe2LPD uses CDCLK PLL as the source of MDCLK and
previous display IPs use the CD2XCLK. There will be changes in code
paths common to those platforms that will rely on which source is being
used. As such, let's make that information explicit with the addition of
the predicate function mdclk_source_is_cdclk_pll().

Arguably, an enum could be created, but using a boolean should suffice
here, since we there are only two possible sources and the logic that
will rely on it will be very localized.

In order to get the code into a more consistent state, let's also take
this opportunity to hook the selection of CDCLK_CTL's "MDCLK Source
Select" to that new function. Even though currently only
MDCLK_SOURCE_SEL_CDCLK_PLL will be returned, having this extra logic is
arguably better than keeping stuff untied and prone to bugs.

v2:
  - Extract mdclk_source_is_cdclk_pll() out of xe2lpd_mdclk_source_sel()
to make latter only about the register's field.

Bspec: 69090


You might also add 68861 here since that's where we find out that Xe2



I added this while applying.

thanks
Lucas De Marchi

RE: [PATCH v3 6/6] drm/i915/psr: Do not write ALPM configuration for PSR1 or DP2.0 Panel Replay

[Manna, Animesh]

> -Original Message-
> From: Hogander, Jouni 
> Sent: Wednesday, March 6, 2024 4:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni 
> Subject: [PATCH v3 6/6] drm/i915/psr: Do not write ALPM configuration for
> PSR1 or DP2.0 Panel Replay
> 
> No need to write ALPM configuration for DP2.0 Panel Replay or PSR1.
> 
> Signed-off-by: Jouni Högander 
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
>  1 file changed, 2 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 4cd2bad5241f..c7bda37444f0 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1699,7 +1699,8 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
>   struct intel_psr *psr = _dp->psr;
>   u32 alpm_ctl;
> 
> - if (DISPLAY_VER(dev_priv) < 20)
> + if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp->psr.psr2_enabled &&
> +!intel_dp_is_edp(intel_dp)))

This patch maybe good to squash with previous patch, not sure will there be any 
negative impact if panel does not support aux-less alpm and from source side it 
is enabled.

Regards,
Animesh

>   return;
> 
>   if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> --
> 2.34.1

[PATCH v6 0/4] IO and fast wake lines calculation and increase fw sync length

[Jouni Högander]

This patch set is improving IO and fast wake lines calculation in PSR
code:

Use actual fast wake sync pulse count in calculation Implement getter
for IO buffer wake times and use that.  Better presentation on how
these are calculated.  Use calculation for display version < 12 as
well.

Also number of precharge pulses is increased by 2 pulses to fix
problems with certain panel models.

v6:
  - do not add lnl_io_wake_time helper
  - comment why pulse count is increased
v5:
  - s/get_io_buffer_wake_time/io_buffer_wake_time/ and use it directly in
calculation
  - do not handle < 9 separately
  - add own helpers for skl, tgl and lnl io buffer wake times
v4:
  - initialize io/fast_wake_time for display version < 9
v3:
  - keep using int in intel_dp_aux_fw_sync_len
v2:
  - do not add function pointer
  - rename io_wake_time in if block to io_buffer_wake_time
  - rename get_io_wake_time to get_io_buffer_wake_time
  - use calculation for display version < 12 as well
  - split LunarLake IO buffer wake times as a separate patch

Jouni Högander (4):
  drm/i915/display: Make intel_dp_aux_fw_sync_len available for PSR code
  drm/i915/psr: Improve fast and IO wake lines calculation
  drm/i915/psr: Calculate IO wake and fast wake lines for DISPLAY_VER <
12
  drm/i915/display: Increase number of fast wake precharge pulses

 drivers/gpu/drm/i915/display/intel_dp_aux.c |  9 +++-
 drivers/gpu/drm/i915/display/intel_dp_aux.h |  1 +
 drivers/gpu/drm/i915/display/intel_psr.c| 46 -
 3 files changed, 43 insertions(+), 13 deletions(-)

-- 
2.34.1

[PATCH v6 1/4] drm/i915/display: Make intel_dp_aux_fw_sync_len available for PSR code

[Jouni Högander]

ALPM AUX-Wake fast wake sync pulse count is needed by PSR to calculate IO
wake and fast wake lines. Convert intel_dp_aux_fw_sync_len as non-static
to make it available for PSR code.

v2: use int instead of u8

Signed-off-by: Jouni Högander 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 2 +-
 drivers/gpu/drm/i915/display/intel_dp_aux.h | 1 +
 2 files changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 4f4a0e3b3114..7e69be100d90 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -143,7 +143,7 @@ static int intel_dp_aux_sync_len(void)
return precharge + preamble;
 }
 
-static int intel_dp_aux_fw_sync_len(void)
+int intel_dp_aux_fw_sync_len(void)
 {
int precharge = 10; /* 10-16 */
int preamble = 8;
diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.h 
b/drivers/gpu/drm/i915/display/intel_dp_aux.h
index 8447f3e601fe..76d1f2ed7c2f 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.h
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.h
@@ -20,5 +20,6 @@ enum aux_ch intel_dp_aux_ch(struct intel_encoder *encoder);
 
 void intel_dp_aux_irq_handler(struct drm_i915_private *i915);
 u32 intel_dp_aux_pack(const u8 *src, int src_bytes);
+int intel_dp_aux_fw_sync_len(void);
 
 #endif /* __INTEL_DP_AUX_H__ */
-- 
2.34.1

[PATCH v6 3/4] drm/i915/psr: Calculate IO wake and fast wake lines for DISPLAY_VER < 12

[Jouni Högander]

Bspec mentions 50 us for IO wake time and 32 us for fast wake time. 32 us
is most probably wrong as it doesn't meet the specification as fast wake
time is calculated in Bspec like this:

10..16 us (precharge) + 8 us (preamble) + 4 us (phy_wake) + 20 us
(tfw_exit_latency)

Instead of using these constants calculate IO wake and fast wake for
DISPLAY_VER < 12 as well.

v3:
  - do not handle < 9 separately
  - add own helper for skl and tgl io buffer wake times
v2:
  - initialize io/fast_wake_time for display version < 9

Signed-off-by: Jouni Högander 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 46 
 1 file changed, 31 insertions(+), 15 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 7736bdcad82d..747761efa4be 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1150,36 +1150,52 @@ static bool _lnl_compute_alpm_params(struct intel_dp 
*intel_dp,
return true;
 }
 
-static int io_buffer_wake_time(void)
+/*
+ * IO wake time for DISPLAY_VER < 12 is not directly mentioned in Bspec. There
+ * are 50 us io wake time and 32 us fast wake time. Clearly preharge pulses are
+ * not (improperly) included in 32 us fast wake time. 50 us - 32 us = 18 us.
+ */
+static int skl_io_buffer_wake_time(void)
+{
+   return 18;
+}
+
+static int tgl_io_buffer_wake_time(void)
 {
return 10;
 }
 
+static int io_buffer_wake_time(const struct intel_crtc_state *crtc_state)
+{
+   struct drm_i915_private *i915 = to_i915(crtc_state->uapi.crtc->dev);
+
+   if (DISPLAY_VER(i915) >= 12)
+   return tgl_io_buffer_wake_time();
+   else
+   return skl_io_buffer_wake_time();
+}
+
 static bool _compute_alpm_params(struct intel_dp *intel_dp,
 struct intel_crtc_state *crtc_state)
 {
struct drm_i915_private *i915 = dp_to_i915(intel_dp);
int io_wake_lines, io_wake_time, fast_wake_lines, fast_wake_time;
+   int tfw_exit_latency = 20; /* eDP spec */
+   int phy_wake = 4;  /* eDP spec */
+   int preamble = 8;  /* eDP spec */
+   int precharge = intel_dp_aux_fw_sync_len() - preamble;
u8 max_wake_lines;
 
-   if (DISPLAY_VER(i915) >= 12) {
-   int tfw_exit_latency = 20; /* eDP spec */
-   int phy_wake = 4;  /* eDP spec */
-   int preamble = 8;  /* eDP spec */
-   int precharge = intel_dp_aux_fw_sync_len() - preamble;
-
-   io_wake_time = max(precharge, io_buffer_wake_time()) + preamble 
+
-   phy_wake + tfw_exit_latency;
-   fast_wake_time = precharge + preamble + phy_wake +
-   tfw_exit_latency;
+   io_wake_time = max(precharge, io_buffer_wake_time(crtc_state)) +
+   preamble + phy_wake + tfw_exit_latency;
+   fast_wake_time = precharge + preamble + phy_wake +
+   tfw_exit_latency;
 
+   if (DISPLAY_VER(i915) >= 12)
/* TODO: Check how we can use ALPM_CTL fast wake extended field 
*/
max_wake_lines = 12;
-   } else {
-   io_wake_time = 50;
-   fast_wake_time = 32;
+   else
max_wake_lines = 8;
-   }
 
io_wake_lines = intel_usecs_to_scanlines(
_state->hw.adjusted_mode, io_wake_time);
-- 
2.34.1

[PATCH v6 2/4] drm/i915/psr: Improve fast and IO wake lines calculation

[Jouni Högander]

Current fast and IO wake lines calculation is assuming fast wake sync
length is 18 pulses. Let's improve this by checking actual length.

Add getter for IO buffer wake time and return 10 us there which was assumed
with static 42 us IO wake time. Upcoming patches will extent this for
different display versions.

Bspec: 65450

v3:
  - s/get_io_buffer_wake_time/io_buffer_wake_time/ and use it directly in
calculation.
v2:
  - rename io_wake_time in if block to io_buffer_wake_time
  - rename get_io_wake_time to get_io_buffer_wake_time

Signed-off-by: Jouni Högander 
Reviewed-by: Ville Syrjälä 
---
 drivers/gpu/drm/i915/display/intel_psr.c | 20 ++--
 1 file changed, 14 insertions(+), 6 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/intel_psr.c 
b/drivers/gpu/drm/i915/display/intel_psr.c
index 6927785fd6ff..7736bdcad82d 100644
--- a/drivers/gpu/drm/i915/display/intel_psr.c
+++ b/drivers/gpu/drm/i915/display/intel_psr.c
@@ -1150,6 +1150,11 @@ static bool _lnl_compute_alpm_params(struct intel_dp 
*intel_dp,
return true;
 }
 
+static int io_buffer_wake_time(void)
+{
+   return 10;
+}
+
 static bool _compute_alpm_params(struct intel_dp *intel_dp,
 struct intel_crtc_state *crtc_state)
 {
@@ -1158,12 +1163,15 @@ static bool _compute_alpm_params(struct intel_dp 
*intel_dp,
u8 max_wake_lines;
 
if (DISPLAY_VER(i915) >= 12) {
-   io_wake_time = 42;
-   /*
-* According to Bspec it's 42us, but based on testing
-* it is not enough -> use 45 us.
-*/
-   fast_wake_time = 45;
+   int tfw_exit_latency = 20; /* eDP spec */
+   int phy_wake = 4;  /* eDP spec */
+   int preamble = 8;  /* eDP spec */
+   int precharge = intel_dp_aux_fw_sync_len() - preamble;
+
+   io_wake_time = max(precharge, io_buffer_wake_time()) + preamble 
+
+   phy_wake + tfw_exit_latency;
+   fast_wake_time = precharge + preamble + phy_wake +
+   tfw_exit_latency;
 
/* TODO: Check how we can use ALPM_CTL fast wake extended field 
*/
max_wake_lines = 12;
-- 
2.34.1

[PATCH v6 4/4] drm/i915/display: Increase number of fast wake precharge pulses

[Jouni Högander]

Increasing number of fast wake sync pulses seem to fix problems with
certain PSR panels. This should be ok for other panels as well as the eDP
specification allows 10...16 precharge pulses and we are still within that
range.

v2: add comment explaining pulse count is increased

Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9739
Signed-off-by: Jouni Högander 
---
 drivers/gpu/drm/i915/display/intel_dp_aux.c | 7 ++-
 1 file changed, 6 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
b/drivers/gpu/drm/i915/display/intel_dp_aux.c
index 7e69be100d90..3264026454b2 100644
--- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
+++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
@@ -145,7 +145,12 @@ static int intel_dp_aux_sync_len(void)
 
 int intel_dp_aux_fw_sync_len(void)
 {
-   int precharge = 10; /* 10-16 */
+   /*
+* We faced some glitches on MTL with one PSR2 panel when using HW
+* default 18. Using 20 is fixing these problems with the panel. It is
+* still within range mentioned in eDP specification.
+*/
+   int precharge = 12; /* 10-16 */
int preamble = 8;
 
return precharge + preamble;
-- 
2.34.1

Re: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay

[Hogander, Jouni]

On Wed, 2024-03-13 at 11:15 +, Manna, Animesh wrote:
> 
> 
> > -Original Message-
> > From: Hogander, Jouni 
> > Sent: Wednesday, March 6, 2024 4:15 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Ville Syrjälä ; Manna, Animesh
> > ; Murthy, Arun R
> > ;
> > Hogander, Jouni 
> > Subject: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel
> > replay
> > 
> > Enable ALPM AUX-Less for Panel Replay eDP. Also write all
> > calculated AUX-
> > Less configuration values accordingly.
> > 
> > Bspec: 71477
> > 
> > v3:
> >   - do not use alpm_ctl as uninitialized variable
> > v2:
> >   - do not set AUX-Wake related bits for AUX-Less case
> >   - drop switch to active latency
> >   - add SLEEP_HOLD_TIME_50_SYMBOLS
> >   - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD
> > 
> > Signed-off-by: Jouni Högander 
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 42
> > +---
> >  1 file changed, 38 insertions(+), 4 deletions(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 738ea623a395..4cd2bad5241f 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1697,14 +1697,39 @@ static void lnl_alpm_configure(struct
> > intel_dp
> > *intel_dp)
> > struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
> > enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
> > struct intel_psr *psr = _dp->psr;
> > +   u32 alpm_ctl;
> > 
> > if (DISPLAY_VER(dev_priv) < 20)
> > return;
> > 
> > -   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> > -  ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> > -  ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> > > alpm_parameters.check_entry_lines) |
> > -  ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> > > alpm_parameters.fast_wake_lines));
> > +   if (intel_dp->psr.panel_replay_enabled &&
> > intel_dp_is_edp(intel_dp)) {
> > +   alpm_ctl = ALPM_CTL_ALPM_ENABLE |
> > +   ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> > +
> > ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
> > +
> > +   intel_de_write(dev_priv,
> > PORT_ALPM_CTL(cpu_transcoder),
> > +  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> 
> Good to add code-comments why aux-less alpm is enabled without
> checking panel capability.
> 
> Same for below wherever we are setting bit for aux-less alpm.

Ok, I will add these comments.

BR,

Jouni Högander
> 
> Regards,
> Animesh
>  
> > + 
> > PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
> > +  PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0)
> > |
> > +  PORT_ALPM_CTL_SILENCE_PERIOD(
> > +  psr-
> > > alpm_parameters.silence_period_sym_clocks));
> > +
> > +   intel_de_write(dev_priv,
> > PORT_ALPM_LFPS_CTL(cpu_transcoder),
> > + 
> > PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
> > +
> > PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms) |
> > +
> > PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms) |
> > +
> > PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
> > +  psr-
> > > alpm_parameters.lfps_half_cycle_num_of_syms));
> > +   } else {
> > +   alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> > +   ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> > > alpm_parameters.fast_wake_lines);
> > +   }
> > +
> > +   alpm_ctl |=
> > +ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> > > alpm_parameters.check_entry_lines);
> > +
> > +   intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> > alpm_ctl);
> >  }
> > 
> >  static void intel_psr_enable_source(struct intel_dp *intel_dp, @@
> > -1975,6
> > +2000,15 @@ static void intel_psr_disable_locked(struct intel_dp
> > *intel_dp)
> > 
> > intel_snps_phy_update_psr_power_state(dev_priv, phy,
> > false);
> > 
> > +   if (intel_dp->psr.panel_replay_enabled &&
> > intel_dp_is_edp(intel_dp)) {
> > +   intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> > +    ALPM_CTL_ALPM_ENABLE |
> > +    ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> > +
> > +   intel_de_rmw(dev_priv,
> > PORT_ALPM_CTL(cpu_transcoder),
> > +    PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE,
> > 0);
> > +   }
> > +
> > /* Disable PSR on Sink */
> > drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
> > 
> > --
> > 2.34.1
> 

Re: [PATCH v2 0/8] Enable LNL display

[Lucas De Marchi]

On Tue, 12 Mar 2024 13:36:31 -0300, Gustavo Sousa wrote:
> This series aims at providing the remaining patches for enabling display
> on Lunar Lake, which used Xe2LPD display IP.
> 
> The first set of patches contains fixes and extra stuff required for
> supporting CDCLK on Xe2LPD:
> 
> drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
> drm/i915/cdclk: Add and use mdclk_source_is_cdclk_pll()
> drm/i915/cdclk: Only compute squash waveform when necessary
> drm/i915: Extract intel_dbuf_mdclk_cdclk_ratio_update()
> drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_state
> drm/i915/xe2lpd: Support MDCLK:CDCLK ratio changes
> 
> [...]

Applied all the patches to drm-intel-next. Thanks for the patches and reviews.

[1/8] drm/i915/cdclk: Rename lnl_cdclk_table to xe2lpd_cdclk_table
  commit: dfdfc609bb71521ac22a2ff91f608644bf7e7b6d
[2/8] drm/i915/cdclk: Add and use mdclk_source_is_cdclk_pll()
  commit: 5372a54d7a3cf32c761d2896276b72b495bcb497
[3/8] drm/i915/cdclk: Only compute squash waveform when necessary
  commit: 452269e2f0ea180a4bc39fd4643df7fe2ea0bb8e
[4/8] drm/i915: Extract intel_dbuf_mdclk_cdclk_ratio_update()
  commit: 66a0e0681392420b326f00ba732e6bda099eda29
[5/8] drm/i915: Add mdclk_cdclk_ratio to intel_dbuf_state
  commit: 9161e31181440e4882f78e02783e40325dc82e27
[6/8] drm/i915/xe2lpd: Support MDCLK:CDCLK ratio changes
  commit: c834a080a0134e7bd0cb18c3a2b0dd674794d182
[7/8] drm/i915/xe2lpd: Load DMC
  commit: bf1a72ab5a446e383682e34347237ee5317c2185
[8/8] drm/xe/lnl: Enable display support
  commit: 79263e4b3f0ed5928a1622300d32ed35f7d8fc24

Best regards,
-- 
Lucas De Marchi 

RE: [PATCH v3 1/6] drm/display: Add missing aux less alpm wake related bits

[Manna, Animesh]

> -Original Message-
> From: Hogander, Jouni 
> Sent: Wednesday, March 6, 2024 4:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni 
> Subject: [PATCH v3 1/6] drm/display: Add missing aux less alpm wake related
> bits
> 
> eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and
> DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these.

Good to add this patch with the patch series where _CAP and _CONFIG registers 
will be used.

Regards,
Animesh

> 
> Signed-off-by: Jouni Högander 
> ---
>  include/drm/display/drm_dp.h | 5 -
>  1 file changed, 4 insertions(+), 1 deletion(-)
> 
> diff --git a/include/drm/display/drm_dp.h b/include/drm/display/drm_dp.h
> index 4891bd916d26..651d117d636d 100644
> --- a/include/drm/display/drm_dp.h
> +++ b/include/drm/display/drm_dp.h
> @@ -232,6 +232,8 @@
> 
>  #define DP_RECEIVER_ALPM_CAP 0x02e   /* eDP 1.4 */
>  # define DP_ALPM_CAP (1 << 0)
> +# define DP_ALPM_PM_STATE_2A_SUPPORT (1 << 1) /* eDP 1.5 */
> +# define DP_ALPM_AUX_LESS_CAP(1 << 2) /* eDP 1.5 */
> 
>  #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
>  # define DP_AUX_FRAME_SYNC_CAP   (1 << 0)
> @@ -677,7 +679,8 @@
> 
>  #define DP_RECEIVER_ALPM_CONFIG  0x116   /* eDP 1.4 */
>  # define DP_ALPM_ENABLE  (1 << 0)
> -# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
> +# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1) /* eDP 1.5 */
> +# define DP_ALPM_MODE_AUX_LESS   (1 << 2) /* eDP 1.5 */
> 
>  #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
>  # define DP_AUX_FRAME_SYNC_ENABLE(1 << 0)
> --
> 2.34.1

RE: [PATCH v3 3/6] drm/i915/psr: Calculate aux less wake time

[Manna, Animesh]

> -Original Message-
> From: Hogander, Jouni 
> Sent: Wednesday, March 6, 2024 4:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni 
> Subject: [PATCH v3 3/6] drm/i915/psr: Calculate aux less wake time
> 
> Calculate aux less wake time and store it into alpm_params struct
> 
> Bspec: 71477
> 
> v3:
>   - use ALPM_CTL_AUX_LESS_WAKE_TIME_MASK instead of value 63
> v2:
>   - use variables instead of values directly
>   - fix max value
>   - move converting port clock to Mhz into
> _lnl_compute_aux_less_wake_time
> 
> Signed-off-by: Jouni Högander 
> ---
>  .../drm/i915/display/intel_display_types.h|  1 +
>  drivers/gpu/drm/i915/display/intel_psr.c  | 60 +++
>  2 files changed, 61 insertions(+)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> b/drivers/gpu/drm/i915/display/intel_display_types.h
> index e67cd5b02e84..928317acc1bd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> @@ -1737,6 +1737,7 @@ struct intel_psr {
> 
>   /* LNL and beyond */
>   u8 check_entry_lines;
> + u8 aux_less_wake_lines;

As aux-wake or aux-less is mutually exclusive can we use existing wake-line 
variable for aux-less as well.

Regards,
Animesh

>   } alpm_parameters;
> 
>   ktime_t last_entry_attempt;
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 6927785fd6ff..c545ee229684 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1126,6 +1126,63 @@ static bool
> _compute_psr2_sdp_prior_scanline_indication(struct intel_dp *intel_d
>   return true;
>  }
> 
> +/*
> + * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period, Max+
> + * tSilence, Max+ tPHY Establishment + tCDS) / tline)
> + * For the "PHY P2 to P0" latency see the PHY Power Control page
> + * (PHY P2 to P0) :
> +https://gfxspecs.intel.com/Predator/Home/Index/68965
> + * : 12 us
> + * The tLFPS_Period, Max term is 800ns
> + * The tSilence, Max term is 180ns
> + * The tPHY Establishment (a.k.a. t1) term is 50us
> + * The tCDS term is 1 or 2 times t2
> + * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
> + * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)
> + * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary and
> + * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that start
> + * within the CDS period complete within the CDS period regardless of
> + * entry into the period
> + * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
> + * TPS4 Length = 252 Symbols
> + */
> +static int _lnl_compute_aux_less_wake_time(int port_clock) {
> + int tphy2_p2_to_p0 = 12 * 1000;
> + int tlfps_period_max = 800;
> + int tsilence_max = 180;
> + int t1 = 50 * 1000;
> + int tps4 = 252;
> + int tml_phy_lock = 1000 * 1000 * tps4 * 10 / port_clock;
> + int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock) + 1;
> + int t2 = num_ml_phy_lock * tml_phy_lock;
> + int tcds = 1 * t2;
> +
> + return DIV_ROUND_UP(tphy2_p2_to_p0 + tlfps_period_max +
> tsilence_max +
> + t1 + tcds, 1000);
> +}
> +
> +static int _lnl_compute_aux_less_alpm_params(struct intel_dp *intel_dp,
> +  struct intel_crtc_state 
> *crtc_state)
> {
> + struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> + int aux_less_wake_time, aux_less_wake_lines;
> +
> + aux_less_wake_time =
> + _lnl_compute_aux_less_wake_time(crtc_state->port_clock);
> + aux_less_wake_lines = intel_usecs_to_scanlines(_state-
> >hw.adjusted_mode,
> +aux_less_wake_time);
> +
> + if (aux_less_wake_lines > ALPM_CTL_AUX_LESS_WAKE_TIME_MASK)
> + return false;
> +
> + if (i915->display.params.psr_safest_params)
> + aux_less_wake_lines = 63;
> +
> + intel_dp->psr.alpm_parameters.aux_less_wake_lines =
> +aux_less_wake_lines;
> +
> + return true;
> +}
> +
>  static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
>struct intel_crtc_state *crtc_state)  { @@ 
> -
> 1142,6 +1199,9 @@ static bool _lnl_compute_alpm_params(struct intel_dp
> *intel_dp,
>   if (check_entry_lines > 15)
>   return false;
> 
> + if (!_lnl_compute_aux_less_alpm_params(intel_dp, crtc_state))
> + return false;
> +
>   if (i915->display.params.psr_safest_params)
>   check_entry_lines = 15;
> 
> --
> 2.34.1

RE: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay

[Manna, Animesh]

> -Original Message-
> From: Hogander, Jouni 
> Sent: Wednesday, March 6, 2024 4:15 PM
> To: intel-gfx@lists.freedesktop.org
> Cc: Ville Syrjälä ; Manna, Animesh
> ; Murthy, Arun R ;
> Hogander, Jouni 
> Subject: [PATCH v3 5/6] drm/i915/psr: Enable ALPM for eDP Panel replay
> 
> Enable ALPM AUX-Less for Panel Replay eDP. Also write all calculated AUX-
> Less configuration values accordingly.
> 
> Bspec: 71477
> 
> v3:
>   - do not use alpm_ctl as uninitialized variable
> v2:
>   - do not set AUX-Wake related bits for AUX-Less case
>   - drop switch to active latency
>   - add SLEEP_HOLD_TIME_50_SYMBOLS
>   - add PORT_ALPM_CTL_MAX_PHY_SWING_HOLD
> 
> Signed-off-by: Jouni Högander 
> ---
>  drivers/gpu/drm/i915/display/intel_psr.c | 42 +---
>  1 file changed, 38 insertions(+), 4 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> b/drivers/gpu/drm/i915/display/intel_psr.c
> index 738ea623a395..4cd2bad5241f 100644
> --- a/drivers/gpu/drm/i915/display/intel_psr.c
> +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> @@ -1697,14 +1697,39 @@ static void lnl_alpm_configure(struct intel_dp
> *intel_dp)
>   struct drm_i915_private *dev_priv = dp_to_i915(intel_dp);
>   enum transcoder cpu_transcoder = intel_dp->psr.transcoder;
>   struct intel_psr *psr = _dp->psr;
> + u32 alpm_ctl;
> 
>   if (DISPLAY_VER(dev_priv) < 20)
>   return;
> 
> - intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder),
> -ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> -ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> >alpm_parameters.check_entry_lines) |
> -ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> >alpm_parameters.fast_wake_lines));
> + if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> + alpm_ctl = ALPM_CTL_ALPM_ENABLE |
> + ALPM_CTL_ALPM_AUX_LESS_ENABLE |
> +
>   ALPM_CTL_AUX_LESS_SLEEP_HOLD_TIME_50_SYMBOLS;
> +
> + intel_de_write(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
> +PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE |

Good to add code-comments why aux-less alpm is enabled without checking panel 
capability.

Same for below wherever we are setting bit for aux-less alpm.

Regards,
Animesh
 
> +PORT_ALPM_CTL_MAX_PHY_SWING_SETUP(15) |
> +PORT_ALPM_CTL_MAX_PHY_SWING_HOLD(0) |
> +PORT_ALPM_CTL_SILENCE_PERIOD(
> +psr-
> >alpm_parameters.silence_period_sym_clocks));
> +
> + intel_de_write(dev_priv,
> PORT_ALPM_LFPS_CTL(cpu_transcoder),
> +PORT_ALPM_LFPS_CTL_LFPS_CYCLE_COUNT(10) |
> +
> PORT_ALPM_LFPS_CTL_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms) |
> +
> PORT_ALPM_LFPS_CTL_FIRST_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms) |
> +
> PORT_ALPM_LFPS_CTL_LAST_LFPS_HALF_CYCLE_DURATION(
> +psr-
> >alpm_parameters.lfps_half_cycle_num_of_syms));
> + } else {
> + alpm_ctl = ALPM_CTL_EXTENDED_FAST_WAKE_ENABLE |
> + ALPM_CTL_EXTENDED_FAST_WAKE_TIME(psr-
> >alpm_parameters.fast_wake_lines);
> + }
> +
> + alpm_ctl |=
> +ALPM_CTL_ALPM_ENTRY_CHECK(psr-
> >alpm_parameters.check_entry_lines);
> +
> + intel_de_write(dev_priv, ALPM_CTL(cpu_transcoder), alpm_ctl);
>  }
> 
>  static void intel_psr_enable_source(struct intel_dp *intel_dp, @@ -1975,6
> +2000,15 @@ static void intel_psr_disable_locked(struct intel_dp *intel_dp)
> 
>   intel_snps_phy_update_psr_power_state(dev_priv, phy, false);
> 
> + if (intel_dp->psr.panel_replay_enabled &&
> intel_dp_is_edp(intel_dp)) {
> + intel_de_rmw(dev_priv, ALPM_CTL(cpu_transcoder),
> +  ALPM_CTL_ALPM_ENABLE |
> +  ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> +
> + intel_de_rmw(dev_priv, PORT_ALPM_CTL(cpu_transcoder),
> +  PORT_ALPM_CTL_ALPM_AUX_LESS_ENABLE, 0);
> + }
> +
>   /* Disable PSR on Sink */
>   drm_dp_dpcd_writeb(_dp->aux, DP_PSR_EN_CFG, 0);
> 
> --
> 2.34.1

Re: [PATCH v3 1/6] drm/display: Add missing aux less alpm wake related bits

[Hogander, Jouni]

On Wed, 2024-03-13 at 11:14 +, Manna, Animesh wrote:
> 
> 
> > -Original Message-
> > From: Hogander, Jouni 
> > Sent: Wednesday, March 6, 2024 4:15 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Ville Syrjälä ; Manna, Animesh
> > ; Murthy, Arun R
> > ;
> > Hogander, Jouni 
> > Subject: [PATCH v3 1/6] drm/display: Add missing aux less alpm wake
> > related
> > bits
> > 
> > eDP1.5 adds some more bits into DP_RECEIVER_ALPM_CAP and
> > DP_RECEIVER_ALPM_CONFIG registers. Add definitions for these.
> 
> Good to add this patch with the patch series where _CAP and _CONFIG
> registers will be used.

Ok, I will drop it from this set.

BR,

Jouni Högander
> 
> Regards,
> Animesh
> 
> > 
> > Signed-off-by: Jouni Högander 
> > ---
> >  include/drm/display/drm_dp.h | 5 -
> >  1 file changed, 4 insertions(+), 1 deletion(-)
> > 
> > diff --git a/include/drm/display/drm_dp.h
> > b/include/drm/display/drm_dp.h
> > index 4891bd916d26..651d117d636d 100644
> > --- a/include/drm/display/drm_dp.h
> > +++ b/include/drm/display/drm_dp.h
> > @@ -232,6 +232,8 @@
> > 
> >  #define DP_RECEIVER_ALPM_CAP   0x02e   /* eDP 1.4 */
> >  # define DP_ALPM_CAP   (1 << 0)
> > +# define DP_ALPM_PM_STATE_2A_SUPPORT   (1 << 1) /* eDP 1.5 */
> > +# define DP_ALPM_AUX_LESS_CAP  (1 << 2) /* eDP 1.5 */
> > 
> >  #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CAP   0x02f   /* eDP 1.4 */
> >  # define DP_AUX_FRAME_SYNC_CAP (1 << 0)
> > @@ -677,7 +679,8 @@
> > 
> >  #define DP_RECEIVER_ALPM_CONFIG    0x116   /* eDP
> > 1.4 */
> >  # define DP_ALPM_ENABLE    (1 << 0)
> > -# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1)
> > +# define DP_ALPM_LOCK_ERROR_IRQ_HPD_ENABLE  (1 << 1) /* eDP 1.5 */
> > +# define DP_ALPM_MODE_AUX_LESS (1 << 2) /* eDP 1.5 */
> > 
> >  #define DP_SINK_DEVICE_AUX_FRAME_SYNC_CONF  0x117   /* eDP 1.4 */
> >  # define DP_AUX_FRAME_SYNC_ENABLE  (1 << 0)
> > --
> > 2.34.1
> 

Re: [PATCH] drm/i915/selftests: Pick correct caching mode.

[Andi Shyti]

Hi Nirmoy,

On Tue, Mar 12, 2024 at 12:18:15PM +0100, Nirmoy Das wrote:
> Caching mode is HW dependent so pick a correct one using
> intel_gt_coherent_map_type().
> 
> Cc: Andi Shyti 
> Cc: Janusz Krzysztofik 
> Cc: Jonathan Cavitt 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/10249
> Signed-off-by: Nirmoy Das 

pushed to drm-intel-gt-next.

Thanks,
Andi

Re: [PATCH v6 4/4] drm/i915/display: Increase number of fast wake precharge pulses

[Ville Syrjälä]

On Wed, Mar 13, 2024 at 03:32:21PM +0200, Jouni Högander wrote:
> Increasing number of fast wake sync pulses seem to fix problems with
> certain PSR panels. This should be ok for other panels as well as the eDP
> specification allows 10...16 precharge pulses and we are still within that
> range.
> 
> v2: add comment explaining pulse count is increased
> 
> Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/9739
> Signed-off-by: Jouni Högander 
> ---
>  drivers/gpu/drm/i915/display/intel_dp_aux.c | 7 ++-
>  1 file changed, 6 insertions(+), 1 deletion(-)
> 
> diff --git a/drivers/gpu/drm/i915/display/intel_dp_aux.c 
> b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> index 7e69be100d90..3264026454b2 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp_aux.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp_aux.c
> @@ -145,7 +145,12 @@ static int intel_dp_aux_sync_len(void)
>  
>  int intel_dp_aux_fw_sync_len(void)
>  {
> - int precharge = 10; /* 10-16 */
> + /*
> +  * We faced some glitches on MTL with one PSR2 panel when using HW
> +  * default 18. Using 20 is fixing these problems with the panel. It is
> +  * still within range mentioned in eDP specification.
> +  */

"MTL with one PSR2 panel" is super vague. Please mention the
actual machine model here.

With that 
Acked-by: Ville Syrjälä 

> + int precharge = 12; /* 10-16 */
>   int preamble = 8;
>  
>   return precharge + preamble;
> -- 
> 2.34.1

-- 
Ville Syrjälä
Intel

[PATCH] drm/i915/scaler: Update Pipe src size check in skl_update_scaler

[Ankit Nautiyal]

For Earlier platforms, the Pipe source size is 12-bits so
max pipe source width and height is 4096. For newer platforms it is
13-bits so theoretically max width/height is 8192. For few of the
earlier platforms the scaler did not use all bits of the PIPESRC,
so max scaler source size was used to make that the pipe source
size is programmed within limits, before using scaler.

This creates a problem, for MTL where scaler source size is 4096, but
max pipe source width can theroretically be 8192.

Switch the check to use the max scaler destination size, which closely
match the limits.

Signed-off-by: Ankit Nautiyal 
---
 drivers/gpu/drm/i915/display/skl_scaler.c | 7 ---
 1 file changed, 4 insertions(+), 3 deletions(-)

diff --git a/drivers/gpu/drm/i915/display/skl_scaler.c 
b/drivers/gpu/drm/i915/display/skl_scaler.c
index 8a934bada624..baa601d27815 100644
--- a/drivers/gpu/drm/i915/display/skl_scaler.c
+++ b/drivers/gpu/drm/i915/display/skl_scaler.c
@@ -213,10 +213,11 @@ skl_update_scaler(struct intel_crtc_state *crtc_state, 
bool force_detach,
 * The pipe scaler does not use all the bits of PIPESRC, at least
 * on the earlier platforms. So even when we're scaling a plane
 * the *pipe* source size must not be too large. For simplicity
-* we assume the limits match the scaler source size limits. Might
-* not be 100% accurate on all platforms, but good enough for now.
+* we assume the limits match the scaler destination size limits.
+* Might not be 100% accurate on all platforms, but good enough for
+* now.
 */
-   if (pipe_src_w > max_src_w || pipe_src_h > max_src_h) {
+   if (pipe_src_w > max_dst_w || pipe_src_h > max_dst_h) {
drm_dbg_kms(_priv->drm,
"scaler_user index %u.%u: pipe src size %ux%u "
"is out of scaler range\n",
-- 
2.40.1

Re: [PATCH v2] drm/i915/hwmon: Fix locking inversion in sysfs getter

[Andi Shyti]

Hi Janusz,

On Mon, Mar 11, 2024 at 09:34:58PM +0100, Janusz Krzysztofik wrote:
> In i915 hwmon sysfs getter path we now take a hwmon_lock, then acquire an
> rpm wakeref.  That results in lock inversion:
> 
> <4> [197.079335] ==
> <4> [197.085473] WARNING: possible circular locking dependency detected
> <4> [197.091611] 6.8.0-rc7-Patchwork_129026v7-gc4dc92fb1152+ #1 Not tainted

...

> Fixes: c41b8bdcc297 ("drm/i915/hwmon: Show device level energy usage")
> Signed-off-by: Janusz Krzysztofik 
> Cc: Rodrigo Vivi 
> Cc: Guenter Roeck 
> Cc:  # v6.2+

With the "Fixes:" tag changed and the stable version updated,
pushed to drm-intel-next.

Thanks,
Andi

✗ Fi.CI.BAT: failure for Bigjoiner refactoring (rev10)

[Patchwork]

== Series Details ==

Series: Bigjoiner refactoring (rev10)
URL   : https://patchwork.freedesktop.org/series/128311/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14426 -> Patchwork_128311v10


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_128311v10 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_128311v10, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/index.html

Participating hosts (35 -> 34)
--

  Additional (2): bat-kbl-2 bat-mtlp-8 
  Missing(3): bat-dg1-7 fi-glk-j4005 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_128311v10:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- bat-adls-6: [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-adls-6/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-adls-6/igt@i915_module_l...@load.html

  
Known issues


  Here are the changes found in Patchwork_128311v10 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][3] -> [FAIL][4] ([i915#8293])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-jsl-1/boot.html
- fi-cfl-8109u:   [PASS][5] -> [FAIL][6] ([i915#8293])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/fi-cfl-8109u/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#9318])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@fbdev@info:
- bat-kbl-2:  NOTRUN -> [SKIP][8] ([i915#1849])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-kbl-2/igt@fb...@info.html

  * igt@gem_lmem_swapping@parallel-random-engines:
- bat-kbl-2:  NOTRUN -> [SKIP][9] +39 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-kbl-2/igt@gem_lmem_swapp...@parallel-random-engines.html

  * igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4083])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4077]) +2 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6621])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@uncore:
- bat-dg2-8:  [PASS][15] -> [ABORT][16] ([i915#10366])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-dg2-8/igt@i915_selftest@l...@uncore.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-dg2-8/igt@i915_selftest@l...@uncore.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#5190])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#4212]) +8 other tests skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#4213]) +1 other test skip
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_128311v10/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- 

[linux-next:master] BUILD REGRESSION dad309222e4c3fc7f88b20ce725ce1e0eea07cc7

[kernel test robot]

tree/branch: 
https://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git master
branch HEAD: dad309222e4c3fc7f88b20ce725ce1e0eea07cc7  Add linux-next specific 
files for 20240313

Error/Warning reports:

https://lore.kernel.org/oe-kbuild-all/202403131859.szdcjzfy-...@intel.com

Error/Warning: (recently discovered and may have been fixed)

ERROR: modpost: "__aeabi_uldivmod" [drivers/gpu/drm/sun4i/sun4i-drm-hdmi.ko] 
undefined!
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c:574:33: error: unused function 
'pdev_to_xe_device' [-Werror,-Wunused-function]
drivers/gpu/drm/xe/xe_hw_engine_class_sysfs.c:579:33: error: unused function 
'to_xe_device' [-Werror,-Wunused-function]
include/linux/of.h:946:(.text+0x2be): undefined reference to `__udivdi3'
ld.lld: error: undefined symbol: __aeabi_uldivmod
powerpc-linux-ld: warning: orphan section `.bss..Lubsan_data772' from 
`kernel/ptrace.o' being placed in section `.bss..Lubsan_data772'

Unverified Error/Warning (likely false positive, please contact us if 
interested):

drivers/accessibility/speakup/devsynth.c:110:1: error: label at end of compound 
statement

Error/Warning ids grouped by kconfigs:

gcc_recent_errors
|-- alpha-allyesconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arc-allmodconfig
|   |-- 
drivers-gpu-drm-i915-display-intel_bios.c:error:implicit-declaration-of-function-intel_opregion_vbt_present
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arc-allyesconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arc-randconfig-002-20240313
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arm-allmodconfig
|   |-- 
arch-arm-mach-omap2-prm33xx.c:warning:expecting-prototype-for-am33xx_prm_global_warm_sw_reset().-Prototype-was-for-am33xx_prm_global_sw_reset()-instead
|   |-- 
drivers-gpu-drm-i915-display-intel_bios.c:error:implicit-declaration-of-function-intel_opregion_vbt_present
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arm-allyesconfig
|   |-- 
arch-arm-mach-omap2-prm33xx.c:warning:expecting-prototype-for-am33xx_prm_global_warm_sw_reset().-Prototype-was-for-am33xx_prm_global_sw_reset()-instead
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- arm64-defconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-allmodconfig
|   |-- 
drivers-gpu-drm-i915-display-intel_bios.c:error:implicit-declaration-of-function-intel_opregion_vbt_present
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-allyesconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-randconfig-001-20240313
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- csky-randconfig-r122-20240313
|   `-- io_uring-io_uring.c:sparse:sparse:cast-to-restricted-io_req_flags_t
|-- i386-allmodconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- i386-allyesconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- i386-buildonly-randconfig-006-20240313
|   `-- 
drivers-gpu-drm-i915-display-intel_bios.c:error:implicit-declaration-of-function-intel_opregion_vbt_present
|-- i386-randconfig-141-20240313
|   |-- 
drivers-mtd-devices-mchp48l640.c-mchp48l640_read_page()-warn:Please-consider-using-kzalloc-instead-of-kmalloc
|   |-- 
drivers-mtd-devices-mchp48l640.c-mchp48l640_write_page()-warn:Please-consider-using-kzalloc-instead-of-kmalloc
|   |-- 
drivers-usb-dwc2-hcd.c-dwc2_alloc_split_dma_aligned_buf()-warn:Please-consider-using-kmem_cache_zalloc-instead-of-kmem_cache_alloc
|   |-- 
drivers-usb-typec-tcpm-tcpm.c-tcpm_pd_svdm()-error:uninitialized-symbol-modep_prime-.
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- loongarch-allmodconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- loongarch-defconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting-prototype-for-wake_up_reservation().-Prototype-was-for-add_or_start_queue()-instead
|-- m68k-allmodconfig
|   `-- 
fs-ubifs-journal.c:warning:expecting

✗ Fi.CI.SPARSE: warning for drm/i915: add intel_opregion_vbt_present() stub function

[Patchwork]

== Series Details ==

Series: drm/i915: add intel_opregion_vbt_present() stub function
URL   : https://patchwork.freedesktop.org/series/131060/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2

✗ Fi.CI.BAT: failure for drm/i915: add intel_opregion_vbt_present() stub function

[Patchwork]

== Series Details ==

Series: drm/i915: add intel_opregion_vbt_present() stub function
URL   : https://patchwork.freedesktop.org/series/131060/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14426 -> Patchwork_131060v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_131060v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_131060v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/index.html

Participating hosts (35 -> 34)
--

  Missing(1): fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_131060v1:

### IGT changes ###

 Possible regressions 

  * igt@i915_selftest@live@gt_lrc:
- bat-arls-2: [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-arls-2/igt@i915_selftest@live@gt_lrc.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/bat-arls-2/igt@i915_selftest@live@gt_lrc.html

  * igt@vgem_basic@unload:
- fi-elk-e7500:   [PASS][3] -> [INCOMPLETE][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/fi-elk-e7500/igt@vgem_ba...@unload.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/fi-elk-e7500/igt@vgem_ba...@unload.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_module_load@load:
- {bat-mtlp-9}:   [PASS][5] -> [ABORT][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-mtlp-9/igt@i915_module_l...@load.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/bat-mtlp-9/igt@i915_module_l...@load.html

  
Known issues


  Here are the changes found in Patchwork_131060v1 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][7] -> [FAIL][8] ([i915#8293])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-jsl-1/boot.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@i915_module_load@reload:
- fi-kbl-7567u:   [PASS][9] -> [DMESG-WARN][10] ([i915#1982])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/fi-kbl-7567u/igt@i915_module_l...@reload.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/fi-kbl-7567u/igt@i915_module_l...@reload.html

  * igt@i915_selftest@live@hangcheck:
- bat-rpls-3: [PASS][11] -> [DMESG-WARN][12] ([i915#5591])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html

  * igt@i915_selftest@live@vma:
- bat-dg2-14: [PASS][13] -> [ABORT][14] ([i915#10366])
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14426/bat-dg2-14/igt@i915_selftest@l...@vma.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/bat-dg2-14/igt@i915_selftest@l...@vma.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366
  [i915#1982]: https://gitlab.freedesktop.org/drm/intel/issues/1982
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_14426 -> Patchwork_131060v1

  CI-20190529: 20190529
  CI_DRM_14426: 72f447f984cf5526e6ad32a6e2770124c67d59d3 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7759: 7759
  Patchwork_131060v1: 72f447f984cf5526e6ad32a6e2770124c67d59d3 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131060v1/index.html

Re: [PATCH] drm/i915: Do not match JSL in ehl_combo_pll_div_frac_wa_needed()

[Jani Nikula]

On Wed, 13 Mar 2024, Jonathon Hall  wrote:
> Since commit 0c65dc062611 ("drm/i915/jsl: s/JSL/JASPERLAKE for
> platform/subplatform defines"), boot freezes on a Jasper Lake tablet
> (Librem 11), usually with graphical corruption on the eDP display,
> but sometimes just a black screen.  This commit was included in 6.6 and
> later.
>
> That commit was intended to refactor EHL and JSL macros, but the change
> to ehl_combo_pll_div_frac_wa_needed() started matching JSL incorrectly
> when it was only intended to match EHL.
>
> It replaced:
>   return ((IS_PLATFORM(i915, INTEL_ELKHARTLAKE) &&
>IS_JSL_EHL_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) ||
> with:
>   return (((IS_ELKHARTLAKE(i915) || IS_JASPERLAKE(i915)) &&
>IS_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) ||
>
> Remove IS_JASPERLAKE() to fix the regression.
>
> Signed-off-by: Jonathon Hall 
> Cc: sta...@vger.kernel.org

Thanks for the patch!

Fixes: 0c65dc062611 ("drm/i915/jsl: s/JSL/JASPERLAKE for platform/subplatform 
defines")
Cc:  # v6.6+
Reviewed-by: Jani Nikula 

> ---
>  drivers/gpu/drm/i915/display/intel_dpll_mgr.c | 2 +-
>  1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c 
> b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> index ef57dad1a9cb..57a97880dcb3 100644
> --- a/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> +++ b/drivers/gpu/drm/i915/display/intel_dpll_mgr.c
> @@ -2509,7 +2509,7 @@ static void icl_wrpll_params_populate(struct 
> skl_wrpll_params *params,
>  static bool
>  ehl_combo_pll_div_frac_wa_needed(struct drm_i915_private *i915)
>  {
> - return (((IS_ELKHARTLAKE(i915) || IS_JASPERLAKE(i915)) &&
> + return ((IS_ELKHARTLAKE(i915) &&
>IS_DISPLAY_STEP(i915, STEP_B0, STEP_FOREVER)) ||
>IS_TIGERLAKE(i915) || IS_ALDERLAKE_S(i915) || 
> IS_ALDERLAKE_P(i915)) &&
>i915->display.dpll.ref_clks.nssc == 38400;

-- 
Jani Nikula, Intel

Re: [PATCH] drm/i915: remove platform checks in platform-specific handlers

[Matt Roper]

On Wed, Mar 13, 2024 at 07:27:36PM +0300, Nikita Kiryushin wrote:
> 
> Remove IS_KABYLAKE and IS_SKYLAKE in special handlers for
> skylake and kabylake: the checks are done at hook initialization and are
> always true in corresponding handlers.
> 
> Signed-off-by: Nikita Kiryushin 

Reviewed-by: Matt Roper 

> ---
>  drivers/gpu/drm/i915/gt/intel_workarounds.c | 6 +++---
>  drivers/gpu/drm/i915/intel_clock_gating.c   | 4 ++--
>  2 files changed, 5 insertions(+), 5 deletions(-)
> 
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 3eacbc50caf8..8eff6be9d74c 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -601,7 +601,7 @@ static void kbl_ctx_workarounds_init(struct
> intel_engine_cs *engine,
>   gen9_ctx_workarounds_init(engine, wal);
>   /* WaToEnableHwFixForPushConstHWBug:kbl */
> - if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
> + if (IS_GRAPHICS_STEP(i915, STEP_C0, STEP_FOREVER))
>   wa_masked_en(wal, COMMON_SLICE_CHICKEN2,
>GEN8_SBE_DISABLE_REPLAY_BUF_OPTIMIZATION);
>  @@ -1169,7 +1169,7 @@ skl_gt_workarounds_init(struct intel_gt *gt, struct
> i915_wa_list *wal)
>   GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>   /* WaInPlaceDecompressionHang:skl */
> - if (IS_SKYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, STEP_A0, 
> STEP_H0))
> + if (IS_GRAPHICS_STEP(gt->i915, STEP_A0, STEP_H0))
>   wa_write_or(wal,
>   GEN9_GAMT_ECO_REG_RW_IA,
>   GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
> @@ -1181,7 +1181,7 @@ kbl_gt_workarounds_init(struct intel_gt *gt, struct
> i915_wa_list *wal)
>   gen9_gt_workarounds_init(gt, wal);
>   /* WaDisableDynamicCreditSharing:kbl */
> - if (IS_KABYLAKE(gt->i915) && IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
> + if (IS_GRAPHICS_STEP(gt->i915, 0, STEP_C0))
>   wa_write_or(wal,
>   GAMT_CHKN_BIT_REG,
>   GAMT_CHKN_DISABLE_DYNAMIC_CREDIT_SHARING);
> diff --git a/drivers/gpu/drm/i915/intel_clock_gating.c
> b/drivers/gpu/drm/i915/intel_clock_gating.c
> index 9c21ce69bd98..977251bcbf42 100644
> --- a/drivers/gpu/drm/i915/intel_clock_gating.c
> +++ b/drivers/gpu/drm/i915/intel_clock_gating.c
> @@ -413,12 +413,12 @@ static void kbl_init_clock_gating(struct
> drm_i915_private *i915)
>   intel_uncore_rmw(>uncore, FBC_LLC_READ_CTRL, 0, 
> FBC_LLC_FULLY_OPEN);
>   /* WaDisableSDEUnitClockGating:kbl */
> - if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
> + if (IS_GRAPHICS_STEP(i915, 0, STEP_C0))
>   intel_uncore_rmw(>uncore, GEN8_UCGCTL6,
>0, GEN8_SDEUNIT_CLOCK_GATE_DISABLE);
>   /* WaDisableGamClockGating:kbl */
> - if (IS_KABYLAKE(i915) && IS_GRAPHICS_STEP(i915, 0, STEP_C0))
> + if (IS_GRAPHICS_STEP(i915, 0, STEP_C0))
>   intel_uncore_rmw(>uncore, GEN6_UCGCTL1,
>0, GEN6_GAMUNIT_CLOCK_GATE_DISABLE);
>  -- 2.34.1
> 

-- 
Matt Roper
Graphics Software Engineer
Linux GPU Platform Enablement
Intel Corporation

✗ Fi.CI.CHECKPATCH: warning for Bigjoiner refactoring (rev10)

[Patchwork]

== Series Details ==

Series: Bigjoiner refactoring (rev10)
URL   : https://patchwork.freedesktop.org/series/128311/
State : warning

== Summary ==

Error: dim checkpatch failed
96075b92e19f drm/i915: Add a small helper to compute the set of pipes for crtc
8307ecb8447f drm/i915: Extract intel_ddi_post_disable_hdmi_or_sst()
-:77: CHECK:BRACES: Blank lines aren't necessary after an open brace '{'
#77: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:3136:
+{
+

total: 0 errors, 0 warnings, 1 checks, 57 lines checked
17111ffa2e31 drm/i915: Utilize intel_crtc_joined_pipe_mask() more
70bdebb18704 drm/i915: Handle joined pipes inside hsw_crtc_disable()
-:130: ERROR:CODE_INDENT: code indent should use tabs where possible
#130: FILE: drivers/gpu/drm/i915/display/intel_display.c:6838:
+if (intel_crtc_is_bigjoiner_slave(old_crtc_state))$

-:130: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#130: FILE: drivers/gpu/drm/i915/display/intel_display.c:6838:
+if (intel_crtc_is_bigjoiner_slave(old_crtc_state))$

-:131: ERROR:CODE_INDENT: code indent should use tabs where possible
#131: FILE: drivers/gpu/drm/i915/display/intel_display.c:6839:
+continue;$

-:131: WARNING:LEADING_SPACE: please, no spaces at the start of a line
#131: FILE: drivers/gpu/drm/i915/display/intel_display.c:6839:
+continue;$

total: 2 errors, 2 warnings, 0 checks, 111 lines checked
431c7c87b620 drm/i915: Handle joined pipes inside hsw_crtc_enable()
-:8: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line (possible 
unwrapped commit description?)
#8: 
That way we can also remove a bunch of checks like 
intel_crtc_is_bigjoiner_slave.

-:259: WARNING:BLOCK_COMMENT_STYLE: Block comments use a trailing */ on a 
separate line
#259: FILE: drivers/gpu/drm/i915/display/intel_display.c:1718:
+* to change the workaround. */

-:312: ERROR:COMPLEX_MACRO: Macros with complex values should be enclosed in 
parentheses
#312: FILE: drivers/gpu/drm/i915/display/intel_display.h:315:
+#define for_each_intel_crtc_in_pipe_mask_reverse(dev, intel_crtc, pipe_mask)   
\
+   list_for_each_entry_reverse(intel_crtc, 
\
+   &(dev)->mode_config.crtc_list,  
\
+   base.head)  
\
+   for_each_if((pipe_mask) & BIT(intel_crtc->pipe))

-:312: CHECK:MACRO_ARG_REUSE: Macro argument reuse 'intel_crtc' - possible 
side-effects?
#312: FILE: drivers/gpu/drm/i915/display/intel_display.h:315:
+#define for_each_intel_crtc_in_pipe_mask_reverse(dev, intel_crtc, pipe_mask)   
\
+   list_for_each_entry_reverse(intel_crtc, 
\
+   &(dev)->mode_config.crtc_list,  
\
+   base.head)  
\
+   for_each_if((pipe_mask) & BIT(intel_crtc->pipe))

total: 1 errors, 2 warnings, 1 checks, 287 lines checked
e67686465c08 drm/i915: Allow bigjoiner for MST

✗ Fi.CI.SPARSE: warning for Bigjoiner refactoring (rev10)

[Patchwork]

== Series Details ==

Series: Bigjoiner refactoring (rev10)
URL   : https://patchwork.freedesktop.org/series/128311/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'

Re: [PATCH 0/8] drm: fix .get_modes() return values

[Jani Nikula]

On Fri, 08 Mar 2024, Thomas Zimmermann  wrote:
> Acked-by: Thomas Zimmermann 
>
> for the series.

Thanks, pushed the lot to drm-misc-next-fixes.

> Do you plan to make the return type an unsigned int eventually?

Not really. The hooks could still return -ENOMEM or something, with no
compiler warnings, and you'd be screwed because you wouldn't even have a
way of checking. You'd just get 4294967284 modes.


BR,
Jani.

-- 
Jani Nikula, Intel

Re: [PATCH v3 3/6] drm/i915/psr: Calculate aux less wake time

[Hogander, Jouni]

On Wed, 2024-03-13 at 11:14 +, Manna, Animesh wrote:
> 
> 
> > -Original Message-
> > From: Hogander, Jouni 
> > Sent: Wednesday, March 6, 2024 4:15 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Ville Syrjälä ; Manna, Animesh
> > ; Murthy, Arun R
> > ;
> > Hogander, Jouni 
> > Subject: [PATCH v3 3/6] drm/i915/psr: Calculate aux less wake time
> > 
> > Calculate aux less wake time and store it into alpm_params struct
> > 
> > Bspec: 71477
> > 
> > v3:
> >   - use ALPM_CTL_AUX_LESS_WAKE_TIME_MASK instead of value 63
> > v2:
> >   - use variables instead of values directly
> >   - fix max value
> >   - move converting port clock to Mhz into
> > _lnl_compute_aux_less_wake_time
> > 
> > Signed-off-by: Jouni Högander 
> > ---
> >  .../drm/i915/display/intel_display_types.h    |  1 +
> >  drivers/gpu/drm/i915/display/intel_psr.c  | 60
> > +++
> >  2 files changed, 61 insertions(+)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_display_types.h
> > b/drivers/gpu/drm/i915/display/intel_display_types.h
> > index e67cd5b02e84..928317acc1bd 100644
> > --- a/drivers/gpu/drm/i915/display/intel_display_types.h
> > +++ b/drivers/gpu/drm/i915/display/intel_display_types.h
> > @@ -1737,6 +1737,7 @@ struct intel_psr {
> > 
> > /* LNL and beyond */
> > u8 check_entry_lines;
> > +   u8 aux_less_wake_lines;
> 
> As aux-wake or aux-less is mutually exclusive can we use existing
> wake-line variable for aux-less as well.

I do not have any objections here. I can do this change.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> > } alpm_parameters;
> > 
> > ktime_t last_entry_attempt;
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 6927785fd6ff..c545ee229684 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1126,6 +1126,63 @@ static bool
> > _compute_psr2_sdp_prior_scanline_indication(struct intel_dp
> > *intel_d
> > return true;
> >  }
> > 
> > +/*
> > + * AUX-Less Wake Time = CEILING( ((PHY P2 to P0) + tLFPS_Period,
> > Max+
> > + * tSilence, Max+ tPHY Establishment + tCDS) / tline)
> > + * For the "PHY P2 to P0" latency see the PHY Power Control page
> > + * (PHY P2 to P0) :
> > +https://gfxspecs.intel.com/Predator/Home/Index/68965
> > + * : 12 us
> > + * The tLFPS_Period, Max term is 800ns
> > + * The tSilence, Max term is 180ns
> > + * The tPHY Establishment (a.k.a. t1) term is 50us
> > + * The tCDS term is 1 or 2 times t2
> > + * t2 = Number ML_PHY_LOCK * tML_PHY_LOCK
> > + * Number ML_PHY_LOCK = ( 7 + CEILING( 6.5us / tML_PHY_LOCK ) + 1)
> > + * Rounding up the 6.5us padding to the next ML_PHY_LOCK boundary
> > and
> > + * adding the "+ 1" term ensures all ML_PHY_LOCK sequences that
> > start
> > + * within the CDS period complete within the CDS period regardless
> > of
> > + * entry into the period
> > + * tML_PHY_LOCK = TPS4 Length * ( 10 / (Link Rate in MHz) )
> > + * TPS4 Length = 252 Symbols
> > + */
> > +static int _lnl_compute_aux_less_wake_time(int port_clock) {
> > +   int tphy2_p2_to_p0 = 12 * 1000;
> > +   int tlfps_period_max = 800;
> > +   int tsilence_max = 180;
> > +   int t1 = 50 * 1000;
> > +   int tps4 = 252;
> > +   int tml_phy_lock = 1000 * 1000 * tps4 * 10 / port_clock;
> > +   int num_ml_phy_lock = 7 + DIV_ROUND_UP(6500, tml_phy_lock)
> > + 1;
> > +   int t2 = num_ml_phy_lock * tml_phy_lock;
> > +   int tcds = 1 * t2;
> > +
> > +   return DIV_ROUND_UP(tphy2_p2_to_p0 + tlfps_period_max +
> > tsilence_max +
> > +   t1 + tcds, 1000);
> > +}
> > +
> > +static int _lnl_compute_aux_less_alpm_params(struct intel_dp
> > *intel_dp,
> > +    struct
> > intel_crtc_state *crtc_state)
> > {
> > +   struct drm_i915_private *i915 = dp_to_i915(intel_dp);
> > +   int aux_less_wake_time, aux_less_wake_lines;
> > +
> > +   aux_less_wake_time =
> > +   _lnl_compute_aux_less_wake_time(crtc_state-
> > >port_clock);
> > +   aux_less_wake_lines = intel_usecs_to_scanlines(_state-
> > > hw.adjusted_mode,
> > + 
> > aux_less_wake_time);
> > +
> > +   if (aux_less_wake_lines > ALPM_CTL_AUX_LESS_WAKE_TIME_MASK)
> > +   return false;
> > +
> > +   if (i915->display.params.psr_safest_params)
> > +   aux_less_wake_lines = 63;
> > +
> > +   intel_dp->psr.alpm_parameters.aux_less_wake_lines =
> > +aux_less_wake_lines;
> > +
> > +   return true;
> > +}
> > +
> >  static bool _lnl_compute_alpm_params(struct intel_dp *intel_dp,
> >  struct intel_crtc_state
> > *crtc_state)  { @@ -
> > 1142,6 +1199,9 @@ static bool _lnl_compute_alpm_params(struct
> > intel_dp
> > *intel_dp,
> > if (check_entry_lines > 15)
> > return 

Re: [PATCH v3 6/6] drm/i915/psr: Do not write ALPM configuration for PSR1 or DP2.0 Panel Replay

[Hogander, Jouni]

On Wed, 2024-03-13 at 11:18 +, Manna, Animesh wrote:
> 
> 
> > -Original Message-
> > From: Hogander, Jouni 
> > Sent: Wednesday, March 6, 2024 4:15 PM
> > To: intel-gfx@lists.freedesktop.org
> > Cc: Ville Syrjälä ; Manna, Animesh
> > ; Murthy, Arun R
> > ;
> > Hogander, Jouni 
> > Subject: [PATCH v3 6/6] drm/i915/psr: Do not write ALPM
> > configuration for
> > PSR1 or DP2.0 Panel Replay
> > 
> > No need to write ALPM configuration for DP2.0 Panel Replay or PSR1.
> > Signed-off-by: Jouni Högander 
> > ---
> >  drivers/gpu/drm/i915/display/intel_psr.c | 3 ++-
> >  1 file changed, 2 insertions(+), 1 deletion(-)
> > 
> > diff --git a/drivers/gpu/drm/i915/display/intel_psr.c
> > b/drivers/gpu/drm/i915/display/intel_psr.c
> > index 4cd2bad5241f..c7bda37444f0 100644
> > --- a/drivers/gpu/drm/i915/display/intel_psr.c
> > +++ b/drivers/gpu/drm/i915/display/intel_psr.c
> > @@ -1699,7 +1699,8 @@ static void lnl_alpm_configure(struct
> > intel_dp
> > *intel_dp)
> > struct intel_psr *psr = _dp->psr;
> > u32 alpm_ctl;
> > 
> > -   if (DISPLAY_VER(dev_priv) < 20)
> > +   if (DISPLAY_VER(dev_priv) < 20 || (!intel_dp-
> > >psr.psr2_enabled &&
> > + 
> > !intel_dp_is_edp(intel_dp)))
> 
> This patch maybe good to squash with previous patch, not sure will
> there be any negative impact if panel does not support aux-less alpm
> and from source side it is enabled.

These are logically different things. Previous patch is enabling ALPM
for eDP panel replay. This patch could be applied already now and that
would do the right thing. I.e. do not configure alpm for psr1 or panel
replay.

BR,

Jouni Högander

> 
> Regards,
> Animesh
> 
> > return;
> > 
> > if (intel_dp->psr.panel_replay_enabled &&
> > intel_dp_is_edp(intel_dp)) {
> > --
> > 2.34.1
> 

[PATCH v6 2/3] drm/i915/gt: Do not generate the command streamer for all the CCS

[Andi Shyti]

We want a fixed load CCS balancing consisting in all slices
sharing one single user engine. For this reason do not create the
intel_engine_cs structure with its dedicated command streamer for
CCS slices beyond the first.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Matt Roper 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/gt/intel_engine_cs.c | 20 
 1 file changed, 16 insertions(+), 4 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_engine_cs.c 
b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
index f553cf4e6449..c4fb31bb6e72 100644
--- a/drivers/gpu/drm/i915/gt/intel_engine_cs.c
+++ b/drivers/gpu/drm/i915/gt/intel_engine_cs.c
@@ -966,6 +966,7 @@ int intel_engines_init_mmio(struct intel_gt *gt)
const unsigned int engine_mask = init_engine_mask(gt);
unsigned int mask = 0;
unsigned int i, class;
+   u8 ccs_instance = 0;
u8 logical_ids[MAX_ENGINE_INSTANCE + 1];
int err;
 
@@ -986,6 +987,19 @@ int intel_engines_init_mmio(struct intel_gt *gt)
!HAS_ENGINE(gt, i))
continue;
 
+   /*
+* Do not create the command streamer for CCS slices
+* beyond the first. All the workload submitted to the
+* first engine will be shared among all the slices.
+*
+* Once the user will be allowed to customize the CCS
+* mode, then this check needs to be removed.
+*/
+   if (IS_DG2(i915) &&
+   class == COMPUTE_CLASS &&
+   ccs_instance++)
+   continue;
+
err = intel_engine_setup(gt, i,
 logical_ids[instance]);
if (err)
@@ -996,11 +1010,9 @@ int intel_engines_init_mmio(struct intel_gt *gt)
}
 
/*
-* Catch failures to update intel_engines table when the new engines
-* are added to the driver by a warning and disabling the forgotten
-* engines.
+* Update the intel_engines table.
 */
-   if (drm_WARN_ON(>drm, mask != engine_mask))
+   if (mask != engine_mask)
gt->info.engine_mask = mask;
 
gt->info.num_engines = hweight32(mask);
-- 
2.43.0

[PATCH v6 3/3] drm/i915/gt: Enable only one CCS for compute workload

[Andi Shyti]

Enable only one CCS engine by default with all the compute sices
allocated to it.

While generating the list of UABI engines to be exposed to the
user, exclude any additional CCS engines beyond the first
instance.

This change can be tested with igt i915_query.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Matt Roper 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/Makefile   |  1 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  5 +++
 drivers/gpu/drm/i915/gt/intel_workarounds.c |  7 
 5 files changed, 65 insertions(+)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

diff --git a/drivers/gpu/drm/i915/Makefile b/drivers/gpu/drm/i915/Makefile
index 3ef6ed41e62b..a6885a1d41a1 100644
--- a/drivers/gpu/drm/i915/Makefile
+++ b/drivers/gpu/drm/i915/Makefile
@@ -118,6 +118,7 @@ gt-y += \
gt/intel_ggtt_fencing.o \
gt/intel_gt.o \
gt/intel_gt_buffer_pool.o \
+   gt/intel_gt_ccs_mode.o \
gt/intel_gt_clock_utils.o \
gt/intel_gt_debugfs.o \
gt/intel_gt_engines_debugfs.o \
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
new file mode 100644
index ..044219c5960a
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
@@ -0,0 +1,39 @@
+// SPDX-License-Identifier: MIT
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#include "i915_drv.h"
+#include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
+#include "intel_gt_regs.h"
+
+void intel_gt_apply_ccs_mode(struct intel_gt *gt)
+{
+   int cslice;
+   u32 mode = 0;
+   int first_ccs = __ffs(CCS_MASK(gt));
+
+   if (!IS_DG2(gt->i915))
+   return;
+
+   /* Build the value for the fixed CCS load balancing */
+   for (cslice = 0; cslice < I915_MAX_CCS; cslice++) {
+   if (CCS_MASK(gt) & BIT(cslice))
+   /*
+* If available, assign the cslice
+* to the first available engine...
+*/
+   mode |= XEHP_CCS_MODE_CSLICE(cslice, first_ccs);
+
+   else
+   /*
+* ... otherwise, mark the cslice as
+* unavailable if no CCS dispatches here
+*/
+   mode |= XEHP_CCS_MODE_CSLICE(cslice,
+XEHP_CCS_MODE_CSLICE_MASK);
+   }
+
+   intel_uncore_write(gt->uncore, XEHP_CCS_MODE, mode);
+}
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h 
b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
new file mode 100644
index ..9e5549caeb26
--- /dev/null
+++ b/drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: MIT */
+/*
+ * Copyright © 2024 Intel Corporation
+ */
+
+#ifndef __INTEL_GT_CCS_MODE_H__
+#define __INTEL_GT_CCS_MODE_H__
+
+struct intel_gt;
+
+void intel_gt_apply_ccs_mode(struct intel_gt *gt);
+
+#endif /* __INTEL_GT_CCS_MODE_H__ */
diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 31b102604e3d..743fe3566722 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1480,6 +1480,11 @@
 #define   XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE   REG_BIT(1)
 #define   GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
 
+#define XEHP_CCS_MODE  _MMIO(0x14804)
+#define   XEHP_CCS_MODE_CSLICE_MASKREG_GENMASK(2, 0) /* CCS0-3 + 
rsvd */
+#define   XEHP_CCS_MODE_CSLICE_WIDTH   ilog2(XEHP_CCS_MODE_CSLICE_MASK 
+ 1)
+#define   XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice * 
XEHP_CCS_MODE_CSLICE_WIDTH))
+
 #define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
 #define   CHV_FGT_DISABLE_SS0  (1 << 10)
 #define   CHV_FGT_DISABLE_SS1  (1 << 11)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index 9963e5725ae5..8188c9f0b5ce 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -10,6 +10,7 @@
 #include "intel_engine_regs.h"
 #include "intel_gpu_commands.h"
 #include "intel_gt.h"
+#include "intel_gt_ccs_mode.h"
 #include "intel_gt_mcr.h"
 #include "intel_gt_print.h"
 #include "intel_gt_regs.h"
@@ -2869,6 +2870,12 @@ static void ccs_engine_wa_mode(struct intel_engine_cs 
*engine, struct i915_wa_li
 * made to completely disable automatic CCS load balancing.
 */
wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
+
+   /*
+* After having disabled automatic 

[PATCH v6 1/3] drm/i915/gt: Disable HW load balancing for CCS

[Andi Shyti]

The hardware should not dynamically balance the load between CCS
engines. Wa_14019159160 recommends disabling it across all
platforms.

Fixes: d2eae8e98d59 ("drm/i915/dg2: Drop force_probe requirement")
Signed-off-by: Andi Shyti 
Cc: Chris Wilson 
Cc: Joonas Lahtinen 
Cc: Matt Roper 
Cc:  # v6.2+
Reviewed-by: Matt Roper 
---
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  1 +
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 23 +++--
 2 files changed, 22 insertions(+), 2 deletions(-)

diff --git a/drivers/gpu/drm/i915/gt/intel_gt_regs.h 
b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
index 50962cfd1353..31b102604e3d 100644
--- a/drivers/gpu/drm/i915/gt/intel_gt_regs.h
+++ b/drivers/gpu/drm/i915/gt/intel_gt_regs.h
@@ -1477,6 +1477,7 @@
 #define   ECOBITS_PPGTT_CACHE4B(0 << 8)
 
 #define GEN12_RCU_MODE _MMIO(0x14800)
+#define   XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE   REG_BIT(1)
 #define   GEN12_RCU_MODE_CCS_ENABLEREG_BIT(0)
 
 #define CHV_FUSE_GT_MMIO(VLV_GUNIT_BASE + 0x2168)
diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c 
b/drivers/gpu/drm/i915/gt/intel_workarounds.c
index b079cbbc1897..9963e5725ae5 100644
--- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
+++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
@@ -51,7 +51,8 @@
  *   registers belonging to BCS, VCS or VECS should be implemented in
  *   xcs_engine_wa_init(). Workarounds for registers not belonging to a 
specific
  *   engine's MMIO range but that are part of of the common RCS/CCS reset 
domain
- *   should be implemented in general_render_compute_wa_init().
+ *   should be implemented in general_render_compute_wa_init(). The settings
+ *   about the CCS load balancing should be added in ccs_engine_wa_mode().
  *
  * - GT workarounds: the list of these WAs is applied whenever these registers
  *   revert to their default values: on GPU reset, suspend/resume [1]_, etc.
@@ -2854,6 +2855,22 @@ add_render_compute_tuning_settings(struct intel_gt *gt,
wa_write_clr(wal, GEN8_GARBCNTL, GEN12_BUS_HASH_CTL_BIT_EXC);
 }
 
+static void ccs_engine_wa_mode(struct intel_engine_cs *engine, struct 
i915_wa_list *wal)
+{
+   struct intel_gt *gt = engine->gt;
+
+   if (!IS_DG2(gt->i915))
+   return;
+
+   /*
+* Wa_14019159160: This workaround, along with others, leads to
+* significant challenges in utilizing load balancing among the
+* CCS slices. Consequently, an architectural decision has been
+* made to completely disable automatic CCS load balancing.
+*/
+   wa_masked_en(wal, GEN12_RCU_MODE, XEHP_RCU_MODE_FIXED_SLICE_CCS_MODE);
+}
+
 /*
  * The workarounds in this function apply to shared registers in
  * the general render reset domain that aren't tied to a
@@ -3000,8 +3017,10 @@ engine_init_workarounds(struct intel_engine_cs *engine, 
struct i915_wa_list *wal
 * to a single RCS/CCS engine's workaround list since
 * they're reset as part of the general render domain reset.
 */
-   if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE)
+   if (engine->flags & I915_ENGINE_FIRST_RENDER_COMPUTE) {
general_render_compute_wa_init(engine, wal);
+   ccs_engine_wa_mode(engine, wal);
+   }
 
if (engine->class == COMPUTE_CLASS)
ccs_engine_wa_init(engine, wal);
-- 
2.43.0

[PATCH v6 0/3] Disable automatic load CCS load balancing

[Andi Shyti]

Hi,

this series does basically two things:

1. Disables automatic load balancing as adviced by the hardware
   workaround.

2. Assigns all the CCS slices to one single user engine. The user
   will then be able to query only one CCS engine

>From v5 I have created a new file, gt/intel_gt_ccs_mode.c where
I added the intel_gt_apply_ccs_mode(). In the upcoming patches,
this file will contain the implementation for dynamic CCS mode
setting.

Thanks Tvrtko, Matt, John and Joonas for your reviews!

Andi

Changelog
=
v5 -> v6 (thanks Matt for the suggestions in v6)
 - Remove the refactoring and the for_each_available_engine()
   macro and instead do not create the intel_engine_cs structure
   at all.
 - In patch 1 just a trivial reordering of the bit definitions.

v4 -> v5
 - Use the workaround framework to do all the CCS balancing
   settings in order to always apply the modes also when the
   engine resets. Put everything in its own specific function to
   be executed for the first CCS engine encountered. (Thanks
   Matt)
 - Calculate the CCS ID for the CCS mode as the first available
   CCS among all the engines (Thanks Matt)
 - create the intel_gt_ccs_mode.c function to host the CCS
   configuration. We will have it ready for the next series.
 - Fix a selftest that was failing because could not set CCS2.
 - Add the for_each_available_engine() macro to exclude CCS1+ and
   start using it in the hangcheck selftest.

v3 -> v4
 - Reword correctly the comment in the workaround
 - Fix a buffer overflow (Thanks Joonas)
 - Handle properly the fused engines when setting the CCS mode.

v2 -> v3
 - Simplified the algorithm for creating the list of the exported
   uabi engines. (Patch 1) (Thanks, Tvrtko)
 - Consider the fused engines when creating the uabi engine list
   (Patch 2) (Thanks, Matt)
 - Patch 4 now uses a the refactoring from patch 1, in a cleaner
   outcome.

v1 -> v2
 - In Patch 1 use the correct workaround number (thanks Matt).
 - In Patch 2 do not add the extra CCS engines to the exposed
   UABI engine list and adapt the engine counting accordingly
   (thanks Tvrtko).
 - Reword the commit of Patch 2 (thanks John).

Andi Shyti (3):
  drm/i915/gt: Disable HW load balancing for CCS
  drm/i915/gt: Do not generate the command streamer for all the CCS
  drm/i915/gt: Enable only one CCS for compute workload

 drivers/gpu/drm/i915/Makefile   |  1 +
 drivers/gpu/drm/i915/gt/intel_engine_cs.c   | 20 ---
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c | 39 +
 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h | 13 +++
 drivers/gpu/drm/i915/gt/intel_gt_regs.h |  6 
 drivers/gpu/drm/i915/gt/intel_workarounds.c | 30 ++--
 6 files changed, 103 insertions(+), 6 deletions(-)
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.c
 create mode 100644 drivers/gpu/drm/i915/gt/intel_gt_ccs_mode.h

-- 
2.43.0

✓ Fi.CI.BAT: success for IO and fast wake lines calculation and increase fw sync length (rev6)

[Patchwork]

== Series Details ==

Series: IO and fast wake lines calculation and increase fw sync length (rev6)
URL   : https://patchwork.freedesktop.org/series/130173/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_130173v6


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/index.html

Participating hosts (35 -> 32)
--

  Missing(3): bat-kbl-2 bat-arls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130173v6 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-jsl-1/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/boot.html
- fi-cfl-8109u:   [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-8109u/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u:   NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html
- bat-jsl-1:  NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u:   NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html
- bat-jsl-1:  NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTRUN -> [SKIP][10] ([i915#4103]) +1 other test skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-jsl-1:  NOTRUN -> [SKIP][11] ([i915#3555] / [i915#9886])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1:  NOTRUN -> [SKIP][12]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
- fi-cfl-8109u:   NOTRUN -> [SKIP][13] +11 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/fi-cfl-8109u/igt@kms_pm_backli...@basic-brightness.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1:  NOTRUN -> [SKIP][14] ([i915#3555])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-jsl-1/igt@kms_setm...@basic-clone-single-crtc.html

  
 Possible fixes 

  * igt@kms_pm_rpm@basic-rte:
- {bat-mtlp-9}:   [DMESG-WARN][15] -> [PASS][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-mtlp-9/igt@kms_pm_...@basic-rte.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130173v6/bat-mtlp-9/igt@kms_pm_...@basic-rte.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#3555]: https://gitlab.freedesktop.org/drm/intel/issues/3555
  [i915#4103]: https://gitlab.freedesktop.org/drm/intel/issues/4103
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293
  [i915#9318]: https://gitlab.freedesktop.org/drm/intel/issues/9318
  [i915#9886]: https://gitlab.freedesktop.org/drm/intel/issues/9886


Build changes
-

  * Linux: CI_DRM_14428 -> Patchwork_130173v6

  CI-20190529: 20190529
  CI_DRM_14428: 790a1d4e546a1d7f1cc5316c77f21379a4083250 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7760: 7760
  Patchwork_130173v6: 790a1d4e546a1d7f1cc5316c77f21379a4083250 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

1a2ad7417a25 drm/i915/display: Increase number of fast wake precharge pulses
c8480d6e3247 drm/i915/psr: Calculate IO wake and fast wake lines for 
DISPLAY_VER < 12
86c5dc7f8993 drm/i915/psr: Improve 

✓ Fi.CI.BAT: success for drm/i915/scaler: Update Pipe src size check in skl_update_scaler

[Patchwork]

== Series Details ==

Series: drm/i915/scaler: Update Pipe src size check in skl_update_scaler
URL   : https://patchwork.freedesktop.org/series/131078/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_131078v1


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/index.html

Participating hosts (35 -> 34)
--

  Additional (1): fi-glk-j4005 
  Missing(2): bat-arls-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_131078v1:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@module-reload:
- {bat-mtlp-9}:   [PASS][1] -> [WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-mtlp-9/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-mtlp-9/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_131078v1 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-jsl-1/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/boot.html
- fi-cfl-8109u:   [FAIL][5] ([i915#8293]) -> [PASS][6]
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-8109u/boot.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-jsl-1:  NOTRUN -> [SKIP][7] ([i915#9318])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u:   NOTRUN -> [SKIP][8] ([i915#2190])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html
- bat-jsl-1:  NOTRUN -> [SKIP][9] ([i915#2190])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@gem_huc_c...@huc-copy.html
- fi-glk-j4005:   NOTRUN -> [SKIP][10] ([i915#2190])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-glk-j4005:   NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u:   NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html
- bat-jsl-1:  NOTRUN -> [SKIP][13] ([i915#4613]) +3 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005:   NOTRUN -> [SKIP][14] +10 other tests skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-jsl-1:  NOTRUN -> [SKIP][15] ([i915#4103]) +1 other test skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-jsl-1:  NOTRUN -> [SKIP][16] ([i915#3555] / [i915#9886])
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-edid:
- bat-dg2-8:  [PASS][17] -> [INCOMPLETE][18] ([i915#10419])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-dg2-8/igt@kms_force_connector_ba...@force-edid.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-jsl-1:  NOTRUN -> [SKIP][19]
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/bat-jsl-1/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_pm_backlight@basic-brightness:
- fi-cfl-8109u:   NOTRUN -> [SKIP][20] +11 other tests skip
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131078v1/fi-cfl-8109u/igt@kms_pm_backli...@basic-brightness.html

  * igt@kms_setmode@basic-clone-single-crtc:
- bat-jsl-1:  

✗ Fi.CI.BAT: failure for drm/i915/gt: Report full vm address range

[Patchwork]

== Series Details ==

Series: drm/i915/gt: Report full vm address range
URL   : https://patchwork.freedesktop.org/series/131095/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_131095v1


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_131095v1 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_131095v1, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/index.html

Participating hosts (35 -> 32)
--

  Additional (1): fi-glk-j4005 
  Missing(4): bat-kbl-2 bat-dg1-7 bat-arls-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_131095v1:

### IGT changes ###

 Possible regressions 

  * igt@gem_softpin@allocator-basic:
- bat-dg2-14: [PASS][1] -> [FAIL][2] +3 other tests fail
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-14/igt@gem_soft...@allocator-basic.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-dg2-14/igt@gem_soft...@allocator-basic.html

  * igt@gem_softpin@allocator-basic-reserve:
- bat-atsm-1: [PASS][3] -> [FAIL][4] +2 other tests fail
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-atsm-1/igt@gem_soft...@allocator-basic-reserve.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-atsm-1/igt@gem_soft...@allocator-basic-reserve.html
- bat-dg2-9:  [PASS][5] -> [FAIL][6] +2 other tests fail
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-9/igt@gem_soft...@allocator-basic-reserve.html
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-dg2-9/igt@gem_soft...@allocator-basic-reserve.html
- bat-dg2-8:  [PASS][7] -> [FAIL][8] +2 other tests fail
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-8/igt@gem_soft...@allocator-basic-reserve.html
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-dg2-8/igt@gem_soft...@allocator-basic-reserve.html

  * igt@i915_selftest@live@gtt:
- bat-atsm-1: [PASS][9] -> [DMESG-FAIL][10]
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-atsm-1/igt@i915_selftest@l...@gtt.html
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-atsm-1/igt@i915_selftest@l...@gtt.html
- fi-cfl-guc: [PASS][11] -> [DMESG-FAIL][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-guc/igt@i915_selftest@l...@gtt.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/fi-cfl-guc/igt@i915_selftest@l...@gtt.html
- bat-jsl-3:  [PASS][13] -> [DMESG-FAIL][14]
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-jsl-3/igt@i915_selftest@l...@gtt.html
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-jsl-3/igt@i915_selftest@l...@gtt.html
- fi-kbl-x1275:   [PASS][15] -> [DMESG-FAIL][16]
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-kbl-x1275/igt@i915_selftest@l...@gtt.html
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/fi-kbl-x1275/igt@i915_selftest@l...@gtt.html
- fi-cfl-8109u:   NOTRUN -> [DMESG-FAIL][17]
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/fi-cfl-8109u/igt@i915_selftest@l...@gtt.html
- bat-adln-1: [PASS][18] -> [DMESG-FAIL][19]
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-adln-1/igt@i915_selftest@l...@gtt.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-adln-1/igt@i915_selftest@l...@gtt.html
- bat-dg2-8:  [PASS][20] -> [DMESG-FAIL][21]
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-8/igt@i915_selftest@l...@gtt.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-dg2-8/igt@i915_selftest@l...@gtt.html
- fi-kbl-guc: [PASS][22] -> [DMESG-FAIL][23]
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-kbl-guc/igt@i915_selftest@l...@gtt.html
   [23]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/fi-kbl-guc/igt@i915_selftest@l...@gtt.html
- bat-adls-6: [PASS][24] -> [DMESG-FAIL][25]
   [24]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-adls-6/igt@i915_selftest@l...@gtt.html
   [25]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131095v1/bat-adls-6/igt@i915_selftest@l...@gtt.html
- bat-adlm-1: [PASS][26] -> [DMESG-FAIL][27]
   [26]: 

✗ Fi.CI.SPARSE: warning for Disable automatic load CCS load balancing (rev9)

[Patchwork]

== Series Details ==

Series: Disable automatic load CCS load balancing (rev9)
URL   : https://patchwork.freedesktop.org/series/129951/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:181:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:185:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:187:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:191:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:194:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:236:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:238:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:66:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:92:1: warning: unreplaced symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:100:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:100:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:100:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:105:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:107:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:108:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:109:9: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:111:14: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:111:20: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:17: warning: unreplaced 
symbol 'old'
+./include/asm-generic/bitops/generic-non-atomic.h:112:23: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:112:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:121:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:128:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:166:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:168:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:169:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:170:9: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:19: warning: unreplaced 
symbol 'val'
+./include/asm-generic/bitops/generic-non-atomic.h:172:25: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:172:9: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:28:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:30:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:31:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:33:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:37:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:39:9: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:40:9: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:10: warning: unreplaced 
symbol 'p'
+./include/asm-generic/bitops/generic-non-atomic.h:42:16: warning: unreplaced 
symbol 'mask'
+./include/asm-generic/bitops/generic-non-atomic.h:55:1: warning: unreplaced 
symbol 'return'
+./include/asm-generic/bitops/generic-non-atomic.h:57:9: warning: unreplaced 
symbol 'mask'

✗ Fi.CI.CHECKPATCH: warning for Disable automatic load CCS load balancing (rev9)

[Patchwork]

== Series Details ==

Series: Disable automatic load CCS load balancing (rev9)
URL   : https://patchwork.freedesktop.org/series/129951/
State : warning

== Summary ==

Error: dim checkpatch failed
06497016416d drm/i915/gt: Disable HW load balancing for CCS
c3197ab37c84 drm/i915/gt: Do not generate the command streamer for all the CCS
897e3b8ec2cb drm/i915/gt: Enable only one CCS for compute workload
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
Traceback (most recent call last):
  File "scripts/spdxcheck.py", line 6, in 
from ply import lex, yacc
ModuleNotFoundError: No module named 'ply'
-:35: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does 
MAINTAINERS need updating?
#35: 
new file mode 100644

-:109: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'cslice' may be better as 
'(cslice)' to avoid precedence issues
#109: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1486:
+#define   XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice * 
XEHP_CCS_MODE_CSLICE_WIDTH))

-:109: CHECK:MACRO_ARG_PRECEDENCE: Macro argument 'ccs' may be better as 
'(ccs)' to avoid precedence issues
#109: FILE: drivers/gpu/drm/i915/gt/intel_gt_regs.h:1486:
+#define   XEHP_CCS_MODE_CSLICE(cslice, ccs)(ccs << (cslice * 
XEHP_CCS_MODE_CSLICE_WIDTH))

total: 0 errors, 1 warnings, 2 checks, 89 lines checked

✗ Fi.CI.BAT: failure for Disable automatic load CCS load balancing (rev9)

[Patchwork]

== Series Details ==

Series: Disable automatic load CCS load balancing (rev9)
URL   : https://patchwork.freedesktop.org/series/129951/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_129951v9


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_129951v9 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_129951v9, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/index.html

Participating hosts (35 -> 34)
--

  Additional (2): fi-glk-j4005 bat-mtlp-8 
  Missing(3): bat-dg1-7 bat-arls-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_129951v9:

### IGT changes ###

 Possible regressions 

  * igt@kms_force_connector_basic@force-connector-state:
- bat-dg2-9:  [PASS][1] -> [ABORT][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-9/igt@kms_force_connector_ba...@force-connector-state.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-dg2-9/igt@kms_force_connector_ba...@force-connector-state.html

  
Known issues


  Here are the changes found in Patchwork_129951v9 that come from known issues:

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][3] ([i915#9318])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-glk-j4005:   NOTRUN -> [SKIP][4] ([i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-glk-j4005:   NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- bat-mtlp-8: NOTRUN -> [SKIP][6] ([i915#4613]) +3 other tests skip
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][7] ([i915#4083])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][8] ([i915#4077]) +2 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][9] ([i915#4079]) +1 other test skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#6621])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#5190])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4212]) +8 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005:   NOTRUN -> [SKIP][13] +10 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4213]) +1 other test skip
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#3555] / [i915#3840] / 
[i915#9159])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@kms_...@dsc-basic.html

  * igt@kms_force_connector_basic@force-load-detect:
- bat-mtlp-8: NOTRUN -> [SKIP][16]
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129951v9/bat-mtlp-8/igt@kms_force_connector_ba...@force-load-detect.html

  * igt@kms_force_connector_basic@prune-stale-modes:
- bat-mtlp-8: NOTRUN 

✗ Fi.CI.CHECKPATCH: warning for Fix divide-by-zero regression on DP MST unplug with nouveau (rev2)

[Patchwork]

== Series Details ==

Series: Fix divide-by-zero regression on DP MST unplug with nouveau (rev2)
URL   : https://patchwork.freedesktop.org/series/131002/
State : warning

== Summary ==

Error: dim checkpatch failed
64a2dd5de4fd Fix divide-by-zero regression on DP MST unplug with nouveau
-:14: WARNING:COMMIT_LOG_LONG_LINE: Prefer a maximum 75 chars per line 
(possible unwrapped commit description?)
#14: 
 Code: c6 b8 01 00 00 00 75 61 01 c6 41 0f af f3 41 0f af f1 c1 e1 04 48 63 c7 
31 d2 89 ff 48 8b 5d f8 c9 48 0f af f1 48 8d 44 06 ff <48> f7 f7 31 d2 31 c9 31 
f6 31 ff 45 31 c0 45 31 c9 45 31 d2 45 31

total: 0 errors, 1 warnings, 0 checks, 12 lines checked

✓ Fi.CI.BAT: success for Fix divide-by-zero regression on DP MST unplug with nouveau (rev2)

[Patchwork]

== Series Details ==

Series: Fix divide-by-zero regression on DP MST unplug with nouveau (rev2)
URL   : https://patchwork.freedesktop.org/series/131002/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_131002v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/index.html

Participating hosts (35 -> 34)
--

  Additional (2): fi-glk-j4005 bat-mtlp-8 
  Missing(3): bat-kbl-2 bat-arls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_131002v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- bat-jsl-1:  [FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-jsl-1/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-jsl-1/boot.html
- fi-cfl-8109u:   [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-8109u/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html
- bat-jsl-1:  NOTRUN -> [SKIP][6] ([i915#9318])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-jsl-1/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u:   NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html
- bat-jsl-1:  NOTRUN -> [SKIP][8] ([i915#2190])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-jsl-1/igt@gem_huc_c...@huc-copy.html
- fi-glk-j4005:   NOTRUN -> [SKIP][9] ([i915#2190])
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-glk-j4005:   NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u:   NOTRUN -> [SKIP][11] ([i915#4613]) +3 other tests skip
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4613]) +3 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html
- bat-jsl-1:  NOTRUN -> [SKIP][13] ([i915#4613]) +3 other tests skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-jsl-1/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#4083])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#4077]) +2 other tests skip
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#4079]) +1 other test skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][17] ([i915#6621])
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@i915_selftest@live@gt_engines:
- bat-adls-6: [PASS][18] -> [TIMEOUT][19] ([i915#10026])
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-adls-6/igt@i915_selftest@live@gt_engines.html
   [19]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-adls-6/igt@i915_selftest@live@gt_engines.html

  * igt@i915_selftest@live@vma:
- bat-atsm-1: [PASS][20] -> [ABORT][21] ([i915#10366])
   [20]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-atsm-1/igt@i915_selftest@l...@vma.html
   [21]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-atsm-1/igt@i915_selftest@l...@vma.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][22] ([i915#5190])
   [22]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_131002v2/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][23] ([i915#4212]) +8 other tests 

[PATCH] drm/i915/gt: Report full vm address range

[Andi Shyti]

Commit 9bb66c179f50 ("drm/i915: Reserve some kernel space per
vm") has reserved an object for kernel space usage.

Userspace, though, needs to know the full address range.

Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: Andi Shyti 
Cc: Andrzej Hajda 
Cc: Chris Wilson 
Cc: Lionel Landwerlin 
Cc: Michal Mrozek 
Cc: Nirmoy Das 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c 
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index fa46d2308b0e..d76831f50106 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -982,8 +982,9 @@ static int gen8_init_rsvd(struct i915_address_space *vm)
 
vm->rsvd.vma = i915_vma_make_unshrinkable(vma);
vm->rsvd.obj = obj;
-   vm->total -= vma->node.size;
+
return 0;
+
 unref:
i915_gem_object_put(obj);
return ret;
-- 
2.43.0

✓ Fi.CI.BAT: success for drm/i915: Use drm_printer more (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915: Use drm_printer more (rev8)
URL   : https://patchwork.freedesktop.org/series/129956/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14427 -> Patchwork_129956v8


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v8/index.html

Participating hosts (36 -> 32)
--

  Missing(4): bat-mtlp-8 bat-arls-2 bat-jsl-1 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_129956v8 that come from known issues:

### IGT changes ###

 Possible fixes 

  * igt@i915_selftest@live@hangcheck:
- bat-rpls-3: [DMESG-WARN][1] ([i915#5591]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v8/bat-rpls-3/igt@i915_selftest@l...@hangcheck.html

  
  [i915#5591]: https://gitlab.freedesktop.org/drm/intel/issues/5591


Build changes
-

  * Linux: CI_DRM_14427 -> Patchwork_129956v8

  CI-20190529: 20190529
  CI_DRM_14427: ca050304d54e3a0f96bf148053f738d6b62de43a @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7759: 7759
  Patchwork_129956v8: ca050304d54e3a0f96bf148053f738d6b62de43a @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

35d08f7b3483 drm/i915: Create the printer only once in 
intel_pipe_config_compare()
05191b28fdd9 drm/i915: Reuse pipe_config_mismatch() more
389867c7eb98 drm/i915: Relocate pipe_config_mismatch()
c90afbf4b258 drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled
8128cf631a38 drm/i915: Convert the remaining state dump to drm_printer
75f1edd1522c drm/i915: Use drm_printer more extensively in 
intel_crtc_state_dump()
95e75ee74125 drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer
b1b3a569e4a1 drm/i915: Convert pipe_config_buffer_mismatch() to drm_printer
01ff1c63d3b1 drm/i915: Convert pipe_config_infoframe_mismatch() to drm_printer
2d81de99c774 drm/i915: Include CRTC info in VSC SDP mismatch prints
7d86f357df10 drm/i915: Include CRTC info in infoframe mismatch prints
b73f4d008ef2 drm/i915: Indicate which pipe failed the fastset check overall

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_129956v8/index.html

✗ Fi.CI.BAT: failure for drm/i915: Rename ICL_PORT_TX_DW6 bits (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Rename ICL_PORT_TX_DW6 bits (rev2)
URL   : https://patchwork.freedesktop.org/series/130899/
State : failure

== Summary ==

CI Bug Log - changes from CI_DRM_14427 -> Patchwork_130899v2


Summary
---

  **FAILURE**

  Serious unknown changes coming with Patchwork_130899v2 absolutely need to be
  verified manually.
  
  If you think the reported changes have nothing to do with the changes
  introduced in Patchwork_130899v2, please notify your bug team 
(i915-ci-in...@lists.freedesktop.org) to allow them
  to document this new failure mode, which will reduce false positives in CI.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/index.html

Participating hosts (36 -> 33)
--

  Missing(3): fi-glk-j4005 bat-kbl-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_130899v2:

### IGT changes ###

 Possible regressions 

  * igt@i915_module_load@load:
- bat-dg2-8:  [PASS][1] -> [DMESG-WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-dg2-8/igt@i915_module_l...@load.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-dg2-8/igt@i915_module_l...@load.html

  * igt@i915_selftest@live@coherency:
- bat-arls-2: NOTRUN -> [ABORT][3]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-arls-2/igt@i915_selftest@l...@coherency.html

  
 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@module-reload:
- {bat-mtlp-9}:   [PASS][4] -> [WARN][5]
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-mtlp-9/igt@i915_pm_...@module-reload.html
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-mtlp-9/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_130899v2 that come from known issues:

### CI changes ###

 Issues hit 

  * boot:
- bat-jsl-1:  [PASS][6] -> [FAIL][7] ([i915#8293])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-jsl-1/boot.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-jsl-1/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@i915_selftest@live@execlists:
- fi-bsw-nick:[PASS][8] -> [ABORT][9] ([i915#7911])
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/fi-bsw-nick/igt@i915_selftest@l...@execlists.html
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/fi-bsw-nick/igt@i915_selftest@l...@execlists.html

  * igt@i915_selftest@live@memory_region:
- bat-dg2-9:  [PASS][10] -> [ABORT][11] ([i915#10366])
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-dg2-9/igt@i915_selftest@live@memory_region.html
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-dg2-9/igt@i915_selftest@live@memory_region.html

  
 Possible fixes 

  * igt@i915_selftest@live@objects:
- bat-arls-2: [ABORT][12] -> [PASS][13]
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14427/bat-arls-2/igt@i915_selftest@l...@objects.html
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/bat-arls-2/igt@i915_selftest@l...@objects.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10366]: https://gitlab.freedesktop.org/drm/intel/issues/10366
  [i915#7911]: https://gitlab.freedesktop.org/drm/intel/issues/7911
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_14427 -> Patchwork_130899v2

  CI-20190529: 20190529
  CI_DRM_14427: ca050304d54e3a0f96bf148053f738d6b62de43a @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7759: 7759
  Patchwork_130899v2: ca050304d54e3a0f96bf148053f738d6b62de43a @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

0eecfa28d65a drm/i915: Rename ICL_PORT_TX_DW6 bits

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130899v2/index.html

✗ Fi.CI.CHECKPATCH: warning for drm/i915: Use drm_printer more (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915: Use drm_printer more (rev8)
URL   : https://patchwork.freedesktop.org/series/129956/
State : warning

== Summary ==

Error: dim checkpatch failed
bfbc14be30be drm/i915: Indicate which pipe failed the fastset check overall
b4f30f44c52b drm/i915: Include CRTC info in infoframe mismatch prints
65dcf203cd3e drm/i915: Include CRTC info in VSC SDP mismatch prints
e772a47ccf06 drm/i915: Convert pipe_config_infoframe_mismatch() to drm_printer
8b4131c3c7b2 drm/i915: Convert pipe_config_buffer_mismatch() to drm_printer
d6e1d200e690 drm/i915: Convert intel_dpll_dump_hw_state() to drm_printer
7b3b1e4a972b drm/i915: Use drm_printer more extensively in 
intel_crtc_state_dump()
fd9145b5f845 drm/i915: Convert the remaining state dump to drm_printer
-:128: WARNING:LONG_LINE: line length of 101 exceeds 100 columns
#128: FILE: drivers/gpu/drm/i915/display/intel_crtc_state_dump.c:139:
+  plane_state->hw.rotation, plane_state->scaler_id, 
plane_state->hw.scaling_filter);

total: 0 errors, 1 warnings, 0 checks, 236 lines checked
aed55d8ebf25 drm/i915: Skip intel_crtc_state_dump() if debugs aren't enabled
cc094b416eeb drm/i915: Relocate pipe_config_mismatch()
0192506da257 drm/i915: Reuse pipe_config_mismatch() more
872a681f7fee drm/i915: Create the printer only once in 
intel_pipe_config_compare()

✗ Fi.CI.SPARSE: warning for drm/i915: Use drm_printer more (rev8)

[Patchwork]

== Series Details ==

Series: drm/i915: Use drm_printer more (rev8)
URL   : https://patchwork.freedesktop.org/series/129956/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✗ Fi.CI.SPARSE: warning for drm/i915: Use container_of_const() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Use container_of_const() (rev2)
URL   : https://patchwork.freedesktop.org/series/130868/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.

✓ Fi.CI.BAT: success for drm/i915: Use container_of_const() (rev2)

[Patchwork]

== Series Details ==

Series: drm/i915: Use container_of_const() (rev2)
URL   : https://patchwork.freedesktop.org/series/130868/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_130868v2


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/index.html

Participating hosts (35 -> 33)
--

  Additional (2): fi-glk-j4005 bat-mtlp-8 
  Missing(4): bat-kbl-2 bat-dg1-7 bat-arls-2 fi-snb-2520m 

Possible new issues
---

  Here are the unknown changes that may have been introduced in 
Patchwork_130868v2:

### IGT changes ###

 Suppressed 

  The following results come from untrusted machines, tests, or statuses.
  They do not affect the overall result.

  * igt@i915_pm_rpm@module-reload:
- {bat-mtlp-9}:   [PASS][1] -> [WARN][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-mtlp-9/igt@i915_pm_...@module-reload.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-9/igt@i915_pm_...@module-reload.html

  
Known issues


  Here are the changes found in Patchwork_130868v2 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-cfl-8109u:   [FAIL][3] ([i915#8293]) -> [PASS][4]
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-8109u/boot.html
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@debugfs_test@basic-hwmon:
- bat-mtlp-8: NOTRUN -> [SKIP][5] ([i915#9318])
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@debugfs_t...@basic-hwmon.html

  * igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u:   NOTRUN -> [SKIP][6] ([i915#2190])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html
- fi-glk-j4005:   NOTRUN -> [SKIP][7] ([i915#2190])
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-glk-j4005:   NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u:   NOTRUN -> [SKIP][9] ([i915#4613]) +3 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html
- bat-mtlp-8: NOTRUN -> [SKIP][10] ([i915#4613]) +3 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@gem_lmem_swapp...@verify-random.html

  * igt@gem_mmap@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][11] ([i915#4083])
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@gem_m...@basic.html

  * igt@gem_mmap_gtt@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][12] ([i915#4077]) +2 other tests skip
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@gem_mmap_...@basic.html

  * igt@gem_render_tiled_blits@basic:
- bat-mtlp-8: NOTRUN -> [SKIP][13] ([i915#4079]) +1 other test skip
   [13]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@gem_render_tiled_bl...@basic.html

  * igt@i915_pm_rps@basic-api:
- bat-mtlp-8: NOTRUN -> [SKIP][14] ([i915#6621])
   [14]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@i915_pm_...@basic-api.html

  * igt@kms_addfb_basic@addfb25-y-tiled-small-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][15] ([i915#5190])
   [15]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@kms_addfb_ba...@addfb25-y-tiled-small-legacy.html

  * igt@kms_addfb_basic@basic-y-tiled-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][16] ([i915#4212]) +8 other tests skip
   [16]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@kms_addfb_ba...@basic-y-tiled-legacy.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005:   NOTRUN -> [SKIP][17] +10 other tests skip
   [17]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-legacy:
- bat-mtlp-8: NOTRUN -> [SKIP][18] ([i915#4213]) +1 other test skip
   [18]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130868v2/bat-mtlp-8/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-legacy.html

  * igt@kms_dsc@dsc-basic:
- bat-mtlp-8: NOTRUN -> [SKIP][19] ([i915#3555] / [i915#3840] / 
[i915#9159])
   [19]: 

✗ Fi.CI.SPARSE: warning for IO and fast wake lines calculation and increase fw sync length (rev6)

[Patchwork]

== Series Details ==

Series: IO and fast wake lines calculation and increase fw sync length (rev6)
URL   : https://patchwork.freedesktop.org/series/130173/
State : warning

== Summary ==

Error: dim sparse failed
Sparse version: v0.6.2
Fast mode used, each commit won't be checked separately.
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:116:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:147:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:149:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:153:26: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:16: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:155:9: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:173:1: warning: unreplaced symbol 'return'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:175:9: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: unreplaced symbol 'oldbit'
+./arch/x86/include/asm/bitops.h:179:35: warning: 

[PATCH v3] Fix divide-by-zero regression on DP MST unplug with nouveau

[Chris Bainbridge]

Fix a regression when using nouveau and unplugging a StarTech MSTDP122DP
DisplayPort 1.2 MST hub (the same regression does not appear when using
a Cable Matters DisplayPort 1.4 MST hub). Trace:

 divide error:  [#1] PREEMPT SMP PTI
 CPU: 7 PID: 2962 Comm: Xorg Not tainted 6.8.0-rc3+ #744
 Hardware name: Razer Blade/DANA_MB, BIOS 01.01 08/31/2018
 RIP: 0010:drm_dp_bw_overhead+0xb4/0x110 [drm_display_helper]
 Code: c6 b8 01 00 00 00 75 61 01 c6 41 0f af f3 41 0f af f1 c1 e1 04 48 63 c7 
31 d2 89 ff 48 8b 5d f8 c9 48 0f af f1 48 8d 44 06 ff <48> f7 f7 31 d2 31 c9 31 
f6 31 ff 45 31 c0 45 31 c9 45 31 d2 45 31
 RSP: 0018:b2c5c211fa30 EFLAGS: 00010206
 RAX:  RBX:  RCX: 00f59b00
 RDX:  RSI:  RDI: 
 RBP: b2c5c211fa48 R08: 0001 R09: 0020
 R10: 0004 R11:  R12: 00023b4a
 R13: 91d37d165800 R14: 91d36fac6d80 R15: 91d34a764010
 FS:  7f4a1ca3fa80() GS:91d6edbc() knlGS:
 CS:  0010 DS:  ES:  CR0: 80050033
 CR2: 559491d49000 CR3: 00011d180002 CR4: 003706f0
 Call Trace:
  
  ? show_regs+0x6d/0x80
  ? die+0x37/0xa0
  ? do_trap+0xd4/0xf0
  ? do_error_trap+0x71/0xb0
  ? drm_dp_bw_overhead+0xb4/0x110 [drm_display_helper]
  ? exc_divide_error+0x3a/0x70
  ? drm_dp_bw_overhead+0xb4/0x110 [drm_display_helper]
  ? asm_exc_divide_error+0x1b/0x20
  ? drm_dp_bw_overhead+0xb4/0x110 [drm_display_helper]
  ? drm_dp_calc_pbn_mode+0x2e/0x70 [drm_display_helper]
  nv50_msto_atomic_check+0xda/0x120 [nouveau]
  drm_atomic_helper_check_modeset+0xa87/0xdf0 [drm_kms_helper]
  drm_atomic_helper_check+0x19/0xa0 [drm_kms_helper]
  nv50_disp_atomic_check+0x13f/0x2f0 [nouveau]
  drm_atomic_check_only+0x668/0xb20 [drm]
  ? drm_connector_list_iter_next+0x86/0xc0 [drm]
  drm_atomic_commit+0x58/0xd0 [drm]
  ? __pfx___drm_printfn_info+0x10/0x10 [drm]
  drm_atomic_connector_commit_dpms+0xd7/0x100 [drm]
  drm_mode_obj_set_property_ioctl+0x1c5/0x450 [drm]
  ? __pfx_drm_connector_property_set_ioctl+0x10/0x10 [drm]
  drm_connector_property_set_ioctl+0x3b/0x60 [drm]
  drm_ioctl_kernel+0xb9/0x120 [drm]
  drm_ioctl+0x2d0/0x550 [drm]
  ? __pfx_drm_connector_property_set_ioctl+0x10/0x10 [drm]
  nouveau_drm_ioctl+0x61/0xc0 [nouveau]
  __x64_sys_ioctl+0xa0/0xf0
  do_syscall_64+0x76/0x140
  ? do_syscall_64+0x85/0x140
  ? do_syscall_64+0x85/0x140
  entry_SYSCALL_64_after_hwframe+0x6e/0x76
 RIP: 0033:0x7f4a1cd1a94f
 Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 
08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 
77 1f 48 8b 44 24 18 64 48 2b 04 25 28 00
 RSP: 002b:7ffd2f1df520 EFLAGS: 0246 ORIG_RAX: 0010
 RAX: ffda RBX: 7ffd2f1df5b0 RCX: 7f4a1cd1a94f
 RDX: 7ffd2f1df5b0 RSI: c01064ab RDI: 000f
 RBP: c01064ab R08: 56347932deb8 R09: 56347a7d99c0
 R10:  R11: 0246 R12: 56347938a220
 R13: 000f R14: 563479d9f3f0 R15: 
  
 Modules linked in: rfcomm xt_conntrack nft_chain_nat xt_MASQUERADE nf_nat 
nf_conntrack_netlink nf_conntrack nf_defrag_ipv6 nf_defrag_ipv4 xfrm_user 
xfrm_algo xt_addrtype nft_compat nf_tables nfnetlink br_netfilter bridge stp 
llc ccm cmac algif_hash overlay algif_skcipher af_alg bnep binfmt_misc 
snd_sof_pci_intel_cnl snd_sof_intel_hda_common snd_soc_hdac_hda snd_sof_pci 
snd_sof_xtensa_dsp snd_sof_intel_hda snd_sof snd_sof_utils 
snd_soc_acpi_intel_match snd_soc_acpi snd_soc_core snd_compress 
snd_sof_intel_hda_mlink snd_hda_ext_core iwlmvm intel_rapl_msr 
intel_rapl_common intel_tcc_cooling x86_pkg_temp_thermal intel_powerclamp 
mac80211 coretemp kvm_intel snd_hda_codec_hdmi kvm snd_hda_codec_realtek 
snd_hda_codec_generic uvcvideo libarc4 snd_hda_intel snd_intel_dspcfg 
snd_hda_codec iwlwifi videobuf2_vmalloc videobuf2_memops uvc irqbypass btusb 
videobuf2_v4l2 snd_seq_midi crct10dif_pclmul hid_multitouch crc32_pclmul 
snd_seq_midi_event btrtl snd_hwdep videodev polyval_clmulni polyval_generic 
snd_rawmidi
  ghash_clmulni_intel aesni_intel btintel crypto_simd snd_hda_core cryptd 
snd_seq btbcm ee1004 8250_dw videobuf2_common btmtk rapl nls_iso8859_1 mei_hdcp 
thunderbolt bluetooth intel_cstate wmi_bmof intel_wmi_thunderbolt cfg80211 
snd_pcm mc snd_seq_device i2c_i801 r8169 ecdh_generic snd_timer i2c_smbus ecc 
snd mei_me intel_lpss_pci mei ahci intel_lpss soundcore realtek libahci idma64 
intel_pch_thermal i2c_hid_acpi i2c_hid acpi_pad sch_fq_codel msr parport_pc 
ppdev lp parport efi_pstore ip_tables x_tables autofs4 dm_crypt raid10 raid456 
libcrc32c async_raid6_recov async_memcpy async_pq async_xor xor async_tx 
raid6_pq raid1 raid0 joydev input_leds hid_generic usbhid hid nouveau i915 
drm_ttm_helper gpu_sched drm_gpuvm drm_exec i2c_algo_bit drm_buddy ttm 
drm_display_helper drm_kms_helper cec rc_core drm nvme 

✓ Fi.CI.BAT: success for drm/i915/display: Fixed a screen flickering when turning on display from off (rev3)

[Patchwork]

== Series Details ==

Series: drm/i915/display: Fixed a screen flickering when turning on display 
from off (rev3)
URL   : https://patchwork.freedesktop.org/series/130780/
State : success

== Summary ==

CI Bug Log - changes from CI_DRM_14428 -> Patchwork_130780v3


Summary
---

  **SUCCESS**

  No regressions found.

  External URL: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/index.html

Participating hosts (35 -> 34)
--

  Additional (1): fi-glk-j4005 
  Missing(2): bat-arls-2 fi-snb-2520m 

Known issues


  Here are the changes found in Patchwork_130780v3 that come from known issues:

### CI changes ###

 Possible fixes 

  * boot:
- fi-cfl-8109u:   [FAIL][1] ([i915#8293]) -> [PASS][2]
   [1]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/fi-cfl-8109u/boot.html
   [2]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-cfl-8109u/boot.html

  

### IGT changes ###

 Issues hit 

  * igt@gem_huc_copy@huc-copy:
- fi-cfl-8109u:   NOTRUN -> [SKIP][3] ([i915#2190])
   [3]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-cfl-8109u/igt@gem_huc_c...@huc-copy.html
- fi-glk-j4005:   NOTRUN -> [SKIP][4] ([i915#2190])
   [4]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-glk-j4005/igt@gem_huc_c...@huc-copy.html

  * igt@gem_lmem_swapping@basic:
- fi-glk-j4005:   NOTRUN -> [SKIP][5] ([i915#4613]) +3 other tests skip
   [5]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-glk-j4005/igt@gem_lmem_swapp...@basic.html

  * igt@gem_lmem_swapping@basic@lmem0:
- bat-dg2-14: [PASS][6] -> [FAIL][7] ([i915#10378])
   [6]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-dg2-14/igt@gem_lmem_swapping@ba...@lmem0.html
   [7]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/bat-dg2-14/igt@gem_lmem_swapping@ba...@lmem0.html

  * igt@gem_lmem_swapping@verify-random:
- fi-cfl-8109u:   NOTRUN -> [SKIP][8] ([i915#4613]) +3 other tests skip
   [8]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-cfl-8109u/igt@gem_lmem_swapp...@verify-random.html

  * igt@kms_cursor_legacy@basic-busy-flip-before-cursor-atomic:
- fi-glk-j4005:   NOTRUN -> [SKIP][9] +10 other tests skip
   [9]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-glk-j4005/igt@kms_cursor_leg...@basic-busy-flip-before-cursor-atomic.html

  * igt@kms_pm_backlight@basic-brightness:
- fi-cfl-8109u:   NOTRUN -> [SKIP][10] +11 other tests skip
   [10]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/fi-cfl-8109u/igt@kms_pm_backli...@basic-brightness.html

  
 Possible fixes 

  * igt@kms_pm_rpm@basic-rte:
- {bat-mtlp-9}:   [DMESG-WARN][11] -> [PASS][12]
   [11]: 
https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_14428/bat-mtlp-9/igt@kms_pm_...@basic-rte.html
   [12]: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/bat-mtlp-9/igt@kms_pm_...@basic-rte.html

  
  {name}: This element is suppressed. This means it is ignored when computing
  the status of the difference (SUCCESS, WARNING, or FAILURE).

  [i915#10378]: https://gitlab.freedesktop.org/drm/intel/issues/10378
  [i915#2190]: https://gitlab.freedesktop.org/drm/intel/issues/2190
  [i915#4613]: https://gitlab.freedesktop.org/drm/intel/issues/4613
  [i915#8293]: https://gitlab.freedesktop.org/drm/intel/issues/8293


Build changes
-

  * Linux: CI_DRM_14428 -> Patchwork_130780v3

  CI-20190529: 20190529
  CI_DRM_14428: 790a1d4e546a1d7f1cc5316c77f21379a4083250 @ 
git://anongit.freedesktop.org/gfx-ci/linux
  IGT_7760: 7760
  Patchwork_130780v3: 790a1d4e546a1d7f1cc5316c77f21379a4083250 @ 
git://anongit.freedesktop.org/gfx-ci/linux


### Linux commits

dc2268bf32ea drm/i915/display: Fixed a screen flickering when turning on 
display from off

== Logs ==

For more details see: 
https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_130780v3/index.html

RE: [PATCH] drm/i915/gt: Report full vm address range

[Mrozek, Michal]

Commit 9bb66c179f50 ("drm/i915: Reserve some kernel space per
vm") has reserved an object for kernel space usage.

Userspace, though, needs to know the full address range.

Fixes: 9bb66c179f50 ("drm/i915: Reserve some kernel space per vm")
Signed-off-by: Andi Shyti 
Cc: Andrzej Hajda 
Cc: Chris Wilson 
Cc: Lionel Landwerlin 
Cc: Michal Mrozek 
Cc: Nirmoy Das 
Cc:  # v6.2+
---
 drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 3 ++-
 1 file changed, 2 insertions(+), 1 deletion(-)

diff --git a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c 
b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
index fa46d2308b0e..d76831f50106 100644
--- a/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
+++ b/drivers/gpu/drm/i915/gt/gen8_ppgtt.c
@@ -982,8 +982,9 @@ static int gen8_init_rsvd(struct i915_address_space *vm)
 
vm->rsvd.vma = i915_vma_make_unshrinkable(vma);
vm->rsvd.obj = obj;
-   vm->total -= vma->node.size;
+
return 0;
+
 unref:
i915_gem_object_put(obj);
return ret;
-- 
2.43.0

Acked-by: Michal Mrozek