https://bugs.kde.org/show_bug.cgi?id=402351
--- Comment #4 from Mark Wielaard ---
For ppc64be this is the output:
doing translating guest PPC64(1030) BigEndian 64bits to host MIPS64(1033)
BigEndian 64bits
Front end
0x103C34C8:-- IMark(0x103C34C8, 0, 0) --
PUT(1296) = 0x103C34C8:I64
PUT(1296) = GET:I64(1296); exit-NoDecode
GuestBytes 103C34C8 0
After pre-instr IR optimisation
IRSB {
t0:I64
-- IMark(0x103C34C8, 0, 0) --
PUT(1296) = 0x103C34C8:I64; exit-NoDecode
}
After instrumentation
IRSB {
t0:I64
-- IMark(0x103C34C8, 0, 0) --
PUT(1296) = 0x103C34C8:I64; exit-NoDecode
}
After post-instr IR optimisation
IRSB {
t0:I64
-- IMark(0x103C34C8, 0, 0) --
PUT(1296) = 0x103C34C8:I64; exit-NoDecode
}
After tree-building
IRSB {
t0:I64
-- IMark(0x103C34C8, 0, 0) --
PUT(1296) = 0x103C34C8:I64; exit-NoDecode
}
Instruction selection
(evCheck) lw $9, 8($23); addiu $9, $9, -1; sw $9, 8($23); bgez $t9, nofail;
jalr *0($23); nofail:
-- -- IMark(0x103C34C8, 0, 0) --
-- PUT(1296) = 0x103C34C8:I64; exit-NoDecode
li %vR1,0x103C34C8
(xAssisted) if (guest_COND.AL) { sw %vR1, 1296($23); move $9,
$IRJumpKind_to_TRCVAL(6664); move $9, $disp_assisted; jalr $9; nop; }
0 (evCheck) lw $9, 8($23); addiu $9, $9, -1; sw $9, 8($23); bgez $t9,
nofail; jalr *0($23); nofail:
1 li %vR1,0x103C34C8
2 (xAssisted) if (guest_COND.AL) { sw %vR1, 1296($23); move $9,
$IRJumpKind_to_TRCVAL(6664); move $9, $disp_assisted; jalr $9; nop; }
Register-allocated code
0 (evCheck) lw $9, 8($23); addiu $9, $9, -1; sw $9, 8($23); bgez $t9,
nofail; jalr *0($23); nofail:
1 li $24,0x103C34C8
2 (xAssisted) if (guest_COND.AL) { sw $24, 1296($23); move $9,
$IRJumpKind_to_TRCVAL(6664); move $9, $disp_assisted; jalr $9; nop; }
Assembly
(evCheck) lw $9, 8($23); addiu $9, $9, -1; sw $9, 8($23); bgez $t9, nofail;
jalr *0($23); nofail:
8E E9 00 08 25 29 FF FF AE E9 00 08 05 21 00 03 DE E9 00 00 01 20 F8 09 00 00
00 00
li $24,0x103C34C8
3C 18 10 3C 37 18 34 C8
(xAssisted) if (guest_COND.AL) { sw $24, 1296($23); move $9,
$IRJumpKind_to_TRCVAL(6664); move $9, $disp_assisted; jalr $9; nop; }
FE F8 05 10 3C 17 00 00 36 F7 00 00 00 17 BC 38 36 F7 00 00 00 17 BC 38 36 F7
00 45 3C 09 00 00 35 29 00 00 00 09 4C 38 35 29 10 3C 00 09 4C 38 35 29 34 98
01 20 F8 09 00 00 00 00
VexExpansionRatio 0 96 960 :10
For s390x it is:
doing translating guest S390X(1031) BigEndian 64bits to host MIPS64(1033)
BigEndian 64bits
Front end
ldgr %f2,%r11
-- IMark(0x1000920, 4, 0) --
PUT(96) = ReinterpI64asF64(GET:I64(664))
PUT(720) = 0x1000924:I64
ldgr %f0,%r15
-- IMark(0x1000924, 4, 0) --
PUT(64) = ReinterpI64asF64(GET:I64(696))
PUT(720) = 0x1000928:I64
lay %r15,-168(%r15)
-- IMark(0x1000928, 6, 0) --
t1 = 0xFF58:I64
t0 = Add64(Add64(t1,GET:I64(696)),0x0:I64)
PUT(696) = t0
PUT(720) = 0x100092E:I64
lgr %r11,%r15
-- IMark(0x100092E, 4, 0) --
PUT(664) = GET:I64(696)
PUT(720) = 0x1000932:I64
stg %r2,160(%r11)
-- IMark(0x1000932, 6, 0) --
t3 = 0xA0:I64
t2 = Add64(Add64(t3,GET:I64(664)),0x0:I64)
STbe(t2) = GET:I64(592)
PUT(720) = 0x1000938:I64
lg %r1,160(%r11)
-- IMark(0x1000938, 6, 0) --
t5 = 0xA0:I64
t4 = Add64(Add64(t5,GET:I64(664)),0x0:I64)
PUT(584) = LDbe:I64(t4)
PUT(720) = 0x100093E:I64
mvhi 0(%r1),1031
-- IMark(0x100093E, 6, 0) --
t6 = Add64(0x0:I64,GET:I64(584))
STbe(t6) = 0x407:I32
PUT(720) = 0x1000944:I64
nopr
-- IMark(0x1000944, 2, 0) --
PUT(720) = 0x1000946:I64
lgdr %r11,%f2
-- IMark(0x1000946, 4, 0) --
PUT(664) = ReinterpF64asI64(GET:F64(96))
PUT(720) = 0x100094A:I64
lgdr %r15,%f0
-- IMark(0x100094A, 4, 0) --
PUT(696) = ReinterpF64asI64(GET:F64(64))
PUT(720) = 0x100094E:I64
br %r14
-- IMark(0x100094E, 2, 0) --