On Fri, Aug 29, 2014 at 02:00:24PM +0100, Will Deacon wrote:
> The kernel now exposes register accessor macros in the uapi/ headers
> for arm and arm64, so use those instead (and avoid the compile failure
> from the duplicate definitions).
>
> Signed-off-by: Will Deacon
> ---
>
> Pekka -- please take this as a fix, since merging the 3.16 sources has
> caused some breakage for ARM. Cheers!
Ping? It would be great to get the build failure fixed on master.
Cheers,
Will
> tools/kvm/arm/aarch32/kvm-cpu.c | 15 +--
> tools/kvm/arm/aarch64/kvm-cpu.c | 15 ---
> 2 files changed, 1 insertion(+), 29 deletions(-)
>
> diff --git a/tools/kvm/arm/aarch32/kvm-cpu.c b/tools/kvm/arm/aarch32/kvm-cpu.c
> index 464b473dc936..95fb1da5ba3d 100644
> --- a/tools/kvm/arm/aarch32/kvm-cpu.c
> +++ b/tools/kvm/arm/aarch32/kvm-cpu.c
> @@ -7,25 +7,12 @@
> #define ARM_CORE_REG(x) (KVM_REG_ARM | KVM_REG_SIZE_U32 |
> KVM_REG_ARM_CORE | \
>KVM_REG_ARM_CORE_REG(x))
>
> -#define ARM_CP15_REG_SHIFT_MASK(x,n) \
> - (((x) << KVM_REG_ARM_ ## n ## _SHIFT) & KVM_REG_ARM_ ## n ## _MASK)
> -
> -#define __ARM_CP15_REG(op1,crn,crm,op2) \
> - (KVM_REG_ARM | KVM_REG_SIZE_U32 | \
> - (15 << KVM_REG_ARM_COPROC_SHIFT) | \
> - ARM_CP15_REG_SHIFT_MASK(op1, OPC1) | \
> - ARM_CP15_REG_SHIFT_MASK(crn, 32_CRN) | \
> - ARM_CP15_REG_SHIFT_MASK(crm, CRM) | \
> - ARM_CP15_REG_SHIFT_MASK(op2, 32_OPC2))
> -
> -#define ARM_CP15_REG(...)__ARM_CP15_REG(__VA_ARGS__)
> -
> unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu)
> {
> struct kvm_one_reg reg;
> u32 mpidr;
>
> - reg.id = ARM_CP15_REG(ARM_CPU_ID, ARM_CPU_ID_MPIDR);
> + reg.id = ARM_CP15_REG32(ARM_CPU_ID, ARM_CPU_ID_MPIDR);
> reg.addr = (u64)(unsigned long)&mpidr;
> if (ioctl(vcpu->vcpu_fd, KVM_GET_ONE_REG, ®) < 0)
> die("KVM_GET_ONE_REG failed (get_mpidr vcpu%ld", vcpu->cpu_id);
> diff --git a/tools/kvm/arm/aarch64/kvm-cpu.c b/tools/kvm/arm/aarch64/kvm-cpu.c
> index 71a2a3a7789d..1b293748efd6 100644
> --- a/tools/kvm/arm/aarch64/kvm-cpu.c
> +++ b/tools/kvm/arm/aarch64/kvm-cpu.c
> @@ -15,21 +15,6 @@
> #define ARM64_CORE_REG(x)(KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
>KVM_REG_ARM_CORE | KVM_REG_ARM_CORE_REG(x))
>
> -#define ARM64_SYS_REG_SHIFT_MASK(x,n)\
> - (((x) << KVM_REG_ARM64_SYSREG_ ## n ## _SHIFT) &\
> - KVM_REG_ARM64_SYSREG_ ## n ## _MASK)
> -
> -#define __ARM64_SYS_REG(op0,op1,crn,crm,op2) \
> - (KVM_REG_ARM64 | KVM_REG_SIZE_U64 | \
> - KVM_REG_ARM64_SYSREG | \
> - ARM64_SYS_REG_SHIFT_MASK(op0, OP0) | \
> - ARM64_SYS_REG_SHIFT_MASK(op1, OP1) | \
> - ARM64_SYS_REG_SHIFT_MASK(crn, CRN) | \
> - ARM64_SYS_REG_SHIFT_MASK(crm, CRM) | \
> - ARM64_SYS_REG_SHIFT_MASK(op2, OP2))
> -
> -#define ARM64_SYS_REG(...) __ARM64_SYS_REG(__VA_ARGS__)
> -
> unsigned long kvm_cpu__get_vcpu_mpidr(struct kvm_cpu *vcpu)
> {
> struct kvm_one_reg reg;
> --
> 2.1.0
>
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