date:20140704

Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

2014-07-04 Thread Alexander Graf



On 04.07.14 06:34, Madhavan Srinivasan wrote:

On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:

On 01.07.14 10:41, Madhavan Srinivasan wrote:

This patch adds kernel side support for software breakpoint.
Design is that, by using an illegal instruction, we trap to hypervisor
via Emulation Assistance interrupt, where we check for the illegal
instruction
and accordingly we return to Host or Guest. Patch also adds support for
software breakpoint in PR KVM.

Patch mandates use of abs instruction as sw breakpoint instruction
(primary opcode 31 and extended opcode 360). Based on PowerISA v2.01,
ABS instruction has been dropped from the architecture and treated an
illegal instruction.

Changes v1-v2:

   Moved the debug instruction #def to kvm_book3s.h. This way PR_KVM
can also share it.
   Added code to use KVM get one reg infrastructure to get debug opcode.
   Updated emulate.c to include emulation of debug instruction incase
of PR_KVM.
   Made changes to commit message.

Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com
---
   arch/powerpc/include/asm/kvm_book3s.h |8 
   arch/powerpc/include/asm/ppc-opcode.h |5 +
   arch/powerpc/kvm/book3s.c |3 ++-
   arch/powerpc/kvm/book3s_hv.c  |9 +
   arch/powerpc/kvm/book3s_pr.c  |3 +++
   arch/powerpc/kvm/emulate.c|   10 ++
   6 files changed, 37 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/kvm_book3s.h
b/arch/powerpc/include/asm/kvm_book3s.h
index f52f656..180d549 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -24,6 +24,14 @@
   #include linux/kvm_host.h
   #include asm/kvm_book3s_asm.h
   +/*
+ * KVMPPC_INST_BOOK3S_DEBUG is debug Instruction for supporting
Software Breakpoint.
+ * Instruction mnemonic is ABS, primary opcode is 31 and extended
opcode is 360.
+ * Based on PowerISA v2.01, ABS instruction has been dropped from the
architecture
+ * and treated an illegal instruction.
+ */
+#define KVMPPC_INST_BOOK3S_DEBUG0x7c0002d0

This will still break with LE guests.


I am told to try with all 0s opcode. So rewriting the patch.


The problem with all 0s is that it's reasonably likely to occur on 
real world code. Hence Segher was proposing something like 0x0000 
which should be the same regardless of endianness, but has a certain 
appeal of intentional placement ;).





+
   struct kvmppc_bat {
   u64 raw;
   u32 bepi;
diff --git a/arch/powerpc/include/asm/ppc-opcode.h
b/arch/powerpc/include/asm/ppc-opcode.h
index 3132bb9..3fbb4c1 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -111,6 +111,11 @@
   #define OP_31_XOP_LHBRX 790
   #define OP_31_XOP_STHBRX918
   +/* KVMPPC_INST_BOOK3S_DEBUG -- Software breakpoint Instruction
+ * Instruction mnemonic is ABS, primary opcode is 31 and extended
opcode is 360.
+ */
+#define OP_31_XOP_ABS360
+
   #define OP_LWZ  32
   #define OP_LD   58
   #define OP_LWZU 33
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index c254c27..b40fe5d 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -789,7 +789,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
*vcpu,
   int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
   struct kvm_guest_debug *dbg)
   {
-return -EINVAL;
+vcpu-guest_debug = dbg-control;
+return 0;
   }
 void kvmppc_decrementer_func(unsigned long data)
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index 7a12edb..402c1ec 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -725,8 +725,14 @@ static int kvmppc_handle_exit_hv(struct kvm_run
*run, struct kvm_vcpu *vcpu,
* we don't emulate any guest instructions at this stage.
*/
   case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
+if (kvmppc_get_last_inst(vcpu) == KVMPPC_INST_BOOK3S_DEBUG ) {
+run-exit_reason = KVM_EXIT_DEBUG;
+run-debug.arch.address = kvmppc_get_pc(vcpu);
+r = RESUME_HOST;

Phew - why can't we just go into the normal instruction emulator for
EMUL_ASSIST?


IIUC, using the emulation_assist_interrupt function (kernel/trap.c) ?


I was more thinking of kvmppc_emulate_instruction() :).


Alex

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Re: [PATCH 0/7] KVM: PPC: Book3S HV: Enable on little endian hosts

2014-07-04 Thread Alexander Graf



On 17.06.14 18:17, Alexander Graf wrote:

So far we've been able to successfully run HV KVM on big endian hosts, but
once you dive into little endian land things start to fall apart.

This patch set enables HV KVM for little endian hosts. This should be the
final piece left missing to get little endian systems fully en par with big
endian ones in the KVM world - modulo bugs.

For now guest threading support is still slightly flaky, but I'm sure that's
only a minor breakage somewhere that we'll find soon.

v1 - v2:

   - fix typo in STWX_BE
   - Add __be hints
   - Fix H_REMOVE
   - Fix dtl_idx
   - Make XICS code easier to follow and use memory for bswap


Applied to kvm-ppc-queue.


Alex

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Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness

2014-07-04 Thread Alexander Graf

On 03.07.14 17:46, mihai.cara...@freescale.com wrote:

-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:29 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness

On 30.06.14 17:34, Mihai Caraman wrote:

Increase FPU laziness by calling kvmppc_load_guest_fp() just before
returning to guest instead of each sched in. Without this improvement
an interrupt may also claim floting point corrupting guest state.

How do you handle context switching with this patch applied? During most
of the guest's lifetime we never exit kvmppc_vcpu_run(), so when the
guest gets switched out all FPU state gets lost?

No, we had this discussion in ver 1. The FP/VMX/VSX is implemented lazy in
the kernel i.e. the unit state is not saved/restored until another thread
that once claimed the unit is sched in.

Since FP/VMX/VSX can be activated by the guest independent of the host, the
vcpu thread is always using the unit (even if it did not claimed it once).

Now, this patch optimize the sched in flow. Instead of checking on each vcpu
sched in if the kernel unloaded unit's guest state for another competing host
process we do this when we enter the guest.

But we only do it when we enter the guest from QEMU, not when we enter 
the guest after a context switch on cond_resched(), no?

Alex

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Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness

2014-07-04 Thread Alexander Graf



On 04.07.14 09:46, Alexander Graf wrote:


On 03.07.14 17:46, mihai.cara...@freescale.com wrote:

-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:29 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness


On 30.06.14 17:34, Mihai Caraman wrote:

Increase FPU laziness by calling kvmppc_load_guest_fp() just before
returning to guest instead of each sched in. Without this improvement
an interrupt may also claim floting point corrupting guest state.
How do you handle context switching with this patch applied? During 
most

of the guest's lifetime we never exit kvmppc_vcpu_run(), so when the
guest gets switched out all FPU state gets lost?
No, we had this discussion in ver 1. The FP/VMX/VSX is implemented 
lazy in
the kernel i.e. the unit state is not saved/restored until another 
thread

that once claimed the unit is sched in.

Since FP/VMX/VSX can be activated by the guest independent of the 
host, the
vcpu thread is always using the unit (even if it did not claimed it 
once).


Now, this patch optimize the sched in flow. Instead of checking on 
each vcpu
sched in if the kernel unloaded unit's guest state for another 
competing host

process we do this when we enter the guest.


But we only do it when we enter the guest from QEMU, not when we enter 
the guest after a context switch on cond_resched(), no?


Ah, I missed the call to the load function in handle_exit(). Ok, I think 
that approach should work.



Alex

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Re: [PATCH 5/6 v2] KVM: PPC: Book3E: Add ONE_REG AltiVec support

2014-07-04 Thread Alexander Graf

On 03.07.14 18:11, mihai.cara...@freescale.com wrote:

-Original Message-
From: Alexander Graf [mailto:ag...@suse.de]
Sent: Thursday, July 03, 2014 3:34 PM
To: Caraman Mihai Claudiu-B02008; kvm-ppc@vger.kernel.org
Cc: k...@vger.kernel.org; linuxppc-...@lists.ozlabs.org
Subject: Re: [PATCH 5/6 v2] KVM: PPC: Book3E: Add ONE_REG AltiVec support

On 30.06.14 17:34, Mihai Caraman wrote:

Add ONE_REG support for AltiVec on Book3E.

Signed-off-by: Mihai Caraman mihai.cara...@freescale.com

Any chance we can handle these in generic code?

I expected this request :) Can we let this for a second phase to have
e6500 enabled first?

I don't see the value of duplicating code in e500 specific code only to 
remove and combine it in common code in a follow-up patch after that.

Can you share with us a Book3S setup so I can validate the requested
changes? I already fell anxious touching strange hardware specific
Book3S code without running it.

Until a few weeks ago I had an externally reachable G5 machine that we 
could've used for this. Unfortunately I had to replace the box with 
another one that's not quite as stable. I'll try and see if I can fix or 
replace it soon.

Alex

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Re: [PATCH 1/3] powerpc/kvm: Remove redundant save of SIER AND MMCR2

2014-07-04 Thread Alexander Graf



On 03.07.14 08:12, Joel Stanley wrote:

These two registers are already saved in the block above. Aside from
being unnecessary, by the time we get down to the second save location
r8 no longer contains MMCR2, so we are clobbering the saved value with
PMC5.

Signed-off-by: Joel Stanley j...@jms.id.au


Reviewed-by: Alexander Graf ag...@suse.de

Please CC kvm-ppc@vger and kvm@vger when you send kvm related patches :).

Ben, I think this patch makes sense to go via your tree. Want to take it?


Alex


---
  arch/powerpc/kvm/book3s_hv_interrupts.S | 5 -
  1 file changed, 5 deletions(-)

diff --git a/arch/powerpc/kvm/book3s_hv_interrupts.S 
b/arch/powerpc/kvm/book3s_hv_interrupts.S
index 8c86422..731be74 100644
--- a/arch/powerpc/kvm/book3s_hv_interrupts.S
+++ b/arch/powerpc/kvm/book3s_hv_interrupts.S
@@ -127,11 +127,6 @@ BEGIN_FTR_SECTION
stw r10, HSTATE_PMC + 24(r13)
stw r11, HSTATE_PMC + 28(r13)
  END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
-BEGIN_FTR_SECTION
-   mfspr   r9, SPRN_SIER
-   std r8, HSTATE_MMCR + 40(r13)
-   std r9, HSTATE_MMCR + 48(r13)
-END_FTR_SECTION_IFSET(CPU_FTR_ARCH_207S)
  31:
  
  	/*


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Re: [RFC PATCH 2/4] KVM: PPC: Book3E: Handle LRAT error exception

2014-07-04 Thread Alexander Graf



On 03.07.14 16:45, Mihai Caraman wrote:

Handle LRAT error exception with support for lrat mapping and invalidation.

Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
  arch/powerpc/include/asm/kvm_host.h   |   1 +
  arch/powerpc/include/asm/kvm_ppc.h|   2 +
  arch/powerpc/include/asm/mmu-book3e.h |   3 +
  arch/powerpc/include/asm/reg_booke.h  |  13 
  arch/powerpc/kernel/asm-offsets.c |   1 +
  arch/powerpc/kvm/booke.c  |  40 +++
  arch/powerpc/kvm/bookehv_interrupts.S |   9 ++-
  arch/powerpc/kvm/e500_mmu_host.c  | 125 ++
  arch/powerpc/kvm/e500mc.c |   2 +
  9 files changed, 195 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index bb66d8b..7b6b2ec 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -433,6 +433,7 @@ struct kvm_vcpu_arch {
u32 eplc;
u32 epsc;
u32 oldpir;
+   u64 fault_lper;
  #endif
  
  #if defined(CONFIG_BOOKE)

diff --git a/arch/powerpc/include/asm/kvm_ppc.h 
b/arch/powerpc/include/asm/kvm_ppc.h
index 9c89cdd..2730a29 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -86,6 +86,8 @@ extern gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned 
int gtlb_index,
gva_t eaddr);
  extern void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu);
  extern void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu);
+extern void kvmppc_lrat_map(struct kvm_vcpu *vcpu, gfn_t gfn);
+extern void kvmppc_lrat_invalidate(struct kvm_vcpu *vcpu);
  
  extern struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm,

  unsigned int id);
diff --git a/arch/powerpc/include/asm/mmu-book3e.h 
b/arch/powerpc/include/asm/mmu-book3e.h
index 088fd9f..ac6acf7 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,6 +40,8 @@
  
  /* MAS registers bit definitions */
  
+#define MAS0_ATSEL		0x8000

+#define MAS0_ATSEL_SHIFT   31
  #define MAS0_TLBSEL_MASK0x3000
  #define MAS0_TLBSEL_SHIFT   28
  #define MAS0_TLBSEL(x)  (((x)  MAS0_TLBSEL_SHIFT)  
MAS0_TLBSEL_MASK)
@@ -53,6 +55,7 @@
  #define MAS0_WQ_CLR_RSRV  0x2000
  
  #define MAS1_VALID		0x8000

+#define MAS1_VALID_SHIFT   31
  #define MAS1_IPROT0x4000
  #define MAS1_TID(x)   (((x)  16)  0x3FFF)
  #define MAS1_IND  0x2000
diff --git a/arch/powerpc/include/asm/reg_booke.h 
b/arch/powerpc/include/asm/reg_booke.h
index 75bda23..783d617 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -43,6 +43,8 @@
  
  /* Special Purpose Registers (SPRNs)*/

  #define SPRN_DECAR0x036   /* Decrementer Auto Reload Register */
+#define SPRN_LPER  0x038   /* Logical Page Exception Register */
+#define SPRN_LPERU 0x039   /* Logical Page Exception Register Upper */
  #define SPRN_IVPR 0x03F   /* Interrupt Vector Prefix Register */
  #define SPRN_USPRG0   0x100   /* User Special Purpose Register General 0 */
  #define SPRN_SPRG3R   0x103   /* Special Purpose Register General 3 Read */
@@ -358,6 +360,9 @@
  #define ESR_ILK   0x0010  /* Instr. Cache Locking */
  #define ESR_PUO   0x0004  /* Unimplemented Operation 
exception */
  #define ESR_BO0x0002  /* Byte Ordering */
+#define ESR_DATA   0x0400  /* Page Table Data Access */
+#define ESR_TLBI   0x0200  /* Page Table TLB Ineligible */
+#define ESR_PT 0x0100  /* Page Table Translation */
  #define ESR_SPV   0x0080  /* Signal Processing operation 
*/
  
  /* Bit definitions related to the DBCR0. */

@@ -649,6 +654,14 @@
  #define EPC_EPID  0x3fff
  #define EPC_EPID_SHIFT0
  
+/* Bit definitions for LPER */

+#define LPER_ALPN  0x000FF000ULL
+#define LPER_ALPN_SHIFT12
+#define LPER_WIMGE 0x0F80
+#define LPER_WIMGE_SHIFT   7
+#define LPER_LPS   0x000F
+#define LPER_LPS_SHIFT 0
+
  /*
   * The IBM-403 is an even more odd special case, as it is much
   * older than the IBM-405 series.  We put these down here incase someone
diff --git a/arch/powerpc/kernel/asm-offsets.c 
b/arch/powerpc/kernel/asm-offsets.c
index f5995a9..be6e329 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -713,6 +713,7 @@ int main(void)
DEFINE(VCPU_HOST_MAS4, offsetof(struct kvm_vcpu, arch.host_mas4));
DEFINE(VCPU_HOST_MAS6, offsetof(struct kvm_vcpu, arch.host_mas6));
DEFINE(VCPU_EPLC, offsetof(struct kvm_vcpu, arch.eplc));
+   DEFINE(VCPU_FAULT_LPER, offsetof(struct kvm_vcpu, arch.fault_lper));
  #endif
  
  #ifdef CONFIG_KVM_EXIT_TIMING

diff --git

[PATCH v2] KVM: PPC: e500: Emulate power management control SPR

2014-07-04 Thread Mihai Caraman

For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
to enable idle power down for cores and devices by setting up the idle count
period at boot time. With the host already controlling the power management
configuration the guest could simply benefit from it, so emulate guest request
as a general store.

Signed-off-by: Mihai Caraman mihai.cara...@freescale.com
---
v2:
 - treat the operation as a general store

 arch/powerpc/include/asm/kvm_host.h |  1 +
 arch/powerpc/kvm/e500_emulate.c | 12 
 2 files changed, 13 insertions(+)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index 62b2cee..faf2f0e 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -584,6 +584,7 @@ struct kvm_vcpu_arch {
u32 mmucfg;
u32 eptcfg;
u32 epr;
+   u32 pwrmgtcr0;
u32 crit_save;
/* guest debug registers*/
struct debug_reg dbg_reg;
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 002d517..c99c40e 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -250,6 +250,14 @@ int kvmppc_core_emulate_mtspr_e500(struct kvm_vcpu *vcpu, 
int sprn, ulong spr_va
spr_val);
break;
 
+   case SPRN_PWRMGTCR0:
+   /*
+* Guest relies on host power management configurations
+* Treat the request as a general store
+*/
+   vcpu-arch.pwrmgtcr0 = spr_val;
+   break;
+
/* extra exceptions */
case SPRN_IVOR32:
vcpu-arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] = spr_val;
@@ -368,6 +376,10 @@ int kvmppc_core_emulate_mfspr_e500(struct kvm_vcpu *vcpu, 
int sprn, ulong *spr_v
*spr_val = vcpu-arch.eptcfg;
break;
 
+   case SPRN_PWRMGTCR0:
+   *spr_val = vcpu-arch.pwrmgtcr0;
+   break;
+
/* extra exceptions */
case SPRN_IVOR32:
*spr_val = vcpu-arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
-- 
1.7.11.7

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Re: [RFC PATCH 0/4] KVM Book3E support for HTW guests

2014-07-04 Thread Alexander Graf



On 03.07.14 16:45, Mihai Caraman wrote:

KVM Book3E support for Hardware Page Tablewalk enabled guests.


It looks reasonably straight forward to me, though I have to admit that 
I find the sind conditions pretty confusing.


Scott, would you mind to have a look at this set too? :)


Thanks a lot!

Alex

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Re: [PATCH v2] KVM: PPC: e500: Emulate power management control SPR

2014-07-04 Thread Alexander Graf



On 04.07.14 10:17, Mihai Caraman wrote:

For FSL e6500 core the kernel uses power management SPR register (PWRMGTCR0)
to enable idle power down for cores and devices by setting up the idle count
period at boot time. With the host already controlling the power management
configuration the guest could simply benefit from it, so emulate guest request
as a general store.

Signed-off-by: Mihai Caraman mihai.cara...@freescale.com


Thanks, applied to kvm-ppc-queue.


Alex

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[PATCH] KVM: PPC: Book3S: Move vcore definition to end of kvm_arch struct

2014-07-04 Thread Alexander Graf

When building KVM with a lot of vcores (NR_CPUS is big), we can potentially
get out of the ld immediate range for dereferences inside that struct.

Move the array to the end of our kvm_arch struct. This fixes compilation
issues with NR_CPUS=2048 for me.

Signed-off-by: Alexander Graf ag...@suse.de
---
 arch/powerpc/include/asm/kvm_host.h | 5 -
 1 file changed, 4 insertions(+), 1 deletion(-)

diff --git a/arch/powerpc/include/asm/kvm_host.h 
b/arch/powerpc/include/asm/kvm_host.h
index faf2f0e..855ba4d 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -255,7 +255,6 @@ struct kvm_arch {
atomic_t hpte_mod_interest;
spinlock_t slot_phys_lock;
cpumask_t need_tlb_flush;
-   struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
int hpt_cma_alloc;
 #endif /* CONFIG_KVM_BOOK3S_HV_POSSIBLE */
 #ifdef CONFIG_KVM_BOOK3S_PR_POSSIBLE
@@ -273,6 +272,10 @@ struct kvm_arch {
struct kvmppc_xics *xics;
 #endif
struct kvmppc_ops *kvm_ops;
+#ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
+   /* This array can grow quite large, keep it at the end */
+   struct kvmppc_vcore *vcores[KVM_MAX_VCORES];
+#endif
 };
 
 /*
-- 
1.8.1.4

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Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

2014-07-04 Thread Madhavan Srinivasan

On Friday 04 July 2014 12:18 PM, Alexander Graf wrote:
 
 On 04.07.14 06:34, Madhavan Srinivasan wrote:
 On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:
 On 01.07.14 10:41, Madhavan Srinivasan wrote:
 This patch adds kernel side support for software breakpoint.
 Design is that, by using an illegal instruction, we trap to hypervisor
 via Emulation Assistance interrupt, where we check for the illegal
 instruction
 and accordingly we return to Host or Guest. Patch also adds support for
 software breakpoint in PR KVM.

 Patch mandates use of abs instruction as sw breakpoint instruction
 (primary opcode 31 and extended opcode 360). Based on PowerISA v2.01,
 ABS instruction has been dropped from the architecture and treated an
 illegal instruction.

 Changes v1-v2:

Moved the debug instruction #def to kvm_book3s.h. This way PR_KVM
 can also share it.
Added code to use KVM get one reg infrastructure to get debug
 opcode.
Updated emulate.c to include emulation of debug instruction incase
 of PR_KVM.
Made changes to commit message.

 Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com
 ---
arch/powerpc/include/asm/kvm_book3s.h |8 
arch/powerpc/include/asm/ppc-opcode.h |5 +
arch/powerpc/kvm/book3s.c |3 ++-
arch/powerpc/kvm/book3s_hv.c  |9 +
arch/powerpc/kvm/book3s_pr.c  |3 +++
arch/powerpc/kvm/emulate.c|   10 ++
6 files changed, 37 insertions(+), 1 deletion(-)

 diff --git a/arch/powerpc/include/asm/kvm_book3s.h
 b/arch/powerpc/include/asm/kvm_book3s.h
 index f52f656..180d549 100644
 --- a/arch/powerpc/include/asm/kvm_book3s.h
 +++ b/arch/powerpc/include/asm/kvm_book3s.h
 @@ -24,6 +24,14 @@
#include linux/kvm_host.h
#include asm/kvm_book3s_asm.h
+/*
 + * KVMPPC_INST_BOOK3S_DEBUG is debug Instruction for supporting
 Software Breakpoint.
 + * Instruction mnemonic is ABS, primary opcode is 31 and extended
 opcode is 360.
 + * Based on PowerISA v2.01, ABS instruction has been dropped from the
 architecture
 + * and treated an illegal instruction.
 + */
 +#define KVMPPC_INST_BOOK3S_DEBUG0x7c0002d0
 This will still break with LE guests.

 I am told to try with all 0s opcode. So rewriting the patch.
 
 The problem with all 0s is that it's reasonably likely to occur on
 real world code. Hence Segher was proposing something like 0x0000
 which should be the same regardless of endianness, but has a certain
 appeal of intentional placement ;).
 

Ok Sure.


 +
struct kvmppc_bat {
u64 raw;
u32 bepi;
 diff --git a/arch/powerpc/include/asm/ppc-opcode.h
 b/arch/powerpc/include/asm/ppc-opcode.h
 index 3132bb9..3fbb4c1 100644
 --- a/arch/powerpc/include/asm/ppc-opcode.h
 +++ b/arch/powerpc/include/asm/ppc-opcode.h
 @@ -111,6 +111,11 @@
#define OP_31_XOP_LHBRX 790
#define OP_31_XOP_STHBRX918
+/* KVMPPC_INST_BOOK3S_DEBUG -- Software breakpoint Instruction
 + * Instruction mnemonic is ABS, primary opcode is 31 and extended
 opcode is 360.
 + */
 +#define OP_31_XOP_ABS360
 +
#define OP_LWZ  32
#define OP_LD   58
#define OP_LWZU 33
 diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
 index c254c27..b40fe5d 100644
 --- a/arch/powerpc/kvm/book3s.c
 +++ b/arch/powerpc/kvm/book3s.c
 @@ -789,7 +789,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
 *vcpu,
int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
struct kvm_guest_debug *dbg)
{
 -return -EINVAL;
 +vcpu-guest_debug = dbg-control;
 +return 0;
}
  void kvmppc_decrementer_func(unsigned long data)
 diff --git a/arch/powerpc/kvm/book3s_hv.c
 b/arch/powerpc/kvm/book3s_hv.c
 index 7a12edb..402c1ec 100644
 --- a/arch/powerpc/kvm/book3s_hv.c
 +++ b/arch/powerpc/kvm/book3s_hv.c
 @@ -725,8 +725,14 @@ static int kvmppc_handle_exit_hv(struct kvm_run
 *run, struct kvm_vcpu *vcpu,
 * we don't emulate any guest instructions at this stage.
 */
case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
 +if (kvmppc_get_last_inst(vcpu) == KVMPPC_INST_BOOK3S_DEBUG ) {
 +run-exit_reason = KVM_EXIT_DEBUG;
 +run-debug.arch.address = kvmppc_get_pc(vcpu);
 +r = RESUME_HOST;
 Phew - why can't we just go into the normal instruction emulator for
 EMUL_ASSIST?

 IIUC, using the emulation_assist_interrupt function (kernel/trap.c) ?
 
 I was more thinking of kvmppc_emulate_instruction() :).
 

This makes sense. Can use the same call for pr kvm also. awesome :)

 
 Alex
 

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Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

2014-07-04 Thread Madhavan Srinivasan

On Thursday 03 July 2014 05:21 PM, Alexander Graf wrote:
 
 On 01.07.14 10:41, Madhavan Srinivasan wrote:
 This patch adds kernel side support for software breakpoint.
 Design is that, by using an illegal instruction, we trap to hypervisor
 via Emulation Assistance interrupt, where we check for the illegal
 instruction
 and accordingly we return to Host or Guest. Patch also adds support for
 software breakpoint in PR KVM.

 Patch mandates use of abs instruction as sw breakpoint instruction
 (primary opcode 31 and extended opcode 360). Based on PowerISA v2.01,
 ABS instruction has been dropped from the architecture and treated an
 illegal instruction.

 Changes v1-v2:

   Moved the debug instruction #def to kvm_book3s.h. This way PR_KVM
 can also share it.
   Added code to use KVM get one reg infrastructure to get debug opcode.
   Updated emulate.c to include emulation of debug instruction incase
 of PR_KVM.
   Made changes to commit message.

 Signed-off-by: Madhavan Srinivasan ma...@linux.vnet.ibm.com
 ---
   arch/powerpc/include/asm/kvm_book3s.h |8 
   arch/powerpc/include/asm/ppc-opcode.h |5 +
   arch/powerpc/kvm/book3s.c |3 ++-
   arch/powerpc/kvm/book3s_hv.c  |9 +
   arch/powerpc/kvm/book3s_pr.c  |3 +++
   arch/powerpc/kvm/emulate.c|   10 ++
   6 files changed, 37 insertions(+), 1 deletion(-)

 diff --git a/arch/powerpc/include/asm/kvm_book3s.h
 b/arch/powerpc/include/asm/kvm_book3s.h
 index f52f656..180d549 100644
 --- a/arch/powerpc/include/asm/kvm_book3s.h
 +++ b/arch/powerpc/include/asm/kvm_book3s.h
 @@ -24,6 +24,14 @@
   #include linux/kvm_host.h
   #include asm/kvm_book3s_asm.h
   +/*
 + * KVMPPC_INST_BOOK3S_DEBUG is debug Instruction for supporting
 Software Breakpoint.
 + * Instruction mnemonic is ABS, primary opcode is 31 and extended
 opcode is 360.
 + * Based on PowerISA v2.01, ABS instruction has been dropped from the
 architecture
 + * and treated an illegal instruction.
 + */
 +#define KVMPPC_INST_BOOK3S_DEBUG0x7c0002d0
 
 This will still break with LE guests.
 

I am told to try with all 0s opcode. So rewriting the patch.

 +
   struct kvmppc_bat {
   u64 raw;
   u32 bepi;
 diff --git a/arch/powerpc/include/asm/ppc-opcode.h
 b/arch/powerpc/include/asm/ppc-opcode.h
 index 3132bb9..3fbb4c1 100644
 --- a/arch/powerpc/include/asm/ppc-opcode.h
 +++ b/arch/powerpc/include/asm/ppc-opcode.h
 @@ -111,6 +111,11 @@
   #define OP_31_XOP_LHBRX 790
   #define OP_31_XOP_STHBRX918
   +/* KVMPPC_INST_BOOK3S_DEBUG -- Software breakpoint Instruction
 + * Instruction mnemonic is ABS, primary opcode is 31 and extended
 opcode is 360.
 + */
 +#define OP_31_XOP_ABS360
 +
   #define OP_LWZ  32
   #define OP_LD   58
   #define OP_LWZU 33
 diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
 index c254c27..b40fe5d 100644
 --- a/arch/powerpc/kvm/book3s.c
 +++ b/arch/powerpc/kvm/book3s.c
 @@ -789,7 +789,8 @@ int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu
 *vcpu,
   int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
   struct kvm_guest_debug *dbg)
   {
 -return -EINVAL;
 +vcpu-guest_debug = dbg-control;
 +return 0;
   }
 void kvmppc_decrementer_func(unsigned long data)
 diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
 index 7a12edb..402c1ec 100644
 --- a/arch/powerpc/kvm/book3s_hv.c
 +++ b/arch/powerpc/kvm/book3s_hv.c
 @@ -725,8 +725,14 @@ static int kvmppc_handle_exit_hv(struct kvm_run
 *run, struct kvm_vcpu *vcpu,
* we don't emulate any guest instructions at this stage.
*/
   case BOOK3S_INTERRUPT_H_EMUL_ASSIST:
 +if (kvmppc_get_last_inst(vcpu) == KVMPPC_INST_BOOK3S_DEBUG ) {
 +run-exit_reason = KVM_EXIT_DEBUG;
 +run-debug.arch.address = kvmppc_get_pc(vcpu);
 +r = RESUME_HOST;
 
 Phew - why can't we just go into the normal instruction emulator for
 EMUL_ASSIST?
 

IIUC, using the emulation_assist_interrupt function (kernel/trap.c) ?

Thanks for review
Regards
Maddy

 
 Alex
 

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Re: [PATCH] KVM: PPC: Book3S: Move vcore definition to end of kvm_arch struct

2014-07-04 Thread Paul Mackerras

On Fri, Jul 04, 2014 at 12:56:58PM +0200, Alexander Graf wrote:
 When building KVM with a lot of vcores (NR_CPUS is big), we can potentially
 get out of the ld immediate range for dereferences inside that struct.
 
 Move the array to the end of our kvm_arch struct. This fixes compilation
 issues with NR_CPUS=2048 for me.
 
 Signed-off-by: Alexander Graf ag...@suse.de

Acked-by: Paul Mackerras pau...@samba.org
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Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

Re: [PATCH 0/7] KVM: PPC: Book3S HV: Enable on little endian hosts

Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness

Re: [PATCH 3/6 v2] KVM: PPC: Book3E: Increase FPU laziness

Re: [PATCH 5/6 v2] KVM: PPC: Book3E: Add ONE_REG AltiVec support

Re: [PATCH 1/3] powerpc/kvm: Remove redundant save of SIER AND MMCR2

Re: [RFC PATCH 2/4] KVM: PPC: Book3E: Handle LRAT error exception

[PATCH v2] KVM: PPC: e500: Emulate power management control SPR

Re: [RFC PATCH 0/4] KVM Book3E support for HTW guests

Re: [PATCH v2] KVM: PPC: e500: Emulate power management control SPR

[PATCH] KVM: PPC: Book3S: Move vcore definition to end of kvm_arch struct

Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

Re: [PATCH v2] powerpc/kvm: support to handle sw breakpoint

Re: [PATCH] KVM: PPC: Book3S: Move vcore definition to end of kvm_arch struct

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