Re: [PATCH tip/core/rcu 08/20] rcu: Add long-term CPU kicking
On Sat, Jan 14, 2017 at 01:13:09AM -0800, Paul E. McKenney wrote:
> Commit d2db185bfee8 ("rcu: Remove short-term CPU kicking") removed
> frequent calls to resched_cpu(), which means that the only time
> resched_cpu() is invoked is after an RCU CPU stall warning. Although
> this is good from an avoid-IPIs perspective, we should try to break
> things loose -before- splatting. This commit therefore starts invoking
> resched_cpu() for each holdout at each force-quiescent-state interval
> that is more than halfway through the stall-warning interval.
>
> Signed-off-by: Paul E. McKenney
Could you please reverse the order of patches 7 and 8, so that
unnecessary splats don't occur between the two?
For the patch itself:
Reviewed-by: Josh Triplett
> kernel/rcu/tree.c | 7 +++
> 1 file changed, 7 insertions(+)
>
> diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
> index 3c0d6c129718..5a4aaad75e76 100644
> --- a/kernel/rcu/tree.c
> +++ b/kernel/rcu/tree.c
> @@ -1220,6 +1220,13 @@ static int rcu_implicit_dynticks_qs(struct rcu_data
> *rdp,
> rdp->rsp->jiffies_resched += 5; /* Re-enable beating. */
> }
>
> + /*
> + * If more than halfway to RCU CPU stall-warning time, do
> + * a resched_cpu() to try to loosen things up a bit.
> + */
> + if (jiffies - rdp->rsp->gp_start > rcu_jiffies_till_stall_check() / 2)
> + resched_cpu(rdp->cpu);
> +
> return 0;
> }
>
> --
> 2.5.2
>
Re: [PATCH tip/core/rcu 02/20] lockdep: Make RCU suspicious-access splats use pr_err
On Sat, Jan 14, 2017 at 01:13:03AM -0800, Paul E. McKenney wrote:
> This commit switches RCU suspicious-access splats use pr_err()
> instead of the current INFO printk()s. This change makes it easier
> to automatically classify splats.
>
> Reported-by: Dmitry Vyukov
> Signed-off-by: Paul E. McKenney
One comment below.
> kernel/locking/lockdep.c | 12 ++--
> 1 file changed, 6 insertions(+), 6 deletions(-)
>
> diff --git a/kernel/locking/lockdep.c b/kernel/locking/lockdep.c
> index 7c38f8f3d97b..844cd04bb453 100644
> --- a/kernel/locking/lockdep.c
> +++ b/kernel/locking/lockdep.c
> @@ -4412,13 +4412,13 @@ void lockdep_rcu_suspicious(const char *file, const
> int line, const char *s)
> #endif /* #ifdef CONFIG_PROVE_RCU_REPEATEDLY */
> /* Note: the following can be executed concurrently, so be careful. */
> printk("\n");
> - printk("===\n");
> - printk("[ INFO: suspicious RCU usage. ]\n");
> + pr_err("===\n");
> + pr_err("suspicious RCU usage. ]\n");
This message change seems unrelated, and potentially unintentional.
> print_kernel_ident();
> - printk("---\n");
> - printk("%s:%d %s!\n", file, line, s);
> - printk("\nother info that might help us debug this:\n\n");
> - printk("\n%srcu_scheduler_active = %d, debug_locks = %d\n",
> + pr_err("---\n");
> + pr_err("%s:%d %s!\n", file, line, s);
> + pr_err("\nother info that might help us debug this:\n\n");
> + pr_err("\n%srcu_scheduler_active = %d, debug_locks = %d\n",
> !rcu_lockdep_current_cpu_online()
> ? "RCU used illegally from offline CPU!\n"
> : !rcu_is_watching()
> --
> 2.5.2
>
Re: [PATCH tip/core/rcu 0/6] Dynticks updates for 4.11
On Sat, Jan 14, 2017 at 12:54:06AM -0800, Paul E. McKenney wrote: > Hello! > > This series provides dynticks updates: > > 1-4. Abstract access to the dyntick counter, replacing the current > open-coding of atomic operations. > > 5.Check cond_resched_rcu_qs() state less often to reduce GP overhead. > > 6.Adjust FQS offline checks for exact online-CPU detection. I replied to patches 1 and 3 with feedback. For patches 2 and 4-6: Reviewed-by: Josh Triplett > Thanx, Paul > > > > include/linux/rcutiny.h|6 + > include/trace/events/rcu.h | 10 - > kernel/rcu/tree.c | 245 > +++-- > kernel/rcu/tree.h |2 > kernel/rcu/tree_exp.h | 12 -- > kernel/rcu/tree_plugin.h |2 > kernel/rcu/tree_trace.c|2 > 7 files changed, 190 insertions(+), 89 deletions(-) >
Re: [PATCH tip/core/rcu 3/6] rcu: Abstract dynticks extended quiescent state enter/exit operations
On Sat, Jan 14, 2017 at 12:54:42AM -0800, Paul E. McKenney wrote:
> This commit is the third step towards full abstraction of all accesses
> to the ->dynticks counter, implementing the previously open-coded atomic
> add of 1 and entry checks in a new rcu_dynticks_eqs_enter() function, and
> the same but with exit checks in a new rcu_dynticks_eqs_exit() function.
> This abstraction will ease changes to the ->dynticks counter operation.
>
> Signed-off-by: Paul E. McKenney
A couple of comments below. With those addressed:
Reviewed-by: Josh Triplett
> kernel/rcu/tree.c | 92
> +++
> 1 file changed, 66 insertions(+), 26 deletions(-)
>
> diff --git a/kernel/rcu/tree.c b/kernel/rcu/tree.c
> index 805d55ee0b2a..fc49e008963a 100644
> --- a/kernel/rcu/tree.c
> +++ b/kernel/rcu/tree.c
> @@ -282,6 +282,65 @@ static DEFINE_PER_CPU(struct rcu_dynticks, rcu_dynticks)
> = {
> };
>
> /*
> + * Record entry into an extended quiescent state. This is only to be
> + * called when not already in an extended quiescent state.
> + */
> +static void rcu_dynticks_eqs_enter(void)
> +{
> + struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> +
> + /*
> + * CPUs seeing atomic_inc() must see prior RCU read-side critical
> + * sections, and we also must force ordering with the next idle
> + * sojourn.
> + */
> + smp_mb__before_atomic(); /* See above. */
> + atomic_inc(&rdtp->dynticks);
> + smp_mb__after_atomic(); /* See above. */
> + WARN_ON_ONCE(IS_ENABLED(CONFIG_RCU_EQS_DEBUG) &&
> + atomic_read(&rdtp->dynticks) & 0x1);
> +}
> +
> +/*
> + * Record exit from an extended quiescent state. This is only to be
> + * called from an extended quiescent state.
> + */
> +static void rcu_dynticks_eqs_exit(void)
> +{
> + struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> +
> + /*
> + * CPUs seeing atomic_inc() must see prior idle sojourns,
> + * and we also must force ordering with the next RCU read-side
> + * critical section.
> + */
> + smp_mb__before_atomic(); /* See above. */
> + atomic_inc(&rdtp->dynticks);
> + smp_mb__after_atomic(); /* See above. */
> + WARN_ON_ONCE(IS_ENABLED(CONFIG_RCU_EQS_DEBUG) &&
> + !(atomic_read(&rdtp->dynticks) & 0x1));
> +}
> +
> +/*
> + * Reset the current CPU's ->dynticks counter to indicate that the
> + * newly onlined CPU is no longer in an extended quiescent state.
> + * This will either leave the counter unchanged, or increment it
> + * to the next non-quiescent value.
> + *
> + * The non-atomic test/increment sequence works because the upper bits
> + * of the ->dynticks counter are manipulated only by the corresponding CPU,
> + * or when the corresponding CPU is offline.
> + */
> +static void rcu_dynticks_eqs_online(void)
> +{
> + struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> +
> + if (atomic_read(&rdtp->dynticks) & 0x1)
> + return;
> + atomic_add(0x1, &rdtp->dynticks);
> +}
> +
> +/*
> * Snapshot the ->dynticks counter with full ordering so as to allow
> * stable comparison of this counter with past and future snapshots.
> */
> @@ -693,7 +752,7 @@ static void rcu_eqs_enter_common(long long oldval, bool
> user)
> {
> struct rcu_state *rsp;
> struct rcu_data *rdp;
> - struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> + struct rcu_dynticks __maybe_unused *rdtp = this_cpu_ptr(&rcu_dynticks);
Rather than marking a local variable as __maybe_unused (such that the
compiler can no longer help detect it as unused), could you move it into
the portion of the function that uses it, so that if reached, it'll
always get used?
> trace_rcu_dyntick(TPS("Start"), oldval, rdtp->dynticks_nesting);
> if (IS_ENABLED(CONFIG_RCU_EQS_DEBUG) &&
> @@ -712,12 +771,7 @@ static void rcu_eqs_enter_common(long long oldval, bool
> user)
> do_nocb_deferred_wakeup(rdp);
> }
> rcu_prepare_for_idle();
> - /* CPUs seeing atomic_inc() must see prior RCU read-side crit sects */
> - smp_mb__before_atomic(); /* See above. */
> - atomic_inc(&rdtp->dynticks);
> - smp_mb__after_atomic(); /* Force ordering with next sojourn. */
> - WARN_ON_ONCE(IS_ENABLED(CONFIG_RCU_EQS_DEBUG) &&
> - atomic_read(&rdtp->dynticks) & 0x1);
> + rcu_dynticks_eqs_enter();
> rcu_dynticks_task_enter();
>
> /*
> @@ -846,15 +900,10 @@ void rcu_irq_exit_irqson(void)
> */
> static void rcu_eqs_exit_common(long long oldval, int user)
> {
> - struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> + struct rcu_dynticks __maybe_unused *rdtp = this_cpu_ptr(&rcu_dynticks);
Same comment as above.
> rcu_dynticks_task_exit();
> - smp_mb__before_atomic(); /* Force ordering w/previous sojourn. */
> - atomic_inc(&rdtp->dynticks);
> - /* CPUs seeing atomic_inc() must see later RCU read-side
Re: [PATCH v1 3/3] reset: zx2967: add reset controller driver for ZTE's zx2967 family
On Sat, Jan 14, 2017 at 03:05:30PM +0800, Baoyou Xie wrote:
> This patch adds reset controller driver for ZTE's zx2967 family.
>
> Signed-off-by: Baoyou Xie
> ---
> drivers/reset/Kconfig| 6 ++
> drivers/reset/Makefile | 1 +
> drivers/reset/reset-zx2967.c | 136
> +++
> 3 files changed, 143 insertions(+)
> create mode 100644 drivers/reset/reset-zx2967.c
>
> diff --git a/drivers/reset/Kconfig b/drivers/reset/Kconfig
> index 172dc96..972d077 100644
> --- a/drivers/reset/Kconfig
> +++ b/drivers/reset/Kconfig
> @@ -92,6 +92,12 @@ config RESET_ZYNQ
> help
> This enables the reset controller driver for Xilinx Zynq SoCs.
>
> +config RESET_ZX2967
> + bool "ZX2967 Reset Driver"
> + depends on ARCH_ZX || COMPILE_TEST
> + help
> + This enables the reset controller driver for ZTE zx2967 family.
> +
The config options seem to be sorted alphabetically, so RESET_ZX2967
should be put before RESET_ZYNQ.
> source "drivers/reset/sti/Kconfig"
> source "drivers/reset/hisilicon/Kconfig"
> source "drivers/reset/tegra/Kconfig"
> diff --git a/drivers/reset/Makefile b/drivers/reset/Makefile
> index 13b346e..807b77b 100644
> --- a/drivers/reset/Makefile
> +++ b/drivers/reset/Makefile
> @@ -14,3 +14,4 @@ obj-$(CONFIG_RESET_SUNXI) += reset-sunxi.o
> obj-$(CONFIG_TI_SYSCON_RESET) += reset-ti-syscon.o
> obj-$(CONFIG_RESET_UNIPHIER) += reset-uniphier.o
> obj-$(CONFIG_RESET_ZYNQ) += reset-zynq.o
> +obj-$(CONFIG_RESET_ZX2967) += reset-zx2967.o
Ditto
> diff --git a/drivers/reset/reset-zx2967.c b/drivers/reset/reset-zx2967.c
> new file mode 100644
> index 000..63f9c41
> --- /dev/null
> +++ b/drivers/reset/reset-zx2967.c
> @@ -0,0 +1,136 @@
> +/*
> + * ZTE's zx2967 family thermal sensor driver
> + *
> + * Copyright (C) 2017 ZTE Ltd.
> + *
> + * Author: Baoyou Xie
> + *
> + * License terms: GNU General Public License (GPL) version 2
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +
> +struct zx2967_reset {
> + void __iomem*reg_base;
> + spinlock_t lock;
> + struct reset_controller_dev rcdev;
> +};
> +
> +static int zx2967_reset_assert(struct reset_controller_dev *rcdev,
> +unsigned long id)
> +{
> + struct zx2967_reset *reset = NULL;
> + int bank = id / 32;
> + int offset = id % 32;
> + unsigned int reg;
> + unsigned long flags;
> +
> + reset = container_of(rcdev, struct zx2967_reset, rcdev);
> +
> + spin_lock_irqsave(&reset->lock, flags);
> +
> + reg = readl(reset->reg_base + (bank * 4));
> + writel(reg & ~BIT(offset), reset->reg_base + (bank * 4));
> + reg = readl(reset->reg_base + (bank * 4));
> +
> + spin_unlock_irqrestore(&reset->lock, flags);
> +
> + return 0;
> +}
> +
> +static int zx2967_reset_deassert(struct reset_controller_dev *rcdev,
> + unsigned long id)
> +{
> + struct zx2967_reset *reset = NULL;
> + int bank = id / 32;
> + int offset = id % 32;
> + unsigned int reg;
> + unsigned long flags;
> +
> + reset = container_of(rcdev, struct zx2967_reset, rcdev);
> +
> + spin_lock_irqsave(&reset->lock, flags);
> +
> + reg = readl(reset->reg_base + (bank * 4));
> + writel(reg | BIT(offset), reset->reg_base + (bank * 4));
> + reg = readl(reset->reg_base + (bank * 4));
> +
> + spin_unlock_irqrestore(&reset->lock, flags);
> +
> + return 0;
> +}
> +
> +static struct reset_control_ops zx2967_reset_ops = {
> + .assert = zx2967_reset_assert,
> + .deassert = zx2967_reset_deassert,
> +};
> +
> +static int zx2967_reset_probe(struct platform_device *pdev)
> +{
> + struct zx2967_reset *reset;
> + struct resource *res;
> +
> + reset = devm_kzalloc(&pdev->dev, sizeof(*reset), GFP_KERNEL);
> + if (!reset)
> + return -ENOMEM;
> +
> + res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
> + reset->reg_base = devm_ioremap_resource(&pdev->dev, res);
> + if (IS_ERR(reset->reg_base))
> + return PTR_ERR(reset->reg_base);
> +
> + spin_lock_init(&reset->lock);
> +
> + reset->rcdev.owner = THIS_MODULE;
> + reset->rcdev.nr_resets = resource_size(res) * 8;
> + reset->rcdev.ops = &zx2967_reset_ops;
> + reset->rcdev.of_node = pdev->dev.of_node;
> +
> + dev_info(&pdev->dev, "reset controller cnt:%d",
> + reset->rcdev.nr_resets);
> +
> + return reset_controller_register(&reset->rcdev);
Use devm_reset_controller_register(), then we can save the call to
reset_controller_unregister().
Shawn
> +}
> +
> +static int zx2967_reset_remove(struct platform_device *pdev)
> +{
> + struct zx2967_reset *reset = platform_get_drvdata(pdev);
> +
> + reset_controller_unregister(&reset->rcdev);
> +
> + return 0;
> +}
> +
> +static const struct of_device_id zx2967_reset_dt_ids[] = {
> + { .compatible = "zte,zx296718-reset", },
>
Re: [alsa-devel] [PATCH v2 3/4] ASoC: Intel: Support rt5660 codec for Baytrail
On Thu, 2017-01-12 at 08:40 -0600, Pierre-Louis Bossart wrote:
> On 1/12/17 6:01 AM, Shrirang Bagul wrote:
> > rt5660 and rt5640 are similar codecs so reuse the bytcr_rt5640 driver.
> > RT5660 codec is used on Dell Edge IoT Gateways with ACPI ID 10EC3277.
> > These devices sport only Line-In and Line-Out jacks.
>
> While it would be nice to avoid copy/pasting everytime we add a new
> codec and refactor the code, I am not comfortable with a series of
> changes below.
> Also if we do this refactoring then we might as well do it for rt5651
> which is similar and only relies on I2S. other machine drivers enable
> TDM mode when possible.
> And last this change has a lot of impact on how we deal with UCM files.
> The name of the card should reflect which codec is used, and the quirks
> be added to the long name. If you lump everything with a single name
> then you will make it really hard for userspace to figure out which
> controls need to be set.
>
> So nice idea but too early to merge. NAK.
Thank you for the review, will address these comments in the next version. When
you it be appropriate to re-submit? Are we waiting for any patches which are
queued to be merged soon?
>
> >
> > Signed-off-by: Shrirang Bagul
> > ---
> > sound/soc/intel/Kconfig | 11 +--
> > sound/soc/intel/atom/sst/sst_acpi.c | 2 +
> > sound/soc/intel/boards/bytcr_rt5640.c | 156 ++-
> > ---
> > 3 files changed, 147 insertions(+), 22 deletions(-)
> >
> > diff --git a/sound/soc/intel/Kconfig b/sound/soc/intel/Kconfig
> > index fd5d1e0..0b43b6a 100644
> > --- a/sound/soc/intel/Kconfig
> > +++ b/sound/soc/intel/Kconfig
> > @@ -147,17 +147,18 @@ config SND_SOC_INTEL_BROADWELL_MACH
> > If unsure select "N".
> >
> > config SND_SOC_INTEL_BYTCR_RT5640_MACH
> > -tristate "ASoC Audio driver for Intel Baytrail and Baytrail-CR with
> > RT5640 codec"
> > + tristate "ASoC Audio driver for Intel Baytrail and Baytrail-CR with
> > RT5640/5660 codec"
> > depends on X86 && I2C && ACPI
> > select SND_SOC_RT5640
> > + select SND_SOC_RT5660
> > select SND_SST_MFLD_PLATFORM
> > select SND_SST_IPC_ACPI
> > select SND_SOC_INTEL_SST_MATCH if ACPI
> > help
> > - This adds support for ASoC machine driver for Intel(R) Baytrail
> > and Baytrail-CR
> > - platforms with RT5640 audio codec.
> > - Say Y if you have such a device.
> > - If unsure select "N".
> > + This adds support for ASoC machine driver for Intel(R) Baytrail
> > and Baytrail-CR
> > + platforms with RT5640, RT5460 audio codec.
> > + Say Y if you have such a device.
> > + If unsure select "N".
> >
> > config SND_SOC_INTEL_BYTCR_RT5651_MACH
> > tristate "ASoC Audio driver for Intel Baytrail and Baytrail-CR with
> > RT5651 codec"
> > diff --git a/sound/soc/intel/atom/sst/sst_acpi.c
> > b/sound/soc/intel/atom/sst/sst_acpi.c
> > index f4d92bb..d401457f 100644
> > --- a/sound/soc/intel/atom/sst/sst_acpi.c
> > +++ b/sound/soc/intel/atom/sst/sst_acpi.c
> > @@ -441,6 +441,8 @@ static struct sst_acpi_mach sst_acpi_bytcr[] = {
> > &byt_rvp_platform_data },
> > {"10EC5642", "bytcr_rt5640", "intel/fw_sst_0f28.bin",
> > "bytcr_rt5640", NULL,
> > &byt_rvp_platform_data },
> > + {"10EC3277", "bytcr_rt5640", "intel/fw_sst_0f28.bin",
> > "bytcr_rt5640", NULL,
> > + &byt_rvp_platform_data },
>
> so right there you add an HID in the platform driver and you need the
> same in the platform driver to determine which codec type this is...
>
> > {"INTCCFFD", "bytcr_rt5640", "intel/fw_sst_0f28.bin",
> > "bytcr_rt5640", NULL,
> > &byt_rvp_platform_data },
> > {"10EC5651", "bytcr_rt5651", "intel/fw_sst_0f28.bin",
> > "bytcr_rt5651", NULL,
> > diff --git a/sound/soc/intel/boards/bytcr_rt5640.c
> > b/sound/soc/intel/boards/bytcr_rt5640.c
> > index f6fd397..e8c9a01 100644
> > --- a/sound/soc/intel/boards/bytcr_rt5640.c
> > +++ b/sound/soc/intel/boards/bytcr_rt5640.c
> > @@ -32,11 +32,17 @@
> > #include
> > #include
> > #include "../../codecs/rt5640.h"
> > +#include "../../codecs/rt5660.h"
> > #include "../atom/sst-atom-controls.h"
> > #include "../common/sst-acpi.h"
> > #include "../common/sst-dsp.h"
> >
> > enum {
> > + CODEC_TYPE_RT5640,
> > + CODEC_TYPE_RT5660,
> > +};
> > +
> > +enum {
> > BYT_RT5640_DMIC1_MAP,
> > BYT_RT5640_DMIC2_MAP,
> > BYT_RT5640_IN1_MAP,
> > @@ -60,8 +66,16 @@ enum {
> > PLL1_MCLK,
> > };
> >
> > +struct byt_acpi_card {
> > + char *codec_id;
> > + int codec_type;
> > + struct snd_soc_card *soc_card;
> > +};
> > +
> > struct byt_rt5640_private {
> > + struct byt_acpi_card *acpi_card;
> > struct clk *mclk;
> > + char codec_name[16];
> > int *clks;
> > };
> >
> > @@ -72,6 +86,13 @@ static int byt_rt5640_clks[
Re: [PATCH tip/core/rcu 1/6] rcu: Abstract the dynticks momentary-idle operation
On Sat, Jan 14, 2017 at 12:54:40AM -0800, Paul E. McKenney wrote:
> This commit is the first step towards full abstraction of all accesses to
> the ->dynticks counter, implementing the previously open-coded atomic add
> of two in a new rcu_dynticks_momentary_idle() function. This abstraction
> will ease changes to the ->dynticks counter operation.
>
> Signed-off-by: Paul E. McKenney
This change has an additional effect not documented in the commit
message: it eliminates the smp_mb__before_atomic and
smp_mb__after_atomic calls. Can you please document that in the commit
message, and explain why that doesn't cause a problem?
> --- a/kernel/rcu/tree.c
> +++ b/kernel/rcu/tree.c
> @@ -281,6 +281,19 @@ static DEFINE_PER_CPU(struct rcu_dynticks, rcu_dynticks)
> = {
> #endif /* #ifdef CONFIG_NO_HZ_FULL_SYSIDLE */
> };
>
> +/*
> + * Do a double-increment of the ->dynticks counter to emulate a
> + * momentary idle-CPU quiescent state.
> + */
> +static void rcu_dynticks_momentary_idle(void)
> +{
> + struct rcu_dynticks *rdtp = this_cpu_ptr(&rcu_dynticks);
> + int special = atomic_add_return(2, &rdtp->dynticks);
> +
> + /* It is illegal to call this from idle state. */
> + WARN_ON_ONCE(!(special & 0x1));
> +}
> +
> DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, rcu_qs_ctr);
> EXPORT_PER_CPU_SYMBOL_GPL(rcu_qs_ctr);
>
> @@ -300,7 +313,6 @@ EXPORT_PER_CPU_SYMBOL_GPL(rcu_qs_ctr);
> static void rcu_momentary_dyntick_idle(void)
> {
> struct rcu_data *rdp;
> - struct rcu_dynticks *rdtp;
> int resched_mask;
> struct rcu_state *rsp;
>
> @@ -327,10 +339,7 @@ static void rcu_momentary_dyntick_idle(void)
>* quiescent state, with no need for this CPU to do anything
>* further.
>*/
> - rdtp = this_cpu_ptr(&rcu_dynticks);
> - smp_mb__before_atomic(); /* Earlier stuff before QS. */
> - atomic_add(2, &rdtp->dynticks); /* QS. */
> - smp_mb__after_atomic(); /* Later stuff after QS. */
> + rcu_dynticks_momentary_idle();
> break;
> }
> }
> --
> 2.5.2
>
Re: [PATCH v2 2/2] ocfs2: fix deadlock issue when taking inode lock at vfs entry points
Hi!
On 01/16/2017 02:58 PM, Junxiao Bi wrote:
On 01/16/2017 02:42 PM, Eric Ren wrote:
Commit 743b5f1434f5 ("ocfs2: take inode lock in ocfs2_iop_set/get_acl()")
results in a deadlock, as the author "Tariq Saeed" realized shortly
after the patch was merged. The discussion happened here
(https://oss.oracle.com/pipermail/ocfs2-devel/2015-September/011085.html).
The reason why taking cluster inode lock at vfs entry points opens up
a self deadlock window, is explained in the previous patch of this
series.
So far, we have seen two different code paths that have this issue.
1. do_sys_open
may_open
inode_permission
ocfs2_permission
ocfs2_inode_lock() <=== take PR
generic_permission
get_acl
ocfs2_iop_get_acl
ocfs2_inode_lock() <=== take PR
2. fchmod|fchmodat
chmod_common
notify_change
ocfs2_setattr <=== take EX
posix_acl_chmod
get_acl
ocfs2_iop_get_acl <=== take PR
ocfs2_iop_set_acl <=== take EX
Fixes them by adding the tracking logic (in the previous patch) for
these funcs above, ocfs2_permission(), ocfs2_iop_[set|get]_acl(),
ocfs2_setattr().
Changes since v1:
1. Let ocfs2_is_locked_by_me() just return true/false to indicate if the
process gets the cluster lock - suggested by: Joseph Qi
and Junxiao Bi .
2. Change "struct ocfs2_holder" to a more meaningful name "ocfs2_lock_holder",
suggested by: Junxiao Bi .
3. Add debugging output at ocfs2_setattr() and ocfs2_permission() to
catch exceptional cases, suggested by: Junxiao Bi .
Signed-off-by: Eric Ren
---
fs/ocfs2/acl.c | 39 +
fs/ocfs2/file.c | 76 +
2 files changed, 100 insertions(+), 15 deletions(-)
diff --git a/fs/ocfs2/acl.c b/fs/ocfs2/acl.c
index bed1fcb..3e47262 100644
--- a/fs/ocfs2/acl.c
+++ b/fs/ocfs2/acl.c
@@ -284,16 +284,31 @@ int ocfs2_iop_set_acl(struct inode *inode, struct
posix_acl *acl, int type)
{
struct buffer_head *bh = NULL;
int status = 0;
-
- status = ocfs2_inode_lock(inode, &bh, 1);
+ int arg_flags = 0, has_locked;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
+
+ lockres = &OCFS2_I(inode)->ip_inode_lockres;
+ has_locked = ocfs2_is_locked_by_me(lockres);
+ if (has_locked)
+ arg_flags = OCFS2_META_LOCK_GETBH;
+ status = ocfs2_inode_lock_full(inode, &bh, 1, arg_flags);
if (status < 0) {
if (status != -ENOENT)
mlog_errno(status);
return status;
}
+ if (!has_locked)
+ ocfs2_add_holder(lockres, &oh);
+
Same code pattern showed here and *get_acl, can it be abstracted to one
function?
The same issue for *setattr and *permission. Sorry for not mention that
in last review.
Good idea! I will do it in the next version;-)
Thanks,
Eric
Thanks,
Junxiao.
status = ocfs2_set_acl(NULL, inode, bh, type, acl, NULL, NULL);
- ocfs2_inode_unlock(inode, 1);
+
+ if (!has_locked) {
+ ocfs2_remove_holder(lockres, &oh);
+ ocfs2_inode_unlock(inode, 1);
+ }
brelse(bh);
+
return status;
}
@@ -303,21 +318,35 @@ struct posix_acl *ocfs2_iop_get_acl(struct inode *inode, int type)
struct buffer_head *di_bh = NULL;
struct posix_acl *acl;
int ret;
+ int arg_flags = 0, has_locked;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
osb = OCFS2_SB(inode->i_sb);
if (!(osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL))
return NULL;
- ret = ocfs2_inode_lock(inode, &di_bh, 0);
+
+ lockres = &OCFS2_I(inode)->ip_inode_lockres;
+ has_locked = ocfs2_is_locked_by_me(lockres);
+ if (has_locked)
+ arg_flags = OCFS2_META_LOCK_GETBH;
+ ret = ocfs2_inode_lock_full(inode, &di_bh, 0, arg_flags);
if (ret < 0) {
if (ret != -ENOENT)
mlog_errno(ret);
return ERR_PTR(ret);
}
+ if (!has_locked)
+ ocfs2_add_holder(lockres, &oh);
acl = ocfs2_get_acl_nolock(inode, type, di_bh);
- ocfs2_inode_unlock(inode, 0);
+ if (!has_locked) {
+ ocfs2_remove_holder(lockres, &oh);
+ ocfs2_inode_unlock(inode, 0);
+ }
brelse(di_bh);
+
return acl;
}
diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c
index c488965..b620c25 100644
--- a/fs/ocfs2/file.c
+++ b/fs/ocfs2/file.c
@@ -1138,6 +1138,9 @@ int ocfs2_setattr(struct dentry *dentry, struct iattr
*attr)
handle_t *handle = NULL;
struct dquot *transfer_to[MAXQUOTAS] = { };
int qtype;
+ int arg_flags = 0, had_lock;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
trace_ocfs2_setattr(inode, dentry,
(unsigned lon
Re: [patch v2] mm, memcg: do not retry precharge charges
On Sat 14-01-17 21:42:48, David Rientjes wrote: > On Sat, 14 Jan 2017, Johannes Weiner wrote: > > > The OOM killer livelock was the motivation for this patch. With that > > ruled out, what's the point of this patch? Try a bit less hard to move > > charges during task migration? > > > > Most important part is to fail ->can_attach() instead of oom killing > processes when attaching a process to a memcg hierarchy. But we are not invoking the oom killer from this path even without __GFP_NORETRY. Or am I missing your point? -- Michal Hocko SUSE Labs
Re: [PATCH 5/6] treewide: use kv[mz]alloc* rather than opencoded variants
On Sat 14-01-17 12:56:32, Leon Romanovsky wrote:
[...]
> Hi Michal,
>
> I don't see mlx5_vzalloc in the changed list. Any reason why did you skip it?
>
> 881 static inline void *mlx5_vzalloc(unsigned long size)
> 882 {
> 883 void *rtn;
> 884
> 885 rtn = kzalloc(size, GFP_KERNEL | __GFP_NOWARN);
> 886 if (!rtn)
> 887 rtn = vzalloc(size);
> 888 return rtn;
> 889 }
No reason to skip it, I just didn't see it. I will fold the following in
if you are OK with it
---
diff --git a/include/linux/mlx5/driver.h b/include/linux/mlx5/driver.h
index cdd2bd62f86d..5e6063170e48 100644
--- a/include/linux/mlx5/driver.h
+++ b/include/linux/mlx5/driver.h
@@ -874,12 +874,7 @@ static inline u16 cmdif_rev(struct mlx5_core_dev *dev)
static inline void *mlx5_vzalloc(unsigned long size)
{
- void *rtn;
-
- rtn = kzalloc(size, GFP_KERNEL | __GFP_NOWARN);
- if (!rtn)
- rtn = vzalloc(size);
- return rtn;
+ return kvzalloc(GFP_KERNEL, size);
}
static inline u32 mlx5_base_mkey(const u32 key)
--
Michal Hocko
SUSE Labs
Re: [PATCH V2] usb: xhci: add support for performing fake doorbell
On 21 November 2016 at 16:31, Mathias Nyman wrote: > On 21.11.2016 09:57, Rafał Miłecki wrote: >> >> Hi Mathias, >> >> On 17 October 2016 at 22:30, Rafał Miłecki wrote: >>> >>> From: Rafał Miłecki >>> >>> Broadcom's Northstar XHCI controllers seem to need a special start >>> procedure to work correctly. There isn't any official documentation of >>> this, the problem is that controller doesn't detect any connected >>> devices with default setup. Moreover connecting USB device to controller >>> that doesn't run properly can cause SoC's watchdog issues. >>> >>> A workaround that was successfully tested on multiple devices is to >>> perform a fake doorbell. This patch adds code for doing this and enables >>> it on BCM4708 family. >>> >>> Signed-off-by: Rafał Miłecki >>> --- >>> V2: Enable quirk for brcm,bcm4708 machines instead of adding separated >>> binding >>> for it. Thanks Rob for your comment on this. >> >> >> Do you think you can pick & push this one? V2 follows Rob's suggestion >> and he has some DT knowledge for sure, so I guess it should be OK. >> -- > > > Is there some more background information on this? > > I don't have any contacts to Broadcom myself, adding the BMC Kernel Feedback > list to CC. > Maybe someone over there has an errata, documentation or just general > feedback. > > How was this workaround even figured out? ringing the doorbell for the first > device doesn't seem like something found by trial and error, especially > when > xhci specs state that: > > "Software shall not write the Doorbell of an endpoint until after it has > issued a > Configure Endpoint Command for the endpoint and received a successful > Command > Completion Event." > > The whole workaround is a bit intrusive, allocating a fake device, ring a > doorbell for a > fake device in the wrong state, clearing off HSE (host system error) which > should only be set > when things really go bad, some random usleeps, and possible calling > xhci_start() twice. > > I can't take this as is without some more info. Hi (ping) Broadcom guys, could you help us with this USB workaround, please? -- Rafał
Re: [PATCH] tools: usb usbip - update README USB/IP driver location
On 01/14/2017 12:38 AM, Shuah Khan wrote: > Update USB/IP driver location in README. > > Signed-off-by: Shuah Khan Reviewed-by: Krzysztof Opasiak Best regards, -- Krzysztof Opasiak Samsung R&D Institute Poland Samsung Electronics
[PATCH v8 4/9] iommu/amd: Introduce amd_iommu_get_num_iommus()
Introduce amd_iommu_get_num_iommus(), which returns the value of
amd_iommus_present, then replaces the direct access to the variable
which is now declared as static.
This function will also be used by Perf AMD IOMMU driver.
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.h | 2 ++
drivers/iommu/amd_iommu.c | 6 +++---
drivers/iommu/amd_iommu_init.c | 11 +--
drivers/iommu/amd_iommu_proto.h | 1 +
drivers/iommu/amd_iommu_types.h | 3 ---
5 files changed, 15 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h
index 845d173..5c5c932 100644
--- a/arch/x86/events/amd/iommu.h
+++ b/arch/x86/events/amd/iommu.h
@@ -28,6 +28,8 @@
#define IOMMU_BASE_DEVID 0x
/* amd_iommu_init.c external support functions */
+extern int amd_iommu_get_num_iommus(void);
+
extern bool amd_iommu_pc_supported(void);
extern u8 amd_iommu_pc_get_max_banks(u16 devid);
diff --git a/drivers/iommu/amd_iommu.c b/drivers/iommu/amd_iommu.c
index 754595e..ae55485 100644
--- a/drivers/iommu/amd_iommu.c
+++ b/drivers/iommu/amd_iommu.c
@@ -1228,7 +1228,7 @@ static void __domain_flush_pages(struct protection_domain
*domain,
build_inv_iommu_pages(&cmd, address, size, domain->id, pde);
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (!domain->dev_iommu[i])
continue;
@@ -1272,7 +1272,7 @@ static void domain_flush_complete(struct
protection_domain *domain)
{
int i;
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (domain && !domain->dev_iommu[i])
continue;
@@ -3341,7 +3341,7 @@ static int __flush_pasid(struct protection_domain
*domain, int pasid,
* IOMMU TLB needs to be flushed before Device TLB to
* prevent device TLB refill from IOMMU TLB
*/
- for (i = 0; i < amd_iommus_present; ++i) {
+ for (i = 0; i < amd_iommu_get_num_iommus(); ++i) {
if (domain->dev_iommu[i] == 0)
continue;
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 157e934..515d4c1 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -164,7 +164,9 @@ struct ivmd_header {
/* Array to assign indices to IOMMUs*/
struct amd_iommu *amd_iommus[MAX_IOMMUS];
-int amd_iommus_present;
+
+/* Number of IOMMUs present in the system */
+static int amd_iommus_present;
/* IOMMUs have a non-present cache? */
bool amd_iommu_np_cache __read_mostly;
@@ -269,6 +271,11 @@ static inline unsigned long tbl_size(int entry_size)
return 1UL << shift;
}
+int amd_iommu_get_num_iommus(void)
+{
+ return amd_iommus_present;
+}
+
/* Access to l1 and l2 indexed register spaces */
static u32 iommu_read_l1(struct amd_iommu *iommu, u16 l1, u8 address)
@@ -1333,7 +1340,7 @@ static int __init init_iommu_one(struct amd_iommu *iommu,
struct ivhd_header *h)
/* Add IOMMU to internal data structures */
list_add_tail(&iommu->list, &amd_iommu_list);
- iommu->index = amd_iommus_present++;
+ iommu->index = amd_iommus_present++;
if (unlikely(iommu->index >= MAX_IOMMUS)) {
WARN(1, "AMD-Vi: System has more IOMMUs than supported by this
driver\n");
diff --git a/drivers/iommu/amd_iommu_proto.h b/drivers/iommu/amd_iommu_proto.h
index 7eb60c1..e8f0710 100644
--- a/drivers/iommu/amd_iommu_proto.h
+++ b/drivers/iommu/amd_iommu_proto.h
@@ -21,6 +21,7 @@
#include "amd_iommu_types.h"
+extern int amd_iommu_get_num_iommus(void);
extern int amd_iommu_init_dma_ops(void);
extern int amd_iommu_init_passthrough(void);
extern irqreturn_t amd_iommu_int_thread(int irq, void *data);
diff --git a/drivers/iommu/amd_iommu_types.h b/drivers/iommu/amd_iommu_types.h
index 0d91785..09d7a11 100644
--- a/drivers/iommu/amd_iommu_types.h
+++ b/drivers/iommu/amd_iommu_types.h
@@ -606,9 +606,6 @@ struct devid_map {
*/
extern struct amd_iommu *amd_iommus[MAX_IOMMUS];
-/* Number of IOMMUs present in the system */
-extern int amd_iommus_present;
-
/*
* Declarations for the global list of all protection domains
*/
--
1.8.3.1
[PATCH v8 3/9] perf/amd/iommu: Misc fix up perf_iommu_read
* Fix overflow handling since u64 delta would lose the MSB sign bit.
* Remove unnecessary local64_cmpxchg().
* Coding style and make use of GENMASK_ULL macro.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 23 ---
1 file changed, 12 insertions(+), 11 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 1aa25d8..3f1c18a 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -320,9 +320,8 @@ static void perf_iommu_start(struct perf_event *event, int
flags)
static void perf_iommu_read(struct perf_event *event)
{
- u64 count = 0ULL;
- u64 prev_raw_count = 0ULL;
- u64 delta = 0ULL;
+ u64 count, prev;
+ s64 delta;
struct hw_perf_event *hwc = &event->hw;
amd_iommu_pc_get_set_reg_val(_GET_DEVID(event),
@@ -330,18 +329,20 @@ static void perf_iommu_read(struct perf_event *event)
IOMMU_PC_COUNTER_REG, &count, false);
/* IOMMU pc counter register is only 48 bits */
- count &= 0xULL;
+ count &= GENMASK_ULL(48, 0);
- prev_raw_count = local64_read(&hwc->prev_count);
- if (local64_cmpxchg(&hwc->prev_count, prev_raw_count,
- count) != prev_raw_count)
- return;
+ prev = local64_read(&hwc->prev_count);
- /* Handling 48-bit counter overflowing */
- delta = (count << COUNTER_SHIFT) - (prev_raw_count << COUNTER_SHIFT);
+ /*
+* Since we do not enable counter overflow interrupts,
+* we do not have to worry about prev_count changing on us.
+*/
+ local64_set(&hwc->prev_count, count);
+
+ /* Handle 48-bit counter overflow */
+ delta = (count << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
delta >>= COUNTER_SHIFT;
local64_add(delta, &event->count);
-
}
static void perf_iommu_stop(struct perf_event *event, int flags)
--
1.8.3.1
Re: [PATCH v6 2/3] input: tm2-touchkey: Add touchkey driver support for TM2
Dear Dmitry Torokhov,
On Sat, Jan 14, 2017 at 11:11:10PM -0800, Dmitry Torokhov wrote:
> Hi Jaechul,
>
> On Mon, Jan 09, 2017 at 04:22:14PM +0900, Jaechul Lee wrote:
> > +static irqreturn_t tm2_touchkey_irq_handler(int irq, void *devid)
> > +{
> > + struct tm2_touchkey_data *touchkey = devid;
> > + u32 data;
> > +
> > + data = i2c_smbus_read_byte_data(touchkey->client,
> > + TM2_TOUCHKEY_KEYCODE_REG);
> > +
> > + if (data < 0) {
>
> You declared data as u32 so it will never be negative.
Yes, it won't be negative.
>
> > + dev_err(&touchkey->client->dev, "Failed to read i2c data\n");
> > + return IRQ_HANDLED;
> > + }
> > +
> > + touchkey->keycode_type = data & TM2_TOUCHKEY_BIT_KEYCODE;
> > + touchkey->pressed = !(data & TM2_TOUCHKEY_BIT_PRESS_EV);
>
> There is no need to store this in touchkey structure as you are not
> going to use it past this function.
I agree with you. it doesn't need to store variables in touchkey structure.
>
> Does the version of the patch below work for you?
I found that the condition is inverted.
if data & TM2_TOUCHKEY_BIT_PRESS_EV is true, it means touchkey is released.
it should be changed like this.
if (data & TM2_TOUCHKEY_BIT_PRESS_EV) {
input_report_key(touchkey->input_dev, KEY_PHONE, 0);
input_report_key(touchkey->input_dev, KEY_BACK, 0);
} else {
input_report_key(touchkey->input_dev, key, 1);
}
I will prepare for patch v7 based on your modifications.
Thank you very much for your reviews.
Best Regards,
Jaechul
>
> Thanks.
>
> --
> Dmitry
>
>
> Input: tm2-touchkey - add touchkey driver support for TM2
>
> From: Jaechul Lee
>
> This patch adds support for the TM2 touch key and led functionality.
>
> The driver interfaces with userspace through an input device and
> reports KEY_PHONE and KEY_BACK event types. LED brightness can be
> controlled by "/sys/class/leds/tm2-touchkey/brightness".
>
> Signed-off-by: Beomho Seo
> Signed-off-by: Jaechul Lee
> Reviewed-by: Javier Martinez Canillas
> Reviewed-by: Andi Shyti
> Acked-by: Krzysztof Kozlowski
> Patchwork-Id: 9504149
> Signed-off-by: Dmitry Torokhov
> ---
> drivers/input/keyboard/Kconfig| 11 +
> drivers/input/keyboard/Makefile |1
> drivers/input/keyboard/tm2-touchkey.c | 286
> +
> 3 files changed, 298 insertions(+)
> create mode 100644 drivers/input/keyboard/tm2-touchkey.c
>
> diff --git a/drivers/input/keyboard/Kconfig b/drivers/input/keyboard/Kconfig
> index cbd75cf44739..97acd6524ad7 100644
> --- a/drivers/input/keyboard/Kconfig
> +++ b/drivers/input/keyboard/Kconfig
> @@ -666,6 +666,17 @@ config KEYBOARD_TC3589X
> To compile this driver as a module, choose M here: the
> module will be called tc3589x-keypad.
>
> +config KEYBOARD_TM2_TOUCHKEY
> + tristate "TM2 touchkey support"
> + depends on I2C
> + depends on LEDS_CLASS
> + help
> + Say Y here to enable device driver for tm2-touchkey with
> + LED control for the Exynos5433 TM2 board.
> +
> + To compile this driver as a module, choose M here.
> + module will be called tm2-touchkey.
> +
> config KEYBOARD_TWL4030
> tristate "TI TWL4030/TWL5030/TPS659x0 keypad support"
> depends on TWL4030_CORE
> diff --git a/drivers/input/keyboard/Makefile b/drivers/input/keyboard/Makefile
> index d9f4cfcf3410..7d9acff819a7 100644
> --- a/drivers/input/keyboard/Makefile
> +++ b/drivers/input/keyboard/Makefile
> @@ -61,6 +61,7 @@ obj-$(CONFIG_KEYBOARD_SUN4I_LRADC) += sun4i-lradc-keys.o
> obj-$(CONFIG_KEYBOARD_SUNKBD)+= sunkbd.o
> obj-$(CONFIG_KEYBOARD_TC3589X) += tc3589x-keypad.o
> obj-$(CONFIG_KEYBOARD_TEGRA) += tegra-kbc.o
> +obj-$(CONFIG_KEYBOARD_TM2_TOUCHKEY) += tm2-touchkey.o
> obj-$(CONFIG_KEYBOARD_TWL4030) += twl4030_keypad.o
> obj-$(CONFIG_KEYBOARD_XTKBD) += xtkbd.o
> obj-$(CONFIG_KEYBOARD_W90P910) += w90p910_keypad.o
> diff --git a/drivers/input/keyboard/tm2-touchkey.c
> b/drivers/input/keyboard/tm2-touchkey.c
> new file mode 100644
> index ..79bc2d2bd4b9
> --- /dev/null
> +++ b/drivers/input/keyboard/tm2-touchkey.c
> @@ -0,0 +1,286 @@
> +/*
> + * TM2 touchkey device driver
> + *
> + * Copyright 2005 Phil Blundell
> + * Copyright 2016 Samsung Electronics Co., Ltd.
> + *
> + * Author: Beomho Seo
> + * Author: Jaechul Lee
> + *
> + * This program is free software; you can redistribute it and/or modify
> + * it under the terms of the GNU General Public License version 2 as
> + * published by the Free Software Foundation.
> + */
> +
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +#include
> +
> +#define TM2_TOUCHKEY_DEV_NAME"tm2-touchkey"
> +#define TM2_TOUCHKEY_KEYCODE_REG 0x03
> +
[PATCH v8 9/9] perf/amd/iommu: Enable support for multiple IOMMUs
From: Suravee Suthikulpanit
Add multi-IOMMU support for perf by exposing an AMD IOMMU PMU
for each IOMMU found in the system via:
/bus/event_source/devices/amd_iommu_x
where x is the IOMMU index. This allows users to specify
different events to be programed onto performance counters
of each IOMMU.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 114 ++--
1 file changed, 67 insertions(+), 47 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 223c01d..38eafbf 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -35,16 +35,21 @@
#define _GET_PASID_MASK(ev) ((ev->hw.extra_reg.config >> 16) & 0xULL)
#define _GET_DOMID_MASK(ev) ((ev->hw.extra_reg.config >> 32) & 0xULL)
-static struct perf_amd_iommu __perf_iommu;
+#define PERF_AMD_IOMMU_NAME_SZ 16
struct perf_amd_iommu {
+ struct list_head list;
struct pmu pmu;
+ unsigned int idx;
+ char name[PERF_AMD_IOMMU_NAME_SZ];
u8 max_banks;
u8 max_counters;
u64 cntr_assign_mask;
raw_spinlock_t lock;
};
+static LIST_HEAD(perf_amd_iommu_list);
+
/*-
* sysfs format attributes
*-*/
@@ -202,8 +207,7 @@ static int clear_avail_iommu_bnk_cntr(struct perf_amd_iommu
*perf_iommu,
static int perf_iommu_event_init(struct perf_event *event)
{
struct hw_perf_event *hwc = &event->hw;
- struct perf_amd_iommu *perf_iommu;
- u64 config, config1;
+ struct perf_amd_iommu *pi;
/* test the event attr type check for PMU enumeration */
if (event->attr.type != event->pmu->type)
@@ -225,27 +229,18 @@ static int perf_iommu_event_init(struct perf_event *event)
if (event->cpu < 0)
return -EINVAL;
- perf_iommu = &__perf_iommu;
-
- if (event->pmu != &perf_iommu->pmu)
- return -ENOENT;
-
- if (perf_iommu) {
- config = event->attr.config;
- config1 = event->attr.config1;
- } else {
- return -EINVAL;
- }
-
/* update the hw_perf_event struct with the iommu config data */
- hwc->config = config;
- hwc->extra_reg.config = config1;
+ pi = container_of(event->pmu, struct perf_amd_iommu, pmu);
+ hwc->idx = pi->idx;
+ hwc->config = event->attr.config;
+ hwc->extra_reg.config = event->attr.config1;
return 0;
}
static void perf_iommu_enable_event(struct perf_event *ev)
{
+ struct hw_perf_event *hwc = &ev->hw;
u8 csource = _GET_CSOURCE(ev);
u16 devid = _GET_DEVID(ev);
u8 bank = _GET_BANK(ev);
@@ -253,30 +248,34 @@ static void perf_iommu_enable_event(struct perf_event *ev)
u64 reg = 0ULL;
reg = csource;
- amd_iommu_pc_set_reg(0, bank, cntr,
+ amd_iommu_pc_set_reg(hwc->idx, bank, cntr,
IOMMU_PC_COUNTER_SRC_REG, ®);
reg = devid | (_GET_DEVID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_DEVID_MATCH_REG, ®);
+ amd_iommu_pc_set_reg(hwc->idx, bank, cntr,
+IOMMU_PC_DEVID_MATCH_REG, ®);
reg = _GET_PASID(ev) | (_GET_PASID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_PASID_MATCH_REG, ®);
+ amd_iommu_pc_set_reg(hwc->idx, bank, cntr,
+IOMMU_PC_PASID_MATCH_REG, ®);
reg = _GET_DOMID(ev) | (_GET_DOMID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_DOMID_MATCH_REG, ®);
+ amd_iommu_pc_set_reg(hwc->idx, bank, cntr,
+IOMMU_PC_DOMID_MATCH_REG, ®);
}
static void perf_iommu_disable_event(struct perf_event *event)
{
+ struct hw_perf_event *hwc = &event->hw;
u64 reg = 0ULL;
- amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
+ amd_iommu_pc_set_reg(hwc->idx, _GET_BANK(event), _GET_CNTR(event),
IOMMU_PC_COUNTER_SRC_REG, ®);
}
@@ -295,7 +294,7 @@ static void perf_iommu_start(struct perf_event *event, int
flags)
return;
val = local64_read(&hwc->prev_count) & GENMASK_ULL(48, 0);
- if (amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
+ if (amd_iommu_pc_set_reg(hwc->idx, _GET_BANK(event), _GET_CNTR(event),
IOMMU_PC_COUNTER_REG, &val))
return;
@@ -309,7 +308,7 @@ static void perf_iommu_read(struct perf_event *event)
s64 delta;
struct hw_perf_event *hwc = &event->hw;
- if (amd_iommu_pc_get_reg(0, _GET_BANK(event), _GET_CNTR(event),
+ if
[PATCH v8 7/9] perf/amd/iommu: Check return value when set and get counter value
From: Suravee Suthikulpanit
In, perf_iommu_start(), we need to check the return value from
amd_iommu_set_reg(). In case of failure, we should not enable the PMU.
Also, in perf_iommu_read(), we need to check the return value from
amd_iommu_get_reg() before using the value.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 19 +++
1 file changed, 11 insertions(+), 8 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 200d2e8..cc7bea4 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -284,6 +284,7 @@ static void perf_iommu_disable_event(struct perf_event
*event)
static void perf_iommu_start(struct perf_event *event, int flags)
{
+ u64 val;
struct hw_perf_event *hwc = &event->hw;
if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
@@ -292,15 +293,16 @@ static void perf_iommu_start(struct perf_event *event,
int flags)
WARN_ON_ONCE(!(hwc->state & PERF_HES_UPTODATE));
hwc->state = 0;
- if (flags & PERF_EF_RELOAD) {
- u64 prev_raw_count = local64_read(&hwc->prev_count);
- amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
-IOMMU_PC_COUNTER_REG, &prev_raw_count);
- }
+ if (!(flags & PERF_EF_RELOAD))
+ return;
+
+ val = local64_read(&hwc->prev_count) & GENMASK_ULL(48, 0);
+ if (amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
+ IOMMU_PC_COUNTER_REG, &val))
+ return;
perf_iommu_enable_event(event);
perf_event_update_userpage(event);
-
}
static void perf_iommu_read(struct perf_event *event)
@@ -309,8 +311,9 @@ static void perf_iommu_read(struct perf_event *event)
s64 delta;
struct hw_perf_event *hwc = &event->hw;
- amd_iommu_pc_get_reg(0, _GET_BANK(event), _GET_CNTR(event),
-IOMMU_PC_COUNTER_REG, &count);
+ if (amd_iommu_pc_get_reg(0, _GET_BANK(event), _GET_CNTR(event),
+IOMMU_PC_COUNTER_REG, &count))
+ return;
/* IOMMU pc counter register is only 48 bits */
count &= GENMASK_ULL(48, 0);
--
1.8.3.1
[PATCH v8 8/9] perf/amd/iommu: Fix sysfs perf attribute groups
From: Suravee Suthikulpanit
Introduce static amd_iommu_attr_groups to simplify the
sysfs attributes initialization code.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 85 -
1 file changed, 37 insertions(+), 48 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index cc7bea4..223c01d 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -43,14 +43,8 @@ struct perf_amd_iommu {
u8 max_counters;
u64 cntr_assign_mask;
raw_spinlock_t lock;
- const struct attribute_group *attr_groups[4];
};
-#define format_group attr_groups[0]
-#define cpumask_group attr_groups[1]
-#define events_group attr_groups[2]
-#define null_group attr_groups[3]
-
/*-
* sysfs format attributes
*-*/
@@ -81,6 +75,10 @@ struct perf_amd_iommu {
/*-
* sysfs events attributes
*-*/
+static struct attribute_group amd_iommu_events_group = {
+ .name = "events",
+};
+
struct amd_iommu_event_desc {
struct kobj_attribute attr;
const char *event;
@@ -388,76 +386,63 @@ static void perf_iommu_del(struct perf_event *event, int
flags)
perf_event_update_userpage(event);
}
-static __init int _init_events_attrs(struct perf_amd_iommu *perf_iommu)
+static __init int _init_events_attrs(void)
{
- struct attribute **attrs;
- struct attribute_group *attr_group;
int i = 0, j;
+ struct attribute **attrs;
while (amd_iommu_v2_event_descs[i].attr.attr.name)
i++;
- attr_group = kzalloc(sizeof(struct attribute *)
- * (i + 1) + sizeof(*attr_group), GFP_KERNEL);
- if (!attr_group)
+ attrs = kzalloc(sizeof(struct attribute **) * (i + 1), GFP_KERNEL);
+ if (!attrs)
return -ENOMEM;
- attrs = (struct attribute **)(attr_group + 1);
for (j = 0; j < i; j++)
attrs[j] = &amd_iommu_v2_event_descs[j].attr.attr;
- attr_group->name = "events";
- attr_group->attrs = attrs;
- perf_iommu->events_group = attr_group;
-
+ amd_iommu_events_group.attrs = attrs;
return 0;
}
static __init void amd_iommu_pc_exit(void)
{
- if (__perf_iommu.events_group != NULL) {
- kfree(__perf_iommu.events_group);
- __perf_iommu.events_group = NULL;
+ if (amd_iommu_events_group.attrs) {
+ kfree(amd_iommu_events_group.attrs);
+ amd_iommu_events_group.attrs = NULL;
}
}
-static __init int _init_perf_amd_iommu(
- struct perf_amd_iommu *perf_iommu, char *name)
+const struct attribute_group *amd_iommu_attr_groups[] = {
+ &amd_iommu_format_group,
+ &amd_iommu_cpumask_group,
+ &amd_iommu_events_group,
+ NULL,
+};
+
+static __init int
+_init_perf_amd_iommu(struct perf_amd_iommu *perf_iommu, char *name)
{
int ret;
raw_spin_lock_init(&perf_iommu->lock);
- perf_iommu->format_group = &amd_iommu_format_group;
-
/* Init cpumask attributes to only core 0 */
cpumask_set_cpu(0, &iommu_cpumask);
- perf_iommu->cpumask_group = &amd_iommu_cpumask_group;
-
- ret = _init_events_attrs(perf_iommu);
- if (ret) {
- pr_err("Error initializing AMD IOMMU perf events.\n");
- return ret;
- }
perf_iommu->max_banks = amd_iommu_pc_get_max_banks(0);
perf_iommu->max_counters = amd_iommu_pc_get_max_counters(0);
if (!perf_iommu->max_banks || !perf_iommu->max_counters)
return -EINVAL;
- perf_iommu->null_group = NULL;
- perf_iommu->pmu.attr_groups = perf_iommu->attr_groups;
-
+ perf_iommu->pmu.attr_groups = amd_iommu_attr_groups;
ret = perf_pmu_register(&perf_iommu->pmu, name, -1);
- if (ret) {
+ if (ret)
pr_err("Error initializing AMD IOMMU perf counters.\n");
- amd_iommu_pc_exit();
- } else {
+ else
pr_info("perf: amd_iommu: Detected. (%d banks, %d
counters/bank)\n",
amd_iommu_pc_get_max_banks(0),
amd_iommu_pc_get_max_counters(0));
- }
-
return ret;
}
@@ -471,24 +456,28 @@ static __init int _init_perf_amd_iommu(
.stop = perf_iommu_stop,
.read = perf_iommu_read,
},
- .max_banks = 0x00,
- .max_counters = 0x00,
- .cntr_assign_mask = 0ULL,
- .format_group = NULL,
- .cpumask_group = NULL,
- .events_group = NULL,
- .null_group = NULL,
};
static __init int amd_iommu_pc_init(void)
{
Re: [PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704
My apologise for not adding 2nd version info of this patch to mail subject.
Thanks,
Tomasz
On 16.01.2017 08:16, Tomasz Nowicki wrote:
The goal of erratum #27704 workaround was to make sure that ASIDs and VMIDs
are unique across all SMMU instances on affected Cavium systems.
Currently, the workaround code partitions ASIDs and VMIDs by increasing
global cavium_smmu_context_count which in turn becomes the base ASID and VMID
value for the given SMMU instance upon the context bank initialization.
For systems with multiple SMMU instances this approach implies the risk
of crossing 8-bit ASID, like for 1-socket CN88xx capable of 4 SMMUv2,
128 context banks each:
SMMU_0 (0-127 ASID RANGE)
SMMU_1 (127-255 ASID RANGE)
SMMU_2 (256-383 ASID RANGE) <--- crossing 8-bit ASID
SMMU_3 (384-511 ASID RANGE) <--- crossing 8-bit ASID
Since now we use 8-bit ASID (SMMU_CBn_TCR2.AS = 0) we effectively misconfigure
ASID[15:8] bits of SMMU_CBn_TTBRm register for SMMU_2/3. Moreover, we still
assume non-zero ASID[15:8] bits upon context invalidation. In the end,
except SMMU_0/1 devices all other devices under other SMMUs will fail on guest
power off/on. Since we try to invalidate TLB with 16-bit ASID but we actually
have 8-bit zero padded 16-bit entry.
This patch adds 16-bit ASID support for stage-1 AArch64 contexts so that
we use ASIDs consistently for all SMMU instances.
Signed-off-by: Tomasz Nowicki
Reviewed-by: Robin Murphy
Reviewed-by: Tirumalesh Chalamarla
---
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..476fab9 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -260,6 +260,7 @@ enum arm_smmu_s2cr_privcfg {
#define TTBCR2_SEP_SHIFT 15
#define TTBCR2_SEP_UPSTREAM(0x7 << TTBCR2_SEP_SHIFT)
+#define TTBCR2_AS (1 << 4)
#define TTBRn_ASID_SHIFT 48
@@ -778,6 +779,8 @@ static void arm_smmu_init_context_bank(struct
arm_smmu_domain *smmu_domain,
reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr;
reg2 = pgtbl_cfg->arm_lpae_s1_cfg.tcr >> 32;
reg2 |= TTBCR2_SEP_UPSTREAM;
+ if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64)
+ reg2 |= TTBCR2_AS;
}
if (smmu->version > ARM_SMMU_V1)
writel_relaxed(reg2, cb_base + ARM_SMMU_CB_TTBCR2);
[PATCH v8 2/9] perf/amd/iommu: Clean up perf_iommu_enable_event
From: Suravee Suthikulpanit
* Clean up various bitwise operations in perf_iommu_enable_event
* Make use macros BIT(x)
This should not affect logic and functionality.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 18 +-
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 44638d0..1aa25d8 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -164,11 +164,11 @@ static int get_next_avail_iommu_bnk_cntr(struct
perf_amd_iommu *perf_iommu)
for (bank = 0, shift = 0; bank < max_banks; bank++) {
for (cntr = 0; cntr < max_cntrs; cntr++) {
shift = bank + (bank*3) + cntr;
- if (perf_iommu->cntr_assign_mask & (1ULLcntr_assign_mask |= (1ULL
[PATCH v8 5/9] perf/amd/iommu: Modify functions to query max banks and counters
Currently, amd_iommu_pc_get_max_[banks|counters]() use end-point
device ID to locate an IOMMU and check the reported max banks/counters.
The logic assumes that the IOMMU_BASE_DEVID belongs to the first IOMMU,
and uses it to acquire a reference to the first IOMMU, which does not work
on certain systems. Instead, we modify the function to take IOMMU index,
and use it to query the corresponded AMD IOMMU instance.
Note that we currently hard-code the IOMMU index to 0, since the current
AMD IOMMU perf implementation only supports single IOMMU. Subsequent patch
will add support for multi-IOMMU, and will use proper IOMMU index.
This patch also removes unnecessary function declaration in
amd_iommu_proto.h.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 17 +++--
arch/x86/events/amd/iommu.h | 7 ++-
drivers/iommu/amd_iommu_init.c | 36 ++--
drivers/iommu/amd_iommu_proto.h | 2 --
4 files changed, 31 insertions(+), 31 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index 3f1c18a..ec7e873 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -239,14 +239,6 @@ static int perf_iommu_event_init(struct perf_event *event)
return -EINVAL;
}
- /* integrate with iommu base devid (), assume one iommu */
- perf_iommu->max_banks =
- amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID);
- perf_iommu->max_counters =
- amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID);
- if ((perf_iommu->max_banks == 0) || (perf_iommu->max_counters == 0))
- return -EINVAL;
-
/* update the hw_perf_event struct with the iommu config data */
hwc->config = config;
hwc->extra_reg.config = config1;
@@ -453,6 +445,11 @@ static __init int _init_perf_amd_iommu(
return ret;
}
+ perf_iommu->max_banks = amd_iommu_pc_get_max_banks(0);
+ perf_iommu->max_counters = amd_iommu_pc_get_max_counters(0);
+ if (!perf_iommu->max_banks || !perf_iommu->max_counters)
+ return -EINVAL;
+
perf_iommu->null_group = NULL;
perf_iommu->pmu.attr_groups = perf_iommu->attr_groups;
@@ -462,8 +459,8 @@ static __init int _init_perf_amd_iommu(
amd_iommu_pc_exit();
} else {
pr_info("perf: amd_iommu: Detected. (%d banks, %d
counters/bank)\n",
- amd_iommu_pc_get_max_banks(IOMMU_BASE_DEVID),
- amd_iommu_pc_get_max_counters(IOMMU_BASE_DEVID));
+ amd_iommu_pc_get_max_banks(0),
+ amd_iommu_pc_get_max_counters(0));
}
return ret;
diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h
index 5c5c932..cf3dd05 100644
--- a/arch/x86/events/amd/iommu.h
+++ b/arch/x86/events/amd/iommu.h
@@ -24,17 +24,14 @@
#define PC_MAX_SPEC_BNKS 64
#define PC_MAX_SPEC_CNTRS 16
-/* iommu pc reg masks*/
-#define IOMMU_BASE_DEVID 0x
-
/* amd_iommu_init.c external support functions */
extern int amd_iommu_get_num_iommus(void);
extern bool amd_iommu_pc_supported(void);
-extern u8 amd_iommu_pc_get_max_banks(u16 devid);
+extern u8 amd_iommu_pc_get_max_banks(unsigned int idx);
-extern u8 amd_iommu_pc_get_max_counters(u16 devid);
+extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);
extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr,
u8 fxn, u64 *value, bool is_write);
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index 515d4c1..ed21307d 100644
--- a/drivers/iommu/amd_iommu_init.c
+++ b/drivers/iommu/amd_iommu_init.c
@@ -2713,6 +2713,20 @@ bool amd_iommu_v2_supported(void)
}
EXPORT_SYMBOL(amd_iommu_v2_supported);
+static struct amd_iommu *get_amd_iommu(unsigned int idx)
+{
+ unsigned int i = 0;
+ struct amd_iommu *iommu, *ret = NULL;
+
+ for_each_iommu(iommu) {
+ if (i++ == idx) {
+ ret = iommu;
+ break;
+ }
+ }
+ return ret;
+}
+
/
*
* IOMMU EFR Performance Counter support functionality. This code allows
@@ -2720,17 +2734,14 @@ bool amd_iommu_v2_supported(void)
*
/
-u8 amd_iommu_pc_get_max_banks(u16 devid)
+u8 amd_iommu_pc_get_max_banks(unsigned int idx)
{
- struct amd_iommu *iommu;
- u8 ret = 0;
+ struct amd_iommu *iommu = get_amd_iommu(idx);
- /* locate the iommu governing the devid */
- iommu = amd_iommu_rlookup_table[devid];
if (iommu)
- ret = iommu->max_banks;
+ return iommu->max_ba
[PATCH v8 6/9] perf/amd/iommu: Modify amd_iommu_pc_get_set_reg_val() API to allow specifying IOMMU index
From: Suravee Suthikulpanit
The current amd_iommu_pc_get_set_reg_val() cannot support multiple IOMMUs
It is also confusing since it is trying to support set and get in
one function.
So break it down to amd_iommu_pc_[get|set]_reg(),
and modifies them to allow callers to specify IOMMU index. This prepares
the driver for supporting multi-IOMMU in subsequent patch.
Also remove unnecessary function declarations in amd_iommu_proto.h.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Cc: Joerg Roedel
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 34 ++
arch/x86/events/amd/iommu.h | 7 --
drivers/iommu/amd_iommu_init.c | 53 ++---
drivers/iommu/amd_iommu_proto.h | 5
4 files changed, 52 insertions(+), 47 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index ec7e873..200d2e8 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -250,42 +250,36 @@ static void perf_iommu_enable_event(struct perf_event *ev)
{
u8 csource = _GET_CSOURCE(ev);
u16 devid = _GET_DEVID(ev);
+ u8 bank = _GET_BANK(ev);
+ u8 cntr = _GET_CNTR(ev);
u64 reg = 0ULL;
reg = csource;
- amd_iommu_pc_get_set_reg_val(devid,
- _GET_BANK(ev), _GET_CNTR(ev) ,
-IOMMU_PC_COUNTER_SRC_REG, ®, true);
+ amd_iommu_pc_set_reg(0, bank, cntr,
+IOMMU_PC_COUNTER_SRC_REG, ®);
reg = devid | (_GET_DEVID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_get_set_reg_val(devid,
- _GET_BANK(ev), _GET_CNTR(ev) ,
-IOMMU_PC_DEVID_MATCH_REG, ®, true);
+ amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_DEVID_MATCH_REG, ®);
reg = _GET_PASID(ev) | (_GET_PASID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_get_set_reg_val(devid,
- _GET_BANK(ev), _GET_CNTR(ev) ,
-IOMMU_PC_PASID_MATCH_REG, ®, true);
+ amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_PASID_MATCH_REG, ®);
reg = _GET_DOMID(ev) | (_GET_DOMID_MASK(ev) << 32);
if (reg)
reg |= BIT(31);
- amd_iommu_pc_get_set_reg_val(devid,
- _GET_BANK(ev), _GET_CNTR(ev) ,
-IOMMU_PC_DOMID_MATCH_REG, ®, true);
+ amd_iommu_pc_set_reg(0, bank, cntr, IOMMU_PC_DOMID_MATCH_REG, ®);
}
static void perf_iommu_disable_event(struct perf_event *event)
{
u64 reg = 0ULL;
- amd_iommu_pc_get_set_reg_val(_GET_DEVID(event),
- _GET_BANK(event), _GET_CNTR(event),
- IOMMU_PC_COUNTER_SRC_REG, ®, true);
+ amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
+IOMMU_PC_COUNTER_SRC_REG, ®);
}
static void perf_iommu_start(struct perf_event *event, int flags)
@@ -300,9 +294,8 @@ static void perf_iommu_start(struct perf_event *event, int
flags)
if (flags & PERF_EF_RELOAD) {
u64 prev_raw_count = local64_read(&hwc->prev_count);
- amd_iommu_pc_get_set_reg_val(_GET_DEVID(event),
- _GET_BANK(event), _GET_CNTR(event),
- IOMMU_PC_COUNTER_REG, &prev_raw_count, true);
+ amd_iommu_pc_set_reg(0, _GET_BANK(event), _GET_CNTR(event),
+IOMMU_PC_COUNTER_REG, &prev_raw_count);
}
perf_iommu_enable_event(event);
@@ -316,9 +309,8 @@ static void perf_iommu_read(struct perf_event *event)
s64 delta;
struct hw_perf_event *hwc = &event->hw;
- amd_iommu_pc_get_set_reg_val(_GET_DEVID(event),
- _GET_BANK(event), _GET_CNTR(event),
- IOMMU_PC_COUNTER_REG, &count, false);
+ amd_iommu_pc_get_reg(0, _GET_BANK(event), _GET_CNTR(event),
+IOMMU_PC_COUNTER_REG, &count);
/* IOMMU pc counter register is only 48 bits */
count &= GENMASK_ULL(48, 0);
diff --git a/arch/x86/events/amd/iommu.h b/arch/x86/events/amd/iommu.h
index cf3dd05..cd70921 100644
--- a/arch/x86/events/amd/iommu.h
+++ b/arch/x86/events/amd/iommu.h
@@ -33,7 +33,10 @@
extern u8 amd_iommu_pc_get_max_counters(unsigned int idx);
-extern int amd_iommu_pc_get_set_reg_val(u16 devid, u8 bank, u8 cntr,
- u8 fxn, u64 *value, bool is_write);
+extern int amd_iommu_pc_set_reg(unsigned int idx, u8 bank, u8 cntr,
+ u8 fxn, u64 *value);
+
+extern int amd_iommu_pc_get_reg(unsigned int idx, u8 bank, u8 cntr,
+ u8 fxn, u64 *value);
#endif /*_PERF_EVENT_AMD_IOMMU_H_*/
diff --git a/drivers/iommu/amd_iommu_init.c b/drivers/iommu/amd_iommu_init.c
index ed21307d..5b7fb6c 100644
--- a/drivers/iommu/amd
[PATCH v8 1/9] perf/amd/iommu: Declare pr_fmt and remove unnecessary pr_debug
Declare pr_fmt for perf/amd_iommu and remove unnecessary pr_debug.
Also check return value when _init_events_attrs fails.
Cc: Peter Zijlstra
Cc: Borislav Petkov
Signed-off-by: Suravee Suthikulpanit
---
arch/x86/events/amd/iommu.c | 20
1 file changed, 8 insertions(+), 12 deletions(-)
diff --git a/arch/x86/events/amd/iommu.c b/arch/x86/events/amd/iommu.c
index b28200d..44638d0 100644
--- a/arch/x86/events/amd/iommu.c
+++ b/arch/x86/events/amd/iommu.c
@@ -11,6 +11,8 @@
* published by the Free Software Foundation.
*/
+#define pr_fmt(fmt)"perf/amd_iommu: " fmt
+
#include
#include
#include
@@ -298,7 +300,6 @@ static void perf_iommu_start(struct perf_event *event, int
flags)
{
struct hw_perf_event *hwc = &event->hw;
- pr_debug("perf: amd_iommu:perf_iommu_start\n");
if (WARN_ON_ONCE(!(hwc->state & PERF_HES_STOPPED)))
return;
@@ -323,7 +324,6 @@ static void perf_iommu_read(struct perf_event *event)
u64 prev_raw_count = 0ULL;
u64 delta = 0ULL;
struct hw_perf_event *hwc = &event->hw;
- pr_debug("perf: amd_iommu:perf_iommu_read\n");
amd_iommu_pc_get_set_reg_val(_GET_DEVID(event),
_GET_BANK(event), _GET_CNTR(event),
@@ -349,8 +349,6 @@ static void perf_iommu_stop(struct perf_event *event, int
flags)
struct hw_perf_event *hwc = &event->hw;
u64 config;
- pr_debug("perf: amd_iommu:perf_iommu_stop\n");
-
if (hwc->state & PERF_HES_UPTODATE)
return;
@@ -372,7 +370,6 @@ static int perf_iommu_add(struct perf_event *event, int
flags)
struct perf_amd_iommu *perf_iommu =
container_of(event->pmu, struct perf_amd_iommu, pmu);
- pr_debug("perf: amd_iommu:perf_iommu_add\n");
event->hw.state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
/* request an iommu bank/counter */
@@ -393,7 +390,6 @@ static void perf_iommu_del(struct perf_event *event, int
flags)
struct perf_amd_iommu *perf_iommu =
container_of(event->pmu, struct perf_amd_iommu, pmu);
- pr_debug("perf: amd_iommu:perf_iommu_del\n");
perf_iommu_stop(event, PERF_EF_UPDATE);
/* clear the assigned iommu bank/counter */
@@ -444,24 +440,24 @@ static __init int _init_perf_amd_iommu(
raw_spin_lock_init(&perf_iommu->lock);
- /* Init format attributes */
perf_iommu->format_group = &amd_iommu_format_group;
/* Init cpumask attributes to only core 0 */
cpumask_set_cpu(0, &iommu_cpumask);
perf_iommu->cpumask_group = &amd_iommu_cpumask_group;
- /* Init events attributes */
- if (_init_events_attrs(perf_iommu) != 0)
- pr_err("perf: amd_iommu: Only support raw events.\n");
+ ret = _init_events_attrs(perf_iommu);
+ if (ret) {
+ pr_err("Error initializing AMD IOMMU perf events.\n");
+ return ret;
+ }
- /* Init null attributes */
perf_iommu->null_group = NULL;
perf_iommu->pmu.attr_groups = perf_iommu->attr_groups;
ret = perf_pmu_register(&perf_iommu->pmu, name, -1);
if (ret) {
- pr_err("perf: amd_iommu: Failed to initialized.\n");
+ pr_err("Error initializing AMD IOMMU perf counters.\n");
amd_iommu_pc_exit();
} else {
pr_info("perf: amd_iommu: Detected. (%d banks, %d
counters/bank)\n",
--
1.8.3.1
[PATCH v8 0/9] perf/amd/iommu: Enable multi-IOMMU support
From: Suravee Suthikulpanit This patch series modifies the existing IOMMU and Perf drivers to support systems with multiple IOMMUs by allocating an amd_iommu PMU per IOMMU instance. This allows users to specify performance events and filters separately for each IOMMU. This has been tested on the new family17h-based server w/ multiple IOMMUs. Git branch containing this patch series is available here: https://github.com/ssuthiku/linux.git perf-iommu-v8 Changes from V7 (https://lkml.org/lkml/2017/1/9/917) * Re-order patches to clean up first before introducing new stuff. * Always use amd_iommu_get_num_iommus() to access amd_iommus_present variable now. * Fix Perf IOMMU sysfs attributes initialization. * Miscellaneous clean up Changes from V6 (https://lkml.org/lkml/2016/12/23/134) * Renamed function parameters from devid to idx (per Joerg). * Removed unnecessary function declarations from amd_iommu_proto.h (per Joerg). Changes from V5 (https://lkml.org/lkml/2016/2/23/370) * Rebased onto v4.9. * Remove the patch which consolidates function delclarations since we have not yet agreed on the appropriate place for the new header file. Thanks, Suravee Suravee Suthikulpanit (9): perf/amd/iommu: Declare pr_fmt and remove unnecessary pr_debug perf/amd/iommu: Clean up perf_iommu_enable_event perf/amd/iommu: Misc fix up perf_iommu_read iommu/amd: Introduce amd_iommu_get_num_iommus() perf/amd/iommu: Modify functions to query max banks and counters perf/amd/iommu: Modify amd_iommu_pc_get_set_reg_val() API to allow specifying IOMMU index perf/amd/iommu: Check return value when set and get counter value perf/amd/iommu: Fix sysfs perf attribute groups perf/amd/iommu: Enable support for multiple IOMMUs arch/x86/events/amd/iommu.c | 280 arch/x86/events/amd/iommu.h | 16 ++- drivers/iommu/amd_iommu.c | 6 +- drivers/iommu/amd_iommu_init.c | 100 +- drivers/iommu/amd_iommu_proto.h | 8 +- drivers/iommu/amd_iommu_types.h | 3 - 6 files changed, 217 insertions(+), 196 deletions(-) -- 1.8.3.1
[PATCH 1/1] iommu/arm-smmu: Fix for ThunderX erratum #27704
The goal of erratum #27704 workaround was to make sure that ASIDs and VMIDs
are unique across all SMMU instances on affected Cavium systems.
Currently, the workaround code partitions ASIDs and VMIDs by increasing
global cavium_smmu_context_count which in turn becomes the base ASID and VMID
value for the given SMMU instance upon the context bank initialization.
For systems with multiple SMMU instances this approach implies the risk
of crossing 8-bit ASID, like for 1-socket CN88xx capable of 4 SMMUv2,
128 context banks each:
SMMU_0 (0-127 ASID RANGE)
SMMU_1 (127-255 ASID RANGE)
SMMU_2 (256-383 ASID RANGE) <--- crossing 8-bit ASID
SMMU_3 (384-511 ASID RANGE) <--- crossing 8-bit ASID
Since now we use 8-bit ASID (SMMU_CBn_TCR2.AS = 0) we effectively misconfigure
ASID[15:8] bits of SMMU_CBn_TTBRm register for SMMU_2/3. Moreover, we still
assume non-zero ASID[15:8] bits upon context invalidation. In the end,
except SMMU_0/1 devices all other devices under other SMMUs will fail on guest
power off/on. Since we try to invalidate TLB with 16-bit ASID but we actually
have 8-bit zero padded 16-bit entry.
This patch adds 16-bit ASID support for stage-1 AArch64 contexts so that
we use ASIDs consistently for all SMMU instances.
Signed-off-by: Tomasz Nowicki
Reviewed-by: Robin Murphy
Reviewed-by: Tirumalesh Chalamarla
---
drivers/iommu/arm-smmu.c | 3 +++
1 file changed, 3 insertions(+)
diff --git a/drivers/iommu/arm-smmu.c b/drivers/iommu/arm-smmu.c
index a60cded..476fab9 100644
--- a/drivers/iommu/arm-smmu.c
+++ b/drivers/iommu/arm-smmu.c
@@ -260,6 +260,7 @@ enum arm_smmu_s2cr_privcfg {
#define TTBCR2_SEP_SHIFT 15
#define TTBCR2_SEP_UPSTREAM(0x7 << TTBCR2_SEP_SHIFT)
+#define TTBCR2_AS (1 << 4)
#define TTBRn_ASID_SHIFT 48
@@ -778,6 +779,8 @@ static void arm_smmu_init_context_bank(struct
arm_smmu_domain *smmu_domain,
reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr;
reg2 = pgtbl_cfg->arm_lpae_s1_cfg.tcr >> 32;
reg2 |= TTBCR2_SEP_UPSTREAM;
+ if (cfg->fmt == ARM_SMMU_CTX_FMT_AARCH64)
+ reg2 |= TTBCR2_AS;
}
if (smmu->version > ARM_SMMU_V1)
writel_relaxed(reg2, cb_base + ARM_SMMU_CB_TTBCR2);
--
2.7.4
Re: sctp: kernel memory overwrite attempt detected in sctp_getsockopt_assoc_stats
On Sun, Jan 15, 2017 at 9:35 PM, Neil Horman wrote:
> On Sun, Jan 15, 2017 at 06:29:59PM +0100, Dmitry Vyukov wrote:
>> Hello,
>>
>> I've enabled CONFIG_HARDENED_USERCOPY_PAGESPAN on syzkaller fuzzer and
>> now I am seeing lots of:
>>
> If I'm not mistaken, its because thats specifically what that option does.
> From
> the Kconfig:
> onfig HARDENED_USERCOPY_PAGESPAN
> bool "Refuse to copy allocations that span multiple pages"
> depends on HARDENED_USERCOPY
> depends on EXPERT
> help
> When a multi-page allocation is done without __GFP_COMP,
> hardened usercopy will reject attempts to copy it. There are,
> however, several cases of this in the kernel that have not all
> been removed. This config is intended to be used only while
> trying to find such users.
>
> So, if the fuzzer does a setsockopt and the data it passes crosses a page
> boundary, it seems like this will get triggered. Based on the fact that its
> only used to find users that do this, it seems like not the sort of thing that
> you want enabled while running a fuzzer that might do it arbitrarily.
The code also takes into account compound pages. As far as I
understand the intention of the check is to effectively find
out-of-bounds copies (e.g. goes beyond the current heap allocation). I
would expect that stacks are allocated as compound pages and don't
trigger this check. I don't see it is firing in other similar places.
>> usercopy: kernel memory overwrite attempt detected to 8801a74f6f10
>> () (256 bytes)
>>
>> kernel BUG at mm/usercopy.c:75!
>> invalid opcode: [#1] SMP KASAN
>> Dumping ftrace buffer:
>>(ftrace buffer empty)
>> Modules linked in:
>> CPU: 1 PID: 15686 Comm: syz-executor3 Not tainted 4.9.0 #1
>> Hardware name: Google Google Compute Engine/Google Compute Engine,
>> BIOS Google 01/01/2011
>> task: 8801c89b2500 task.stack: 8801a74f
>> RIP: 0010:[] [] report_usercopy
>> mm/usercopy.c:67 [inline]
>> RIP: 0010:[] []
>> __check_object_size+0x2d1/0x9ec mm/usercopy.c:278
>> RSP: 0018:8801a74f6cd0 EFLAGS: 00010286
>> RAX: 006b RBX: 84500120 RCX:
>> RDX: 006b RSI: 815a7791 RDI: ed0034e9ed8c
>> RBP: 8801a74f6e48 R08: 0001 R09:
>> R10: R11: 0001 R12: 8801a74f6f10
>> R13: 0100 R14: 845000e0 R15: 8801a74f700f
>> FS: 7f80918de700() GS:8801dc10() knlGS:
>> CS: 0010 DS: ES: CR0: 80050033
>> CR2: 20058ffc CR3: 0001cc1cc000 CR4: 001406e0
>> Stack:
>> 8598fcc8 77ff8000 ea0005c99608
>> 844fff40 844fff40 41b58ab3 84ae0fa0
>> 81a1ad70 8801c89b2500 dead0100 814d4425
>> Call Trace:
>> [] check_object_size include/linux/thread_info.h:129
>> [inline]
>> [] copy_from_user arch/x86/include/asm/uaccess.h:692
>> [inline]
>> [] sctp_getsockopt_assoc_stats+0x169/0xa10
>> net/sctp/socket.c:6182
>> [] sctp_getsockopt+0x1af2/0x66a0 net/sctp/socket.c:6556
>> [] sock_common_getsockopt+0x95/0xd0 net/core/sock.c:2649
>> [] SYSC_getsockopt net/socket.c:1788 [inline]
>> [] SyS_getsockopt+0x240/0x380 net/socket.c:1770
>> [] do_syscall_64+0x2e8/0x930 arch/x86/entry/common.c:280
>> [] entry_SYSCALL64_slow_path+0x25/0x25
>> Code: b0 fe ff ff e8 e1 25 ce ff 48 8b 85 b0 fe ff ff 4d 89 e9 4c 89
>> e1 4c 89 f2 48 89 de 48 c7 c7 a0 01 50 84 49 89 c0 e8 51 d9 e0 ff <0f>
>> 0b e8 b8 25 ce ff 4c 89 f2 4c 89 ee 4c 89 e7 e8 6a 1b fc ff
>> RIP [] report_usercopy mm/usercopy.c:67 [inline]
>> RIP [] __check_object_size+0x2d1/0x9ec mm/usercopy.c:278
>> RSP
>> ---[ end trace 5e438996b2c0b35d ]---
>>
>>
>> I am not sure why check_object_size flags this an a bug,
>> copy_from_user copies into a stack object:
>>
>> static int sctp_getsockopt_assoc_stats(struct sock *sk, int len,
>>char __user *optval,
>>int __user *optlen)
>> {
>> struct sctp_assoc_stats sas;
>> len = min_t(size_t, len, sizeof(sas));
>> if (copy_from_user(&sas, optval, len))
>> return -EFAULT;
>>
>> Kees, can this be a false positive?
>>
>> On commit f4d3935e4f4884ba80561db5549394afb8eef8f7.
>>
Re: [PATCH v1 1/3] dt: bindings: add documentation for zx2967 family reset controller
On Sat, Jan 14, 2017 at 03:05:28PM +0800, Baoyou Xie wrote: > This patch adds dt-binding documentation for zx2967 family > reset controller. > > Signed-off-by: Baoyou Xie Reviewed-by: Shawn Guo
[PATCH V2] Staging: media: bcm2048: style fix - bare use of unsigned
Changed macro to not pass signedness and size as seprate fields.
This is to improve code readablity.
Signed-off-by: Derek Robson
---
version #1 broke the build because I missunderstood the output of checkpatch.
drivers/staging/media/bcm2048/radio-bcm2048.c | 48 +--
1 file changed, 24 insertions(+), 24 deletions(-)
diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.c
b/drivers/staging/media/bcm2048/radio-bcm2048.c
index 37bd439ee08b..db889c0943d5 100644
--- a/drivers/staging/media/bcm2048/radio-bcm2048.c
+++ b/drivers/staging/media/bcm2048/radio-bcm2048.c
@@ -1992,8 +1992,8 @@ static ssize_t bcm2048_##prop##_read(struct device *dev,
\
return sprintf(buf, mask "\n", value); \
}
-#define DEFINE_SYSFS_PROPERTY(prop, signal, size, mask, check) \
-property_write(prop, signal size, mask, check) \
+#define DEFINE_SYSFS_PROPERTY(prop, size, mask, check) \
+property_write(prop, size, mask, check)\
property_read(prop, size, mask)
#define property_str_read(prop, size) \
@@ -2020,27 +2020,27 @@ static ssize_t bcm2048_##prop##_read(struct device
*dev,\
return count; \
}
-DEFINE_SYSFS_PROPERTY(power_state, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(mute, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(audio_route, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(dac_output, unsigned, int, "%u", 0)
-
-DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned, int, "%u", value > 3)
-
-DEFINE_SYSFS_PROPERTY(rds, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_wline, unsigned, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(power_state, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(mute, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, "%u", 0)
+
+DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned int, "%u", value > 3)
+
+DEFINE_SYSFS_PROPERTY(rds, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_wline, unsigned int, "%u", 0)
property_read(rds_pi, unsigned int, "%x")
property_str_read(rds_rt, (BCM2048_MAX_RDS_RT + 1))
property_str_read(rds_ps, (BCM2048_MAX_RDS_PS + 1))
@@ -2052,7 +2052,7 @@ property_read(region_bottom_frequency, unsigned int, "%u")
property_read(region_top_frequency, unsigned int, "%u")
property_signed_read(fm_carrier_error, int, "%d")
property_signed_read(fm_rssi, int, "%d")
-DEFINE_SYSFS_PROPERTY(region, unsigned, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(region, unsigned int, "%u", 0)
static struct device_attribute attrs[] = {
__ATTR(power_state, 0644, bcm2048_power_state_read,
--
2.11.0
[PATCH] slab: add a check for the first kmem_cache not to be destroyed
The first kmem_cache created at booting up is supposed neither mergeable nor destroyable but was possible to destroy. So prevent it. Signed-off-by: Kyunghwan Kwon --- mm/slab_common.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/mm/slab_common.c b/mm/slab_common.c index 1dfc209..2d30ace 100644 --- a/mm/slab_common.c +++ b/mm/slab_common.c @@ -744,7 +744,7 @@ void kmem_cache_destroy(struct kmem_cache *s) bool need_rcu_barrier = false; int err; - if (unlikely(!s)) + if (unlikely(!s) || s->refcount == -1) return; get_online_cpus(); -- 2.9.3 (Apple Git-75)
Re: [HMM v16 04/15] mm/ZONE_DEVICE/unaddressable: add support for un-addressable device memory v2
On Thu, Jan 12, 2017 at 8:30 AM, Jérôme Glisse wrote:
> This add support for un-addressable device memory. Such memory is hotpluged
> only so we can have struct page but we should never map them as such memory
> can not be accessed by CPU. For that reason it uses a special swap entry for
> CPU page table entry.
>
> This patch implement all the logic from special swap type to handling CPU
> page fault through a callback specified in the ZONE_DEVICE pgmap struct.
>
> Architecture that wish to support un-addressable device memory should make
> sure to never populate the kernel linar mapping for the physical range.
>
> This feature potentially breaks memory hotplug unless every driver using it
> magically predicts the future addresses of where memory will be hotplugged.
>
> Changed since v1:
> - Add unaddressable memory resource descriptor enum
> - Explain why memory hotplug can fail because of un-addressable memory
How can we merge this with a known potential regression?
>
> Signed-off-by: Jérôme Glisse
> Cc: Dan Williams
> Cc: Ross Zwisler
> ---
> drivers/dax/pmem.c| 4 +--
> drivers/nvdimm/pmem.c | 6 ++--
> fs/proc/task_mmu.c| 10 +-
> include/linux/ioport.h| 1 +
> include/linux/memory_hotplug.h| 7
> include/linux/memremap.h | 29 +++--
> include/linux/swap.h | 18 +--
> include/linux/swapops.h | 67
> +++
> kernel/memremap.c | 43 +++--
> mm/Kconfig| 12 +++
> mm/memory.c | 64 -
> mm/memory_hotplug.c | 10 --
> mm/mprotect.c | 12 +++
> tools/testing/nvdimm/test/iomap.c | 3 +-
> 14 files changed, 269 insertions(+), 17 deletions(-)
>
> diff --git a/drivers/dax/pmem.c b/drivers/dax/pmem.c
> index 66af7b1..c50b58d 100644
> --- a/drivers/dax/pmem.c
> +++ b/drivers/dax/pmem.c
> @@ -111,8 +111,8 @@ static int dax_pmem_probe(struct device *dev)
> if (rc)
> return rc;
>
> - addr = devm_memremap_pages(dev, &res, &dax_pmem->ref,
> - altmap, NULL, NULL);
> + addr = devm_memremap_pages(dev, &res, &dax_pmem->ref, altmap,
> + NULL, NULL, NULL, NULL, MEMORY_DEVICE);
> if (IS_ERR(addr))
> return PTR_ERR(addr);
>
> diff --git a/drivers/nvdimm/pmem.c b/drivers/nvdimm/pmem.c
> index f2f1904..8166a56 100644
> --- a/drivers/nvdimm/pmem.c
> +++ b/drivers/nvdimm/pmem.c
> @@ -282,7 +282,8 @@ static int pmem_attach_disk(struct device *dev,
> pmem->pfn_flags = PFN_DEV;
> if (is_nd_pfn(dev)) {
> addr = devm_memremap_pages(dev, &pfn_res, &q->q_usage_counter,
> - altmap, NULL, NULL);
> + altmap, NULL, NULL, NULL,
> + NULL, MEMORY_DEVICE);
> pfn_sb = nd_pfn->pfn_sb;
> pmem->data_offset = le64_to_cpu(pfn_sb->dataoff);
> pmem->pfn_pad = resource_size(res) - resource_size(&pfn_res);
> @@ -292,7 +293,8 @@ static int pmem_attach_disk(struct device *dev,
> } else if (pmem_should_map_pages(dev)) {
> addr = devm_memremap_pages(dev, &nsio->res,
>&q->q_usage_counter,
> - NULL, NULL, NULL);
> + NULL, NULL, NULL, NULL,
> + NULL, MEMORY_DEVICE);
> pmem->pfn_flags |= PFN_MAP;
> } else
> addr = devm_memremap(dev, pmem->phys_addr,
> diff --git a/fs/proc/task_mmu.c b/fs/proc/task_mmu.c
> index 958f325..9a6ab71 100644
> --- a/fs/proc/task_mmu.c
> +++ b/fs/proc/task_mmu.c
> @@ -535,8 +535,11 @@ static void smaps_pte_entry(pte_t *pte, unsigned long
> addr,
> } else {
> mss->swap_pss += (u64)PAGE_SIZE << PSS_SHIFT;
> }
> - } else if (is_migration_entry(swpent))
> + } else if (is_migration_entry(swpent)) {
> page = migration_entry_to_page(swpent);
> + } else if (is_device_entry(swpent)) {
> + page = device_entry_to_page(swpent);
> + }
> } else if (unlikely(IS_ENABLED(CONFIG_SHMEM) && mss->check_shmem_swap
> && pte_none(*pte))) {
> page = find_get_entry(vma->vm_file->f_mapping,
> @@ -699,6 +702,8 @@ static int smaps_hugetlb_range(pte_t *pte, unsigned long
> hmask,
>
> if (is_migration_entry(swpent))
> page = migration_entry_to_page(swpent);
> + if (is_device_en
Re: [PATCH v4 3/3] thermal: zx2967: add thermal driver for ZTE's zx2967 family
On Fri, Jan 13, 2017 at 06:46:58PM +0800, Baoyou Xie wrote: > This patch adds thermal driver for ZTE's zx2967 family. > > Signed-off-by: Baoyou Xie Reviewed-by: Shawn Guo
Re: [PATCH v2 2/2] ocfs2: fix deadlock issue when taking inode lock at vfs entry points
On 01/16/2017 02:42 PM, Eric Ren wrote:
> Commit 743b5f1434f5 ("ocfs2: take inode lock in ocfs2_iop_set/get_acl()")
> results in a deadlock, as the author "Tariq Saeed" realized shortly
> after the patch was merged. The discussion happened here
> (https://oss.oracle.com/pipermail/ocfs2-devel/2015-September/011085.html).
>
> The reason why taking cluster inode lock at vfs entry points opens up
> a self deadlock window, is explained in the previous patch of this
> series.
>
> So far, we have seen two different code paths that have this issue.
> 1. do_sys_open
> may_open
> inode_permission
>ocfs2_permission
> ocfs2_inode_lock() <=== take PR
> generic_permission
> get_acl
>ocfs2_iop_get_acl
> ocfs2_inode_lock() <=== take PR
> 2. fchmod|fchmodat
> chmod_common
> notify_change
> ocfs2_setattr <=== take EX
>posix_acl_chmod
> get_acl
> ocfs2_iop_get_acl <=== take PR
> ocfs2_iop_set_acl <=== take EX
>
> Fixes them by adding the tracking logic (in the previous patch) for
> these funcs above, ocfs2_permission(), ocfs2_iop_[set|get]_acl(),
> ocfs2_setattr().
>
> Changes since v1:
> 1. Let ocfs2_is_locked_by_me() just return true/false to indicate if the
> process gets the cluster lock - suggested by: Joseph Qi
> and Junxiao Bi .
>
> 2. Change "struct ocfs2_holder" to a more meaningful name "ocfs2_lock_holder",
> suggested by: Junxiao Bi .
>
> 3. Add debugging output at ocfs2_setattr() and ocfs2_permission() to
> catch exceptional cases, suggested by: Junxiao Bi .
>
> Signed-off-by: Eric Ren
> ---
> fs/ocfs2/acl.c | 39 +
> fs/ocfs2/file.c | 76
> +
> 2 files changed, 100 insertions(+), 15 deletions(-)
>
> diff --git a/fs/ocfs2/acl.c b/fs/ocfs2/acl.c
> index bed1fcb..3e47262 100644
> --- a/fs/ocfs2/acl.c
> +++ b/fs/ocfs2/acl.c
> @@ -284,16 +284,31 @@ int ocfs2_iop_set_acl(struct inode *inode, struct
> posix_acl *acl, int type)
> {
> struct buffer_head *bh = NULL;
> int status = 0;
> -
> - status = ocfs2_inode_lock(inode, &bh, 1);
> + int arg_flags = 0, has_locked;
> + struct ocfs2_lock_holder oh;
> + struct ocfs2_lock_res *lockres;
> +
> + lockres = &OCFS2_I(inode)->ip_inode_lockres;
> + has_locked = ocfs2_is_locked_by_me(lockres);
> + if (has_locked)
> + arg_flags = OCFS2_META_LOCK_GETBH;
> + status = ocfs2_inode_lock_full(inode, &bh, 1, arg_flags);
> if (status < 0) {
> if (status != -ENOENT)
> mlog_errno(status);
> return status;
> }
> + if (!has_locked)
> + ocfs2_add_holder(lockres, &oh);
> +
Same code pattern showed here and *get_acl, can it be abstracted to one
function?
The same issue for *setattr and *permission. Sorry for not mention that
in last review.
Thanks,
Junxiao.
> status = ocfs2_set_acl(NULL, inode, bh, type, acl, NULL, NULL);
> - ocfs2_inode_unlock(inode, 1);
> +
> + if (!has_locked) {
> + ocfs2_remove_holder(lockres, &oh);
> + ocfs2_inode_unlock(inode, 1);
> + }
> brelse(bh);
> +
> return status;
> }
>
> @@ -303,21 +318,35 @@ struct posix_acl *ocfs2_iop_get_acl(struct inode
> *inode, int type)
> struct buffer_head *di_bh = NULL;
> struct posix_acl *acl;
> int ret;
> + int arg_flags = 0, has_locked;
> + struct ocfs2_lock_holder oh;
> + struct ocfs2_lock_res *lockres;
>
> osb = OCFS2_SB(inode->i_sb);
> if (!(osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL))
> return NULL;
> - ret = ocfs2_inode_lock(inode, &di_bh, 0);
> +
> + lockres = &OCFS2_I(inode)->ip_inode_lockres;
> + has_locked = ocfs2_is_locked_by_me(lockres);
> + if (has_locked)
> + arg_flags = OCFS2_META_LOCK_GETBH;
> + ret = ocfs2_inode_lock_full(inode, &di_bh, 0, arg_flags);
> if (ret < 0) {
> if (ret != -ENOENT)
> mlog_errno(ret);
> return ERR_PTR(ret);
> }
> + if (!has_locked)
> + ocfs2_add_holder(lockres, &oh);
>
> acl = ocfs2_get_acl_nolock(inode, type, di_bh);
>
> - ocfs2_inode_unlock(inode, 0);
> + if (!has_locked) {
> + ocfs2_remove_holder(lockres, &oh);
> + ocfs2_inode_unlock(inode, 0);
> + }
> brelse(di_bh);
> +
> return acl;
> }
>
> diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c
> index c488965..b620c25 100644
> --- a/fs/ocfs2/file.c
> +++ b/fs/ocfs2/file.c
> @@ -1138,6 +1138,9 @@ int ocfs2_setattr(struct dentry *dentry, struct iattr
> *attr)
> handle_t *handle = NULL;
> struct dquot *transfer_to[MAXQUOTAS] = { };
> int qtype;
> + int arg_flags = 0, had_lock;
> + struct ocfs2_lock_holder oh;
> + struct ocfs2_lock_res *lockres;
>
> trace_ocfs2_setattr(inode, dentry,
>
Re: [PATCH tip/core/rcu 2/3] srcu: Force full grace-period ordering
* Paul E. McKenney wrote: > On Sun, Jan 15, 2017 at 10:40:58AM +0100, Ingo Molnar wrote: > > > > * Paul E. McKenney wrote: > > > > > > [sounds of rummaging around in the Git tree] > > > > > > > > I found this commit of yours from ancient history (more than a year > > > > ago!): > > > > > > > > commit 12d560f4ea87030667438a169912380be00cea4b > > > > Author: Paul E. McKenney > > > > Date: Tue Jul 14 18:35:23 2015 -0700 > > > > > > > > rcu,locking: Privatize smp_mb__after_unlock_lock() > > > > > > > > RCU is the only thing that uses smp_mb__after_unlock_lock(), and is > > > > likely the only thing that ever will use it, so this commit makes > > > > this > > > > macro private to RCU. > > > > > > > > Signed-off-by: Paul E. McKenney > > > > Cc: Will Deacon > > > > Cc: Peter Zijlstra > > > > Cc: Benjamin Herrenschmidt > > > > Cc: "linux-a...@vger.kernel.org" > > > > > > > > So I concur and I'm fine with your patch - or with the status quo code > > > > as well. > > > > > > I already have the patch queued, so how about I keep it if I get an ack > > > from the powerpc guys and drop it otherwise? > > > > Yeah, sounds good! Your patch made me look up 'RelAcq' so it has > > documentation > > value as well ;-) > > ;-) ;-) ;-) > > Looking forward, my guess would be that if some other code needs > smp_mb__after_unlock_lock() or if some other architecture needs > non-smb_mb() special handling, I should consider making it work the > same as smp_mb__after_atomic() and friends. Does that seem like a > reasonable thought? Yeah, absolutely - it's just that the pattern triggered the 'this looks a bit too specialized' response in me, but after seeing the details (again ...) I agree that this time is different! Thanks, Ingo
Re: [PATCH V2 6/6] gpio: davinci: Remove redundant macros
Linus,
On Friday 13 January 2017 09:50 AM, Keerthy wrote:
Some of the macros were needed as per old driver design.
With the current implementation they are unwanted. Hence remove
them.
Seems like Macros are being used in:
arch/arm/mach-davinci/board-neuros-osd2.c
So this patch can be dropped from the series.
Signed-off-by: Keerthy
---
include/linux/platform_data/gpio-davinci.h | 8
1 file changed, 8 deletions(-)
diff --git a/include/linux/platform_data/gpio-davinci.h
b/include/linux/platform_data/gpio-davinci.h
index 90ae19c..f922601 100644
--- a/include/linux/platform_data/gpio-davinci.h
+++ b/include/linux/platform_data/gpio-davinci.h
@@ -45,14 +45,6 @@ struct davinci_gpio_controller {
unsigned intbase;
};
-/*
- * basic gpio routines
- */
-#defineGPIO(X) (X) /* 0 <= X <= (DAVINCI_N_GPIO - 1) */
-
-/* Convert GPIO signal to GPIO pin number */
-#define GPIO_TO_PIN(bank, gpio)(16 * (bank) + (gpio))
-
static inline u32 __gpio_mask(unsigned gpio)
{
return 1 << (gpio % 32);
Re: [GIT RFC PULL rcu/urgent] Make RCU synchronous grace periods work throughout boot
* Paul E. McKenney wrote:
> Hello, Ingo,
>
> This series contains a pair of commits that permit RCU synchronous grace
> periods (synchronize_rcu() and friends) to work correctly throughout boot.
> This eliminates the current "dead time" starting when the scheduler spawns
> its first taks and ending when the last of RCU's kthreads is spawned
> (this last happens during early_initcall() time). Although RCU's
> synchronous grace periods have long been documented as not working
> during this time, prior to 4.9, the expedited grace periods worked by
> accident, and some ACPI code came to rely on this unintentional behavior.
> (Note that this unintentional behavior was -not- reliable. For example,
> failures from ACPI could occur on !SMP systems and on systems booting
> with the rcu_normal kernel boot parameter.)
>
> Either way, there is a bug that needs fixing, and the 4.9 switch of RCU's
> expedited grace periods to workqueues could be considered to have caused
> a regression. This series therefore makes RCU's expedited grace periods
> operate correctly throughout the boot process. This has been demonstrated
> to fix the problems ACPI was encountering, and has the added longer-term
> benefit of simplifying RCU's behavior. I am therefore submitting this
> RFC pull request for your consideration despite it being rather late in
> the 4.10 process.
>
> Please see the commit log of 52d7e48b86fc ("rcu: Narrow early boot
> window of illegal synchronous grace periods") for more information on
> the regression and the fix to RCU.
>
> The following changes since commit a121103c922847ba5010819a3f250f1f7fc84ab8:
>
> Linux 4.10-rc3 (2017-01-08 14:18:17 -0800)
>
> are available in the git repository at:
>
> git://git.kernel.org/pub/scm/linux/kernel/git/paulmck/linux-rcu.git
> rcu/urgent
>
> for you to fetch changes up to 52d7e48b86fc108e45a656d8e53e4237993c481d:
>
> rcu: Narrow early boot window of illegal synchronous grace periods
> (2017-01-14 21:23:48 -0800)
>
>
> Paul E. McKenney (2):
> rcu: Remove cond_resched() from Tiny synchronize_sched()
> rcu: Narrow early boot window of illegal synchronous grace periods
>
> include/linux/rcupdate.h | 4
> kernel/rcu/rcu.h | 1 +
> kernel/rcu/tiny.c| 4
> kernel/rcu/tiny_plugin.h | 9 +++--
> kernel/rcu/tree.c| 33 ++
> kernel/rcu/tree_exp.h| 52
> ++--
> kernel/rcu/tree_plugin.h | 2 +-
> kernel/rcu/update.c | 38 +++
> 8 files changed, 104 insertions(+), 39 deletions(-)
Pulled into tip:rcu/urgent, thanks a lot Paul! I'll get this to Linus ASAP.
Ingo
Re: [PATCH] pcie: ti: Provide patch to force GEN1 PCIe operation
Hi Kishon,
> Hi,
>
> On Sunday 15 January 2017 06:49 PM, Lukasz Majewski wrote:
> > Some devices (due to e.g. bad PCIe signal integrity) require to run
> > with forced GEN1 speed on PCIe bus.
> >
> > This patch changes the speed explicitly on dra7 based devices when
> > proper device tree attribute is defined for the PCIe controller.
> >
> > Signed-off-by: Lukasz Majewski
>
> Bjorn has already queued a patch to do the same thing
> https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-dra7xx
It seems like Bjorn only modifies CAP registers.
He also needs to change register with 0x080C offset to actually
( PCIECTRL_PL_WIDTH_SPEED_CTL )
Best regards,
Łukasz
>
> Thanks
> Kishon
>
> > ---
> >
> > Patch applies on newest origin/master
> > SHA1: f4d3935e4f4884ba80561db5549394afb8eef8f7
> >
> > Tested at AM5728
> >
> > ---
> > Documentation/devicetree/bindings/pci/ti-pci.txt | 1 +
> > drivers/pci/host/pci-dra7xx.c| 23
> > +++
> > drivers/pci/host/pcie-designware.h | 1 + 3 files
> > changed, 25 insertions(+)
> >
> > diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt
> > b/Documentation/devicetree/bindings/pci/ti-pci.txt index
> > 60e2516..9f97409 100644 ---
> > a/Documentation/devicetree/bindings/pci/ti-pci.txt +++
> > b/Documentation/devicetree/bindings/pci/ti-pci.txt @@ -25,6 +25,7
> > @@ PCIe Designware Controller
> > Optional Property:
> > - gpios : Should be added if a gpio line is required to drive
> > PERST# line
> > + - to,pcie-is-gen1: Indicates that forced gen1 port operation is
> > needed.
> > Example:
> > axi {
> > diff --git a/drivers/pci/host/pci-dra7xx.c
> > b/drivers/pci/host/pci-dra7xx.c index 9595fad..eec5fae 100644
> > --- a/drivers/pci/host/pci-dra7xx.c
> > +++
> > b/drivers/pci/host/pci-https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-dra7xxdra7xx.c
> > @@ -63,6 +63,13 @@ #define
> > LINK_UP BIT(16)
> > #define
> > DRA7XX_CPU_TO_BUS_ADDR 0x0FFF
> > +#define PCIECTRL_EP_DBICS_LNK_CAP
> > 0x007C +#define
> > MAX_LINK_SPEEDS_MASKGENMASK(3, 0)
> > +#define MAX_LINK_SPEEDS_GEN1
> > BIT(0) + +#define
> > PCIECTRL_PL_WIDTH_SPEED_CTL 0x080C
> > +#define CFG_DIRECTED_SPEED_CHANGE
> > BIT(17) + struct dra7xx_pcie { struct pcie_port pp;
> > void __iomem*base; /* DT
> > ti_conf */ @@ -270,6 +277,7 @@ static int __init
> > dra7xx_add_pcie_port(struct dra7xx_pcie *dra7xx, struct pcie_port
> > *pp = &dra7xx->pp; struct device *dev = pp->dev;
> > struct resource *res;
> > + u32 val;
> >
> > pp->irq = platform_get_irq(pdev, 1);
> > if (pp->irq < 0) {
> > @@ -296,6 +304,18 @@ static int __init dra7xx_add_pcie_port(struct
> > dra7xx_pcie *dra7xx, if (!pp->dbi_base)
> > return -ENOMEM;
> >
> > + if (pp->is_gen1) {
> > + dev_info(dev, "GEN1 forced\n");
> > +
> > + val = readl(pp->dbi_base +
> > PCIECTRL_EP_DBICS_LNK_CAP);
> > + set_mask_bits(&val, MAX_LINK_SPEEDS_MASK,
> > MAX_LINK_SPEEDS_GEN1);
> > + writel(val, pp->dbi_base +
> > PCIECTRL_EP_DBICS_LNK_CAP); +
> > + val = readl(pp->dbi_base +
> > PCIECTRL_PL_WIDTH_SPEED_CTL);
> > + val &= ~CFG_DIRECTED_SPEED_CHANGE;
> > + writel(val, pp->dbi_base +
> > PCIECTRL_PL_WIDTH_SPEED_CTL);
> > + }
> > +
> > ret = dw_pcie_host_init(pp);
> > if (ret) {
> > dev_err(dev, "failed to initialize host\n");
> > @@ -404,6 +424,9 @@ static int __init dra7xx_pcie_probe(struct
> > platform_device *pdev) goto err_gpio;
> > }
> >
> > + if (of_property_read_bool(np, "ti,pcie-is-gen1"))
> > + pp->is_gen1 = true;
> > +
> > reg = dra7xx_pcie_readl(dra7xx,
> > PCIECTRL_DRA7XX_CONF_DEVICE_CMD); reg &= ~LTSSM_EN;
> > dra7xx_pcie_writel(dra7xx,
> > PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg); diff --git
> > a/drivers/pci/host/pcie-designware.h
> > b/drivers/pci/host/pcie-designware.h index a567ea2..2fb0b18 100644
> > --- a/drivers/pci/host/pcie-designware.h +++
> > b/drivers/pci/host/pcie-designware.h @@ -50,6 +50,7 @@ struct
> > pcie_port { struct irq_domain *irq_domain;
> > unsigned long msi_data;
> > u8 iatu_unroll_enabled;
> > + u8 is_gen1;
> > DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> > };
> >
> >
Best regards,
Lukasz Majewski
--
DENX Software Engineering GmbH, Managing Director: Wolfgang Denk
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
[PATCH v1] edac: i82975x_edac :- Handle return NULL error from ioremap_nocache
Here, If ioremap_nocache will fail. It will return NULL.
Kernel can run into a NULL-pointer dereference.
This error check will avoid NULL pointer dereference.
Signed-off-by: Arvind Yadav
---
drivers/edac/i82975x_edac.c | 4
1 file changed, 4 insertions(+)
diff --git a/drivers/edac/i82975x_edac.c b/drivers/edac/i82975x_edac.c
index 7baa8ac..e747d82 100644
--- a/drivers/edac/i82975x_edac.c
+++ b/drivers/edac/i82975x_edac.c
@@ -494,6 +494,10 @@ static int i82975x_probe1(struct pci_dev *pdev, int
dev_idx)
}
mchbar &= 0xc000; /* bits 31:14 used for 16K window */
mch_window = ioremap_nocache(mchbar, 0x1000);
+ if (!mch_window) {
+ edac_dbg(3, "failed to memory map!\n");
+ goto fail0;
+ }
#ifdef i82975x_DEBUG_IOMEM
i82975x_printk(KERN_INFO, "MCHBAR real = %0x, remapped = %p\n",
--
1.9.1
Re: [PATCH v2 4/4] mfd: max77686: Remove I2C device ID table
Hi,
I think that this patch better to squash with patch3.
After applying the patch3, this driver doesn't use
the max77686_i2c_id table.
On 2017년 01월 13일 22:34, Javier Martinez Canillas wrote:
> The driver is only used in DT platforms so there's no need to
> have an i2c_device_id table.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Laxman Dewangan
> Reviewed-by: Krzysztof Kozlowski
> Tested-by: Krzysztof Kozlowski
>
> ---
>
> Changes in v2:
> - Add Laxman's Acked-by tag to patch 4/4.
> - Add Krzysztof's Reviewed-by and Tested-by tags to patch 4/4.
>
> drivers/mfd/max77686.c | 8
> 1 file changed, 8 deletions(-)
>
> diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
> index 896c1bf85acc..b0e8e13c0049 100644
> --- a/drivers/mfd/max77686.c
> +++ b/drivers/mfd/max77686.c
> @@ -241,13 +241,6 @@ static int max77686_i2c_probe(struct i2c_client *i2c)
> return 0;
> }
>
> -static const struct i2c_device_id max77686_i2c_id[] = {
> - { "max77686", TYPE_MAX77686 },
> - { "max77802", TYPE_MAX77802 },
> - { }
> -};
> -MODULE_DEVICE_TABLE(i2c, max77686_i2c_id);
> -
> #ifdef CONFIG_PM_SLEEP
> static int max77686_suspend(struct device *dev)
> {
> @@ -294,7 +287,6 @@ static struct i2c_driver max77686_i2c_driver = {
> .of_match_table = of_match_ptr(max77686_pmic_dt_match),
> },
> .probe_new = max77686_i2c_probe,
> - .id_table = max77686_i2c_id,
> };
>
> module_i2c_driver(max77686_i2c_driver);
>
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH 0/9] Serial slave device bus
Hi Rob, > Am 13.01.2017 um 15:48 schrieb Rob Herring : > > On Fri, Jan 13, 2017 at 5:22 AM, H. Nikolaus Schaller > wrote: >> Hi Rob, >> was it intentional to answer privately only? > > Damn gmail. Added everyone back. No problem. Happens to everyone every now and then. > >>> Am 12.01.2017 um 23:07 schrieb Rob Herring : >>> >>> On Tue, Jan 10, 2017 at 5:44 AM, H. Nikolaus Schaller >>> wrote: Hi Rob, > Am 06.01.2017 um 17:26 schrieb Rob Herring : > > > [...] > 2. When I try to open the tty from user space to fetch the serial data I just get root@letux:~# cat /dev/ttyO1 [ 659.290618] ttyO ttyO1: tty_open: tty->count(2) != #fd's(1) [ 665.257232] ttyO ttyO1: tty_release: tty->count(2) != #fd's(1) ^C root@letux:~# So it does not seem to be possible to read the data from the tty any more. Maybe there can be some function serdev_device_set_shared(dev, flag). If set to exclusive the /dev node would be hidden from user-space. >>> >>> I don't think sharing should be allowed. Either you have an in-kernel >>> driver or you handle it in userspace. Sharing is just asking for >>> trouble IMO. >> >> My tty-slave patch series works and has no trouble with sharing (the UART) >> because it was designed with this in mind. >> >> The only trouble is that it did not find maintainer's acceptance... >> >>> Though it could be supported later. >> >> Firstly, let me point out once again that we have a mobile device, battery >> powered and every component should be and stay turned off, if not needed by >> any consumer. > > That's every device... > >> The only component that can reliably detect if there is no consumer in >> user-space >> is the kernel. Hence it must be a kernel driver that powers the device >> on/off. >> >> On the other side, it should simply pass data unmodified to user space >> (because the >> chip provides cooked data), so we do not need a driver for doing any data >> processing. >> The data stream is provided perfectly (without proper power control) by >> simply >> accessing /dev/ttyO1 from user-space. >> >> So if there were no power control topic, we would not even ask for a driver. > > I think this reasoning is exactly why we have no proper subsystem > today. We *almost* don't need one. It all works fine except I have > this one GPIO to control. Oh, and a regulator and firmware and > suspend/resume control and ... In our case we have no firmware, just the gpio. > >> We only need the driver to detect the power state of the chip by *monitoring* >> the data stream that goes to user space. >> >> Of course shared writing to the chip would give trouble, but we do not need >> it. >> Therefore I am happy if this sharing is an option (with a big WARNING sign). >> >> If we would try to achieve the same power management in user-space we would >> have >> to run a power-consuming daemon and make sure that it *never* crashes (or >> people >> come and complain about short battery life even if they think they have GPS >> turned off). >> >> And we need to be able to maintain the daemon for many different >> distributions >> people want to run on our device. This takes years to get it into Debian and >> others where we are not developers at all. > > Exactly one of the problems we're trying to solve. With your desired > approach though, you are still leaving the problem of having to know > which tty device the GPS chip is connected to which varies with each > board. > Either you hardcode the tty device in userspace, provide some > sysfs file with the tty name (like TI-ST) or link, provide the tty > name in DT (which I'll NAK) or have userspace parse the DT to find the > connection. I've seen all but the last case. I want to solve this > problem, too, such that userspace just opens the BT, WiFi, GPS, etc. > device. Yes, this is indeed an issue. There are also USB or Bluetooth based external GPS devices which do not need a driver because they speak some standard profile, identify themselves as GPS and create some tty port through standard mechanisms. > >> So this data stream sharing/monitoring is the most important part for >> getting our >> chip supported by a kernel driver. >> >>> >>> I've updated the series to skip creating the /dev nodes. >> >> That is exactly what we do NOT need for this chip. Now I can't even access it >> any more when powered on... > > It's a minor change. Essentially, it is call tty_register_device_attr > or not. Fine! > There's the issue of the file open count warning which I don't > know how to solve. Unfortunately I am not experienced with the tty layer to help here. > 3. for completely implementing my w2sg0004 driver (and two others) it would be nice to have additional serdev_device_ops: a) to be notified about user-space clients doing open/close on the tty b) and/or to be notified about user-space tcsetattr or TIOCMSET (for DTR)
Re: [PATCH] usb: host: xhci: plat: check hcc_params after add hcd
Hi Roger,
在 2017年01月13日 19:02, Roger Quadros 写道:
Hi,
On 13/01/17 05:18, William Wu wrote:
From: William wu
The commit 4ac53087d6d4 ("usb: xhci: plat: Create both
HCDs before adding them") move add hcd to the end of
probe, this cause hcc_params uninitiated, because xHCI
driver sets hcc_params in xhci_gen_setup() called from
usb_add_hcd().
This patch checks the Maximum Primary Stream Array Size
in the hcc_params register after add hcd.
Signed-off-by: William wu
---
drivers/usb/host/xhci-plat.c | 6 +++---
1 file changed, 3 insertions(+), 3 deletions(-)
diff --git a/drivers/usb/host/xhci-plat.c b/drivers/usb/host/xhci-plat.c
index ddfab30..52ce697 100644
--- a/drivers/usb/host/xhci-plat.c
+++ b/drivers/usb/host/xhci-plat.c
@@ -232,9 +232,6 @@ static int xhci_plat_probe(struct platform_device *pdev)
if (device_property_read_bool(&pdev->dev, "usb3-lpm-capable"))
xhci->quirks |= XHCI_LPM_SUPPORT;
- if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
- xhci->shared_hcd->can_do_streams = 1;
-
hcd->usb_phy = devm_usb_get_phy_by_phandle(&pdev->dev, "usb-phy", 0);
if (IS_ERR(hcd->usb_phy)) {
ret = PTR_ERR(hcd->usb_phy);
@@ -255,6 +252,9 @@ static int xhci_plat_probe(struct platform_device *pdev)
if (ret)
goto dealloc_usb2_hcd;
+ if (HCC_MAX_PSA(xhci->hcc_params) >= 4)
+ xhci->shared_hcd->can_do_streams = 1;
+
xhci->hcc_params is initialized after the first usb_add_hcd().
Should this bit come before the usb_add_hcd(xhci->shared_hcd,..)?
Yes, good idea！I will move it behind the first usb_add_hcd().
You will also need to copy to v4.2+ . Thanks.
OK, thank you for reminding me!
return 0;
cheers,
-roger
[PATCH v2 0/2] fix deadlock caused by recursive cluster locking
This is a formal patch set v2 to solve the deadlock issue on which I previously started a RFC (draft patch), and the discussion happened here: [https://oss.oracle.com/pipermail/ocfs2-devel/2016-October/012455.html] Compared to the previous draft patch, this one is much simple and neat. It neither messes up the dlmglue core, nor has a performance penalty on the whole cluster locking system. Instead, it is only used in places where such recursive cluster locking may happen. Changes since v1: 1. Let ocfs2_is_locked_by_me() just return true/false to indicate if the process gets the cluster lock - suggested by: Joseph Qi and Junxiao Bi . 2. Change "struct ocfs2_holder" to a more meaningful name "ocfs2_lock_holder", suggested by: Junxiao Bi . 3. Add debugging output at ocfs2_setattr() and ocfs2_permission() to catch exceptional cases, suggested by: Junxiao Bi . 4. Do not inline functions whose bodies are not in scope, changed by: Stephen Rothwell . Your comments and feedbacks are always welcomed. Eric Ren (2): ocfs2/dlmglue: prepare tracking logic to avoid recursive cluster lock ocfs2: fix deadlock issue when taking inode lock at vfs entry points fs/ocfs2/acl.c | 39 fs/ocfs2/dlmglue.c | 48 +++--- fs/ocfs2/dlmglue.h | 18 + fs/ocfs2/file.c| 76 +++--- fs/ocfs2/ocfs2.h | 1 + 5 files changed, 164 insertions(+), 18 deletions(-) -- 2.10.2
[PATCH v2 1/2] ocfs2/dlmglue: prepare tracking logic to avoid recursive cluster lock
We are in the situation that we have to avoid recursive cluster locking,
but there is no way to check if a cluster lock has been taken by a
precess already.
Mostly, we can avoid recursive locking by writing code carefully.
However, we found that it's very hard to handle the routines that
are invoked directly by vfs code. For instance:
const struct inode_operations ocfs2_file_iops = {
.permission = ocfs2_permission,
.get_acl= ocfs2_iop_get_acl,
.set_acl= ocfs2_iop_set_acl,
};
Both ocfs2_permission() and ocfs2_iop_get_acl() call ocfs2_inode_lock(PR):
do_sys_open
may_open
inode_permission
ocfs2_permission
ocfs2_inode_lock() <=== first time
generic_permission
get_acl
ocfs2_iop_get_acl
ocfs2_inode_lock() <=== recursive one
A deadlock will occur if a remote EX request comes in between two
of ocfs2_inode_lock(). Briefly describe how the deadlock is formed:
On one hand, OCFS2_LOCK_BLOCKED flag of this lockres is set in
BAST(ocfs2_generic_handle_bast) when downconvert is started
on behalf of the remote EX lock request. Another hand, the recursive
cluster lock (the second one) will be blocked in in __ocfs2_cluster_lock()
because of OCFS2_LOCK_BLOCKED. But, the downconvert never complete, why?
because there is no chance for the first cluster lock on this node to be
unlocked - we block ourselves in the code path.
The idea to fix this issue is mostly taken from gfs2 code.
1. introduce a new field: struct ocfs2_lock_res.l_holders, to
keep track of the processes' pid who has taken the cluster lock
of this lock resource;
2. introduce a new flag for ocfs2_inode_lock_full: OCFS2_META_LOCK_GETBH;
it means just getting back disk inode bh for us if we've got cluster lock.
3. export a helper: ocfs2_is_locked_by_me() is used to check if we
have got the cluster lock in the upper code path.
The tracking logic should be used by some of the ocfs2 vfs's callbacks,
to solve the recursive locking issue cuased by the fact that vfs routines
can call into each other.
The performance penalty of processing the holder list should only be seen
at a few cases where the tracking logic is used, such as get/set acl.
You may ask what if the first time we got a PR lock, and the second time
we want a EX lock? fortunately, this case never happens in the real world,
as far as I can see, including permission check, (get|set)_(acl|attr), and
the gfs2 code also do so.
Changes since v1:
1. Let ocfs2_is_locked_by_me() just return true/false to indicate if the
process gets the cluster lock - suggested by: Joseph Qi
and Junxiao Bi .
2. Change "struct ocfs2_holder" to a more meaningful name "ocfs2_lock_holder",
suggested by: Junxiao Bi .
3. Do not inline functions whose bodies are not in scope, changed by:
Stephen Rothwell .
[s...@canb.auug.org.au remove some inlines]
Signed-off-by: Eric Ren
---
fs/ocfs2/dlmglue.c | 48 +---
fs/ocfs2/dlmglue.h | 18 ++
fs/ocfs2/ocfs2.h | 1 +
3 files changed, 64 insertions(+), 3 deletions(-)
diff --git a/fs/ocfs2/dlmglue.c b/fs/ocfs2/dlmglue.c
index 77d1632..b045f02 100644
--- a/fs/ocfs2/dlmglue.c
+++ b/fs/ocfs2/dlmglue.c
@@ -532,6 +532,7 @@ void ocfs2_lock_res_init_once(struct ocfs2_lock_res *res)
init_waitqueue_head(&res->l_event);
INIT_LIST_HEAD(&res->l_blocked_list);
INIT_LIST_HEAD(&res->l_mask_waiters);
+ INIT_LIST_HEAD(&res->l_holders);
}
void ocfs2_inode_lock_res_init(struct ocfs2_lock_res *res,
@@ -749,6 +750,46 @@ void ocfs2_lock_res_free(struct ocfs2_lock_res *res)
res->l_flags = 0UL;
}
+void ocfs2_add_holder(struct ocfs2_lock_res *lockres,
+ struct ocfs2_lock_holder *oh)
+{
+ INIT_LIST_HEAD(&oh->oh_list);
+ oh->oh_owner_pid = get_pid(task_pid(current));
+
+ spin_lock(&lockres->l_lock);
+ list_add_tail(&oh->oh_list, &lockres->l_holders);
+ spin_unlock(&lockres->l_lock);
+}
+
+void ocfs2_remove_holder(struct ocfs2_lock_res *lockres,
+ struct ocfs2_lock_holder *oh)
+{
+ spin_lock(&lockres->l_lock);
+ list_del(&oh->oh_list);
+ spin_unlock(&lockres->l_lock);
+
+ put_pid(oh->oh_owner_pid);
+}
+
+int ocfs2_is_locked_by_me(struct ocfs2_lock_res *lockres)
+{
+ struct ocfs2_lock_holder *oh;
+ struct pid *pid;
+
+ /* look in the list of holders for one with the current task as owner */
+ spin_lock(&lockres->l_lock);
+ pid = task_pid(current);
+ list_for_each_entry(oh, &lockres->l_holders, oh_list) {
+ if (oh->oh_owner_pid == pid) {
+ spin_unlock(&lockres->l_lock);
+ return 1;
+ }
+ }
+ spin_unlock(&lockres->l_lock);
+
+ return 0;
+}
+
static inline void ocfs2_inc_holders(struct ocfs2_lock_res *lockres,
int level)
{
@@ -2333,8 +2374,9 @@ int ocfs2_inod
[PATCH v2 2/2] ocfs2: fix deadlock issue when taking inode lock at vfs entry points
Commit 743b5f1434f5 ("ocfs2: take inode lock in ocfs2_iop_set/get_acl()")
results in a deadlock, as the author "Tariq Saeed" realized shortly
after the patch was merged. The discussion happened here
(https://oss.oracle.com/pipermail/ocfs2-devel/2015-September/011085.html).
The reason why taking cluster inode lock at vfs entry points opens up
a self deadlock window, is explained in the previous patch of this
series.
So far, we have seen two different code paths that have this issue.
1. do_sys_open
may_open
inode_permission
ocfs2_permission
ocfs2_inode_lock() <=== take PR
generic_permission
get_acl
ocfs2_iop_get_acl
ocfs2_inode_lock() <=== take PR
2. fchmod|fchmodat
chmod_common
notify_change
ocfs2_setattr <=== take EX
posix_acl_chmod
get_acl
ocfs2_iop_get_acl <=== take PR
ocfs2_iop_set_acl <=== take EX
Fixes them by adding the tracking logic (in the previous patch) for
these funcs above, ocfs2_permission(), ocfs2_iop_[set|get]_acl(),
ocfs2_setattr().
Changes since v1:
1. Let ocfs2_is_locked_by_me() just return true/false to indicate if the
process gets the cluster lock - suggested by: Joseph Qi
and Junxiao Bi .
2. Change "struct ocfs2_holder" to a more meaningful name "ocfs2_lock_holder",
suggested by: Junxiao Bi .
3. Add debugging output at ocfs2_setattr() and ocfs2_permission() to
catch exceptional cases, suggested by: Junxiao Bi .
Signed-off-by: Eric Ren
---
fs/ocfs2/acl.c | 39 +
fs/ocfs2/file.c | 76 +
2 files changed, 100 insertions(+), 15 deletions(-)
diff --git a/fs/ocfs2/acl.c b/fs/ocfs2/acl.c
index bed1fcb..3e47262 100644
--- a/fs/ocfs2/acl.c
+++ b/fs/ocfs2/acl.c
@@ -284,16 +284,31 @@ int ocfs2_iop_set_acl(struct inode *inode, struct
posix_acl *acl, int type)
{
struct buffer_head *bh = NULL;
int status = 0;
-
- status = ocfs2_inode_lock(inode, &bh, 1);
+ int arg_flags = 0, has_locked;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
+
+ lockres = &OCFS2_I(inode)->ip_inode_lockres;
+ has_locked = ocfs2_is_locked_by_me(lockres);
+ if (has_locked)
+ arg_flags = OCFS2_META_LOCK_GETBH;
+ status = ocfs2_inode_lock_full(inode, &bh, 1, arg_flags);
if (status < 0) {
if (status != -ENOENT)
mlog_errno(status);
return status;
}
+ if (!has_locked)
+ ocfs2_add_holder(lockres, &oh);
+
status = ocfs2_set_acl(NULL, inode, bh, type, acl, NULL, NULL);
- ocfs2_inode_unlock(inode, 1);
+
+ if (!has_locked) {
+ ocfs2_remove_holder(lockres, &oh);
+ ocfs2_inode_unlock(inode, 1);
+ }
brelse(bh);
+
return status;
}
@@ -303,21 +318,35 @@ struct posix_acl *ocfs2_iop_get_acl(struct inode *inode,
int type)
struct buffer_head *di_bh = NULL;
struct posix_acl *acl;
int ret;
+ int arg_flags = 0, has_locked;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
osb = OCFS2_SB(inode->i_sb);
if (!(osb->s_mount_opt & OCFS2_MOUNT_POSIX_ACL))
return NULL;
- ret = ocfs2_inode_lock(inode, &di_bh, 0);
+
+ lockres = &OCFS2_I(inode)->ip_inode_lockres;
+ has_locked = ocfs2_is_locked_by_me(lockres);
+ if (has_locked)
+ arg_flags = OCFS2_META_LOCK_GETBH;
+ ret = ocfs2_inode_lock_full(inode, &di_bh, 0, arg_flags);
if (ret < 0) {
if (ret != -ENOENT)
mlog_errno(ret);
return ERR_PTR(ret);
}
+ if (!has_locked)
+ ocfs2_add_holder(lockres, &oh);
acl = ocfs2_get_acl_nolock(inode, type, di_bh);
- ocfs2_inode_unlock(inode, 0);
+ if (!has_locked) {
+ ocfs2_remove_holder(lockres, &oh);
+ ocfs2_inode_unlock(inode, 0);
+ }
brelse(di_bh);
+
return acl;
}
diff --git a/fs/ocfs2/file.c b/fs/ocfs2/file.c
index c488965..b620c25 100644
--- a/fs/ocfs2/file.c
+++ b/fs/ocfs2/file.c
@@ -1138,6 +1138,9 @@ int ocfs2_setattr(struct dentry *dentry, struct iattr
*attr)
handle_t *handle = NULL;
struct dquot *transfer_to[MAXQUOTAS] = { };
int qtype;
+ int arg_flags = 0, had_lock;
+ struct ocfs2_lock_holder oh;
+ struct ocfs2_lock_res *lockres;
trace_ocfs2_setattr(inode, dentry,
(unsigned long long)OCFS2_I(inode)->ip_blkno,
@@ -1173,13 +1176,41 @@ int ocfs2_setattr(struct dentry *dentry, struct iattr
*attr)
}
}
- status = ocfs2_inode_lock(inode, &bh, 1);
+ lockres = &OCFS2_I(inode)->ip_inode_lockres;
+ had_lock = ocfs2_is_locked_by_me(lockres);
+ if (had_lock) {
+ arg_flags =
Re: [PATCH] pcie: ti: Provide patch to force GEN1 PCIe operation
Hi,
On Sunday 15 January 2017 06:49 PM, Lukasz Majewski wrote:
> Some devices (due to e.g. bad PCIe signal integrity) require to run
> with forced GEN1 speed on PCIe bus.
>
> This patch changes the speed explicitly on dra7 based devices when
> proper device tree attribute is defined for the PCIe controller.
>
> Signed-off-by: Lukasz Majewski
Bjorn has already queued a patch to do the same thing
https://git.kernel.org/cgit/linux/kernel/git/helgaas/pci.git/log/?h=pci/host-dra7xx
Thanks
Kishon
> ---
>
> Patch applies on newest origin/master
> SHA1: f4d3935e4f4884ba80561db5549394afb8eef8f7
>
> Tested at AM5728
>
> ---
> Documentation/devicetree/bindings/pci/ti-pci.txt | 1 +
> drivers/pci/host/pci-dra7xx.c| 23 +++
> drivers/pci/host/pcie-designware.h | 1 +
> 3 files changed, 25 insertions(+)
>
> diff --git a/Documentation/devicetree/bindings/pci/ti-pci.txt
> b/Documentation/devicetree/bindings/pci/ti-pci.txt
> index 60e2516..9f97409 100644
> --- a/Documentation/devicetree/bindings/pci/ti-pci.txt
> +++ b/Documentation/devicetree/bindings/pci/ti-pci.txt
> @@ -25,6 +25,7 @@ PCIe Designware Controller
>
> Optional Property:
> - gpios : Should be added if a gpio line is required to drive PERST# line
> + - to,pcie-is-gen1: Indicates that forced gen1 port operation is needed.
>
> Example:
> axi {
> diff --git a/drivers/pci/host/pci-dra7xx.c b/drivers/pci/host/pci-dra7xx.c
> index 9595fad..eec5fae 100644
> --- a/drivers/pci/host/pci-dra7xx.c
> +++ b/drivers/pci/host/pci-dra7xx.c
> @@ -63,6 +63,13 @@
> #define LINK_UP BIT(16)
> #define DRA7XX_CPU_TO_BUS_ADDR 0x0FFF
>
> +#define PCIECTRL_EP_DBICS_LNK_CAP 0x007C
> +#define MAX_LINK_SPEEDS_MASK GENMASK(3, 0)
> +#define MAX_LINK_SPEEDS_GEN1BIT(0)
> +
> +#define PCIECTRL_PL_WIDTH_SPEED_CTL 0x080C
> +#define CFG_DIRECTED_SPEED_CHANGE BIT(17)
> +
> struct dra7xx_pcie {
> struct pcie_portpp;
> void __iomem*base; /* DT ti_conf */
> @@ -270,6 +277,7 @@ static int __init dra7xx_add_pcie_port(struct dra7xx_pcie
> *dra7xx,
> struct pcie_port *pp = &dra7xx->pp;
> struct device *dev = pp->dev;
> struct resource *res;
> + u32 val;
>
> pp->irq = platform_get_irq(pdev, 1);
> if (pp->irq < 0) {
> @@ -296,6 +304,18 @@ static int __init dra7xx_add_pcie_port(struct
> dra7xx_pcie *dra7xx,
> if (!pp->dbi_base)
> return -ENOMEM;
>
> + if (pp->is_gen1) {
> + dev_info(dev, "GEN1 forced\n");
> +
> + val = readl(pp->dbi_base + PCIECTRL_EP_DBICS_LNK_CAP);
> + set_mask_bits(&val, MAX_LINK_SPEEDS_MASK, MAX_LINK_SPEEDS_GEN1);
> + writel(val, pp->dbi_base + PCIECTRL_EP_DBICS_LNK_CAP);
> +
> + val = readl(pp->dbi_base + PCIECTRL_PL_WIDTH_SPEED_CTL);
> + val &= ~CFG_DIRECTED_SPEED_CHANGE;
> + writel(val, pp->dbi_base + PCIECTRL_PL_WIDTH_SPEED_CTL);
> + }
> +
> ret = dw_pcie_host_init(pp);
> if (ret) {
> dev_err(dev, "failed to initialize host\n");
> @@ -404,6 +424,9 @@ static int __init dra7xx_pcie_probe(struct
> platform_device *pdev)
> goto err_gpio;
> }
>
> + if (of_property_read_bool(np, "ti,pcie-is-gen1"))
> + pp->is_gen1 = true;
> +
> reg = dra7xx_pcie_readl(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD);
> reg &= ~LTSSM_EN;
> dra7xx_pcie_writel(dra7xx, PCIECTRL_DRA7XX_CONF_DEVICE_CMD, reg);
> diff --git a/drivers/pci/host/pcie-designware.h
> b/drivers/pci/host/pcie-designware.h
> index a567ea2..2fb0b18 100644
> --- a/drivers/pci/host/pcie-designware.h
> +++ b/drivers/pci/host/pcie-designware.h
> @@ -50,6 +50,7 @@ struct pcie_port {
> struct irq_domain *irq_domain;
> unsigned long msi_data;
> u8 iatu_unroll_enabled;
> + u8 is_gen1;
> DECLARE_BITMAP(msi_irq_in_use, MAX_MSI_IRQS);
> };
>
>
Re: [PATCH v2 3/4] mfd: max77686: Use the struct i2c_driver .probe_new instead of .probe
Hi,
On 2017년 01월 13일 22:34, Javier Martinez Canillas wrote:
> If a driver is only used in DT platforms, there's no need to get the
> i2c_device_id as an argument of the probe function. Since this data
> can be get from the matching of_device_id.
>
> There's a temporary .probe_new field in struct i2c_driver that can be
> used as probe callback for the case when i2c_device_id won't be used.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Laxman Dewangan
> Reviewed-by: Krzysztof Kozlowski
> Tested-by: Krzysztof Kozlowski
>
> ---
>
> Changes in v2:
> - Add Laxman's Acked-by tag to patch 3/4.
> - Add Krzysztof's Reviewed-by and Tested-by tags to patch 3/4.
>
> drivers/mfd/max77686.c | 5 ++---
> 1 file changed, 2 insertions(+), 3 deletions(-)
>
> diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
> index 33dd09493605..896c1bf85acc 100644
> --- a/drivers/mfd/max77686.c
> +++ b/drivers/mfd/max77686.c
> @@ -172,8 +172,7 @@ static const struct of_device_id max77686_pmic_dt_match[]
> = {
> };
> MODULE_DEVICE_TABLE(of, max77686_pmic_dt_match);
>
> -static int max77686_i2c_probe(struct i2c_client *i2c,
> - const struct i2c_device_id *id)
> +static int max77686_i2c_probe(struct i2c_client *i2c)
> {
> struct max77686_dev *max77686 = NULL;
> unsigned int data;
> @@ -294,7 +293,7 @@ static struct i2c_driver max77686_i2c_driver = {
> .pm = &max77686_pm,
> .of_match_table = of_match_ptr(max77686_pmic_dt_match),
> },
> - .probe = max77686_i2c_probe,
> + .probe_new = max77686_i2c_probe,
> .id_table = max77686_i2c_id,
> };
>
>
Looks good to me.
Reviewed-by: Chanwoo Choi
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH v2 2/4] mfd: max77686: Use of_device_get_match_data() helper
Hi,
On 2017년 01월 13일 22:34, Javier Martinez Canillas wrote:
> Use the generic helper to get the matched of_device_id .data, instead of
> open coding it.
>
> The driver was checking if matching the OF node with the driver's OF table
> was failing, but this doesn't make too much sense since this can't happen
> in practice. The fact the probe function was called, means OF registered a
> device with a valid compatible string so a of_device_get_match_data() call
> will always succeed. So just remove this unneeded check.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Laxman Dewangan
>
> ---
>
> Changes in v2:
> - Add Laxman's Acked-by tag to patch 2/4.
> - Mention in commit message that an unneeded check for match is removed.
>
> drivers/mfd/max77686.c | 9 ++---
> 1 file changed, 2 insertions(+), 7 deletions(-)
>
> diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
> index ddae3bf3e46c..33dd09493605 100644
> --- a/drivers/mfd/max77686.c
> +++ b/drivers/mfd/max77686.c
> @@ -34,6 +34,7 @@
> #include
> #include
> #include
> +#include
>
> static const struct mfd_cell max77686_devs[] = {
> { .name = "max77686-pmic", },
> @@ -175,7 +176,6 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
> const struct i2c_device_id *id)
> {
> struct max77686_dev *max77686 = NULL;
> - const struct of_device_id *match;
> unsigned int data;
> int ret = 0;
> const struct regmap_config *config;
> @@ -188,13 +188,8 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
> if (!max77686)
> return -ENOMEM;
>
> - match = of_match_node(max77686_pmic_dt_match, i2c->dev.of_node);
> - if (!match)
> - return -EINVAL;
> -
> - max77686->type = (unsigned long)match->data;
> -
> i2c_set_clientdata(i2c, max77686);
> + max77686->type = (unsigned long)of_device_get_match_data(&i2c->dev);
> max77686->dev = &i2c->dev;
> max77686->i2c = i2c;
>
>
Looks good to me.
Reviewed-by: Chanwoo Choi
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH v9 0/8] drivers: touchscreen: tsc2007 and ads7846/tsc2046 improvements (use common touchscreen bindings, pre-calibration, spi fix and provide iio raw values)
ping
> Am 28.12.2016 um 15:53 schrieb H. Nikolaus Schaller :
>
> Changes V9:
> * added explicit CONFIG for TSC2007_IIO and simplified Makefile (suggested by
> Dmitry Torokhov )
> * make the tsc2007 iio patch the last one in this sequence
>
> 2016-11-22 15:02:42: Changes V8:
> * fix compilation for CONFIG_IIO=m (reported by Jonathan Cameron
> )
> * add some more Reviewed-by: and Acked-by:
> * mutiple improvements suggested by Dmitry Torokhov
> :
> ** drop patch "send pendown and penup only once" (input core does take care
> of it now)
> ** remove not necessary EXPORT_SYMBOL
> ** remove explicit file names from comment header
> ** move tsc2007_iio_configure() to the end of the probe process and simplify
> the error path again
> ** remove unnecessary input_unregister_device()
> ** improvement for compilation with CONFIG_IIO=m and CONFIG_TSC2007=y
>
> 2016-11-11 20:02:11: Changes V7:
> * rearranged the include files (asked for by Jonathan Cameron
> )
> * forward reference struct iio_dev * instead of condition in tsc2007.h (asked
> for by Jonathan Cameron )
> * add some Acked-by:
>
> 2016-10-27 10:44:29: Changes V6:
> * iio patch (no changes elsewhere)
> - tsc2007_iio: fix a missing return 0 for non-iio case (found by kbuid
> test robot)
> - tsc2007_core: group error return paths so that
> tsc2007_iio_unconfigure is called at only one place
> - tsc2007_iio: fix copyright (this file is 100% original work)
>
> 2016-10-25 21:26:46: Changes V5:
> * ads7846: remove an empty line (suggested by Andrew F. Davis )
> * ads7846: remove MODULE_ALIAS for SPI (suggested by Andrew F. Davis
> )
> * tsc2007: fix a bug from swapping patch 3/n and patch 4/n (found by kbuild
> test robot)
> * refactored tsc2007 into tsc2007_core and tsc2007_iio (asked for by Jonathan
> Cameron )
>
> 2016-10-17 16:00:02: Changes V4:
> * fix a merge/squash issue resulting in a non-bisectable patch set (suggested
> by kbuid test robot)
> * remove some unnecessary #include (suggested by Jonathan Cameron
> )
> * make the iio extension depend on CONFIG_IIO rather than selecting it
> (suggested by Jonathan Cameron )
> * swapped patch 3/n and patch 4/n to remove internal dependency
>
> 2016-09-23 14:41:23: Changes V3:
> * fix an issue with swapping
> * remove hard clipping to min/max rectangle - some systems expect to handle
> negative coordinates
> * make use of commit ed7c9870c9bc ("Input: of_touchscreen - add support for
> inverted / swapped axes")
>
> 2015-11-13 21:36:07: Changes V2:
> * add a patch to make drivers still recognise the old "ti,swap-xy" property
> (suggested by Rob Herring)
>
> 2015-11-06 16:14:53: V1: This patch series improves the drivers for the
> tsc2007 and
> ads7846/tsc2046 touchscreen controllers which are e.g. used by the GTA04
> OpenPandora and Pyra devices.
>
> New common bindings have been defined by
> commit b98abe52fa8e ("Input: add common DT binding for touchscreens"):
>
> Documentation/devicetree/bindings/input/touchscreen/touchscreen.txt
>
> which also defines a helper function to parse the DT. These new parameters
> allow to specify the fuzz factors (jitter suppression), inversion of x or y
> axis and
> swapping of x and y to achieve inversion and rotation so that the touch
> coordinate axes match the natural orientation of the display panel.
>
> Another improvement is to better use the min/max ADC values and
> scale to the screen size as defined by the DT. This allows to coarsely
> calibrate the touch to match the LCD to which it is glued on so that the
> touch can quite precisely be operated before any user-space fine-calibration
> can be (and needs to be) started.
>
> For the adc7846 we fix an issue with the spi module table.
>
> Finally we add an iio interface for the AUX and temperature ADC channels of
> the tsc2007 and also provide the touch screen raw values. This allows to read
> an optional ambient light sensor installed on the gta04 board and improves
> calibration and hardware monitoring.
>
>
> H. Nikolaus Schaller (8):
> drivers:input:tsc2007: add new common binding names, pre-calibration,
>flipping and rotation
> drivers:input:tsc2007: check for presence and power down tsc2007
>during probe
> DT:omap3+tsc2007: use new common touchscreen bindings
> drivers:input:ads7846(+tsc2046): add new common binding names,
>pre-calibration and flipping
> dt-bindings: input: move ads7846 bindings to touchscreen subdirectory
> drivers:input:ads7846(+tsc2046): fix spi module table
> DT:omap3+ads7846: use new common touchscreen bindings
> drivers:input:tsc2007: add iio interface to read external ADC input
>and temperature
>
> .../bindings/input/{ => touchscreen}/ads7846.txt | 9 +-
> .../bindings/input/touchscreen/tsc2007.txt | 20 +-
> arch/arm/boot/dts/omap3-gta04.dtsi | 25 ++-
> arch/arm/boot/dts/omap3-lilly-a83x.dtsi| 2 +-
> arch/arm/boot/dts/omap3-pandora-common.dtsi| 17 +-
> .../boo
[PATCH V3 4/5] PCI: exynos: Use the bitops API to operate the bit shifting
Just use the bitops api to operate the bit.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
Acked-by: Krzysztof Kozlowski
---
Changelog on V3:
- None
Changelog on V2:
- None
drivers/pci/host/pci-exynos.c | 24
1 file changed, 12 insertions(+), 12 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index 6255294..c5892c2 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -40,19 +40,19 @@ struct exynos_pcie {
/* PCIe ELBI registers */
#define PCIE_IRQ_PULSE 0x000
-#define IRQ_INTA_ASSERT(0x1 << 0)
-#define IRQ_INTB_ASSERT(0x1 << 2)
-#define IRQ_INTC_ASSERT(0x1 << 4)
-#define IRQ_INTD_ASSERT(0x1 << 6)
+#define IRQ_INTA_ASSERTBIT(0)
+#define IRQ_INTB_ASSERTBIT(2)
+#define IRQ_INTC_ASSERTBIT(4)
+#define IRQ_INTD_ASSERTBIT(6)
#define PCIE_IRQ_LEVEL 0x004
#define PCIE_IRQ_SPECIAL 0x008
#define PCIE_IRQ_EN_PULSE 0x00c
#define PCIE_IRQ_EN_LEVEL 0x010
-#define IRQ_MSI_ENABLE (0x1 << 2)
+#define IRQ_MSI_ENABLE BIT(2)
#define PCIE_IRQ_EN_SPECIAL0x014
#define PCIE_PWR_RESET 0x018
#define PCIE_CORE_RESET0x01c
-#define PCIE_CORE_RESET_ENABLE (0x1 << 0)
+#define PCIE_CORE_RESET_ENABLE BIT(0)
#define PCIE_STICKY_RESET 0x020
#define PCIE_NONSTICKY_RESET 0x024
#define PCIE_APP_INIT_RESET0x028
@@ -61,7 +61,7 @@ struct exynos_pcie {
#define PCIE_ELBI_LTSSM_ENABLE 0x1
#define PCIE_ELBI_SLV_AWMISC 0x11c
#define PCIE_ELBI_SLV_ARMISC 0x120
-#define PCIE_ELBI_SLV_DBI_ENABLE (0x1 << 21)
+#define PCIE_ELBI_SLV_DBI_ENABLE BIT(21)
/* PCIe Purple registers */
#define PCIE_PHY_GLOBAL_RESET 0x000
@@ -79,27 +79,27 @@ struct exynos_pcie {
#define PCIE_PHY_DCC_FEEDBACK 0x014
#define PCIE_PHY_PLL_DIV_1 0x05c
#define PCIE_PHY_COMMON_POWER 0x064
-#define PCIE_PHY_COMMON_PD_CMN (0x1 << 3)
+#define PCIE_PHY_COMMON_PD_CMN BIT(3)
#define PCIE_PHY_TRSV0_EMP_LVL 0x084
#define PCIE_PHY_TRSV0_DRV_LVL 0x088
#define PCIE_PHY_TRSV0_RXCDR 0x0ac
#define PCIE_PHY_TRSV0_POWER 0x0c4
-#define PCIE_PHY_TRSV0_PD_TSV (0x1 << 7)
+#define PCIE_PHY_TRSV0_PD_TSV BIT(7)
#define PCIE_PHY_TRSV0_LVCC0x0dc
#define PCIE_PHY_TRSV1_EMP_LVL 0x144
#define PCIE_PHY_TRSV1_RXCDR 0x16c
#define PCIE_PHY_TRSV1_POWER 0x184
-#define PCIE_PHY_TRSV1_PD_TSV (0x1 << 7)
+#define PCIE_PHY_TRSV1_PD_TSV BIT(7)
#define PCIE_PHY_TRSV1_LVCC0x19c
#define PCIE_PHY_TRSV2_EMP_LVL 0x204
#define PCIE_PHY_TRSV2_RXCDR 0x22c
#define PCIE_PHY_TRSV2_POWER 0x244
-#define PCIE_PHY_TRSV2_PD_TSV (0x1 << 7)
+#define PCIE_PHY_TRSV2_PD_TSV BIT(7)
#define PCIE_PHY_TRSV2_LVCC0x25c
#define PCIE_PHY_TRSV3_EMP_LVL 0x2c4
#define PCIE_PHY_TRSV3_RXCDR 0x2ec
#define PCIE_PHY_TRSV3_POWER 0x304
-#define PCIE_PHY_TRSV3_PD_TSV (0x1 << 7)
+#define PCIE_PHY_TRSV3_PD_TSV BIT(7)
#define PCIE_PHY_TRSV3_LVCC0x31c
static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg)
--
2.10.2
[PATCH V3 3/5] PCI: exynos: Remove the unnecessary variables
Remove the unnecessary variables(elbi/phy/block_base).
It needs one resource structure for assigning each resource.
So it replaces with one 'res' variable.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
Acked-by: Krzysztof Kozlowski
---
Changelog on V3:
- None
Changelog on V2:
- None
drivers/pci/host/pci-exynos.c | 16 +++-
1 file changed, 7 insertions(+), 9 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index 166881a..6255294 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -507,9 +507,7 @@ static int __init exynos_pcie_probe(struct platform_device
*pdev)
struct exynos_pcie *ep;
struct pcie_port *pp;
struct device_node *np = dev->of_node;
- struct resource *elbi_base;
- struct resource *phy_base;
- struct resource *block_base;
+ struct resource *res;
int ret;
ep = devm_kzalloc(dev, sizeof(*ep), GFP_KERNEL);
@@ -540,22 +538,22 @@ static int __init exynos_pcie_probe(struct
platform_device *pdev)
if (ret)
goto fail_clk;
- elbi_base = platform_get_resource(pdev, IORESOURCE_MEM, 0);
- ep->elbi_base = devm_ioremap_resource(dev, elbi_base);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
+ ep->elbi_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ep->elbi_base)) {
ret = PTR_ERR(ep->elbi_base);
goto fail_bus_clk;
}
- phy_base = platform_get_resource(pdev, IORESOURCE_MEM, 1);
- ep->phy_base = devm_ioremap_resource(dev, phy_base);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 1);
+ ep->phy_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ep->phy_base)) {
ret = PTR_ERR(ep->phy_base);
goto fail_bus_clk;
}
- block_base = platform_get_resource(pdev, IORESOURCE_MEM, 2);
- ep->block_base = devm_ioremap_resource(dev, block_base);
+ res = platform_get_resource(pdev, IORESOURCE_MEM, 2);
+ ep->block_base = devm_ioremap_resource(dev, res);
if (IS_ERR(ep->block_base)) {
ret = PTR_ERR(ep->block_base);
goto fail_bus_clk;
--
2.10.2
[PATCH V3 0/5] PCI: exynos: cleans the minor things
Current pci-exynos.c is used for only EXYNOS5440. It's too complex to support the other Exynos SoCs. Before supporting the other Exynos SoCs, it needs to clean the codes. Changelog on V3: - Splits "PCI: exynos: replace to one register accessor from each accessors" Changelog on V2: - Changes the all pointer names as "ep" instead of "exynos_pcie" Jaehoon Chung (5): PCI: exynos: Rename all pointer names from "exynos_pcie" to "ep" PCI: exynos: Replace the *_blk/*_phy/*_elb accessors PCI: exynos: Remove the unnecessary variables PCI: exynos: Use the bitops API to operate the bit shifting PCI: exynos: remove the duplicated codes drivers/pci/host/pci-exynos.c | 392 +++--- 1 file changed, 181 insertions(+), 211 deletions(-) -- 2.10.2
[PATCH V3 2/5] PCI: exynos: Replace the *_blk/*_phy/*_elb accessors
There is no reason to maintain *_blk/phy/elbi_* as register accessors.
It can be replaced to one accessor for maintaining more easier.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
Acked-by: Krzysztof Kozlowski
---
Changelog on V3:
- Split from previous [PATCH V2 1/4]
"PCI: exynos: replace to one register accessor from each accessors"
Changelog on V2:
- Changes the all pointer names as "ep" instead of "exynos_pcie"
drivers/pci/host/pci-exynos.c | 184 +++---
1 file changed, 82 insertions(+), 102 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index 2e99ff5..166881a 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -102,34 +102,14 @@ struct exynos_pcie {
#define PCIE_PHY_TRSV3_PD_TSV (0x1 << 7)
#define PCIE_PHY_TRSV3_LVCC0x31c
-static void exynos_elb_writel(struct exynos_pcie *ep, u32 val, u32 reg)
+static void exynos_pcie_writel(void __iomem *base, u32 val, u32 reg)
{
- writel(val, ep->elbi_base + reg);
+ writel(val, base + reg);
}
-static u32 exynos_elb_readl(struct exynos_pcie *ep, u32 reg)
+static u32 exynos_pcie_readl(void __iomem *base, u32 reg)
{
- return readl(ep->elbi_base + reg);
-}
-
-static void exynos_phy_writel(struct exynos_pcie *ep, u32 val, u32 reg)
-{
- writel(val, ep->phy_base + reg);
-}
-
-static u32 exynos_phy_readl(struct exynos_pcie *ep, u32 reg)
-{
- return readl(ep->phy_base + reg);
-}
-
-static void exynos_blk_writel(struct exynos_pcie *ep, u32 val, u32 reg)
-{
- writel(val, ep->block_base + reg);
-}
-
-static u32 exynos_blk_readl(struct exynos_pcie *ep, u32 reg)
-{
- return readl(ep->block_base + reg);
+ return readl(base + reg);
}
static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on)
@@ -137,13 +117,13 @@ static void exynos_pcie_sideband_dbi_w_mode(struct
exynos_pcie *ep, bool on)
u32 val;
if (on) {
- val = exynos_elb_readl(ep, PCIE_ELBI_SLV_AWMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC);
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(ep, val, PCIE_ELBI_SLV_AWMISC);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
} else {
- val = exynos_elb_readl(ep, PCIE_ELBI_SLV_AWMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC);
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(ep, val, PCIE_ELBI_SLV_AWMISC);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
}
}
@@ -152,13 +132,13 @@ static void exynos_pcie_sideband_dbi_r_mode(struct
exynos_pcie *ep, bool on)
u32 val;
if (on) {
- val = exynos_elb_readl(ep, PCIE_ELBI_SLV_ARMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC);
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(ep, val, PCIE_ELBI_SLV_ARMISC);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
} else {
- val = exynos_elb_readl(ep, PCIE_ELBI_SLV_ARMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC);
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(ep, val, PCIE_ELBI_SLV_ARMISC);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
}
}
@@ -166,131 +146,131 @@ static void exynos_pcie_assert_core_reset(struct
exynos_pcie *ep)
{
u32 val;
- val = exynos_elb_readl(ep, PCIE_CORE_RESET);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_CORE_RESET);
val &= ~PCIE_CORE_RESET_ENABLE;
- exynos_elb_writel(ep, val, PCIE_CORE_RESET);
- exynos_elb_writel(ep, 0, PCIE_PWR_RESET);
- exynos_elb_writel(ep, 0, PCIE_STICKY_RESET);
- exynos_elb_writel(ep, 0, PCIE_NONSTICKY_RESET);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_CORE_RESET);
+ exynos_pcie_writel(ep->elbi_base, 0, PCIE_PWR_RESET);
+ exynos_pcie_writel(ep->elbi_base, 0, PCIE_STICKY_RESET);
+ exynos_pcie_writel(ep->elbi_base, 0, PCIE_NONSTICKY_RESET);
}
static void exynos_pcie_deassert_core_reset(struct exynos_pcie *ep)
{
u32 val;
- val = exynos_elb_readl(ep, PCIE_CORE_RESET);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_CORE_RESET);
val |= PCIE_CORE_RESET_ENABLE;
- exynos_elb_writel(ep, val, PCIE_CORE_RESET);
- exynos_elb_writel(ep, 1, PCIE_STICKY_RESET);
- exynos_elb_writel(ep, 1, PCIE_NONSTICKY_RESET);
- exynos_elb_writel(ep, 1, PCIE_APP_INIT_RESET);
- exynos_elb_writel(ep, 0, PCIE_APP_INIT_RESET);
- exynos_blk_writel(ep, 1, PCIE_PHY_MAC_RESET);
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_CORE_RESET);
+ exynos_pcie_writel(ep->elbi_base, 1, PCI
[PATCH V3 5/5] PCI: exynos: remove the duplicated codes
Removed the duplicated codes.
It can use the more simply than now.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
Acked-by: Krzysztof Kozlowski
---
Changelog on V3:
- None
Changelog on V2:
- None
drivers/pci/host/pci-exynos.c | 22 --
1 file changed, 8 insertions(+), 14 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index c5892c2..faee7d3 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -116,30 +116,24 @@ static void exynos_pcie_sideband_dbi_w_mode(struct
exynos_pcie *ep, bool on)
{
u32 val;
- if (on) {
- val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC);
+ if (on)
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
- } else {
- val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_AWMISC);
+ else
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
- }
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_AWMISC);
}
static void exynos_pcie_sideband_dbi_r_mode(struct exynos_pcie *ep, bool on)
{
u32 val;
- if (on) {
- val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC);
+ val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC);
+ if (on)
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
- } else {
- val = exynos_pcie_readl(ep->elbi_base, PCIE_ELBI_SLV_ARMISC);
+ else
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
- }
+ exynos_pcie_writel(ep->elbi_base, val, PCIE_ELBI_SLV_ARMISC);
}
static void exynos_pcie_assert_core_reset(struct exynos_pcie *ep)
--
2.10.2
[PATCH V3 1/5] PCI: exynos: Rename all pointer names from "exynos_pcie" to "ep"
Rename the simple pointer name as "ep" instead of "exynos_pcie".
After applying this patch, it can save the 10 characthers within one
line.
Signed-off-by: Jaehoon Chung
Reviewed-by: Pankaj Dubey
Acked-by: Krzysztof Kozlowski
---
Changelog on V3:
- Split from previous [PATCH V2 1/4]
"PCI: exynos: replace to one register accessor from each accessors"
Changelog on V2:
- Changes the all pointer names as "ep" instead of "exynos_pcie"
drivers/pci/host/pci-exynos.c | 348 +-
1 file changed, 173 insertions(+), 175 deletions(-)
diff --git a/drivers/pci/host/pci-exynos.c b/drivers/pci/host/pci-exynos.c
index f1c544b..2e99ff5 100644
--- a/drivers/pci/host/pci-exynos.c
+++ b/drivers/pci/host/pci-exynos.c
@@ -102,212 +102,210 @@ struct exynos_pcie {
#define PCIE_PHY_TRSV3_PD_TSV (0x1 << 7)
#define PCIE_PHY_TRSV3_LVCC0x31c
-static void exynos_elb_writel(struct exynos_pcie *exynos_pcie, u32 val, u32
reg)
+static void exynos_elb_writel(struct exynos_pcie *ep, u32 val, u32 reg)
{
- writel(val, exynos_pcie->elbi_base + reg);
+ writel(val, ep->elbi_base + reg);
}
-static u32 exynos_elb_readl(struct exynos_pcie *exynos_pcie, u32 reg)
+static u32 exynos_elb_readl(struct exynos_pcie *ep, u32 reg)
{
- return readl(exynos_pcie->elbi_base + reg);
+ return readl(ep->elbi_base + reg);
}
-static void exynos_phy_writel(struct exynos_pcie *exynos_pcie, u32 val, u32
reg)
+static void exynos_phy_writel(struct exynos_pcie *ep, u32 val, u32 reg)
{
- writel(val, exynos_pcie->phy_base + reg);
+ writel(val, ep->phy_base + reg);
}
-static u32 exynos_phy_readl(struct exynos_pcie *exynos_pcie, u32 reg)
+static u32 exynos_phy_readl(struct exynos_pcie *ep, u32 reg)
{
- return readl(exynos_pcie->phy_base + reg);
+ return readl(ep->phy_base + reg);
}
-static void exynos_blk_writel(struct exynos_pcie *exynos_pcie, u32 val, u32
reg)
+static void exynos_blk_writel(struct exynos_pcie *ep, u32 val, u32 reg)
{
- writel(val, exynos_pcie->block_base + reg);
+ writel(val, ep->block_base + reg);
}
-static u32 exynos_blk_readl(struct exynos_pcie *exynos_pcie, u32 reg)
+static u32 exynos_blk_readl(struct exynos_pcie *ep, u32 reg)
{
- return readl(exynos_pcie->block_base + reg);
+ return readl(ep->block_base + reg);
}
-static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *exynos_pcie,
- bool on)
+static void exynos_pcie_sideband_dbi_w_mode(struct exynos_pcie *ep, bool on)
{
u32 val;
if (on) {
- val = exynos_elb_readl(exynos_pcie, PCIE_ELBI_SLV_AWMISC);
+ val = exynos_elb_readl(ep, PCIE_ELBI_SLV_AWMISC);
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(exynos_pcie, val, PCIE_ELBI_SLV_AWMISC);
+ exynos_elb_writel(ep, val, PCIE_ELBI_SLV_AWMISC);
} else {
- val = exynos_elb_readl(exynos_pcie, PCIE_ELBI_SLV_AWMISC);
+ val = exynos_elb_readl(ep, PCIE_ELBI_SLV_AWMISC);
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(exynos_pcie, val, PCIE_ELBI_SLV_AWMISC);
+ exynos_elb_writel(ep, val, PCIE_ELBI_SLV_AWMISC);
}
}
-static void exynos_pcie_sideband_dbi_r_mode(struct exynos_pcie *exynos_pcie,
- bool on)
+static void exynos_pcie_sideband_dbi_r_mode(struct exynos_pcie *ep, bool on)
{
u32 val;
if (on) {
- val = exynos_elb_readl(exynos_pcie, PCIE_ELBI_SLV_ARMISC);
+ val = exynos_elb_readl(ep, PCIE_ELBI_SLV_ARMISC);
val |= PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(exynos_pcie, val, PCIE_ELBI_SLV_ARMISC);
+ exynos_elb_writel(ep, val, PCIE_ELBI_SLV_ARMISC);
} else {
- val = exynos_elb_readl(exynos_pcie, PCIE_ELBI_SLV_ARMISC);
+ val = exynos_elb_readl(ep, PCIE_ELBI_SLV_ARMISC);
val &= ~PCIE_ELBI_SLV_DBI_ENABLE;
- exynos_elb_writel(exynos_pcie, val, PCIE_ELBI_SLV_ARMISC);
+ exynos_elb_writel(ep, val, PCIE_ELBI_SLV_ARMISC);
}
}
-static void exynos_pcie_assert_core_reset(struct exynos_pcie *exynos_pcie)
+static void exynos_pcie_assert_core_reset(struct exynos_pcie *ep)
{
u32 val;
- val = exynos_elb_readl(exynos_pcie, PCIE_CORE_RESET);
+ val = exynos_elb_readl(ep, PCIE_CORE_RESET);
val &= ~PCIE_CORE_RESET_ENABLE;
- exynos_elb_writel(exynos_pcie, val, PCIE_CORE_RESET);
- exynos_elb_writel(exynos_pcie, 0, PCIE_PWR_RESET);
- exynos_elb_writel(exynos_pcie, 0, PCIE_STICKY_RESET);
- exynos_elb_writel(exynos_pcie, 0, PCIE_NONSTICKY_RESET);
+ exynos_elb_writel(ep, val, PCIE_CORE_RESET);
+ exynos_elb_writel(ep, 0, PCIE_PWR_RESET);
+ exynos_elb_writel(ep, 0, PCIE_STICKY_RESET);
+
Re: [PATCH v2 1/4] mfd: max77686: Don't attempt to get i2c_device_id .data
Hi,
On 2017년 01월 13일 22:34, Javier Martinez Canillas wrote:
> The driver is only used in platforms that have DT support so always the
> I2C device .data will be get from the matched OF node and never will be
> from the I2C device ID table.
>
> Signed-off-by: Javier Martinez Canillas
> Acked-by: Laxman Dewangan
> Reviewed-by: Krzysztof Kozlowski
> Tested-by: Krzysztof Kozlowski
>
> ---
>
> Changes in v2:
> - Add Laxman's Acked-by tag to patch 1/4.
> - Add Krzysztof's Reviewed-by and Tested-by tags to patch 1/4.
>
> drivers/mfd/max77686.c | 13 +
> 1 file changed, 5 insertions(+), 8 deletions(-)
>
> diff --git a/drivers/mfd/max77686.c b/drivers/mfd/max77686.c
> index 7b68ed72e9cb..ddae3bf3e46c 100644
> --- a/drivers/mfd/max77686.c
> +++ b/drivers/mfd/max77686.c
> @@ -188,14 +188,11 @@ static int max77686_i2c_probe(struct i2c_client *i2c,
> if (!max77686)
> return -ENOMEM;
>
> - if (i2c->dev.of_node) {
> - match = of_match_node(max77686_pmic_dt_match, i2c->dev.of_node);
> - if (!match)
> - return -EINVAL;
> -
> - max77686->type = (unsigned long)match->data;
> - } else
> - max77686->type = id->driver_data;
> + match = of_match_node(max77686_pmic_dt_match, i2c->dev.of_node);
> + if (!match)
> + return -EINVAL;
> +
> + max77686->type = (unsigned long)match->data;
>
> i2c_set_clientdata(i2c, max77686);
> max77686->dev = &i2c->dev;
>
Looks good to me.
Reviewed-by: Chanwoo Choi
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH v19 00/15] acpi, clocksource: add GTDT driver and GTDT support in arm_arch_timer
Hi Mark, This v19 (I have mentioned it in my previous email) is the latest patchset which can be applied on v4.10-rc4 directly. please review this patchset, thanks! :-) On 21 December 2016 at 14:45, wrote: > From: Fu Wei > > This patchset: > (1)Preparation for adding GTDT support in arm_arch_timer: > 1. Move some enums and marcos to header file; > 2. Add a new enum for spi type; > 3. Improve printk relevant code; > 4. Rename some enums and defines; > 5. Rework PPI determination; > 6. Rework counter frequency detection; > 7. Refactor arch_timer_needs_probing, move it into DT init call > 8. Introduce some new structs and refactor the MMIO timer init code > for reusing some common code. > > (2)Introduce ACPI GTDT parser: drivers/acpi/arm64/acpi_gtdt.c > Parse all kinds of timer in GTDT table of ACPI:arch timer, > memory-mapped timer and SBSA Generic Watchdog timer. > This driver can help to simplify all the relevant timer drivers, > and separate all the ACPI GTDT knowledge from them. > > (3)Simplify ACPI code for arm_arch_timer > > (4)Add GTDT support for ARM memory-mapped timer. > > This patchset has been tested on the following platforms with ACPI enabled: > (1)ARM Foundation v8 model > > Changelog: > v19: https://lkml.org/lkml/2016/12/21/ > Fix a '\n' missing in a error message in arch_timer_mem_init. > Add "request_mem_region" for ioremapping cntbase, according to > f947ee1 clocksource/drivers/arm_arch_timer: Map frame with > of_io_request_and_map() > Rebase to 4.9.0-gfb779ff > > v18: https://lkml.org/lkml/2016/12/8/446 > Fix 8/15 patch problem of "int ret;" in arch_timer_acpi_init. > Rebase to 4.9.0-rc8-g9269898 > > v17: https://lkml.org/lkml/2016/11/25/140 > Take out some cleanups from 4/15. > Merge 5/15 and 6/15, improve PPI determination code, > improve commit message. > Rework counter frequency detection. > Move arch_timer_needs_of_probing into DT init call. > Move Platform Timer scan loop back to timer init call to avoid allocating > and free memory. > Improve all the exported functions' comment. > > v16: https://lkml.org/lkml/2016/11/16/268 > Fix patchset problem about static enum ppi_nr of 01/13 in v15. > Refactor arch_timer_detect_rate. > Refactor arch_timer_needs_probing. > > v15: https://lkml.org/lkml/2016/11/15/366 > Re-order patches > Add arm_arch_timer refactoring patches to prepare for GTDT: > 1. rename some enums and defines, and some cleanups > 2. separate out arch_timer_uses_ppi init code and fix a potential bug > 3. Improve some new structs, refactor the timer init code. > Since the some structs have been changed, GTDT parser for memory-mapped > timer and SBSA Generic Watchdog timer have been update. > > v14: https://lkml.org/lkml/2016/9/28/573 > Separate memory-mapped timer GTDT support into two patches > 1. Refactor the timer init code to prepare for GTDT > 2. Add GTDT support for memory-mapped timer > > v13: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1231717.html > Improve arm_arch_timer code for memory-mapped > timer GTDT support, refactor original memory-mapped timer > dt support for reusing some common code. > > v12: https://lkml.org/lkml/2016/9/13/250 > Rebase to latest Linux 4.8-rc6 > Delete the confusing "skipping" in the error message. > > V11: https://lkml.org/lkml/2016/9/6/354 > Rebase to latest Linux 4.8-rc5 > Delete typedef (suggested by checkpatch.pl) > > V10: https://lkml.org/lkml/2016/7/26/215 > Drop the "readq" patch. > Rebase to latest Linux 4.7. > > V9: https://lkml.org/lkml/2016/7/25/345 > Improve pr_err message in acpi gtdt driver. > Update Commit message for 7/9 > shorten the irq mapping function name > Improve GTDT driver for memory-mapped timer > > v8: https://lkml.org/lkml/2016/7/19/660 > Improve "pr_fmt(fmt)" definition: add "ACPI" in front of "GTDT", > and also improve printk message. > Simplify is_timer_block and is_watchdog. > Merge acpi_gtdt_desc_init and gtdt_arch_timer_init into acpi_gtdt_init(); > Delete __init in include/linux/acpi.h for GTDT API > Make ARM64 select GTDT. > Delete "#include " from acpi_gtdt.c > Simplify GT block parse code. > > v7: https://lkml.org/lkml/2016/7/13/769 > Move the GTDT driver to drivers/acpi/arm64 > Add add the ARM64-specific ACPI Support maintainers in MAINTAINERS > Merge 3 patches of GTDT parser driver. > Fix the for_each_platform_timer bug. > > v6: https://lkml.org/lkml/2016/6/29/580 > split the GTDT driver to 4 parts: basic, arch_timer, memory-mapped timer, > and SBSA Generic Watchdog timer > Improve driver by suggestions and example code from Daniel Lezcano > > v5: https://lkml.org/lkml/2016/5/24/356 > Sorting o
Re: [PATCH v2] xen-netfront: Fix Rx stall during network stress and OOM
On 13/01/17 18:55, Remanan Pillai wrote: > From: Vineeth Remanan Pillai > > During an OOM scenario, request slots could not be created as skb > allocation fails. So the netback cannot pass in packets and netfront > wrongly assumes that there is no more work to be done and it disables > polling. This causes Rx to stall. > > The issue is with the retry logic which schedules the timer if the > created slots are less than NET_RX_SLOTS_MIN. The count of new request > slots to be pushed are calculated as a difference between new req_prod > and rsp_cons which could be more than the actual slots, if there are > unconsumed responses. > > The fix is to calculate the count of newly created slots as the > difference between new req_prod and old req_prod. > > Signed-off-by: Vineeth Remanan Pillai Reviewed-by: Juergen Gross Thanks, Juergen
Re: [PATCH v2] partially revert "xen: Remove event channel notification through Xen PCI platform device"
On 13/01/17 19:44, Boris Ostrovsky wrote: > On 01/13/2017 01:26 PM, Stefano Stabellini wrote: >> On Fri, 13 Jan 2017, Boris Ostrovsky wrote: >>> On 01/12/2017 04:39 PM, Stefano Stabellini wrote: The following commit: commit 72a9b186292d98494f26cfd24a1621796209 Author: KarimAllah Ahmed Date: Fri Aug 26 23:55:36 2016 +0200 xen: Remove event channel notification through Xen PCI platform device broke Linux when booting as Dom0 on Xen in a nested Xen environment (Xen installed inside a Xen VM). In this scenario, Linux is a PV guest, but at the same time it uses the platform-pci driver to receive notifications from L0 Xen. vector callbacks are not available because L1 Xen doesn't allow them. Partially revert the offending commit, by restoring IRQ based notifications for PV guests only. I restored only the code which is strictly needed and replaced the xen_have_vector_callback checks within it with xen_pv_domain() checks. Signed-off-by: Stefano Stabellini >>> Reviewed-by: Boris Ostrovsky >> Applied to xentip/for-linus-4.10, improving the commit message as >> suggested before. >> >> Do you plan on sending out another pull request for 4.10? > > Juergen? Originally I didn't plan to, but I'm not opposed to sending out one. Juergen
[PATCH v2] irqchip: irq-mips-gic:- Avoiding Kernel panics due to Error.
Eliminating kernel panic due to NULL pointer dereferencing and
other failure in __gic_init.
Here, __gic_init can fail. This error check will avoid NULL pointer
dereference and kernel panic.
Signed-off-by: Arvind Yadav
---
drivers/irqchip/irq-mips-gic.c | 40 +++-
1 file changed, 31 insertions(+), 9 deletions(-)
diff --git a/drivers/irqchip/irq-mips-gic.c b/drivers/irqchip/irq-mips-gic.c
index c01c09e..bf0816f 100644
--- a/drivers/irqchip/irq-mips-gic.c
+++ b/drivers/irqchip/irq-mips-gic.c
@@ -968,7 +968,7 @@ int gic_ipi_domain_match(struct irq_domain *d, struct
device_node *node,
.match = gic_ipi_domain_match,
};
-static void __init __gic_init(unsigned long gic_base_addr,
+static int __init __gic_init(unsigned long gic_base_addr,
unsigned long gic_addrspace_size,
unsigned int cpu_vec, unsigned int irqbase,
struct device_node *node)
@@ -979,6 +979,10 @@ static void __init __gic_init(unsigned long gic_base_addr,
__gic_base_addr = gic_base_addr;
gic_base = ioremap_nocache(gic_base_addr, gic_addrspace_size);
+ if (!gic_base) {
+ pr_err("Failed to map GIC memory");
+ return -ENOMEM;
+ }
gicconfig = gic_read(GIC_REG(SHARED, GIC_SH_CONFIG));
gic_shared_intrs = (gicconfig & GIC_SH_CONFIG_NUMINTRS_MSK) >>
@@ -1035,23 +1039,29 @@ static void __init __gic_init(unsigned long
gic_base_addr,
gic_irq_domain = irq_domain_add_simple(node, GIC_NUM_LOCAL_INTRS +
gic_shared_intrs, irqbase,
&gic_irq_domain_ops, NULL);
- if (!gic_irq_domain)
- panic("Failed to add GIC IRQ domain");
+ if (!gic_irq_domain) {
+ pr_err("Failed to add GIC IRQ domain");
+ goto iounmap;
+ }
gic_irq_domain->name = "mips-gic-irq";
gic_dev_domain = irq_domain_add_hierarchy(gic_irq_domain, 0,
GIC_NUM_LOCAL_INTRS +
gic_shared_intrs,
node, &gic_dev_domain_ops,
NULL);
- if (!gic_dev_domain)
- panic("Failed to add GIC DEV domain");
+ if (!gic_dev_domain) {
+ pr_err("Failed to add GIC DEV domain");
+ goto iounmap;
+ }
gic_dev_domain->name = "mips-gic-dev";
gic_ipi_domain = irq_domain_add_hierarchy(gic_irq_domain,
IRQ_DOMAIN_FLAG_IPI_PER_CPU,
GIC_NUM_LOCAL_INTRS +
gic_shared_intrs,
node, &gic_ipi_domain_ops,
NULL);
- if (!gic_ipi_domain)
- panic("Failed to add GIC IPI domain");
+ if (!gic_ipi_domain) {
+ pr_err("Failed to add GIC IPI domain");
+ goto iounmap;
+ }
gic_ipi_domain->name = "mips-gic-ipi";
gic_ipi_domain->bus_token = DOMAIN_BUS_IPI;
@@ -1067,13 +1077,22 @@ static void __init __gic_init(unsigned long
gic_base_addr,
}
gic_basic_init();
+ return 0;
+iounmap:
+ iounmap(gic_base);
+ return -ENOMEM;
}
void __init gic_init(unsigned long gic_base_addr,
unsigned long gic_addrspace_size,
unsigned int cpu_vec, unsigned int irqbase)
{
- __gic_init(gic_base_addr, gic_addrspace_size, cpu_vec, irqbase, NULL);
+ int ret;
+
+ ret = __gic_init(gic_base_addr, gic_addrspace_size, cpu_vec, irqbase,
+NULL);
+ if (ret)
+ pr_err("Failed to initialize GIC");
}
static int __init gic_of_init(struct device_node *node,
@@ -1083,6 +1102,7 @@ static int __init gic_of_init(struct device_node *node,
unsigned int cpu_vec, i = 0, reserved = 0;
phys_addr_t gic_base;
size_t gic_len;
+ int ret;
/* Find the first available CPU vector. */
while (!of_property_read_u32_index(node, "mti,reserved-cpu-vectors",
@@ -1119,7 +1139,9 @@ static int __init gic_of_init(struct device_node *node,
write_gcr_gic_base(gic_base | CM_GCR_GIC_BASE_GICEN_MSK);
gic_present = true;
- __gic_init(gic_base, gic_len, cpu_vec, 0, node);
+ ret = __gic_init(gic_base, gic_len, cpu_vec, 0, node);
+ if (ret)
+ return ret;
return 0;
}
--
1.9.1
Re: [PATCH 36/37] ARM: DRA7: clockdomain: Change the CLKTRCTRL of CM_PCIE_CLKSTCTRL to SW_WKUP
Hi Tony,
On Friday 13 January 2017 10:45 PM, Tony Lindgren wrote:
> * Kishon Vijay Abraham I [170112 02:35]:
>> The PCIe programming sequence in TRM suggests CLKSTCTRL of PCIe should
>> be set to SW_WKUP. There are no issues when CLKSTCTRL is set to HW_AUTO
>> in RC mode. However in EP mode, the host system is not able to access the
>> MEMSPACE and setting the CLKSTCTRL to SW_WKUP fixes it.
>
> I guess ideally in the long run we would set this dynamically based on
> the selected mode, right?
The programming sequence mentioned in the TRM w.r.t clock programming is same
for both host mode or device mode. Though we never faced any issues in host
mode when HW_AUTO is set, it's better to follow TRM recommended settings IMHO.
Thanks
Kishon
>
> Regards,
>
> Tony
>
>> Signed-off-by: Kishon Vijay Abraham I
>> ---
>> arch/arm/mach-omap2/clockdomains7xx_data.c |2 +-
>> 1 file changed, 1 insertion(+), 1 deletion(-)
>>
>> diff --git a/arch/arm/mach-omap2/clockdomains7xx_data.c
>> b/arch/arm/mach-omap2/clockdomains7xx_data.c
>> index 6c67965..67ebff8 100644
>> --- a/arch/arm/mach-omap2/clockdomains7xx_data.c
>> +++ b/arch/arm/mach-omap2/clockdomains7xx_data.c
>> @@ -524,7 +524,7 @@
>> .dep_bit = DRA7XX_PCIE_STATDEP_SHIFT,
>> .wkdep_srcs = pcie_wkup_sleep_deps,
>> .sleepdep_srcs= pcie_wkup_sleep_deps,
>> -.flags= CLKDM_CAN_HWSUP_SWSUP,
>> +.flags= CLKDM_CAN_SWSUP,
>> };
>>
>> static struct clockdomain atl_7xx_clkdm = {
>> --
>> 1.7.9.5
>>
>> --
>> To unsubscribe from this list: send the line "unsubscribe linux-omap" in
>> the body of a message to majord...@vger.kernel.org
>> More majordomo info at http://vger.kernel.org/majordomo-info.html
>>
Re: [PATCH 16/37] PCI: endpoint: Introduce configfs entry for configuring EP functions
Hi Christoph, On Friday 13 January 2017 11:36 PM, Christoph Hellwig wrote: > Hi Kishon, > > a couple comments on the configfs layout based on my experiments with > your previous drop to implement a NVMe device using it. Thanks for trying it out! > > I don't think most of these configfs files should be present here, as > they are properties of the implemented PCIe devices. E.g. for my > NVMe device they will be sort of hardcoded most of the time, as they > would be for other devices that would always have a fixed vendor/device/ > class ID, cacheline size, etc. Actually not all devices have hardcoded headers. E.g the platform I'm using doesn't have hardcoded headers and it can be configured based on the function the user would like to use. If the devices are hardcoded, then using configfs can be skipped altogether. In such cases, APIs like pci_epf_create() can directly be used by the drivers instead of going via configfs. Thanks Kishon
Re: [Lsf-pc] [LSF/MM TOPIC] [LSF/MM ATTEND] md raid general discussion
On Mon, 2017-01-16 at 11:33 +0800, Guoqing Jiang wrote: > > On 01/10/2017 12:38 AM, Coly Li wrote: > > Hi Folks, > > > > I'd like to propose a general md raid discussion, it is quite > > necessary for most of active md raid developers sit together to > > discuss current challenge of Linux software raid and development > > trends. > > > > In the last years, we have many development activities in md raid, > > e.g. raid5 cache, raid1 clustering, partial parity log, fast fail > > upstreaming, and some effort for raid1 & raid0 performance > > improvement. > > > > I see there are some kind of functionality overlap between r5cache > > (raid5 cache) and PPL (partial parity log), currently I have no > > idea where we will go for these two development activities. > > Also I receive reports from users that raid1 performance is desired > > when it is built on NVMe SSDs as a cache (maybe bcache or dm > > -cache). I am working on some raid1 performance improvement (e.g. > > new raid1 I/O barrier and lockless raid1 I/O submit), and have some > > more ideas to discuss. > > > > Therefore, if md raid developers may have a chance to sit together, > > discuss how to efficiently collaborate in next year, it will be > > much more productive then communicating on mailing list. > > I would like to attend raid discussion, besides above topics I think > we can talk about improve the test suite of mdadm to make it more > robust (I can share related test suite which is used for clustered > raid). Just so you know ... and just in case others are watching. You're not going to be getting an invite to LSF/MM unless you send an attend or topic request in as the CFP asks: http://marc.info/?l=linux-fsdevel&m=148285919408577 The rationale is simple: it's to difficult to track all the "me too" reply emails and even if we could, it's not actually clear what the intention of the sender is. So you taking the time to compose an official email as the CFP requests allows the programme committee to distinguish. James
Re: [PATCH 0/6] PM / Domains: Implement domain performance states
On 03-01-17, 16:36, Viresh Kumar wrote: > Hi, > > An earlier series[1] tried to implement bindings for PM domain > performance states. Rob Herring suggested that we can actually write the > supporting code first instead of bindings, as that will make things > easier to understand for all. > > The bindings [1] aren't discarded yet and this series is based on a > version of those only. The bindings are only used by the last patch, > which should not be applied and is only sent for completeness. > > All other patches can be reviewed/applied whenever the maintainers feel > they look good. > > > A brief summary of the problem this series is trying to solve: > > Some platforms have the capability to configure the performance state of > their Power Domains. The performance levels are represented by positive > integer values, a lower value represents lower performance state. > > We decided earlier that we should extend Power Domain framework to > support active state power management as well. The power-domains until > now were only concentrating on the idle state management of the device > and this needs to change in order to reuse the infrastructure of power > domains for active state management. > > The first 5 patches update the PM domain and QoS frameworks to support > that and the last one presents the front end interface to it. > > All the patches are tested by hacking the OPP core a bit for now. Ping ! -- viresh
Re: [PATCH 11/37] PCI: dwc: Split pcie-designware.c into host and core files
Hi Joao,
On Friday 13 January 2017 10:19 PM, Joao Pinto wrote:
> Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
>> Split pcie-designware.c into pcie-designware-host.c that contains
>> the host specific parts of the driver and pcie-designware.c that
>> contains the parts used by both host driver and endpoint driver.
>>
>> Signed-off-by: Kishon Vijay Abraham I
>> ---
>> drivers/pci/dwc/Makefile |2 +-
>> drivers/pci/dwc/pcie-designware-host.c | 619
>>
>> drivers/pci/dwc/pcie-designware.c | 613
>> +--
>> drivers/pci/dwc/pcie-designware.h |8 +
>> 4 files changed, 634 insertions(+), 608 deletions(-)
>> create mode 100644 drivers/pci/dwc/pcie-designware-host.c
>>
>> diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile
>> index 7d27c14..3b57e55 100644
>> --- a/drivers/pci/dwc/Makefile
>> +++ b/drivers/pci/dwc/Makefile
>> @@ -1,4 +1,4 @@
>
> (snip...)
>
>> -static void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index,
>> - int type, u64 cpu_addr, u64 pci_addr,
>> - u32 size)
>> +void dw_pcie_prog_outbound_atu(struct dw_pcie *pci, int index, int type,
>> + u64 cpu_addr, u64 pci_addr, u32 size)
>> {
>> u32 retries, val;
>>
>> @@ -186,220 +151,6 @@ static void dw_pcie_prog_outbound_atu(struct dw_pcie
>> *pci, int index,
>> dev_err(pci->dev, "iATU is not being enabled\n");
>> }
>
> Kishon, iATU only makes sense in The Root Complex (host), so it should be
> inside
> the pcie-designware-host.
That is not true. Outbound ATU should be programmed to access host side buffers
and inbound ATU should be programmed for the host to access EP mem space.
Thanks
Kishon
Re: [PATCH 09/37] PCI: dwc: designware: Parse *num-lanes* property in dw_pcie_setup_rc
Hi,
On Friday 13 January 2017 10:43 PM, Joao Pinto wrote:
> Hi,
>
> Às 10:25 AM de 1/12/2017, Kishon Vijay Abraham I escreveu:
>> *num-lanes* dt property is parsed in dw_pcie_host_init. However
>> *num-lanes* property is applicable to both root complex mode and
>> endpoint mode. As a first step, move the parsing of this property
>> outside dw_pcie_host_init. This is in preparation for splitting
>> pcie-designware.c to pcie-designware.c and pcie-designware-host.c
>>
>> Signed-off-by: Kishon Vijay Abraham I
>> ---
>> drivers/pci/dwc/pcie-designware.c | 18 +++---
>> drivers/pci/dwc/pcie-designware.h |1 -
>> 2 files changed, 11 insertions(+), 8 deletions(-)
>>
>> diff --git a/drivers/pci/dwc/pcie-designware.c
>> b/drivers/pci/dwc/pcie-designware.c
>> index 00a0fdc..89cdb6b 100644
>> --- a/drivers/pci/dwc/pcie-designware.c
>> +++ b/drivers/pci/dwc/pcie-designware.c
>> @@ -551,10 +551,6 @@ int dw_pcie_host_init(struct pcie_port *pp)
>> }
>> }
>>
>> -ret = of_property_read_u32(np, "num-lanes", &pci->lanes);
>> -if (ret)
>> -pci->lanes = 0;
>> -
>> ret = of_property_read_u32(np, "num-viewport", &pci->num_viewport);
>> if (ret)
>> pci->num_viewport = 2;
>> @@ -751,18 +747,26 @@ static int dw_pcie_wr_conf(struct pci_bus *bus, u32
>> devfn,
>>
>> void dw_pcie_setup_rc(struct pcie_port *pp)
>> {
>> +int ret;
>> +u32 lanes;
>> u32 val;
>> struct dw_pcie *pci = to_dw_pcie_from_pp(pp);
>> +struct device *dev = pci->dev;
>> +struct device_node *np = dev->of_node;
>>
>> /* get iATU unroll support */
>> pci->iatu_unroll_enabled = dw_pcie_iatu_unroll_enabled(pci);
>> dev_dbg(pci->dev, "iATU unroll: %s\n",
>> pci->iatu_unroll_enabled ? "enabled" : "disabled");
>>
>> +ret = of_property_read_u32(np, "num-lanes", &lanes);
>> +if (ret)
>> +lanes = 0;
>
> You moved from host_init to root complex setup function, which in my opinion
> did
> not improve (in this scope).
>
> I suggest that instead of making so much intermediary patches, which is nice
> to
> understand your development sequence, but hard to review. Wouldn't be better
> to
> condense some of the patches? We would have a cloear vision of the final
> product :)
I thought the other way. If squashing patches is easier to review, I'll do it.
Btw, thanks for reviewing.
Cheers
Kishon
Re: [RFC PATCH 1/3] mmc: sdhci: Add platform_dumpregs callback support to sdhci_ops.
On Mon, Jan 16, 2017 at 07:45:48AM +0530, Ritesh Harjani wrote:
> Hi Jeremy,
>
> Thanks for the review.
>
> On 1/14/2017 3:51 AM, Jeremy McNicoll wrote:
> >On Fri, Dec 30, 2016 at 05:02:09PM +0530, Ritesh Harjani wrote:
> >>From: Sahitya Tummala
> >>
> >>Add new host operation ->platform_dumpregs to provide a
> >>mechanism through which host drivers can dump platform
> >>specific registers in addition to SDHC registers
> >>during error conditions.
> >>
> >>Signed-off-by: Sahitya Tummala
> >>Signed-off-by: Ritesh Harjani
> >>---
> >> drivers/mmc/host/sdhci.c | 3 +++
> >> drivers/mmc/host/sdhci.h | 1 +
> >> 2 files changed, 4 insertions(+)
> >>
> >
> >This change and 2/3 look like they can be squished together into
> >one patch. At least that is how I did it,
>
> I felt it is better this way to keep sdhci and sdhci-msm patches separate.
> This patch provides mechanism and patch 3/3 provides
> implementation of ->platform_dumpregs in sdhci-msm.
>
Alright, lets go with that approach.
-jeremy
> Regards
> Ritesh
>
>
> >
> >https://patchwork.kernel.org/patch/9442449/
> >
> >-jeremy
> >
> >
> >>diff --git a/drivers/mmc/host/sdhci.c b/drivers/mmc/host/sdhci.c
> >>index 2390980..73a8918 100644
> >>--- a/drivers/mmc/host/sdhci.c
> >>+++ b/drivers/mmc/host/sdhci.c
> >>@@ -101,6 +101,9 @@ static void sdhci_dumpregs(struct sdhci_host *host)
> >> readl(host->ioaddr + SDHCI_ADMA_ADDRESS));
> >>}
> >>
> >>+ if (host->ops->platform_dumpregs)
> >>+ host->ops->platform_dumpregs(host);
> >>+
> >>pr_err(DRIVER_NAME ": ===\n");
> >> }
> >>
> >>diff --git a/drivers/mmc/host/sdhci.h b/drivers/mmc/host/sdhci.h
> >>index 0b66f21..400f3a1 100644
> >>--- a/drivers/mmc/host/sdhci.h
> >>+++ b/drivers/mmc/host/sdhci.h
> >>@@ -564,6 +564,7 @@ struct sdhci_ops {
> >> struct mmc_card *card,
> >> unsigned int max_dtr, int host_drv,
> >> int card_drv, int *drv_type);
> >>+ void(*platform_dumpregs)(struct sdhci_host *host);
> >> };
> >>
> >> #ifdef CONFIG_MMC_SDHCI_IO_ACCESSORS
> >>--
> >>The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> >>a Linux Foundation Collaborative Project.
> >>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
Re: [PATCH 12/37] PCI: dwc: Create a new config symbol to enable pci dwc host
Hi Joao, On Friday 13 January 2017 11:20 PM, Joao Pinto wrote: > Hi Kishon, > > Às 10:26 AM de 1/12/2017, Kishon Vijay Abraham I escreveu: >> Now that pci designware host has a separate file, create a new >> config symbol to select the host only driver. This is in preparation >> to enable endpoint support to designware driver. >> >> Signed-off-by: Kishon Vijay Abraham I >> --- >> drivers/pci/dwc/Kconfig | 26 +++--- >> drivers/pci/dwc/Makefile |3 ++- >> drivers/pci/dwc/pcie-designware.h | 29 + >> 3 files changed, 42 insertions(+), 16 deletions(-) >> > > You are already working in a base where dwc/ already exists. I know you made a > rename / re-structure patch for pci, but I think it was not yet accepted, > right? > I don't see it in any of Bjorn' dev branches. He said he'll merge that a little later. Thanks Kishon > > Thanks. > >> diff --git a/drivers/pci/dwc/Kconfig b/drivers/pci/dwc/Kconfig >> index 8b08519..d0bdfb5 100644 >> --- a/drivers/pci/dwc/Kconfig >> +++ b/drivers/pci/dwc/Kconfig >> @@ -3,13 +3,17 @@ menu "DesignWare PCI Core Support" >> >> config PCIE_DW >> bool >> + >> +config PCIE_DW_HOST >> +bool >> depends on PCI_MSI_IRQ_DOMAIN >> +select PCIE_DW >> >> config PCI_DRA7XX >> bool "TI DRA7xx PCIe controller" >> depends on OF && HAS_IOMEM && TI_PIPE3 >> depends on PCI_MSI_IRQ_DOMAIN >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >> Enables support for the PCIe controller in the DRA7xx SoC. There >> are two instances of PCIe controller in DRA7xx. This controller can >> @@ -18,7 +22,7 @@ config PCI_DRA7XX >> config PCIE_DW_PLAT >> bool "Platform bus based DesignWare PCIe Controller" >> depends on PCI_MSI_IRQ_DOMAIN >> -select PCIE_DW >> +select PCIE_DW_HOST >> ---help--- >> This selects the DesignWare PCIe controller support. Select this if >> you have a PCIe controller on Platform bus. >> @@ -32,21 +36,21 @@ config PCI_EXYNOS >> depends on SOC_EXYNOS5440 || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> >> config PCI_IMX6 >> bool "Freescale i.MX6 PCIe controller" >> depends on SOC_IMX6Q || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> >> config PCIE_SPEAR13XX >> bool "STMicroelectronics SPEAr PCIe controller" >> depends on ARCH_SPEAR13XX || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here if you want PCIe support on SPEAr13XX SoCs. >> >> @@ -55,7 +59,7 @@ config PCI_KEYSTONE >> depends on ARCH_KEYSTONE || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here if you want to enable PCI controller support on Keystone >>SoCs. The PCI controller on Keystone is based on Designware hardware >> @@ -67,7 +71,7 @@ config PCI_LAYERSCAPE >> depends on OF && (ARM || ARCH_LAYERSCAPE || COMPILE_TEST) >> depends on PCI_MSI_IRQ_DOMAIN >> select MFD_SYSCON >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here if you want PCIe controller support on Layerscape SoCs. >> >> @@ -76,7 +80,7 @@ config PCI_HISI >> bool "HiSilicon Hip05 and Hip06 SoCs PCIe controllers" >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here if you want PCIe controller support on HiSilicon >>Hip05 and Hip06 SoCs >> @@ -86,7 +90,7 @@ config PCIE_QCOM >> depends on (ARCH_QCOM || COMPILE_TEST) && OF >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here to enable PCIe controller support on Qualcomm SoCs. The >>PCIe controller uses the Designware core plus Qualcomm-specific >> @@ -97,7 +101,7 @@ config PCIE_ARMADA_8K >> depends on ARCH_MVEBU || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here if you want to enable PCIe controller support on >>Armada-8K SoCs. The PCIe controller on Armada-8K is based on >> @@ -109,7 +113,7 @@ config PCIE_ARTPEC6 >> depends on MACH_ARTPEC6 || COMPILE_TEST >> depends on PCI_MSI_IRQ_DOMAIN >> select PCIEPORTBUS >> -select PCIE_DW >> +select PCIE_DW_HOST >> help >>Say Y here to enable PCIe controller support on Axis ARTPEC-6 >>SoCs. This PCIe controller uses the DesignWare core. >> diff --git a/drivers/pci/dwc/Makefile b/drivers/pci/dwc/Makefile >> index 3b57
Re: [RFC PATCH 2/3] mmc: sdhci-msm: Implement platform_dumpregs callback in sdhci-msm
On Mon, Jan 16, 2017 at 07:51:40AM +0530, Ritesh Harjani wrote:
> Hi Jeremy,
>
> On 1/14/2017 4:01 AM, Jeremy McNicoll wrote:
> >On Fri, Dec 30, 2016 at 05:02:10PM +0530, Ritesh Harjani wrote:
> >>From: Sahitya Tummala
> >>
> >>Implement ->platform_dumpregs host operation to print the
> >>platform specific registers in addition to standard SDHC
> >>register during error conditions.
> >>
> >>Signed-off-by: Sahitya Tummala
> >>Signed-off-by: Ritesh Harjani
> >>---
> >> drivers/mmc/host/sdhci-msm.c | 34 ++
> >> 1 file changed, 34 insertions(+)
> >>
> >>diff --git a/drivers/mmc/host/sdhci-msm.c b/drivers/mmc/host/sdhci-msm.c
> >>index 32879b8..1241dbd 100644
> >>--- a/drivers/mmc/host/sdhci-msm.c
> >>+++ b/drivers/mmc/host/sdhci-msm.c
> >>@@ -29,6 +29,11 @@
> >> #define CORE_VERSION_MAJOR_MASK(0xf <<
> >> CORE_VERSION_MAJOR_SHIFT)
> >> #define CORE_VERSION_MINOR_MASK0xff
> >>
> >>+#define CORE_MCI_DATA_CNT 0x30
> >>+#define CORE_MCI_STATUS0x34
> >>+#define CORE_MCI_FIFO_CNT 0x44
> >>+#define CORE_MCI_STATUS2 0x6c
> >>+
> >> #define CORE_HC_MODE 0x78
> >> #define HC_MODE_EN 0x1
> >> #define CORE_POWER 0x0
> >>@@ -77,6 +82,10 @@
> >> #define CORE_HC_SELECT_IN_HS400(6 << 19)
> >> #define CORE_HC_SELECT_IN_MASK (7 << 19)
> >>
> >>+#define CORE_VENDOR_SPEC_FUNC2 0x110
> >>+#define CORE_VENDOR_SPEC_ADMA_ERR_ADDR00x114
> >>+#define CORE_VENDOR_SPEC_ADMA_ERR_ADDR10x118
> >>+
> >> #define CORE_CSR_CDC_CTLR_CFG0 0x130
> >> #define CORE_SW_TRIG_FULL_CALIBBIT(16)
> >> #define CORE_HW_AUTOCAL_ENABIT(17)
> >>@@ -658,6 +667,30 @@ static int sdhci_msm_hs400_dll_calibration(struct
> >>sdhci_host *host)
> >>return ret;
> >> }
> >>
> >>+static void sdhci_msm_dumpregs(struct sdhci_host *host)
> >>+{
> >>+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
> >>+ struct sdhci_msm_host *msm_host = sdhci_pltfm_priv(pltfm_host);
> >>+
> >>+ pr_err("--- PLATFORM REGISTER DUMP ---\n");
> >>+
> >>+ pr_err("Data cnt: 0x%08x | Fifo cnt: 0x%08x | Int sts: 0x%08x | Int
> >>sts2: 0x%08x\n",
> >>+ readl_relaxed(msm_host->core_mem + CORE_MCI_DATA_CNT),
> >>+ readl_relaxed(msm_host->core_mem + CORE_MCI_FIFO_CNT),
> >>+ readl_relaxed(msm_host->core_mem + CORE_MCI_STATUS),
> >>+ readl_relaxed(msm_host->core_mem + CORE_MCI_STATUS2));
> >>+ pr_err("DLL cfg: 0x%08x | DLL sts: 0x%08x | SDCC ver: 0x%08x\n",
> >>+ readl_relaxed(host->ioaddr + CORE_DLL_CONFIG),
> >>+ readl_relaxed(host->ioaddr + CORE_DLL_STATUS),
> >>+ readl_relaxed(msm_host->core_mem + CORE_MCI_VERSION));
> >>+ pr_err("Vndr func: 0x%08x | Vndr adma err : addr0: 0x%08x addr1:
> >>0x%08x\n",
> >>+ readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC),
> >>+ readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_ADMA_ERR_ADDR0),
> >>+ readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_ADMA_ERR_ADDR1));
> >>+ pr_err("Vndr func2: 0x%08x\n",
> >>+ readl_relaxed(host->ioaddr + CORE_VENDOR_SPEC_FUNC2));
> >>+}
> >>+
> >
> >Why did you omit the printing of CORE_TESTBUS_CONFIG like that of
> >https://patchwork.kernel.org/patch/9442449/
> Actually testbus registers aren't something we analyze every-time.
> So I have skipped it for now. We can add it later if and when required.
>
Sounds reasonable.
>
> >
> >and sdhci_dump_state() was dropped too. Being able to dump the rpm_info
> >was very handy for issues I was running into.
> Sure, let me add that info as well.
>
Great, as it was useful when I was debugging SDHCI enablement.
-jeremy
> >
> >-jeremy
> >
> >> static int sdhci_msm_execute_tuning(struct sdhci_host *host, u32 opcode)
> >> {
> >>int tuning_seq_cnt = 3;
> >>@@ -1035,6 +1068,7 @@ static void sdhci_msm_set_clock(struct sdhci_host
> >>*host, unsigned int clock)
> >>.set_bus_width = sdhci_set_bus_width,
> >>.set_uhs_signaling = sdhci_msm_set_uhs_signaling,
> >>.voltage_switch = sdhci_msm_voltage_switch,
> >>+ .platform_dumpregs = sdhci_msm_dumpregs,
> >> };
> >>
> >> static const struct sdhci_pltfm_data sdhci_msm_pdata = {
> >>--
> >>The Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> >>a Linux Foundation Collaborative Project.
> >>
>
> --
> Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum,
> a Linux Foundation Collaborative Project
Re: [PATCH v7 00/15] ACPI platform MSI support and its example mbigen
Hi Hanjun, On 1/11/2017 10:06 AM, Hanjun Guo wrote: > With platform msi support landed in the kernel, and the introduction > of IORT for GICv3 ITS (PCI MSI) and SMMU, the framework for platform msi > is ready, this patch set add few patches to enable the ACPI platform > msi support. > > For platform device connecting to ITS on arm platform, we have IORT > table with the named componant node to describe the mappings of paltform > device and ITS, so we can retrieve the dev id and find its parent > irqdomain (ITS) from IORT table (simlar with the ACPI ITS support). > > v6 -> v7: > - Introduce iort_node_map_platform_id() to retrieve the > dev id for both NC (named component) -> ITS/SMMU and > NC -> SMMU -> ITS cases, suggested by Lorenzo; > > - Reorder the patches and rewrite some commit message; > > - Remove the test tags because it has major changes > to retrieve the dev id, Sinan, Majun, Xinwei, could > you please test them again on your platform? > > - rebased on top of 4.10-rc3 and Lorenzo's patch > https://patchwork.kernel.org/patch/9507041/ > > - Tested against Agustin's patch [1-2/3] "[PATCH V9 0/3] irqchip: qcom: > Add IRQ combiner driver" > > v5 -> v6: > - Call acpi_configure_pmsi_domain() for platform devices in > acpi_platform_notify() as it's cleaner (suggested by Rafael) > - Remove the "u8 type" for iort_id_map() because it's unused > - Rebase on top of 4.10-rc2 > - Collect test and review tags > > v4 -> v5: > - Add mbigen support back with tested on with Agustin's patchset, > and it's a good example of how ACPI platform MSI works > - rebased on top of lastest Linus tree (commit 52bce91 splice: > reinstate SIGPIPE/EPIPE handling) > > v3 -> v4: > - Drop mbi-gen patches to just submit platform msi support because > will rebase mbi-gen patches on top of Agustin's patchset, and > discusion > is going there. > - Add a patch to support device topology such as NC(named componant, > paltform device) > ->SMMU->ITS which suggested by Lorenzo; > - rebased on top of Lorenzo's v9 of ACPI IORT ARM SMMU support; > - rebased on top of 4.9-rc7 > > v2 -> v3: > - Drop RFC tag > - Rebase against v4.9-rc2 and Lorenzo's v6 of ACPI IORT ARM SMMU > support [1] > - Add 3 cleanup patches (patch 1, 2, 3) > - Drop arch_init call patch from last version > - Introduce a callback for platform device to set msi domain > - Introduce a new API to get paltform device's domain instead of > reusing the PCI one in previous version > - Add a patch to rework iort_node_get_id() > > [1]: http://www.mail-archive.com/linux-kernel@vger.kernel.org/msg1251993.html > > v1 -> v2: > - Fix the bug of if multi Interrupt() resoures in single _PRS, > we need to calculate all the irq numbers (I missed it in previous > version); > - Rebased on Marc's irq/irqchip-4.9 branch and Lorenzo's v5 > SMMU patches (also Robin's SMMu patches) > - Add patch irqchip: mbigen: promote mbigen init. > > > Hanjun Guo (13): > ACPI: IORT: fix the indentation in iort_scan_node() > ACPI: IORT: add missing comment for iort_dev_find_its_id() > ACPI: IORT: minor cleanup for iort_match_node_callback() > irqchip: gic-v3-its: keep the head file include in alphabetic order > irqchip: gicv3-its: platform-msi: refactor its_pmsi_prepare() > irqchip: gicv3-its: platform-msi: refactor its_pmsi_init() to prepare > for ACPI > irqchip: gicv3-its: platform-msi: scan MADT to create platform msi > domain > ACPI: IORT: rename iort_node_map_rid() to make it generic > ACPI: platform-msi: retrieve dev id from IORT > ACPI: IORT: move over to iort_node_map_platform_id() > ACPI: platform: setup MSI domain for ACPI based platform device > msi: platform: make platform_msi_create_device_domain() ACPI aware > irqchip: mbigen: Add ACPI support > > Kefeng Wang (2): > irqchip: mbigen: drop module owner > irqchip: mbigen: introduce mbigen_of_create_domain() > > drivers/acpi/arm64/iort.c | 161 > +- > drivers/acpi/glue.c | 6 + > drivers/base/platform-msi.c | 3 +- > drivers/irqchip/irq-gic-v3-its-platform-msi.c | 106 + > drivers/irqchip/irq-gic-v3-its.c | 3 +- > drivers/irqchip/irq-mbigen.c | 109 ++--- > include/linux/acpi_iort.h | 11 ++ > 7 files changed, 322 insertions(+), 77 deletions(-) > I tested the v7 series along with Lorenzo's patch using HIDMA and MSI interrupts. Everything checked out OK. Tested-by: Sinan Kaya -- Sinan Kaya Qualcomm Datacenter Technologies, Inc. as an affiliate of Qualcomm Technologies, Inc. Qualcomm Technolog
Re: [PATCH] Staging: media: bcm2048: style fix - bare use of unsigned
On Sun, Jan 15, 2017 at 10:40:02PM -0600, Scott Matheina wrote:
>
>
> > On Jan 15, 2017, at 10:30 PM, Derek Robson wrote:
> >
> > Changed bare use of 'unsigned' to the prefered us of 'unsigned int'
> > found using checkpatch
>
> Just wondering if you compiled? This patch looks exactly like a patch I
> tried, but it didn't compile.
>
It complied for me, I am on an X86 system.
> > Signed-off-by: Derek Robson
> > ---
> > drivers/staging/media/bcm2048/radio-bcm2048.c | 44
> > +--
> > 1 file changed, 22 insertions(+), 22 deletions(-)
> >
> > diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.c
> > b/drivers/staging/media/bcm2048/radio-bcm2048.c
> > index 37bd439ee08b..b1923a3e4483 100644
> > --- a/drivers/staging/media/bcm2048/radio-bcm2048.c
> > +++ b/drivers/staging/media/bcm2048/radio-bcm2048.c
> > @@ -2020,27 +2020,27 @@ static ssize_t bcm2048_##prop##_read(struct device
> > *dev,\
> >return count;\
> > }
> >
> > -DEFINE_SYSFS_PROPERTY(power_state, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(mute, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(audio_route, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(dac_output, unsigned, int, "%u", 0)
> > -
> > -DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned, int, "%u", value > 3)
> > -
> > -DEFINE_SYSFS_PROPERTY(rds, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned, int, "%u", 0)
> > -DEFINE_SYSFS_PROPERTY(rds_wline, unsigned, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(power_state, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(mute, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, int, "%u", 0)
> > +
> > +DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned int, int, "%u", value
> > > 3)
> > +
> > +DEFINE_SYSFS_PROPERTY(rds, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned int, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(rds_wline, unsigned int, int, "%u", 0)
> > property_read(rds_pi, unsigned int, "%x")
> > property_str_read(rds_rt, (BCM2048_MAX_RDS_RT + 1))
> > property_str_read(rds_ps, (BCM2048_MAX_RDS_PS + 1))
> > @@ -2052,7 +2052,7 @@ property_read(region_bottom_frequency, unsigned int,
> > "%u")
> > property_read(region_top_frequency, unsigned int, "%u")
> > property_signed_read(fm_carrier_error, int, "%d")
> > property_signed_read(fm_rssi, int, "%d")
> > -DEFINE_SYSFS_PROPERTY(region, unsigned, int, "%u", 0)
> > +DEFINE_SYSFS_PROPERTY(region, unsigned int, int, "%u", 0)
> >
> > static struct device_attribute attrs[] = {
> >__ATTR(power_state, 0644, bcm2048_power_state_read,
> > --
> > 2.11.0
>
Re: [PATCH] Staging: media: bcm2048: style fix - bare use of unsigned
Hi Derek, [auto build test ERROR on linuxtv-media/master] [also build test ERROR on v4.10-rc4 next-20170113] [if your patch is applied to the wrong git tree, please drop us a note to help improve the system] url: https://github.com/0day-ci/linux/commits/Derek-Robson/Staging-media-bcm2048-style-fix-bare-use-of-unsigned/20170116-123500 base: git://linuxtv.org/media_tree.git master config: i386-randconfig-x005-201703 (attached as .config) compiler: gcc-6 (Debian 6.2.0-3) 6.2.0 20160901 reproduce: # save the attached .config to linux build tree make ARCH=i386 All error/warnings (new ones prefixed by >>): drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_power_state_write': >> drivers/staging/media/bcm2048/radio-bcm2048.c:2023:50: error: two or more >> data types in declaration specifiers DEFINE_SYSFS_PROPERTY(power_state, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ >> drivers/staging/media/bcm2048/radio-bcm2048.c:2023:1: note: in expansion of >> macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(power_state, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_mute_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2024:43: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(mute, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ drivers/staging/media/bcm2048/radio-bcm2048.c:2024:1: note: in expansion of macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(mute, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_audio_route_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2025:50: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ drivers/staging/media/bcm2048/radio-bcm2048.c:2025:1: note: in expansion of macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_dac_output_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2026:49: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ drivers/staging/media/bcm2048/radio-bcm2048.c:2026:1: note: in expansion of macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_fm_hi_lo_injection_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2028:57: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ drivers/staging/media/bcm2048/radio-bcm2048.c:2028:1: note: in expansion of macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_fm_frequency_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2029:51: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c:1943:2: note: in definition of macro 'property_write' type value; \ ^~~~ drivers/staging/media/bcm2048/radio-bcm2048.c:2029:1: note: in expansion of macro 'DEFINE_SYSFS_PROPERTY' DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, int, "%u", 0) ^ drivers/staging/media/bcm2048/radio-bcm2048.c: In function 'bcm2048_fm_af_frequency_write': drivers/staging/media/bcm2048/radio-bcm2048.c:2030:54: error: two or more data types in declaration specifiers DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned int, int, "%u", 0)
[PATCH] iio: bmi160: use variable names for sizeof() operator
Replace the types with the actual variable names when using the
sizeof() operator. This is kernel preferred style as it protects
against future changes to variable type.
Signed-off-by: Alison Schofield
---
drivers/iio/imu/bmi160/bmi160_core.c | 8
1 file changed, 4 insertions(+), 4 deletions(-)
diff --git a/drivers/iio/imu/bmi160/bmi160_core.c
b/drivers/iio/imu/bmi160/bmi160_core.c
index 5355507..1e7c88b 100644
--- a/drivers/iio/imu/bmi160/bmi160_core.c
+++ b/drivers/iio/imu/bmi160/bmi160_core.c
@@ -338,9 +338,9 @@ static int bmi160_get_data(struct bmi160_data *data, int
chan_type,
__le16 sample;
enum bmi160_sensor_type t = bmi160_to_sensor(chan_type);
- reg = bmi160_regs[t].data + (axis - IIO_MOD_X) * sizeof(__le16);
+ reg = bmi160_regs[t].data + (axis - IIO_MOD_X) * sizeof(sample);
- ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(__le16));
+ ret = regmap_bulk_read(data->regmap, reg, &sample, sizeof(sample));
if (ret < 0)
return ret;
@@ -405,8 +405,8 @@ static irqreturn_t bmi160_trigger_handler(int irq, void *p)
for_each_set_bit(i, indio_dev->active_scan_mask,
indio_dev->masklength) {
- ret = regmap_bulk_read(data->regmap, base + i * sizeof(__le16),
- &sample, sizeof(__le16));
+ ret = regmap_bulk_read(data->regmap, base + i * sizeof(sample),
+ &sample, sizeof(sample));
if (ret < 0)
goto done;
buf[j++] = sample;
--
2.1.4
Re: [PATCH 4/4] clk: rockchip: add rk3288 cif_out clock
2017-01-13 21:53 GMT+08:00 Heiko Stuebner :
> Hi Jacob,
>
> Am Dienstag, 10. Januar 2017, 19:59:20 CET schrieb Jacob Chen:
>> Add the clocks for the cif block of the rk3288
>>
>> Signed-off-by: Jacob Chen
>> ---
>> drivers/clk/rockchip/clk-rk3288.c | 7 +++
>> 1 file changed, 7 insertions(+)
>>
>> diff --git a/drivers/clk/rockchip/clk-rk3288.c
>> b/drivers/clk/rockchip/clk-rk3288.c index 8047cea..f071c24 100644
>> --- a/drivers/clk/rockchip/clk-rk3288.c
>> +++ b/drivers/clk/rockchip/clk-rk3288.c
>> @@ -192,6 +192,7 @@ PNAME(mux_uart1_p)= { "uart1_src", "uart1_frac",
>> "xin24m" }; PNAME(mux_uart2_p)= { "uart2_src", "uart2_frac",
>> "xin24m" };
>> PNAME(mux_uart3_p) = { "uart3_src", "uart3_frac", "xin24m" };
>> PNAME(mux_uart4_p) = { "uart4_src", "uart4_frac", "xin24m" };
>> +PNAME(mux_cif_out_p) = { "cif_src", "xin24m" };
>> PNAME(mux_vip_out_p) = { "vip_src", "xin24m" };
>> PNAME(mux_mac_p) = { "mac_pll_src", "ext_gmac" };
>> PNAME(mux_hsadcout_p)= { "hsadc_src", "ext_hsadc" };
>> @@ -448,6 +449,12 @@ static struct rockchip_clk_branch rk3288_clk_branches[]
>> __initdata = { RK3288_CLKSEL_CON(6), 14, 2, MFLAGS, 8, 6, DFLAGS,
>> RK3288_CLKGATE_CON(3), 15, GFLAGS),
>>
>> + COMPOSITE_NOGATE(0, "cif_src", mux_pll_src_cpll_gpll_p, 0,
>> + RK3288_CLKSEL_CON(26), 8, 1, MFLAGS, 9, 5, DFLAGS),
>> + COMPOSITE_NODIV(SCLK_CIF_OUT, "sclk_cif_out", mux_cif_out_p, 0,
>> + RK3288_CLKSEL_CON(26), 15, 1, MFLAGS,
>> + RK3288_CLKGATE_CON(3), 7, GFLAGS),
>> +
>
> we already have vip_src and sclk_vip_out defined, which I guess are the clocks
> you are adding here and according to the TRM I have the names are also correct
> (clock diagram 2).
>
> But the clkid is not set yet, so I'd suggest adding SCLK_VIP_OUT and assigning
> to the existing clocks.
>
> Also, according to the clock diagram, the gate needs to be (and already is)
> part of the vip_src clock and not the sclk_vip_out.
>
>
> Heiko
Right, I didn't find that it have already been defined..
Re: [PATCH] rcu: Narrow early boot window of illegal synchronous grace periods
On Mon, Jan 16, 2017 at 01:57:25AM +, Zheng, Lv wrote: > Hi, > > > From: Borislav Petkov [mailto:b...@alien8.de] > > Subject: Re: [PATCH] rcu: Narrow early boot window of illegal synchronous > > grace periods > > > > On Sat, Jan 14, 2017 at 01:27:40PM +0100, Rafael J. Wysocki wrote: > > > OK, so this fixes the problem with synchronize_rcu_expedited() in > > > acpi_os_map_cleanup(), right? > > > > Yeah. > > > > > I wonder if the ACPI-specific fix is still needed, then? > > > > It is not strictly necessary. If you still think it would be better to > > have it regardless, you could pick it up. I.e., making ACPI more robust, > > yadda yadda. > > > > I dunno, though, perhaps it is only complicating the code unnecessarily > > and then can be safely ignored with a mental note for future freezes. > > Glad to see it fixed inside of the API provider. > > IMO, ACPI fix is unnecessary as ACPI is just a user of the RCU APIs. > And it's pointless to add special checks in the user side in order to use one > of them. With some luck, the RCU patch will go in sooner rather than later. Should it be delayed for whatever reason, the ACPI patch might well be needed in the meantime. Thanx, Paul
Re: [PATCH] Staging: media: bcm2048: style fix - bare use of unsigned
> On Jan 15, 2017, at 10:30 PM, Derek Robson wrote:
>
> Changed bare use of 'unsigned' to the prefered us of 'unsigned int'
> found using checkpatch
Just wondering if you compiled? This patch looks exactly like a patch I tried,
but it didn't compile.
> Signed-off-by: Derek Robson
> ---
> drivers/staging/media/bcm2048/radio-bcm2048.c | 44 +--
> 1 file changed, 22 insertions(+), 22 deletions(-)
>
> diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.c
> b/drivers/staging/media/bcm2048/radio-bcm2048.c
> index 37bd439ee08b..b1923a3e4483 100644
> --- a/drivers/staging/media/bcm2048/radio-bcm2048.c
> +++ b/drivers/staging/media/bcm2048/radio-bcm2048.c
> @@ -2020,27 +2020,27 @@ static ssize_t bcm2048_##prop##_read(struct device
> *dev,\
>return count;\
> }
>
> -DEFINE_SYSFS_PROPERTY(power_state, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(mute, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(audio_route, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(dac_output, unsigned, int, "%u", 0)
> -
> -DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned, int, "%u", value > 3)
> -
> -DEFINE_SYSFS_PROPERTY(rds, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned, int, "%u", 0)
> -DEFINE_SYSFS_PROPERTY(rds_wline, unsigned, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(power_state, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(mute, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, int, "%u", 0)
> +
> +DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned int, int, "%u", value >
> 3)
> +
> +DEFINE_SYSFS_PROPERTY(rds, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned int, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(rds_wline, unsigned int, int, "%u", 0)
> property_read(rds_pi, unsigned int, "%x")
> property_str_read(rds_rt, (BCM2048_MAX_RDS_RT + 1))
> property_str_read(rds_ps, (BCM2048_MAX_RDS_PS + 1))
> @@ -2052,7 +2052,7 @@ property_read(region_bottom_frequency, unsigned int,
> "%u")
> property_read(region_top_frequency, unsigned int, "%u")
> property_signed_read(fm_carrier_error, int, "%d")
> property_signed_read(fm_rssi, int, "%d")
> -DEFINE_SYSFS_PROPERTY(region, unsigned, int, "%u", 0)
> +DEFINE_SYSFS_PROPERTY(region, unsigned int, int, "%u", 0)
>
> static struct device_attribute attrs[] = {
>__ATTR(power_state, 0644, bcm2048_power_state_read,
> --
> 2.11.0
Re: [PATCH 1/6] mm: introduce kv[mz]alloc helpers
On 01/12/2017 07:37 AM, Michal Hocko wrote:
From: Michal Hocko
Using kmalloc with the vmalloc fallback for larger allocations is a
common pattern in the kernel code. Yet we do not have any common helper
for that and so users have invented their own helpers. Some of them are
really creative when doing so. Let's just add kv[mz]alloc and make sure
it is implemented properly. This implementation makes sure to not make
a large memory pressure for > PAGE_SZE requests (__GFP_NORETRY) and also
to not warn about allocation failures. This also rules out the OOM
killer as the vmalloc is a more approapriate fallback than a disruptive
user visible action.
This patch also changes some existing users and removes helpers which
are specific for them. In some cases this is not possible (e.g.
ext4_kvmalloc, libcfs_kvzalloc, __aa_kvmalloc) because those seems to be
broken and require GFP_NO{FS,IO} context which is not vmalloc compatible
in general (note that the page table allocation is GFP_KERNEL). Those
need to be fixed separately.
apparmor has already claimed kv[mz]alloc so remove those and use
__aa_kvmalloc instead to prevent from the naming clashes.
Changes since v3
- add ipc_alloc
Changes since v2
- s@WARN_ON@WARN_ON_ONCE@ as per Vlastimil
- do not fallback to vmalloc for size = PAGE_SIZE as per Vlastimil
Changes since v1
- define __vmalloc_node_flags for CONFIG_MMU=n
Cc: Anatoly Stepanov
Cc: Paolo Bonzini
Cc: Mike Snitzer
Cc: "Michael S. Tsirkin"
Cc: "Theodore Ts'o"
Reviewed-by: Andreas Dilger # ext4 part
Acked-by: Vlastimil Babka
Signed-off-by: Michal Hocko
---
arch/x86/kvm/lapic.c | 4 ++--
arch/x86/kvm/page_track.c| 4 ++--
arch/x86/kvm/x86.c | 4 ++--
drivers/md/dm-stats.c| 7 +-
fs/ext4/mballoc.c| 2 +-
fs/ext4/super.c | 4 ++--
fs/f2fs/f2fs.h | 20 -
fs/f2fs/file.c | 4 ++--
fs/f2fs/segment.c| 14 ++--
fs/seq_file.c| 16 +-
include/linux/kvm_host.h | 2 --
include/linux/mm.h | 14
include/linux/vmalloc.h | 1 +
ipc/util.c | 7 +-
mm/nommu.c | 5 +
mm/util.c| 42
mm/vmalloc.c | 2 +-
security/apparmor/apparmorfs.c | 2 +-
security/apparmor/include/apparmor.h | 10 -
security/apparmor/match.c| 2 +-
virt/kvm/kvm_main.c | 18 +++-
21 files changed, 89 insertions(+), 95 deletions(-)
diff --git a/arch/x86/kvm/lapic.c b/arch/x86/kvm/lapic.c
index 5fe290c1b7d8..daf114c3b8ad 100644
--- a/arch/x86/kvm/lapic.c
+++ b/arch/x86/kvm/lapic.c
@@ -167,8 +167,8 @@ static void recalculate_apic_map(struct kvm *kvm)
if (kvm_apic_present(vcpu))
max_id = max(max_id, kvm_apic_id(vcpu->arch.apic));
- new = kvm_kvzalloc(sizeof(struct kvm_apic_map) +
- sizeof(struct kvm_lapic *) * ((u64)max_id + 1));
+ new = kvzalloc(sizeof(struct kvm_apic_map) +
+ sizeof(struct kvm_lapic *) * ((u64)max_id + 1),
GFP_KERNEL);
if (!new)
goto out;
diff --git a/arch/x86/kvm/page_track.c b/arch/x86/kvm/page_track.c
index 4a1c13eaa518..d46663e655b0 100644
--- a/arch/x86/kvm/page_track.c
+++ b/arch/x86/kvm/page_track.c
@@ -38,8 +38,8 @@ int kvm_page_track_create_memslot(struct kvm_memory_slot
*slot,
int i;
for (i = 0; i < KVM_PAGE_TRACK_MAX; i++) {
- slot->arch.gfn_track[i] = kvm_kvzalloc(npages *
- sizeof(*slot->arch.gfn_track[i]));
+ slot->arch.gfn_track[i] = kvzalloc(npages *
+ sizeof(*slot->arch.gfn_track[i]),
GFP_KERNEL);
if (!slot->arch.gfn_track[i])
goto track_free;
}
diff --git a/arch/x86/kvm/x86.c b/arch/x86/kvm/x86.c
index 51ccfe08e32f..ba55bc338f25 100644
--- a/arch/x86/kvm/x86.c
+++ b/arch/x86/kvm/x86.c
@@ -8082,13 +8082,13 @@ int kvm_arch_create_memslot(struct kvm *kvm, struct
kvm_memory_slot *slot,
slot->base_gfn, level) + 1;
slot->arch.rmap[i] =
- kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
+ kvzalloc(lpages * sizeof(*slot->arch.rmap[i]),
GFP_KERNEL);
if (!slot->arch.rmap[i])
goto out_free;
if (i == 0)
continue;
- linfo = kvm_kvzalloc(lpages * sizeof(*linfo));
+ linfo = kvzalloc(lpages * sizeof(*linfo), GFP_KERNEL);
if (!linfo)
goto out_free;
diff --git a/drivers/md/dm-stats
[PATCH] Staging: media: bcm2048: style fix - bare use of unsigned
Changed bare use of 'unsigned' to the prefered us of 'unsigned int'
found using checkpatch
Signed-off-by: Derek Robson
---
drivers/staging/media/bcm2048/radio-bcm2048.c | 44 +--
1 file changed, 22 insertions(+), 22 deletions(-)
diff --git a/drivers/staging/media/bcm2048/radio-bcm2048.c
b/drivers/staging/media/bcm2048/radio-bcm2048.c
index 37bd439ee08b..b1923a3e4483 100644
--- a/drivers/staging/media/bcm2048/radio-bcm2048.c
+++ b/drivers/staging/media/bcm2048/radio-bcm2048.c
@@ -2020,27 +2020,27 @@ static ssize_t bcm2048_##prop##_read(struct device
*dev,\
return count; \
}
-DEFINE_SYSFS_PROPERTY(power_state, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(mute, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(audio_route, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(dac_output, unsigned, int, "%u", 0)
-
-DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned, int, "%u", value > 3)
-
-DEFINE_SYSFS_PROPERTY(rds, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned, int, "%u", 0)
-DEFINE_SYSFS_PROPERTY(rds_wline, unsigned, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(power_state, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(mute, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(audio_route, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(dac_output, unsigned int, int, "%u", 0)
+
+DEFINE_SYSFS_PROPERTY(fm_hi_lo_injection, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_frequency, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_af_frequency, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_deemphasis, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_rds_mask, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_best_tune_mode, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_rssi_threshold, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_mode_direction, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(fm_search_tune_mode, unsigned int, int, "%u", value > 3)
+
+DEFINE_SYSFS_PROPERTY(rds, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_b_block_mask, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_b_block_match, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_pi_mask, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_pi_match, unsigned int, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(rds_wline, unsigned int, int, "%u", 0)
property_read(rds_pi, unsigned int, "%x")
property_str_read(rds_rt, (BCM2048_MAX_RDS_RT + 1))
property_str_read(rds_ps, (BCM2048_MAX_RDS_PS + 1))
@@ -2052,7 +2052,7 @@ property_read(region_bottom_frequency, unsigned int, "%u")
property_read(region_top_frequency, unsigned int, "%u")
property_signed_read(fm_carrier_error, int, "%d")
property_signed_read(fm_rssi, int, "%d")
-DEFINE_SYSFS_PROPERTY(region, unsigned, int, "%u", 0)
+DEFINE_SYSFS_PROPERTY(region, unsigned int, int, "%u", 0)
static struct device_attribute attrs[] = {
__ATTR(power_state, 0644, bcm2048_power_state_read,
--
2.11.0
linux-next: Tree for Jan 16
Hi all, Changes since 20170113: Non-merge commits (relative to Linus' tree): 3275 4116 files changed, 129983 insertions(+), 77532 deletions(-) I have created today's linux-next tree at git://git.kernel.org/pub/scm/linux/kernel/git/next/linux-next.git (patches at http://www.kernel.org/pub/linux/kernel/next/ ). If you are tracking the linux-next tree using git, you should not use "git pull" to do so as that will try to merge the new linux-next release with the old one. You should use "git fetch" and checkout or reset to the new master. You can see which trees have been included by looking in the Next/Trees file in the source. There are also quilt-import.log and merge.log files in the Next directory. Between each merge, the tree was built with a ppc64_defconfig for powerpc and an allmodconfig (with CONFIG_BUILD_DOCSRC=n) for x86_64, a multi_v7_defconfig for arm and a native build of tools/perf. After the final fixups (if any), I do an x86_64 modules_install followed by builds for x86_64 allnoconfig, powerpc allnoconfig (32 and 64 bit), ppc44x_defconfig, allyesconfig and pseries_le_defconfig and i386, sparc and sparc64 defconfig. Below is a summary of the state of the merge. I am currently merging 251 trees (counting Linus' and 36 trees of bug fix patches pending for the current merge release). Stats about the size of the tree over time can be seen at http://neuling.org/linux-next-size.html . Status of my local build tests will be at http://kisskb.ellerman.id.au/linux-next . If maintainers want to give advice about cross compilers/configs that work, we are always open to add more builds. Thanks to Randy Dunlap for doing many randconfig builds. And to Paul Gortmaker for triage and bug fixes. -- Cheers, Stephen Rothwell $ git checkout master $ git reset --hard stable Merging origin/master (c92816275674 Merge tag 'char-misc-4.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/gregkh/char-misc) Merging fixes/master (30066ce675d3 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6) Merging kbuild-current/rc-fixes (c7858bf16c0b asm-prototypes: Clear any CPP defines before declaring the functions) Merging arc-current/for-curr (e51d5d02f688 ARCv2: IRQ: Call entry/exit functions for chained handlers in MCIP) Merging arm-current/fixes (ddc37832a134 ARM: 8634/1: hw_breakpoint: blacklist Scorpion CPUs) Merging m68k-current/for-linus (ad595b77c4a8 m68k/atari: Use seq_puts() in atari_get_hardware_list()) Merging metag-fixes/fixes (35d04077ad96 metag: Only define atomic_dec_if_positive conditionally) Merging powerpc-fixes/fixes (69973b830859 Linux 4.9) Merging sparc/master (4bbc84ffd137 sparc: use symbolic names for tsb indexing) Merging fscrypt-current/for-stable (42d97eb0ade3 fscrypt: fix renaming and linking special files) Merging net/master (003c941057ea tcp: fix tcp_fastopen unaligned access complaints on sparc) Merging ipsec/master (4e5da369df64 Documentation/networking: fix typo in mpls-sysctl) Merging netfilter/master (bf99b4ded5f8 tcp: fix mark propagation with fwmark_reflect enabled) Merging ipvs/master (045169816b31 Merge branch 'linus' of git://git.kernel.org/pub/scm/linux/kernel/git/herbert/crypto-2.6) Merging wireless-drivers/master (60f59ce02785 rtlwifi: rtl_usb: Fix missing entry in USB driver's private data) Merging mac80211/master (dbef53621116 mac80211: prevent skb/txq mismatch) Merging sound-current/for-linus (6cf4569ce356 Merge tag 'asoc-fix-v4.10-rc3' of git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus) Merging pci-current/for-linus (27d3eef42093 Revert "PCI: Add runtime PM support for PCIe ports") Merging driver-core.current/driver-core-linus (c7334ce814f7 Revert "driver core: Add deferred_probe attribute to devices in sysfs") Merging tty.current/tty-linus (802c03881f29 sysrq: attach sysrq handler correctly for 32-bit kernel) Merging usb.current/usb-linus (97f9c5f211d1 Merge tag 'usb-serial-4.10-rc4' of git://git.kernel.org/pub/scm/linux/kernel/git/johan/usb-serial into usb-linus) Merging usb-gadget-fixes/fixes (43aef5c2ca90 usb: gadget: Fix copy/pasted error message) Merging usb-serial-fixes/usb-linus (2d5a9c72d0c4 USB: serial: ch341: fix control-message error handling) Merging usb-chipidea-fixes/ci-for-usb-stable (c7fbb09b2ea1 usb: chipidea: move the lock initialization to core file) Merging phy/fixes (7ce7d89f4883 Linux 4.10-rc1) Merging staging.current/staging-linus (a121103c9228 Linux 4.10-rc3) Merging char-misc.current/char-misc-linus (c8a6a09c1c61 vme: Fix wrong pointer utilization in ca91cx42_slave_get) Merging input-current/for-linus (1c3415a06b10 Input: elants_i2c - avoid divide by 0 errors on bad touchscreen data) Merging crypto-current/master (07825f0acd85 crypto: aesni - Fix failure when built-in with modular pcbc) Merging ide/master (da095587e6be Revert "ide: Fix interface autodetection in legacy IDE
[PATCH v1 3/3] watchdog: zx2967: add watchdog controller driver for ZTE's zx2967 family
This patch adds watchdog controller driver for ZTE's zx2967 family.
Signed-off-by: Baoyou Xie
---
drivers/watchdog/Kconfig | 10 ++
drivers/watchdog/Makefile | 1 +
drivers/watchdog/zx2967_wdt.c | 405 ++
3 files changed, 416 insertions(+)
create mode 100644 drivers/watchdog/zx2967_wdt.c
diff --git a/drivers/watchdog/Kconfig b/drivers/watchdog/Kconfig
index 3eb58cb..79027da 100644
--- a/drivers/watchdog/Kconfig
+++ b/drivers/watchdog/Kconfig
@@ -714,6 +714,16 @@ config ASPEED_WATCHDOG
To compile this driver as a module, choose M here: the
module will be called aspeed_wdt.
+config ZX2967_WATCHDOG
+ tristate "ZTE zx2967 SoCs watchdog support"
+ depends on ARCH_ZX
+ select WATCHDOG_CORE
+ help
+ Say Y here to include support for the watchdog timer
+ in ZTE zx2967 SoCs.
+ To compile this driver as a module, choose M here: the
+ module will be called zx2967_wdt.
+
# AVR32 Architecture
config AT32AP700X_WDT
diff --git a/drivers/watchdog/Makefile b/drivers/watchdog/Makefile
index caa9f4a..ea08925 100644
--- a/drivers/watchdog/Makefile
+++ b/drivers/watchdog/Makefile
@@ -82,6 +82,7 @@ obj-$(CONFIG_BCM7038_WDT) += bcm7038_wdt.o
obj-$(CONFIG_ATLAS7_WATCHDOG) += atlas7_wdt.o
obj-$(CONFIG_RENESAS_WDT) += renesas_wdt.o
obj-$(CONFIG_ASPEED_WATCHDOG) += aspeed_wdt.o
+obj-$(CONFIG_ZX2967_WATCHDOG) += zx2967_wdt.o
# AVR32 Architecture
obj-$(CONFIG_AT32AP700X_WDT) += at32ap700x_wdt.o
diff --git a/drivers/watchdog/zx2967_wdt.c b/drivers/watchdog/zx2967_wdt.c
new file mode 100644
index 000..8791dd2
--- /dev/null
+++ b/drivers/watchdog/zx2967_wdt.c
@@ -0,0 +1,405 @@
+/*
+ * watchdog driver for ZTE's zx2967 family
+ *
+ * Copyright (C) 2017 ZTE Ltd.
+ *
+ * Author: Baoyou Xie
+ *
+ * License terms: GNU General Public License (GPL) version 2
+ */
+
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
+
+#define ZX2967_WDT_CFG_REG 0x4
+#define ZX2967_WDT_LOAD_REG0x8
+#define ZX2967_WDT_REFRESH_REG 0x18
+#define ZX2967_WDT_START_REG 0x1c
+
+#define ZX2967_WDT_REFRESH_MASK0x3f
+
+#define ZX2967_WDT_CFG_DIV(n) n)&0xff) - 1) << 8)
+#define ZX2967_WDT_START_EN0x1
+
+#define ZX2967_WDT_WRITEKEY0x1234
+
+#define ZX2967_WDT_DIV_DEFAULT 16
+#define ZX2967_WDT_DEFAULT_TIMEOUT 32
+#define ZX2967_WDT_MIN_TIMEOUT 1
+#define ZX2967_WDT_MAX_TIMEOUT 500
+#define ZX2967_WDT_MAX_COUNT 0x
+
+#define ZX2967_WDT_FLAG_REBOOT_MON (1 << 0)
+
+#define ZX2967_RESET_MASK_REG 0xb0
+
+#define zx2967_wdt_write_reg(v, r) \
+ writel((v) | ZX2967_WDT_WRITEKEY, r)
+#define zx2967_wdt_read_reg(r) readl(r)
+
+static bool nowayout = WATCHDOG_NOWAYOUT;
+static unsigned int timeout = ZX2967_WDT_DEFAULT_TIMEOUT;
+
+struct zx2967_wdt {
+ struct device *dev;
+ struct clk *clock;
+ void __iomem*reg_base;
+ unsigned intconf;
+ unsigned intload;
+ unsigned intflags;
+ spinlock_t lock;
+ struct watchdog_device wdt_device;
+ struct notifier_block restart_handler;
+ struct notifier_block reboot_handler;
+};
+
+static void zx2967_wdt_refresh(struct zx2967_wdt *wdt)
+{
+ unsigned int val;
+
+ spin_lock(&wdt->lock);
+
+ val = zx2967_wdt_read_reg(wdt->reg_base + ZX2967_WDT_REFRESH_REG);
+ val ^= ZX2967_WDT_REFRESH_MASK;
+ zx2967_wdt_write_reg(val, wdt->reg_base + ZX2967_WDT_REFRESH_REG);
+
+ spin_unlock(&wdt->lock);
+}
+
+static void __zx2967_wdt_stop(struct zx2967_wdt *wdt)
+{
+ unsigned int val;
+
+ spin_lock(&wdt->lock);
+
+ val = zx2967_wdt_read_reg(wdt->reg_base + ZX2967_WDT_START_REG);
+ val &= ~(ZX2967_WDT_START_EN);
+ zx2967_wdt_write_reg(val, wdt->reg_base + ZX2967_WDT_START_REG);
+
+ spin_unlock(&wdt->lock);
+}
+
+static void __zx2967_wdt_start(struct zx2967_wdt *wdt)
+{
+ unsigned int val;
+
+ spin_lock(&wdt->lock);
+
+ val = zx2967_wdt_read_reg(wdt->reg_base + ZX2967_WDT_START_REG);
+ val |= ZX2967_WDT_START_EN;
+ zx2967_wdt_write_reg(val, wdt->reg_base + ZX2967_WDT_START_REG);
+
+ spin_unlock(&wdt->lock);
+}
+
+static unsigned int
+__zx2967_wdt_set_timeout(struct zx2967_wdt *wdt, unsigned int timeout)
+{
+ unsigned int freq = clk_get_rate(wdt->clock);
+ unsigned int divisor = ZX2967_WDT_DIV_DEFAULT, count;
+
+ count = timeout * freq;
+ if (count > divisor * ZX2967_WDT_MAX_COUNT)
+ divisor = DIV_ROUND_UP(count, ZX2967_WDT_MAX_COUNT);
+ count = DIV_ROUND_UP(count, divisor);
+
[PATCH v1 2/3] MAINTAINERS: add zx2967 watchdog controller driver to ARM ZTE architecture
Add the zx2967 watchdog controller driver as maintained by ARM ZTE architecture maintainers, as they're parts of the core IP. Signed-off-by: Baoyou Xie --- MAINTAINERS | 2 ++ 1 file changed, 2 insertions(+) diff --git a/MAINTAINERS b/MAINTAINERS index 08f8155..77f0290 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1983,11 +1983,13 @@ F: drivers/clk/zte/ F: drivers/reset/reset-zx2967.c F: drivers/soc/zte/ F: drivers/thermal/zx* +F: drivers/watchdog/zx2967_wdt.c F: Documentation/devicetree/bindings/arm/zte.txt F: Documentation/devicetree/bindings/clock/zx296702-clk.txt F: Documentation/devicetree/bindings/reset/zte,zx2967-reset.txt F: Documentation/devicetree/bindings/soc/zte/ F: Documentation/devicetree/bindings/thermal/zx* +F: Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt F: include/dt-bindings/soc/zx*.h ARM/ZYNQ ARCHITECTURE -- 2.7.4
[PATCH v1 1/3] dt: bindings: add documentation for zx2967 family watchdog controller
This patch adds dt-binding documentation for zx2967 family
watchdog controller.
Signed-off-by: Baoyou Xie
---
.../bindings/watchdog/zte,zx2967-wdt.txt | 29 ++
1 file changed, 29 insertions(+)
create mode 100644
Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
diff --git a/Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
b/Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
new file mode 100644
index 000..0fe0d40
--- /dev/null
+++ b/Documentation/devicetree/bindings/watchdog/zte,zx2967-wdt.txt
@@ -0,0 +1,29 @@
+ZTE zx2967 Watchdog timer
+
+Required properties:
+
+- compatible : should be one of the following.
+ * zte,zx296718-wdt
+- reg : Specifies base physical address and size of the registers.
+- clocks : Pairs of phandle and specifier referencing the controller's clocks.
+- clock-names: "wdtclk" for the watchdog clock.
+- resets : Reference to the reset controller controlling the watchdog
+ controller.
+- reset-names : Must include the following entries:
+ * wdtrst
+
+Optional properties:
+
+- reset-mask-config : Mask and configuare value that be wrote to aon-sysctrl.
+
+Example:
+
+wdt_ares: watchdog@1465000 {
+ compatible = "zte,zx296718-wdt";
+ reg = <0x1465000 0x1000>;
+ clocks = <&topcrm WDT_WCLK>;
+ clock-names = "wdtclk";
+ resets = <&toprst 35>;
+ reset-names = "wdtrst";
+ reset-mask-config = <1 0x115>;
+};
--
2.7.4
[PATCH] rtl8188eu: core: Remove NULL test before vfree
vfree frees the virtually continuous block of memory beginning at addr. If addr is NULL, no operation is performed. So, NULL test is not needed before vfree(). Signed-off-by: Shyam Saini --- drivers/staging/rtl8188eu/core/rtw_xmit.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/drivers/staging/rtl8188eu/core/rtw_xmit.c b/drivers/staging/rtl8188eu/core/rtw_xmit.c index b60b126..2a65e32 100644 --- a/drivers/staging/rtl8188eu/core/rtw_xmit.c +++ b/drivers/staging/rtl8188eu/core/rtw_xmit.c @@ -246,8 +246,7 @@ void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv) pxmitbuf++; } - if (pxmitpriv->pallocated_xmit_extbuf) - vfree(pxmitpriv->pallocated_xmit_extbuf); + vfree(pxmitpriv->pallocated_xmit_extbuf); rtw_free_hwxmits(padapter); -- 2.7.4
Re: [RFC for GIT] pull-request: add praise to people doing QA
On Sun, Jan 15, 2017 at 4:35 PM, Junio C Hamano wrote: > As to the implementation, I am wondering if we can make this somehow > work well with the "trailers" code we already have, instead of > inventing yet another parser of trailers. > > In its current shape, "interpret-trailers" focuses on "editing" an > existing commit log message to tweak the trailer lines. That mode > of operation would help amending and rebasing, and to do that it > needs to parse the commit log message, identify trailer blocks, > parse out each trailer lines, etc. > > There is no fundamental reason why its output must be an edited > original commit log message---it should be usable as a filter that > picks trailer lines of the selected trailer type, like "Tested-By", > etc. I have been looking at ways to use the interpret-trailers as a way to filter commits and print out trailers, and this sort of feature would be useful to me if it were generic. (and then pull-request could use the generic interface to grab the data and then parse it into a praise format) Thanks, Jake
Re: [PATCH 2/4] clk: samsung: Remove Exynos4415 driver (SoC not supported anymore)
Hi,
On 2017년 01월 14일 21:36, Krzysztof Kozlowski wrote:
> Support for Exynos4415 is going away because there are no internal nor
> external users.
>
> Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"),
> the platform cannot be instantiated so remove also the drivers.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> .../devicetree/bindings/clock/exynos4415-clock.txt | 38 -
> drivers/clk/samsung/Makefile |1 -
> drivers/clk/samsung/clk-exynos4415.c | 1022
>
> include/dt-bindings/clock/exynos4415.h | 360 ---
> 4 files changed, 1421 deletions(-)
> delete mode 100644
> Documentation/devicetree/bindings/clock/exynos4415-clock.txt
> delete mode 100644 drivers/clk/samsung/clk-exynos4415.c
> delete mode 100644 include/dt-bindings/clock/exynos4415.h
Reviewed-by: Chanwoo Choi
[snip]
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH 3/4] pinctrl: samsung: Remove support for Exynos4415 (SoC not supported anymore)
On 2017년 01월 14일 21:36, Krzysztof Kozlowski wrote:
> Support for Exynos4415 is going away because there are no internal nor
> external users.
>
> Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"),
> the platform cannot be instantiated so remove also the drivers.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> drivers/pinctrl/samsung/pinctrl-exynos.c | 75
> ---
> drivers/pinctrl/samsung/pinctrl-samsung.c | 2 -
> drivers/pinctrl/samsung/pinctrl-samsung.h | 1 -
> 3 files changed, 78 deletions(-)
Reviewed-by: Chanwoo Choi
[snip]
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH 1/4] ARM: EXYNOS: Remove Exynos4415 driver (SoC not supported anymore)
On 2017년 01월 14일 21:36, Krzysztof Kozlowski wrote:
> Support for Exynos4415 is going away because there are no internal nor
> external users.
>
> Since commit 46dcf0ff0de3 ("ARM: dts: exynos: Remove exynos4415.dtsi"),
> the platform cannot be instantiated so remove also the mach code.
>
> Signed-off-by: Krzysztof Kozlowski
> ---
> arch/arm/mach-exynos/Kconfig | 5 -
> arch/arm/mach-exynos/exynos.c | 1 -
> arch/arm/mach-exynos/suspend.c | 1 -
> 3 files changed, 7 deletions(-)
Reviewed-by: Chanwoo Choi
[snip]
--
Best Regards,
Chanwoo Choi
S/W Center, Samsung Electronics
Re: [PATCH 0/4] selftest: cpufreq: Add support for cpufreq framework
On 13-01-17, 15:35, Shuah Khan wrote: > Could you please add .gitignore for generated files. You can > send that as a separate patch and don't have to resend the > series. Hi Shuah, > > tools/testing/selftests/Makefile | 1 + > > tools/testing/selftests/cpufreq/Makefile | 8 + > > tools/testing/selftests/cpufreq/cpu.sh | 84 > > tools/testing/selftests/cpufreq/cpufreq.sh | 241 > > ++ > > tools/testing/selftests/cpufreq/governor.sh | 153 ++ > > tools/testing/selftests/cpufreq/main.sh | 194 ++ > > tools/testing/selftests/cpufreq/module.sh| 243 > > +++ > > tools/testing/selftests/cpufreq/special-tests.sh | 115 +++ All I have are .sh files and no intermediate files are generated. Perhaps I don't need any .gitignore entries ? -- viresh
Re: [PATCH v2 6/6] arm: dts: mt2701: Add thermal device node.
On Mon, 2017-01-16 at 11:44 +0800, Dawei Chien wrote:
> On Fri, 2017-01-13 at 16:27 +0100, Matthias Brugger wrote:
> >
> > On 13/01/17 09:42, Erin Lo wrote:
> > > From: Dawei Chien
> > >
> > > Add thermal controller device nodes for MT2701.
> > >
> > > Signed-off-by: Dawei Chien
> > > Signed-off-by: Erin Lo
> > > ---
> > > arch/arm/boot/dts/mt2701.dtsi | 43
> > > +++
> > > 1 file changed, 43 insertions(+)
> > >
> > > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > > index 3847f70..c43d5f8 100644
> > > --- a/arch/arm/boot/dts/mt2701.dtsi
> > > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > > @@ -89,6 +89,36 @@
> > > clock-output-names = "rtc32k";
> > > };
> > >
> > > + thermal-zones {
> > > + cpu_thermal: cpu_thermal {
> > > + polling-delay-passive = <1000>; /* milliseconds */
> > > + polling-delay = <1000>; /* milliseconds */
> > > +
> > > + thermal-sensors = <&thermal 0>;
> > > + sustainable-power = <1000>;
> > > +
> > > + trips {
> > > + threshold: trip-point@0 {
> > > + temperature = <68000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + target: trip-point@1 {
> > > + temperature = <85000>;
> > > + hysteresis = <2000>;
> > > + type = "passive";
> > > + };
> > > +
> > > + cpu_crit: cpu_crit@0 {
> > > + temperature = <115000>;
> > > + hysteresis = <2000>;
> > > + type = "critical";
> > > + };
> > > + };
> > > + };
> > > + };
> > > +
> > > timer {
> > > compatible = "arm,armv7-timer";
> > > interrupt-parent = <&gic>;
> > > @@ -270,6 +300,19 @@
> > > status = "disabled";
> > > };
> > >
> > > + thermal: thermal@1100b000 {
> > > + #thermal-sensor-cells = <0>;
> > > + compatible = "mediatek,mt2701-thermal";
> > > + reg = <0 0x1100b000 0 0x1000>;
> > > + interrupts = ;
> > > + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > > + clock-names = "therm", "auxadc";
> > > + resets = <&pericfg 0x10>;
> >
> > should be MT2701_PERI_AUXADC_SW_RST, right?
> >
> Thank you for your reminding, I didn't realize mt2701-resets.h upstream
> already, I would update on next version, thank you.
>
> resets = <&pericfg MT2701_PERI_AUXADC_SW_RST>;
Actually, Should be MT2701_PERI_THERM_SW_RST.
resets = <&pericfg MT2701_PERI_THERM_SW_RST>;
> > > + reset-names = "therm";
> > > + mediatek,auxadc = <&auxadc>;
> > > + mediatek,apmixedsys = <&apmixedsys>;
> > > + };
> > > +
> > > nandc: nfi@1100d000 {
> > > compatible = "mediatek,mt2701-nfc";
> > > reg = <0 0x1100d000 0 0x1000>;
> > >
>
Re: [PATCH v2 6/6] arm: dts: mt2701: Add thermal device node.
On Fri, 2017-01-13 at 16:27 +0100, Matthias Brugger wrote:
>
> On 13/01/17 09:42, Erin Lo wrote:
> > From: Dawei Chien
> >
> > Add thermal controller device nodes for MT2701.
> >
> > Signed-off-by: Dawei Chien
> > Signed-off-by: Erin Lo
> > ---
> > arch/arm/boot/dts/mt2701.dtsi | 43
> > +++
> > 1 file changed, 43 insertions(+)
> >
> > diff --git a/arch/arm/boot/dts/mt2701.dtsi b/arch/arm/boot/dts/mt2701.dtsi
> > index 3847f70..c43d5f8 100644
> > --- a/arch/arm/boot/dts/mt2701.dtsi
> > +++ b/arch/arm/boot/dts/mt2701.dtsi
> > @@ -89,6 +89,36 @@
> > clock-output-names = "rtc32k";
> > };
> >
> > + thermal-zones {
> > + cpu_thermal: cpu_thermal {
> > + polling-delay-passive = <1000>; /* milliseconds */
> > + polling-delay = <1000>; /* milliseconds */
> > +
> > + thermal-sensors = <&thermal 0>;
> > + sustainable-power = <1000>;
> > +
> > + trips {
> > + threshold: trip-point@0 {
> > + temperature = <68000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + target: trip-point@1 {
> > + temperature = <85000>;
> > + hysteresis = <2000>;
> > + type = "passive";
> > + };
> > +
> > + cpu_crit: cpu_crit@0 {
> > + temperature = <115000>;
> > + hysteresis = <2000>;
> > + type = "critical";
> > + };
> > + };
> > + };
> > + };
> > +
> > timer {
> > compatible = "arm,armv7-timer";
> > interrupt-parent = <&gic>;
> > @@ -270,6 +300,19 @@
> > status = "disabled";
> > };
> >
> > + thermal: thermal@1100b000 {
> > + #thermal-sensor-cells = <0>;
> > + compatible = "mediatek,mt2701-thermal";
> > + reg = <0 0x1100b000 0 0x1000>;
> > + interrupts = ;
> > + clocks = <&pericfg CLK_PERI_THERM>, <&pericfg CLK_PERI_AUXADC>;
> > + clock-names = "therm", "auxadc";
> > + resets = <&pericfg 0x10>;
>
> should be MT2701_PERI_AUXADC_SW_RST, right?
>
Thank you for your reminding, I didn't realize mt2701-resets.h upstream
already, I would update on next version, thank you.
resets = <&pericfg MT2701_PERI_AUXADC_SW_RST>;
> > + reset-names = "therm";
> > + mediatek,auxadc = <&auxadc>;
> > + mediatek,apmixedsys = <&apmixedsys>;
> > + };
> > +
> > nandc: nfi@1100d000 {
> > compatible = "mediatek,mt2701-nfc";
> > reg = <0 0x1100d000 0 0x1000>;
> >
Re: [PATCH v6 23/25] usb: chipidea: Pullup D+ in device mode via phy APIs
On Fri, Jan 13, 2017 at 12:03:00PM -0800, Stephen Boyd wrote: > Quoting Peter Chen (2017-01-12 19:35:36) > > On Thu, Jan 12, 2017 at 02:49:51PM -0800, Stephen Boyd wrote: > > > > > > With the boards I have, vbus is not routed to the phy. Instead, there's > > > a vbus comparator on the PMIC where the vbus line from the usb > > > receptacle is sent. The vbus extcon driver probes the comparator on the > > > PMIC to see if vbus is present or not and then notifies extcon users > > > when vbus changes. > > > > > > The ULPI register we write in the phy is a vendor specific register > > > (called MISC_A) that has two bits. If you look at > > > qcom_usb_hs_phy_set_mode() in this series you'll see that we set > > > VBUSVLDEXTSEL and VBUSVLDEXT. VBUSVLDEXTSEL controls a mux in the phy > > > that chooses between an internal comparator, in the case where vbus goes > > > to the phy, or an external signal input to the phy, VBUSVLDEXT, to > > > consider as the "session valid" signal. It looks like the session valid > > > signal drives the D+ pullup resistor in the phy. These bits in MISC_A > > > don't matter when the phy is in host mode. > > > > > > So when the board doesn't route vbus to the phy, we have to toggle the > > > VBUSVLDEXT bit to signal to the phy that the vbus is there or not. I > > > also see that we're not supposed to toggle the VBUSVLDEXTSEL bit when in > > > "normal" operating mode. So perhaps we should do everything in the > > > qcom_usb_hs_phy_set_mode() routine during the role switch as you > > > suggest, except toggle the VBUSVLDEXT bit. Toggling the VBUSVLDEXT bit > > > can be done via some new phy op when the extcon triggers? > > > > Why not call phy_set_mode(phy, DEVICE) directly at ci_handle_vbus_change > > when > > you get extcon vbus event? > > > > Right, I can call phy_set_mode(phy, DEVICE) there, but is that correct? > How do we signal vbus is gone, with phy_set_mode(phy, HOST)? Mode > doesn't seem the same as "vbus status changed" so this feels wrong. > So when the board doesn't route vbus to the phy, we have to toggle the > VBUSVLDEXT bit to signal to the phy that the vbus is there or not. I > also see that we're not supposed to toggle the VBUSVLDEXTSEL bit when in > "normal" operating mode. So perhaps we should do everything in the > qcom_usb_hs_phy_set_mode() routine during the role switch as you > suggest, except toggle the VBUSVLDEXT bit. Toggling the VBUSVLDEXT bit > can be done via some new phy op when the extcon triggers? So, you need to call phy_set_mode when switching between host and device. Besides, you also need to toggle VBUSVLDEXT when the external vbus is on or off at device mode (doesn't need for host mode), is it correct? At include/linux/usb/phy.h, we have .set_vbus interface, maybe you need to port it to generic phy framework. -- Best Regards, Peter Chen
Re: [PATCH] virtio_console: fix a crash in config_work_handler
On (Sat) 14 Jan 2017 [11:38:39], G. Campana wrote: > Using control_work instead of config_work as the 3rd argument to > container_of results in an invalid portdev pointer. Indeed, the work > structure is initialized as below: > > INIT_WORK(&portdev->config_work, &config_work_handler); > > It leads to a crash when portdev->vdev is dereferenced later. This bug > is triggered when the guest uses a virtio-console without multiport > feature and receives a config_changed virtio interrupt. Thanks, the patch is fine, but needs signed-off-by. Please also post to virtualizat...@lists.linux-foundation.org Amit
Re: [PATCH v2] checkpatch: update $logFunctions
On Mon, 2017-01-16 at 11:25 +0800, miles.c...@mediatek.com wrote:
> From: Miles Chen
>
> Currently checkpatch.pl does not recognize printk_deferred* functions as
> log functions and complains about the line length of printk_deferred*
> functoins. Add printk_deferred* to logFunctions to fix it.
Thanks Miles.
s/functoins/functions/
Andrew, if you apply this, could you please correct
the spello above?
> Signed-off-by: Miles Chen
Acked-by: Joe Perches
> ---
> scripts/checkpatch.pl | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> index 982c52c..36e5932 100755
> --- a/scripts/checkpatch.pl
> +++ b/scripts/checkpatch.pl
> @@ -424,7 +424,7 @@ our $typeTypedefs = qr{(?x:
> our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
>
> our $logFunctions = qr{(?x:
> - printk(?:_ratelimited|_once|)|
> + printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
>
> (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
> WARN(?:_RATELIMIT|_ONCE|)|
> panic|
Re: [PATCH 1/2] ocfs2/dlmglue: prepare tracking logic to avoid recursive cluster lock
Hi Junxiao,
OK, good suggestion. Hrm, but in order to align with "ocfs2_inc_holders", I
think it's good to keep those function names as it is;-)
that name is also not very clear. Maybe you can make another patch to
clear it.
Maybe, the name completeness needs to compromise with the name length at
some time. One of basic rules is whether the name may confuse the reader.
In this case, "ocfs2_inc_holders" in dlmglue.c sounds good to me, not
ambiguous.
I want to go with it. Anyone who don't like the name can propose their patch
for it;-)
Thanks,
Eric
Thanks,
Junxiao.
Thanks for your review!
Eric
Thanks,
Junxiao.
+struct list_head oh_list;
+struct pid *oh_owner_pid;
+};
+
/* ocfs2_inode_lock_full() 'arg_flags' flags */
/* don't wait on recovery. */
#define OCFS2_META_LOCK_RECOVERY(0x01)
@@ -77,6 +82,8 @@ struct ocfs2_orphan_scan_lvb {
#define OCFS2_META_LOCK_NOQUEUE(0x02)
/* don't block waiting for the downconvert thread, instead return
-EAGAIN */
#define OCFS2_LOCK_NONBLOCK(0x04)
+/* just get back disk inode bh if we've got cluster lock. */
+#define OCFS2_META_LOCK_GETBH(0x08)
/* Locking subclasses of inode cluster lock */
enum {
@@ -170,4 +177,15 @@ void ocfs2_put_dlm_debug(struct ocfs2_dlm_debug
*dlm_debug);
/* To set the locking protocol on module initialization */
void ocfs2_set_locking_protocol(void);
+
+/*
+ * Keep a list of processes who have interest in a lockres.
+ * Note: this is now only uesed for check recursive cluster lock.
+ */
+inline void ocfs2_add_holder(struct ocfs2_lock_res *lockres,
+ struct ocfs2_holder *oh);
+inline void ocfs2_remove_holder(struct ocfs2_lock_res *lockres,
+ struct ocfs2_holder *oh);
+inline struct ocfs2_holder *ocfs2_is_locked_by_me(struct
ocfs2_lock_res *lockres);
+
#endif/* DLMGLUE_H */
diff --git a/fs/ocfs2/ocfs2.h b/fs/ocfs2/ocfs2.h
index 7e5958b..0c39d71 100644
--- a/fs/ocfs2/ocfs2.h
+++ b/fs/ocfs2/ocfs2.h
@@ -172,6 +172,7 @@ struct ocfs2_lock_res {
struct list_head l_blocked_list;
struct list_head l_mask_waiters;
+struct list_head l_holders;
unsigned long l_flags;
char l_name[OCFS2_LOCK_ID_MAX_LEN];
Re: [LSF/MM TOPIC] [LSF/MM ATTEND] md raid general discussion
On 01/10/2017 12:38 AM, Coly Li wrote: Hi Folks, I'd like to propose a general md raid discussion, it is quite necessary for most of active md raid developers sit together to discuss current challenge of Linux software raid and development trends. In the last years, we have many development activities in md raid, e.g. raid5 cache, raid1 clustering, partial parity log, fast fail upstreaming, and some effort for raid1 & raid0 performance improvement. I see there are some kind of functionality overlap between r5cache (raid5 cache) and PPL (partial parity log), currently I have no idea where we will go for these two development activities. Also I receive reports from users that raid1 performance is desired when it is built on NVMe SSDs as a cache (maybe bcache or dm-cache). I am working on some raid1 performance improvement (e.g. new raid1 I/O barrier and lockless raid1 I/O submit), and have some more ideas to discuss. Therefore, if md raid developers may have a chance to sit together, discuss how to efficiently collaborate in next year, it will be much more productive then communicating on mailing list. I would like to attend raid discussion, besides above topics I think we can talk about improve the test suite of mdadm to make it more robust (I can share related test suite which is used for clustered raid). And I could share the status of clustered raid about what we have done and what we can do in the future. Finally, I'd like to know/discuss about the roadmap of RAID. Thanks a lot! Guoqing
[PATCH] fix race caused by hyperthreads when online an offline cpu
After online an offline cpu, cpu_hw_events.excl_thread_id will always be
set to 1 in intel_pmu_cpu_starting() even when its sibling's excl_thread_id
is also 1. Then the two siblings will use the same state in their shared
cpu_hw_events.excl_cntrs, it will cause race problem.
The race senario is like this:
Two cpu (7 and 19) are siblings, excl_thread_id of 7 and 19 are 0 and 1.
After offline and online cpu 7, intel_pmu_cpu_starting() will set excl_thread_id
of cpu 7 to 1. Then both cpu 7 and 19 will use the same state in their
shared cpu_hw_events.excl_cntrs.
cpu7cpu19
--- ---
intel_start_scheduling()
set state->sched_started = true
intel_put_excl_constraints() {
if (!state->sched_started)
spin_lock // not executed
intel_stop_scheduling()
set state->sched_started = false
if (!state->sched_started)
spin_unlock// excuted
Signed-off-by: NuoHan Qiao
Signed-off-by: Zhou Chengming
---
arch/x86/events/intel/core.c |7 +--
1 files changed, 5 insertions(+), 2 deletions(-)
diff --git a/arch/x86/events/intel/core.c b/arch/x86/events/intel/core.c
index a74a2db..593d8c9 100644
--- a/arch/x86/events/intel/core.c
+++ b/arch/x86/events/intel/core.c
@@ -3164,13 +3164,16 @@ static void intel_pmu_cpu_starting(int cpu)
if (x86_pmu.flags & PMU_FL_EXCL_CNTRS) {
for_each_cpu(i, topology_sibling_cpumask(cpu)) {
+ struct cpu_hw_events *sibling;
struct intel_excl_cntrs *c;
- c = per_cpu(cpu_hw_events, i).excl_cntrs;
+ sibling = &per_cpu(cpu_hw_events, i);
+ c = sibling->excl_cntrs;
if (c && c->core_id == core_id) {
cpuc->kfree_on_online[1] = cpuc->excl_cntrs;
cpuc->excl_cntrs = c;
- cpuc->excl_thread_id = 1;
+ if (!sibling->excl_thread_id)
+ cpuc->excl_thread_id = 1;
break;
}
}
--
1.7.7
[PATCH v2] checkpatch: update $logFunctions
From: Miles Chen
Currently checkpatch.pl does not recognize printk_deferred* functions as
log functions and complains about the line length of printk_deferred*
functoins. Add printk_deferred* to logFunctions to fix it.
Signed-off-by: Miles Chen
---
scripts/checkpatch.pl | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 982c52c..36e5932 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -424,7 +424,7 @@ our $typeTypedefs = qr{(?x:
our $zero_initializer = qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
our $logFunctions = qr{(?x:
- printk(?:_ratelimited|_once|)|
+ printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
(?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
WARN(?:_RATELIMIT|_ONCE|)|
panic|
--
1.9.1
Re: [RFC PATCH] ext4: increase the protection of drop nlink and ext4 inode destroy
on 2017/1/11 23:34, Theodore Ts'o wrote:
> On Wed, Jan 11, 2017 at 05:07:29PM +0800, zhangyi (F) wrote:
>>
>> (1) The file we want to unlink have many hard links, but only one dcache
>> entry in memory.
>> (2) open this file, but it's inode->i_nlink read from disk was 1 (too low).
>> (3) some one call rename and drop it's i_nlink to zero.
>> (4) it's inode is still in use and do not destroy (not closed), at the same
>> time,
>> some others open it's hard link and create a dcache entry.
>> (5) call rename again and it's i_nlink will still underflow and cause memory
>> corruption.
>
> Do you have reproducers that make it easy to reproduce situations like
> this? (It shouldn't be hard to write, but if you have them already
> will save me some effort. :-)
>
I make a reproducer, we can do the following steps to reproduce this probrem
easily:
1) mount a ext4 file system, and create 3 files and 1 hard link,
#mount /dev/sdax /mnt
#cd /mnt
#touch old_file1 old_file2 new_file
#ln new_file new_link1
2) umount the file system and use the debugfs to change new_file's
links_count value to 1, which is used to simulate the fs inconsistency,
#umount /mnt
#debugfs /dev/sdax -w
set_inode_field new_file links_count 1
3) mount the fs again, and then execute the following program (Note:
do not execute the ls cmd, it will create the second dcache entry),
#define RENAME_OLD_FILE_1 "old_file1"
#define RENAME_OLD_FILE_2 "old_file2"
#define RENAME_NEW_FILE"new_file"
#define NEW_FILE_LINK_1"new_link1"
int main(int argc, char *argv[])
{
int fd = 0;
int err = 0;
fd = open(RENAME_NEW_FILE, O_RDONLY);
if (fd < 0) {
printf("open error:%d\n", errno);
return -1;
}
err = rename(RENAME_OLD_FILE_1, RENAME_NEW_FILE);
if (err < 0) {
printf("rename error:%d\n", errno);
close(fd);
return -1;
}
err = rename(RENAME_OLD_FILE_2, NEW_FILE_LINK_1);
if (err < 0) {
printf("rename error:%d\n", errno);
close(fd);
return -1;
}
close(fd);
return 0;
}
4) after this, the new_file's inode->i_nlink is underflowed and add to orphan
list,
kernel dump like this:
[ cut here ]
WARNING: CPU: 0 PID: 1814 at fs/inode.c:282 drop_nlink+0x3e/0x50
...
Call Trace:
dump_stack+0x63/0x86
__warn+0xcb/0xf0
warn_slowpath_null+0x1d/0x20
drop_nlink+0x3e/0x50
ext4_rename+0x532/0x8c0
ext4_rename2+0x1d/0x30
vfs_rename+0x728/0x940
? __lookup_hash+0x20/0xa0
SyS_rename+0x3ba/0x3e0
entry_SYSCALL_64_fastpath+0x1a/0xa9
...
---[ end trace b157dacbc891e6e8 ]---
5) then, we trigger mem shrink, this inode will be destroyed but it is still
on the orphan list,
#echo 3 > /proc/sys/vm/drop_caches
kernrl dump:
EXT4-fs (sdb1): Inode 16 (98f4b3285c20): orphan list check failed!
...
98f4b3285d30: fa87e800 98f4 b3285e80 98f4 .^(.
98f4b3285d40: b20829d8 98f4 0010 .)..
98f4b3285d50:
...
Call Trace:
dump_stack+0x63/0x86
ext4_destroy_inode+0xa0/0xb0
destroy_inode+0x3b/0x60
evict+0x130/0x1c0
dispose_list+0x4d/0x70
prune_icache_sb+0x5a/0x80
super_cache_scan+0x14b/0x1a0
shrink_slab.part.40+0x1f5/0x420
shrink_slab+0x29/0x30
drop_slab_node+0x31/0x60
drop_slab+0x3f/0x70
drop_caches_sysctl_handler+0x71/0xc0
proc_sys_call_handler+0xea/0x110
proc_sys_write+0x14/0x20
__vfs_write+0x37/0x160
? selinux_file_permission+0xd7/0x110
? security_file_permission+0x3b/0xc0
vfs_write+0xb5/0x1a0
SyS_write+0x55/0xc0
entry_SYSCALL_64_fastpath+0x1a/0xa9
...
bash (1594): drop_caches: 3
6) Some time later, if we change the orphan list, it will cause memory
corruption.
Thanks.
zhangyi
Re: [PATCH 2/2] ocfs2: fix deadlocks when taking inode lock at vfs entry points
On 01/16/2017 11:13 AM, Junxiao Bi wrote:
On 01/16/2017 11:06 AM, Eric Ren wrote:
Hi Junxiao,
On 01/16/2017 10:46 AM, Junxiao Bi wrote:
If had_lock==true, it is a bug? I think we should BUG_ON for it, that
can help us catch bug at the first time.
Good idea! But I'm not sure if "ocfs2_setattr" is always the first one
who takes the cluster lock.
It's harder for me to name all the possible paths;-/
The BUG_ON() can help catch the path where ocfs2_setattr is not the
first one.
Yes, I understand. But, the problem is that the vfs entries calling
order is out of our control.
I don't want to place an assertion where I'm not 100% sure it's
absolutely right;-)
If it is not the first one, is it another recursive locking bug? In this
case, if you don't like BUG_ON(), you can dump the call trace and print
some warning message.
Yes! I like this idea, will add it in next version, thanks!
Eric
Thanks,
Junxiao.
Thanks,
Eric
Thanks,
Junxiao.
+if (had_lock)
+arg_flags = OCFS2_META_LOCK_GETBH;
+status = ocfs2_inode_lock_full(inode, &bh, 1, arg_flags);
if (status < 0) {
if (status != -ENOENT)
mlog_errno(status);
goto bail_unlock_rw;
}
-inode_locked = 1;
+if (!had_lock) {
+ocfs2_add_holder(lockres, &oh);
+inode_locked = 1;
+}
if (size_change) {
status = inode_newsize_ok(inode, attr->ia_size);
@@ -1260,7 +1270,8 @@ int ocfs2_setattr(struct dentry *dentry, struct
iattr *attr)
bail_commit:
ocfs2_commit_trans(osb, handle);
bail_unlock:
-if (status) {
+if (status && inode_locked) {
+ocfs2_remove_holder(lockres, &oh);
ocfs2_inode_unlock(inode, 1);
inode_locked = 0;
}
@@ -1278,8 +1289,10 @@ int ocfs2_setattr(struct dentry *dentry,
struct iattr *attr)
if (status < 0)
mlog_errno(status);
}
-if (inode_locked)
+if (inode_locked) {
+ocfs2_remove_holder(lockres, &oh);
ocfs2_inode_unlock(inode, 1);
+}
brelse(bh);
return status;
@@ -1321,20 +1334,31 @@ int ocfs2_getattr(struct vfsmount *mnt,
int ocfs2_permission(struct inode *inode, int mask)
{
int ret;
+int has_locked;
+struct ocfs2_holder oh;
+struct ocfs2_lock_res *lockres;
if (mask & MAY_NOT_BLOCK)
return -ECHILD;
-ret = ocfs2_inode_lock(inode, NULL, 0);
-if (ret) {
-if (ret != -ENOENT)
-mlog_errno(ret);
-goto out;
+lockres = &OCFS2_I(inode)->ip_inode_lockres;
+has_locked = (ocfs2_is_locked_by_me(lockres) != NULL);
The same thing as ocfs2_setattr.
OK. I will think over your suggestions!
Thanks,
Eric
Thanks,
Junxiao.
+if (!has_locked) {
+ret = ocfs2_inode_lock(inode, NULL, 0);
+if (ret) {
+if (ret != -ENOENT)
+mlog_errno(ret);
+goto out;
+}
+ocfs2_add_holder(lockres, &oh);
}
ret = generic_permission(inode, mask);
-ocfs2_inode_unlock(inode, 0);
+if (!has_locked) {
+ocfs2_remove_holder(lockres, &oh);
+ocfs2_inode_unlock(inode, 0);
+}
out:
return ret;
}
Re: [PATCH v1 00/54] block: support multipage bvec
Hi Guys, On Tue, Dec 27, 2016 at 11:55 PM, Ming Lei wrote: > Hi, > > This patchset brings multipage bvec into block layer. Basic > xfstests(-a auto) over virtio-blk/virtio-scsi have been run > and no regression is found, so it should be good enough > to show the approach now, and any comments are welcome! > > 1) what is multipage bvec? > > Multipage bvecs means that one 'struct bio_bvec' can hold > multiple pages which are physically contiguous instead > of one single page used in linux kernel for long time. > > 2) why is multipage bvec introduced? > > Kent proposed the idea[1] first. > > As system's RAM becomes much bigger than before, and > at the same time huge page, transparent huge page and > memory compaction are widely used, it is a bit easy now > to see physically contiguous pages from fs in I/O. > On the other hand, from block layer's view, it isn't > necessary to store intermediate pages into bvec, and > it is enough to just store the physicallly contiguous > 'segment'. > > Also huge pages are being brought to filesystem[2], we > can do IO a hugepage a time[3], requires that one bio can > transfer at least one huge page one time. Turns out it isn't > flexiable to change BIO_MAX_PAGES simply[3]. Multipage bvec > can fit in this case very well. > > With multipage bvec: > > - bio size can be increased and it should improve some > high-bandwidth IO case in theory[4]. > > - Inside block layer, both bio splitting and sg map can > become more efficient than before by just traversing the > physically contiguous 'segment' instead of each page. > > - there is possibility in future to improve memory footprint > of bvecs usage. > > 3) how is multipage bvec implemented in this patchset? > > The 1st 9 patches comment on some special cases. As we saw, > most of cases are found as safe for multipage bvec, > only fs/buffer, MD and btrfs need to deal with. Both fs/buffer > and btrfs are dealt with in the following patches based on some > new block APIs for multipage bvec. > > Given a little more work is involved to cleanup MD, this patchset > introduces QUEUE_FLAG_NO_MP for them, and this component can still > see/use singlepage bvec. In the future, once the cleanup is done, the > flag can be killed. > > The 2nd part(23 ~ 54) implements multipage bvec in block: > > - put all tricks into bvec/bio/rq iterators, and as far as > drivers and fs use these standard iterators, they are happy > with multipage bvec > > - bio_for_each_segment_all() changes > this helper pass pointer of each bvec directly to user, and > it has to be changed. Two new helpers(bio_for_each_segment_all_sp() > and bio_for_each_segment_all_mp()) are introduced. > > Also convert current bio_for_each_segment_all() into the > above two. > > - bio_clone() changes > At default bio_clone still clones one new bio in multipage bvec > way. Also single page version of bio_clone() is introduced > for some special cases, such as only single page bvec is used > for the new cloned bio(bio bounce, ...) > > - btrfs cleanup > just three patches for avoiding direct access to bvec table. > > These patches can be found in the following git tree: > > https://github.com/ming1/linux/commits/mp-bvec-0.6-v4.10-rc > > Thanks Christoph for looking at the early version and providing > very good suggestions, such as: introduce bio_init_with_vec_table(), > remove another unnecessary helpers for cleanup and so on. > > TODO: > - cleanup direct access to bvec table for MD > > V1: > - against v4.10-rc1 and some cleanup in V0 are in -linus already > - handle queue_virt_boundary() in mp bvec change and make NVMe happy > - further BTRFS cleanup > - remove QUEUE_FLAG_SPLIT_MP > - rename for two new helpers of bio_for_each_segment_all() > - fix bounce convertion > - address comments in V0 Any comments on this version? BTW, with one fix in the following link: https://github.com/ming1/linux/commit/e52897a21b4b4c1500cc3686b8392757ebc5bd19 xfstests(ext4, xfs and btrfs) were run and no regression is observed. Also one new patch is introduced to cover dio over block device: https://github.com/ming1/linux/commit/58a0f7a7f6afa74cc29d453f9b5d79304c90aa09 Thanks, Ming > > [1], http://marc.info/?l=linux-kernel&m=141680246629547&w=2 > [2], https://patchwork.kernel.org/patch/9451523/ > [3], http://marc.info/?t=14773544711&r=1&w=2 > [4], http://marc.info/?l=linux-mm&m=147745525801433&w=2 > > > Ming Lei (54): > block: drbd: comment on direct access bvec table > block: loop: comment on direct access to bvec table > kernel/power/swap.c: comment on direct access to bvec table > mm: page_io.c: comment on direct access to bvec table > fs/buffer: comment on direct access to bvec table > f2fs: f2fs_read_end_io: comment on direct access to bvec table > bcache: comment on direct access to bvec table > block: comment on bio_alloc_pages() > block: comment on bio_iov_iter_get_pages() > block: introduce flag Q
Re: [patch net-next] stmmac: indent an if statement
From: Dan Carpenter Date: Thu, 12 Jan 2017 21:46:32 +0300 > The break statement should be indented one more tab. > > Signed-off-by: Dan Carpenter Applied, but like Julia I think we might have a missing of_node_put() here.
Re: [PATCH] checkpatch: update $logFunctions
On Mon, 2017-01-16 at 10:57 +0800, Miles Chen wrote:
> On Fri, 2017-01-13 at 00:14 -0800, Joe Perches wrote:
> > On Fri, 2017-01-13 at 15:38 +0800, miles.c...@mediatek.com wrote:
> > > From: Miles Chen
> > >
> > > Currently checkpatch.pl does not recognize printk_deferred* functions as
> > > log functions and complains about the line length of printk_deferred*
> > > functoins. Add printk_deferred* to logFunctions to fix it.
> >
> > Hi Miles.
> >
> > Good idea, perhaps less good an implementation though.
> >
> > > diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
> >
> > []
> > > @@ -425,7 +425,7 @@ our $zero_initializer =
> > > qr{(?:(?:0[xX])?0+$Int_type?|NULL|false)\b};
> > >
> > > our $logFunctions = qr{(?x:
> > > printk(?:_ratelimited|_once|)|
> > > -
> > > (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|)|
> > > +
> > > (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN|deferred)(?:_ratelimited|_once|)|
> >
> > This should be a change on the line above like
> >
> > printk(?:_ratelimited|_once|_deferred|_deferred_once|)|
> Thanks for your advice, I'll modify my patch and submit it again.
Hello again Miles.
Actually, because perl matches the shortest match first,
the deferred_once should be before the deferred above so
deferred_once matches properly too. ie:
printk(?:_ratelimited|_once|_deferred_once|_deferred|)|
> > Or perhaps changing both lines if there are to be
> > macros/functions like pr__deferred_once someday.
> >
> > printk(?:_ratelimited|_once|_deferred|_deferred_once|)|
> >
> > (?:[a-z0-9]+_){1,2}(?:printk|emerg|alert|crit|err|warning|warn|notice|info|debug|dbg|vdbg|devel|cont|WARN)(?:_ratelimited|_once|_deferred|deferred_once|)|
Here too for both lines if you submit this one.
