This patch uses the phy_id variable in b44_readphy and b44_writephy.
Signed-off-by: Matthew Martin [EMAIL PROTECTED]
---
--- vanilla-linux-2.6.21-git4/drivers/net/b44.c 2007-05-03 11:16:21.0
-0500
+++ linux-2.6.21-git4/drivers/net/b44.c 2007-05-03 17:02:39.0 -0500
@@ -327,45 +327,59 @@ static void b44_enable_ints(struct b44 *
bw32(bp, B44_IMASK, bp-imask);
}
-static int b44_readphy(struct b44 *bp, int reg, u32 *val)
+static int b44_readphy(struct b44 *bp, int reg, u32 *val, int phy_addr)
{
int err;
bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
-(MDIO_OP_READ MDIO_DATA_OP_SHIFT) |
-(bp-phy_addr MDIO_DATA_PMD_SHIFT) |
-(reg MDIO_DATA_RA_SHIFT) |
-(MDIO_TA_VALID MDIO_DATA_TA_SHIFT)));
+
+ if (!phy_addr)
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
+(MDIO_OP_READ MDIO_DATA_OP_SHIFT) |
+(bp-phy_addr MDIO_DATA_PMD_SHIFT) |
+(reg MDIO_DATA_RA_SHIFT) |
+(MDIO_TA_VALID MDIO_DATA_TA_SHIFT)));
+ else
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
+(MDIO_OP_READ MDIO_DATA_OP_SHIFT) |
+(phy_addr MDIO_DATA_PMD_SHIFT) |
+(reg MDIO_DATA_RA_SHIFT) |
+(MDIO_TA_VALID MDIO_DATA_TA_SHIFT)));
+
err = b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
*val = br32(bp, B44_MDIO_DATA) MDIO_DATA_DATA;
return err;
}
-static int b44_writephy(struct b44 *bp, int reg, u32 val)
+static int b44_writephy(struct b44 *bp, int reg, u32 val, int phy_addr)
{
bw32(bp, B44_EMAC_ISTAT, EMAC_INT_MII);
- bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
-(MDIO_OP_WRITE MDIO_DATA_OP_SHIFT) |
-(bp-phy_addr MDIO_DATA_PMD_SHIFT) |
-(reg MDIO_DATA_RA_SHIFT) |
-(MDIO_TA_VALID MDIO_DATA_TA_SHIFT) |
-(val MDIO_DATA_DATA)));
+
+ if (!phy_addr)
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
+(MDIO_OP_WRITE MDIO_DATA_OP_SHIFT) |
+(bp-phy_addr MDIO_DATA_PMD_SHIFT) |
+(reg MDIO_DATA_RA_SHIFT) |
+(MDIO_TA_VALID MDIO_DATA_TA_SHIFT) |
+(val MDIO_DATA_DATA)));
+ else
+ bw32(bp, B44_MDIO_DATA, (MDIO_DATA_SB_START |
+(MDIO_OP_WRITE MDIO_DATA_OP_SHIFT) |
+(phy_addr MDIO_DATA_PMD_SHIFT) |
+(reg MDIO_DATA_RA_SHIFT) |
+(MDIO_TA_VALID MDIO_DATA_TA_SHIFT) |
+(val MDIO_DATA_DATA)));
+
return b44_wait_bit(bp, B44_EMAC_ISTAT, EMAC_INT_MII, 100, 0);
}
/* miilib interface */
-/* FIXME FIXME: phy_id is ignored, bp-phy_addr use is unconditional
- * due to code existing before miilib use was added to this driver.
- * Someone should remove this artificial driver limitation in
- * b44_{read,write}phy. bp-phy_addr itself is fine (and needed).
- */
static int b44_mii_read(struct net_device *dev, int phy_id, int location)
{
u32 val;
struct b44 *bp = netdev_priv(dev);
- int rc = b44_readphy(bp, location, val);
+ int rc = b44_readphy(bp, location, val, phy_id);
if (rc)
return 0x;
return val;
@@ -375,7 +389,7 @@ static void b44_mii_write(struct net_dev
int val)
{
struct b44 *bp = netdev_priv(dev);
- b44_writephy(bp, location, val);
+ b44_writephy(bp, location, val, phy_id);
}
static int b44_phy_reset(struct b44 *bp)
@@ -383,11 +397,11 @@ static int b44_phy_reset(struct b44 *bp)
u32 val;
int err;
- err = b44_writephy(bp, MII_BMCR, BMCR_RESET);
+ err = b44_writephy(bp, MII_BMCR, BMCR_RESET, 0);
if (err)
return err;
udelay(100);
- err = b44_readphy(bp, MII_BMCR, val);
+ err = b44_readphy(bp, MII_BMCR, val, 0);
if (!err) {
if (val BMCR_RESET) {
printk(KERN_ERR PFX %s: PHY Reset would not
complete.\n,
@@ -446,15 +460,15 @@ static int b44_setup_phy(struct b44 *bp)
u32 val;
int err;
- if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, val)) != 0)
+ if ((err = b44_readphy(bp, B44_MII_ALEDCTRL, val, 0)) != 0)
goto out;
if ((err = b44_writephy(bp