Some definitions are generic to the FSI protocol or any
give master implementation. Rename them to remove the
"GPIO" prefix in preparation for moving them to a common
header.
Signed-off-by: Benjamin Herrenschmidt
---
drivers/fsi/fsi-master-gpio.c | 70 ++-
1 file changed, 36 insertions(+), 34 deletions(-)
diff --git a/drivers/fsi/fsi-master-gpio.c b/drivers/fsi/fsi-master-gpio.c
index 2bc85514bb0c..91d89597784a 100644
--- a/drivers/fsi/fsi-master-gpio.c
+++ b/drivers/fsi/fsi-master-gpio.c
@@ -23,26 +23,28 @@
#defineFSI_BREAK_CLOCKS256 /* Number of clocks to issue
break */
#defineFSI_POST_BREAK_CLOCKS 16000 /* Number clocks to set up cfam
*/
#defineFSI_INIT_CLOCKS 5000/* Clock out any old data */
-#defineFSI_GPIO_DPOLL_CLOCKS 50 /* < 21 will cause slave to
hang */
-#defineFSI_GPIO_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL
retry */
+#defineFSI_MASTER_DPOLL_CLOCKS 50 /* < 21 will cause slave to
hang */
+#defineFSI_MASTER_EPOLL_CLOCKS 50 /* Number of clocks for E_POLL
retry */
+
#define FSI_CRC_ERR_RETRIES10
-#defineFSI_GPIO_CMD_DPOLL 0x2
-#defineFSI_GPIO_CMD_EPOLL 0x3
-#defineFSI_GPIO_CMD_TERM 0x3f
-#define FSI_GPIO_CMD_ABS_AR0x4
-#define FSI_GPIO_CMD_REL_AR0x5
-#define FSI_GPIO_CMD_SAME_AR 0x3 /* but only a 2-bit opcode... */
+#defineFSI_CMD_DPOLL 0x2
+#defineFSI_CMD_EPOLL 0x3
+#defineFSI_CMD_TERM0x3f
+#define FSI_CMD_ABS_AR 0x4
+#define FSI_CMD_REL_AR 0x5
+#define FSI_CMD_SAME_AR0x3 /* but only a 2-bit opcode... */
/* Slave responses */
-#defineFSI_GPIO_RESP_ACK 0 /* Success */
-#defineFSI_GPIO_RESP_BUSY 1 /* Slave busy */
-#defineFSI_GPIO_RESP_ERRA 2 /* Any (misc) Error */
-#defineFSI_GPIO_RESP_ERRC 3 /* Slave reports master CRC
error */
+#defineFSI_RESP_ACK0 /* Success */
+#defineFSI_RESP_BUSY 1 /* Slave busy */
+#defineFSI_RESP_ERRA 2 /* Any (misc) Error */
+#defineFSI_RESP_ERRC 3 /* Slave reports master CRC
error */
+
+#defineFSI_MASTER_MAX_BUSY 200
-#defineFSI_GPIO_MAX_BUSY 200
-#defineFSI_GPIO_MTOE_COUNT 1000
-#defineFSI_GPIO_CRC_SIZE 4
+#defineFSI_MASTER_MTOE_COUNT 1000
+#defineFSI_CRC_SIZE4
#define LAST_ADDR_INVALID 0x1
@@ -279,19 +281,19 @@ static void build_ar_command(struct fsi_master_gpio
*master,
/* we still address the byte offset within the word */
addr_bits = 2;
opcode_bits = 2;
- opcode = FSI_GPIO_CMD_SAME_AR;
+ opcode = FSI_CMD_SAME_AR;
trace_fsi_master_gpio_cmd_same_addr(master);
} else if (check_relative_address(master, id, addr, &rel_addr)) {
/* 8 bits plus sign */
addr_bits = 9;
addr = rel_addr;
- opcode = FSI_GPIO_CMD_REL_AR;
+ opcode = FSI_CMD_REL_AR;
trace_fsi_master_gpio_cmd_rel_addr(master, rel_addr);
} else {
addr_bits = 21;
- opcode = FSI_GPIO_CMD_ABS_AR;
+ opcode = FSI_CMD_ABS_AR;
trace_fsi_master_gpio_cmd_abs_addr(master, addr);
}
@@ -327,7 +329,7 @@ static void build_dpoll_command(struct fsi_gpio_msg *cmd,
uint8_t slave_id)
cmd->msg = 0;
msg_push_bits(cmd, slave_id, 2);
- msg_push_bits(cmd, FSI_GPIO_CMD_DPOLL, 3);
+ msg_push_bits(cmd, FSI_CMD_DPOLL, 3);
msg_push_crc(cmd);
}
@@ -337,7 +339,7 @@ static void build_epoll_command(struct fsi_gpio_msg *cmd,
uint8_t slave_id)
cmd->msg = 0;
msg_push_bits(cmd, slave_id, 2);
- msg_push_bits(cmd, FSI_GPIO_CMD_EPOLL, 3);
+ msg_push_bits(cmd, FSI_CMD_EPOLL, 3);
msg_push_crc(cmd);
}
@@ -347,7 +349,7 @@ static void build_term_command(struct fsi_gpio_msg *cmd,
uint8_t slave_id)
cmd->msg = 0;
msg_push_bits(cmd, slave_id, 2);
- msg_push_bits(cmd, FSI_GPIO_CMD_TERM, 6);
+ msg_push_bits(cmd, FSI_CMD_TERM, 6);
msg_push_crc(cmd);
}
@@ -369,14 +371,14 @@ static int read_one_response(struct fsi_master_gpio
*master,
local_irq_save(flags);
/* wait for the start bit */
- for (i = 0; i < FSI_GPIO_MTOE_COUNT; i++) {
+ for (i = 0; i < FSI_MASTER_MTOE_COUNT; i++) {
msg.bits = 0;
msg.msg = 0;
serial_in(master, &msg, 1);
if (msg.msg)
break;
}
- if (i == FSI_GPIO_MTOE_COUNT) {
+ if (i == FSI_MASTER_MTOE_COUNT) {
dev_warn(master->dev,