From: Rafał Miłecki
BCM4908 was built using older PCIe hardware block that requires using
external reset block controlling PERST# signals.
Signed-off-by: Rafał Miłecki
---
.../reset/brcm,bcm4908-misc-pcie-reset.yaml | 39 +++
1 file changed, 39 insertions(+)
create mode 100644
Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
diff --git
a/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
new file mode 100644
index ..88aebb370838
--- /dev/null
+++ b/Documentation/devicetree/bindings/reset/brcm,bcm4908-misc-pcie-reset.yaml
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause
+%YAML 1.2
+---
+$id: http://devicetree.org/schemas/reset/brcm,bcm4908-misc-pcie-reset.yaml#
+$schema: http://devicetree.org/meta-schemas/core.yaml#
+
+title: Broadcom MISC block PCIe reset controller
+
+description: This document describes reset controller handling PCIe PERST#
+ signals. On BCM4908 it's a part of the MISC block.
+
+maintainers:
+ - Rafał Miłecki
+
+properties:
+ compatible:
+const: brcm,bcm4908-misc-pcie-reset
+
+ reg:
+maxItems: 1
+
+ "#reset-cells":
+description: PCIe core id
+const: 1
+
+required:
+ - compatible
+ - reg
+ - "#reset-cells"
+
+additionalProperties: false
+
+examples:
+ - |
+reset-controller@ff802644 {
+compatible = "brcm,bcm4908-misc-pcie-reset";
+reg = <0xff802644 0x04>;
+#reset-cells = <1>;
+};
--
2.26.2