Re: [PATCH 2/3] mtd: mtk-nor: mtk serial flash controller driver
Hi, > > + writeb(len, mt8173_nor->base + MTK_NOR_CNT_REG); > > + return mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_PRG_CMD); > > +} > > + > > +static int mt8173_nor_get_para(struct mt8173_nor *mt8173_nor, u8 *buf, int > > len) > > +{ > > + if (len > 1) { > > + /* read JEDEC ID need 4 bytes commands */ > > + mt8173_nor_set_cmd(mt8173_nor, 0, 32, SPINOR_OP_RDID); > > + buf[2] = readb(mt8173_nor->base + MTK_NOR_SHREG0_REG); > > + buf[1] = readb(mt8173_nor->base + MTK_NOR_SHREG1_REG); > > + buf[0] = readb(mt8173_nor->base + MTK_NOR_SHREG2_REG); > > + } else { > > + if (mt8173_nor_execute_cmd(mt8173_nor, MTK_NOR_RDSR_CMD)) { > > + dev_err(mt8173_nor->dev, "read status failed!\n"); > > + return -EINVAL; > > + } > > + *buf = readb(mt8173_nor->base + MTK_NOR_RDSR_REG); > > + } > > + return 0; > > +} > > + > > +/* cmd1 sent to nor flash, cmd2 write to nor controller */ > > +static int mt8173_nor_set_para(struct mt8173_nor *mt8173_nor, int cmd1, > > + int cmd2) > > +{ > > + if (mt8173_nor_set_cmd(mt8173_nor, 0, 8, SPINOR_OP_WREN)) { > > + dev_err(mt8173_nor->dev, > > + "write enable failed in write protect!\n"); > > + return -EINVAL; > > + } > > + writeb(cmd1, mt8173_nor->base + MTK_NOR_PRGDATA5_REG); > > + writeb(8, mt8173_nor->base + MTK_NOR_CNT_REG); > > + if (mt8173_nor_execute_cmd(mt8173_nor, cmd2)) { > > + dev_err(mt8173_nor->dev, "execute cmd failed!\n"); > > mt8173_nor_execute_cmd() will already have printed an error message. > And mt8173_nor_execute_cmd()/mt8173_nor_set_cmd() returned an error code which should be promoted to the caller rather than inventing a new one. The same for other instances of this code fragment. Lothar Waßmann -- To unsubscribe from this list: send the line "unsubscribe linux-kernel" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html Please read the FAQ at http://www.tux.org/lkml/
Re: [PATCH 2/3] mtd: mtk-nor: mtk serial flash controller driver
On Tue, Sep 08, 2015 at 05:49:55PM +0800, Bayi Cheng wrote: > add spi nor flash driver for mediatek controller > > Signed-off-by: Bayi Cheng > --- > drivers/mtd/spi-nor/Kconfig | 7 + > drivers/mtd/spi-nor/Makefile | 1 + > drivers/mtd/spi-nor/mtk_nor.c | 533 > ++ > 3 files changed, 541 insertions(+) > create mode 100644 drivers/mtd/spi-nor/mtk_nor.c > > diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig > index 89bf4c1..f433890 100644 > --- a/drivers/mtd/spi-nor/Kconfig > +++ b/drivers/mtd/spi-nor/Kconfig > @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR > > if MTD_SPI_NOR > > +config MTD_MT81xx_NOR > + tristate "Support SPI flash Controller MTD_MT81xx_NOR" > + help > + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. > + This controller does nor support generic SPI BUS, It only supports > + SPI NOR Flash. > + > config MTD_SPI_NOR_USE_4K_SECTORS > bool "Use small 4096 B erase sectors" > default y > diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile > index e5e..2f4fe62 100644 > --- a/drivers/mtd/spi-nor/Makefile > +++ b/drivers/mtd/spi-nor/Makefile > @@ -1,3 +1,4 @@ > +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_nor.o > obj-$(CONFIG_MTD_SPI_NOR)+= spi-nor.o > obj-$(CONFIG_SPI_FSL_QUADSPI)+= fsl-quadspi.o > obj-$(CONFIG_SPI_NXP_SPIFI) += nxp-spifi.o > diff --git a/drivers/mtd/spi-nor/mtk_nor.c b/drivers/mtd/spi-nor/mtk_nor.c > new file mode 100644 > index 000..e675fb6 > --- /dev/null > +++ b/drivers/mtd/spi-nor/mtk_nor.c > @@ -0,0 +1,533 @@ > +/* > + * Copyright (c) 2015 MediaTek Inc. > + * Author: Bayi.Cheng > + * > + * This program is free software; you can redistribute it and/or modify > + * it under the terms of the GNU General Public License version 2 as > + * published by the Free Software Foundation. > + * > + * This program is distributed in the hope that it will be useful, > + * but WITHOUT ANY WARRANTY; without even the implied warranty of > + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the > + * GNU General Public License for more details. > + */ > + > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > +#include > + > +#define MTK_NOR_CMD_REG 0x00 > +#define MTK_NOR_CNT_REG 0x04 > +#define MTK_NOR_RDSR_REG 0x08 > +#define MTK_NOR_RDATA_REG0x0c > +#define MTK_NOR_RADR0_REG0x10 > +#define MTK_NOR_RADR1_REG0x14 > +#define MTK_NOR_RADR2_REG0x18 > +#define MTK_NOR_WDATA_REG0x1c > +#define MTK_NOR_PRGDATA0_REG 0x20 > +#define MTK_NOR_PRGDATA1_REG 0x24 > +#define MTK_NOR_PRGDATA2_REG 0x28 > +#define MTK_NOR_PRGDATA3_REG 0x2c > +#define MTK_NOR_PRGDATA4_REG 0x30 > +#define MTK_NOR_PRGDATA5_REG 0x34 > +#define MTK_NOR_SHREG0_REG 0x38 > +#define MTK_NOR_SHREG1_REG 0x3c > +#define MTK_NOR_SHREG2_REG 0x40 > +#define MTK_NOR_SHREG3_REG 0x44 > +#define MTK_NOR_SHREG4_REG 0x48 > +#define MTK_NOR_SHREG5_REG 0x4c > +#define MTK_NOR_SHREG6_REG 0x50 > +#define MTK_NOR_SHREG7_REG 0x54 > +#define MTK_NOR_SHREG8_REG 0x58 > +#define MTK_NOR_SHREG9_REG 0x5c > +#define MTK_NOR_FLHCFG_REG 0x84 > +#define MTK_NOR_PP_DATA_REG 0x98 > +#define MTK_NOR_PREBUF_STUS_REG 0x9c > +#define MTK_NOR_INTRSTUS_REG 0xa8 > +#define MTK_NOR_INTREN_REG 0xac > +#define MTK_NOR_TIME_REG 0x94 > +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 > +#define MTK_NOR_CHKSUM_REG 0xbc > +#define MTK_NOR_CMD2_REG 0xc0 > +#define MTK_NOR_WRPROT_REG 0xc4 > +#define MTK_NOR_RADR3_REG0xc8 > +#define MTK_NOR_DUAL_REG 0xcc > +#define MTK_NOR_DELSEL0_REG 0xa0 > +#define MTK_NOR_DELSEL1_REG 0xa4 > +#define MTK_NOR_DELSEL2_REG 0xd0 > +#define MTK_NOR_DELSEL3_REG 0xd4 > +#define MTK_NOR_DELSEL4_REG 0xd8 > +#define MTK_NOR_CFG1_REG 0x60 > +#define MTK_NOR_CFG2_REG 0x64 > +#define MTK_NOR_CFG3_REG 0x68 > +#define MTK_NOR_STATUS0_REG 0x70 > +#define MTK_NOR_STATUS1_REG 0x74 > +#define MTK_NOR_STATUS2_REG 0x78 > +#define MTK_NOR_STATUS3_REG 0x7c > +/* commands for mtk nor controller */ > +#define MTK_NOR_READ_CMD 0x0 > +#define MTK_NOR_RDSR_CMD 0x2 > +#define MTK_NOR_PRG_CMD 0x4 > +#define MTK_NOR_WR_CMD 0x10 > +#define MTK_NOR_WRSR_CMD 0x20 > +#define MTK_NOR_PIO_READ_CMD 0x81 > +#define MTK_NOR_WR_BUF_ENABLE
[PATCH 2/3] mtd: mtk-nor: mtk serial flash controller driver
add spi nor flash driver for mediatek controller Signed-off-by: Bayi Cheng --- drivers/mtd/spi-nor/Kconfig | 7 + drivers/mtd/spi-nor/Makefile | 1 + drivers/mtd/spi-nor/mtk_nor.c | 533 ++ 3 files changed, 541 insertions(+) create mode 100644 drivers/mtd/spi-nor/mtk_nor.c diff --git a/drivers/mtd/spi-nor/Kconfig b/drivers/mtd/spi-nor/Kconfig index 89bf4c1..f433890 100644 --- a/drivers/mtd/spi-nor/Kconfig +++ b/drivers/mtd/spi-nor/Kconfig @@ -7,6 +7,13 @@ menuconfig MTD_SPI_NOR if MTD_SPI_NOR +config MTD_MT81xx_NOR + tristate "Support SPI flash Controller MTD_MT81xx_NOR" + help + This enables access to SPI Nor flash, using MTD_MT81XX_NOR controller. + This controller does nor support generic SPI BUS, It only supports + SPI NOR Flash. + config MTD_SPI_NOR_USE_4K_SECTORS bool "Use small 4096 B erase sectors" default y diff --git a/drivers/mtd/spi-nor/Makefile b/drivers/mtd/spi-nor/Makefile index e5e..2f4fe62 100644 --- a/drivers/mtd/spi-nor/Makefile +++ b/drivers/mtd/spi-nor/Makefile @@ -1,3 +1,4 @@ +obj-$(CONFIG_MTD_MT81xx_NOR) += mtk_nor.o obj-$(CONFIG_MTD_SPI_NOR) += spi-nor.o obj-$(CONFIG_SPI_FSL_QUADSPI) += fsl-quadspi.o obj-$(CONFIG_SPI_NXP_SPIFI)+= nxp-spifi.o diff --git a/drivers/mtd/spi-nor/mtk_nor.c b/drivers/mtd/spi-nor/mtk_nor.c new file mode 100644 index 000..e675fb6 --- /dev/null +++ b/drivers/mtd/spi-nor/mtk_nor.c @@ -0,0 +1,533 @@ +/* + * Copyright (c) 2015 MediaTek Inc. + * Author: Bayi.Cheng + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License version 2 as + * published by the Free Software Foundation. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include +#include + +#define MTK_NOR_CMD_REG0x00 +#define MTK_NOR_CNT_REG0x04 +#define MTK_NOR_RDSR_REG 0x08 +#define MTK_NOR_RDATA_REG 0x0c +#define MTK_NOR_RADR0_REG 0x10 +#define MTK_NOR_RADR1_REG 0x14 +#define MTK_NOR_RADR2_REG 0x18 +#define MTK_NOR_WDATA_REG 0x1c +#define MTK_NOR_PRGDATA0_REG 0x20 +#define MTK_NOR_PRGDATA1_REG 0x24 +#define MTK_NOR_PRGDATA2_REG 0x28 +#define MTK_NOR_PRGDATA3_REG 0x2c +#define MTK_NOR_PRGDATA4_REG 0x30 +#define MTK_NOR_PRGDATA5_REG 0x34 +#define MTK_NOR_SHREG0_REG 0x38 +#define MTK_NOR_SHREG1_REG 0x3c +#define MTK_NOR_SHREG2_REG 0x40 +#define MTK_NOR_SHREG3_REG 0x44 +#define MTK_NOR_SHREG4_REG 0x48 +#define MTK_NOR_SHREG5_REG 0x4c +#define MTK_NOR_SHREG6_REG 0x50 +#define MTK_NOR_SHREG7_REG 0x54 +#define MTK_NOR_SHREG8_REG 0x58 +#define MTK_NOR_SHREG9_REG 0x5c +#define MTK_NOR_FLHCFG_REG 0x84 +#define MTK_NOR_PP_DATA_REG0x98 +#define MTK_NOR_PREBUF_STUS_REG0x9c +#define MTK_NOR_INTRSTUS_REG 0xa8 +#define MTK_NOR_INTREN_REG 0xac +#define MTK_NOR_TIME_REG 0x94 +#define MTK_NOR_CHKSUM_CTL_REG 0xb8 +#define MTK_NOR_CHKSUM_REG 0xbc +#define MTK_NOR_CMD2_REG 0xc0 +#define MTK_NOR_WRPROT_REG 0xc4 +#define MTK_NOR_RADR3_REG 0xc8 +#define MTK_NOR_DUAL_REG 0xcc +#define MTK_NOR_DELSEL0_REG0xa0 +#define MTK_NOR_DELSEL1_REG0xa4 +#define MTK_NOR_DELSEL2_REG0xd0 +#define MTK_NOR_DELSEL3_REG0xd4 +#define MTK_NOR_DELSEL4_REG0xd8 +#define MTK_NOR_CFG1_REG 0x60 +#define MTK_NOR_CFG2_REG 0x64 +#define MTK_NOR_CFG3_REG 0x68 +#define MTK_NOR_STATUS0_REG0x70 +#define MTK_NOR_STATUS1_REG0x74 +#define MTK_NOR_STATUS2_REG0x78 +#define MTK_NOR_STATUS3_REG0x7c +/* commands for mtk nor controller */ +#define MTK_NOR_READ_CMD 0x0 +#define MTK_NOR_RDSR_CMD 0x2 +#define MTK_NOR_PRG_CMD0x4 +#define MTK_NOR_WR_CMD 0x10 +#define MTK_NOR_WRSR_CMD 0x20 +#define MTK_NOR_PIO_READ_CMD 0x81 +#define MTK_NOR_WR_BUF_ENABLE 0x1 +#define MTK_NOR_WR_BUF_DISABLE 0x0 +#define MTK_NOR_ENABLE_SF_CMD 0x30 +#define MTK_NOR_DUAD_ADDR_EN 0x8 +#define MTK_NOR_QUAD_READ_EN 0x4 +#define MTK_NOR_DUAL_ADDR_EN