subject:"\\\\\\\[PATCH\\\\\\\] ARM\\\\\\\: clk\\\\\\\: add clk\\\\\\\-asm9260 driver"

Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-19 Thread Mike Turquette

Quoting Oleksij Rempel (2015-01-15 01:45:32)
> Am 15.01.2015 um 00:02 schrieb Mike Turquette:
> > Quoting Oleksij Rempel (2015-01-08 00:59:27)
> >> diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
> >> new file mode 100644
> >> index 000..6b1c220
> >> --- /dev/null
> >> +++ b/drivers/clk/clk-asm9260.c
> > 
> > 
> > 
> >> +static const char *clk_names[] = {
> >> +   [REFCLK]= "oscillator",
> >> +   [SYSPLL]= "pll",
> >> +   [I2S0_MCLK] = "i2s0_mclk",
> >> +   [I2S1_MCLK] = "i2s1_mclk",
> >> +   [RTC_OSC]   = "rtc_osc",
> >> +   [USB_PLL]   = "usb_pll",
> >> +};
> > 
> > Why keep this list of names? Only clk_names[REFCLK] is used below and it
> > is overwritten by the name supplied by DT.
> 
> Ok.
> 
> > 
> > 
> >> +static void __init asm9260_acc_init(struct device_node *np)
> >> +{
> >> +   struct clk *clk;
> >> +   u32 rate;
> >> +   int n;
> >> +   u32 accuracy = 0;
> >> +
> >> +   base = of_io_request_and_map(np, 0, np->name);
> >> +   if (!base)
> >> +   panic("%s: unable to map resource", np->name);
> >> +
> >> +   /* register pll */
> >> +   rate = (ioread32(base + HW_SYSPLLCTRL) & 0x) * 100;
> >> +
> >> +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
> >> +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
> >> +   clk = clk_register_fixed_rate_with_accuracy(NULL, 
> >> clk_names[SYSPLL],
> >> +   clk_names[REFCLK], 0, rate, accuracy);
> > 
> > This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
> > __clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
> > propagate accuracy through the clock tree already.
> 
> clk_register_fixed_rate overwrite accuracy to 0. If i use
> clk_register_fixed_rate, then half of my clocks has accuracy = 0.

Ah, interesting. This is a bug that should be fixed. If a fixed-rate
clock has a parent with a non-zero accuracy then we should propagate
that accuracy value at registration-time. I'll look into this soon and
your solution is fine for now. We can always clean it up later.

> 
> >> +
> >> +   if (IS_ERR(clk))
> >> +   panic("%s: can't register REFCLK. Check DT!", np->name);
> >> +
> 
> 
> 
> >> +
> >> +   /* register clk-provider */
> >> +   clk_data.clks = clks;
> >> +   clk_data.clk_num = MAX_CLKS;
> >> +   of_clk_add_provider(np, of_clk_src_onecell_get, _data);
> >> +   return;
> >> +fail:
> >> +   iounmap(base);
> >> +}
> >> +CLK_OF_DECLARE(asm9260_acc, "alphascale,asm9260-clock-controller",
> >> +   asm9260_acc_init);
> > 
> > Where is the DT binding definition for this clock provider?
> > 
> > Thanks,
> > Mike
> > 
> 
> do you mean this patch?
> http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/293147.html
> (probably not last version)
> Should i resend it to you?

No need to resend. DT binding description looks fine (you can add my
Reviewed-by if it is not yet merged), but I like to make sure that the
code doesn't get merged before the binding definition.

Regards,
Mike

> 
> -- 
> Regards,
> Oleksij
> 
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Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-19 Thread Mike Turquette

Quoting Oleksij Rempel (2015-01-15 01:45:32)
 Am 15.01.2015 um 00:02 schrieb Mike Turquette:
  Quoting Oleksij Rempel (2015-01-08 00:59:27)
  diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
  new file mode 100644
  index 000..6b1c220
  --- /dev/null
  +++ b/drivers/clk/clk-asm9260.c
  
  snip
  
  +static const char *clk_names[] = {
  +   [REFCLK]= oscillator,
  +   [SYSPLL]= pll,
  +   [I2S0_MCLK] = i2s0_mclk,
  +   [I2S1_MCLK] = i2s1_mclk,
  +   [RTC_OSC]   = rtc_osc,
  +   [USB_PLL]   = usb_pll,
  +};
  
  Why keep this list of names? Only clk_names[REFCLK] is used below and it
  is overwritten by the name supplied by DT.
 
 Ok.
 
  snip
  
  +static void __init asm9260_acc_init(struct device_node *np)
  +{
  +   struct clk *clk;
  +   u32 rate;
  +   int n;
  +   u32 accuracy = 0;
  +
  +   base = of_io_request_and_map(np, 0, np-name);
  +   if (!base)
  +   panic(%s: unable to map resource, np-name);
  +
  +   /* register pll */
  +   rate = (ioread32(base + HW_SYSPLLCTRL)  0x) * 100;
  +
  +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
  +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
  +   clk = clk_register_fixed_rate_with_accuracy(NULL, 
  clk_names[SYSPLL],
  +   clk_names[REFCLK], 0, rate, accuracy);
  
  This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
  __clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
  propagate accuracy through the clock tree already.
 
 clk_register_fixed_rate overwrite accuracy to 0. If i use
 clk_register_fixed_rate, then half of my clocks has accuracy = 0.

Ah, interesting. This is a bug that should be fixed. If a fixed-rate
clock has a parent with a non-zero accuracy then we should propagate
that accuracy value at registration-time. I'll look into this soon and
your solution is fine for now. We can always clean it up later.

 
  +
  +   if (IS_ERR(clk))
  +   panic(%s: can't register REFCLK. Check DT!, np-name);
  +
 
 snip
 
  +
  +   /* register clk-provider */
  +   clk_data.clks = clks;
  +   clk_data.clk_num = MAX_CLKS;
  +   of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
  +   return;
  +fail:
  +   iounmap(base);
  +}
  +CLK_OF_DECLARE(asm9260_acc, alphascale,asm9260-clock-controller,
  +   asm9260_acc_init);
  
  Where is the DT binding definition for this clock provider?
  
  Thanks,
  Mike
  
 
 do you mean this patch?
 http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/293147.html
 (probably not last version)
 Should i resend it to you?

No need to resend. DT binding description looks fine (you can add my
Reviewed-by if it is not yet merged), but I like to make sure that the
code doesn't get merged before the binding definition.

Regards,
Mike

 
 -- 
 Regards,
 Oleksij
 
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Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-15 Thread Oleksij Rempel

Am 15.01.2015 um 00:02 schrieb Mike Turquette:
> Quoting Oleksij Rempel (2015-01-08 00:59:27)
>> diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
>> new file mode 100644
>> index 000..6b1c220
>> --- /dev/null
>> +++ b/drivers/clk/clk-asm9260.c
> 
> 
> 
>> +static const char *clk_names[] = {
>> +   [REFCLK]= "oscillator",
>> +   [SYSPLL]= "pll",
>> +   [I2S0_MCLK] = "i2s0_mclk",
>> +   [I2S1_MCLK] = "i2s1_mclk",
>> +   [RTC_OSC]   = "rtc_osc",
>> +   [USB_PLL]   = "usb_pll",
>> +};
> 
> Why keep this list of names? Only clk_names[REFCLK] is used below and it
> is overwritten by the name supplied by DT.

Ok.

> 
> 
>> +static void __init asm9260_acc_init(struct device_node *np)
>> +{
>> +   struct clk *clk;
>> +   u32 rate;
>> +   int n;
>> +   u32 accuracy = 0;
>> +
>> +   base = of_io_request_and_map(np, 0, np->name);
>> +   if (!base)
>> +   panic("%s: unable to map resource", np->name);
>> +
>> +   /* register pll */
>> +   rate = (ioread32(base + HW_SYSPLLCTRL) & 0x) * 100;
>> +
>> +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
>> +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
>> +   clk = clk_register_fixed_rate_with_accuracy(NULL, clk_names[SYSPLL],
>> +   clk_names[REFCLK], 0, rate, accuracy);
> 
> This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
> __clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
> propagate accuracy through the clock tree already.

clk_register_fixed_rate overwrite accuracy to 0. If i use
clk_register_fixed_rate, then half of my clocks has accuracy = 0.

>> +
>> +   if (IS_ERR(clk))
>> +   panic("%s: can't register REFCLK. Check DT!", np->name);
>> +



>> +
>> +   /* register clk-provider */
>> +   clk_data.clks = clks;
>> +   clk_data.clk_num = MAX_CLKS;
>> +   of_clk_add_provider(np, of_clk_src_onecell_get, _data);
>> +   return;
>> +fail:
>> +   iounmap(base);
>> +}
>> +CLK_OF_DECLARE(asm9260_acc, "alphascale,asm9260-clock-controller",
>> +   asm9260_acc_init);
> 
> Where is the DT binding definition for this clock provider?
> 
> Thanks,
> Mike
> 

do you mean this patch?
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/293147.html
(probably not last version)
Should i resend it to you?

-- 
Regards,
Oleksij



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Description: OpenPGP digital signature

Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-15 Thread Oleksij Rempel

Am 15.01.2015 um 00:02 schrieb Mike Turquette:
 Quoting Oleksij Rempel (2015-01-08 00:59:27)
 diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
 new file mode 100644
 index 000..6b1c220
 --- /dev/null
 +++ b/drivers/clk/clk-asm9260.c
 
 snip
 
 +static const char *clk_names[] = {
 +   [REFCLK]= oscillator,
 +   [SYSPLL]= pll,
 +   [I2S0_MCLK] = i2s0_mclk,
 +   [I2S1_MCLK] = i2s1_mclk,
 +   [RTC_OSC]   = rtc_osc,
 +   [USB_PLL]   = usb_pll,
 +};
 
 Why keep this list of names? Only clk_names[REFCLK] is used below and it
 is overwritten by the name supplied by DT.

Ok.

 snip
 
 +static void __init asm9260_acc_init(struct device_node *np)
 +{
 +   struct clk *clk;
 +   u32 rate;
 +   int n;
 +   u32 accuracy = 0;
 +
 +   base = of_io_request_and_map(np, 0, np-name);
 +   if (!base)
 +   panic(%s: unable to map resource, np-name);
 +
 +   /* register pll */
 +   rate = (ioread32(base + HW_SYSPLLCTRL)  0x) * 100;
 +
 +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
 +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
 +   clk = clk_register_fixed_rate_with_accuracy(NULL, clk_names[SYSPLL],
 +   clk_names[REFCLK], 0, rate, accuracy);
 
 This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
 __clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
 propagate accuracy through the clock tree already.

clk_register_fixed_rate overwrite accuracy to 0. If i use
clk_register_fixed_rate, then half of my clocks has accuracy = 0.

 +
 +   if (IS_ERR(clk))
 +   panic(%s: can't register REFCLK. Check DT!, np-name);
 +

snip

 +
 +   /* register clk-provider */
 +   clk_data.clks = clks;
 +   clk_data.clk_num = MAX_CLKS;
 +   of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
 +   return;
 +fail:
 +   iounmap(base);
 +}
 +CLK_OF_DECLARE(asm9260_acc, alphascale,asm9260-clock-controller,
 +   asm9260_acc_init);
 
 Where is the DT binding definition for this clock provider?
 
 Thanks,
 Mike
 

do you mean this patch?
http://lists.infradead.org/pipermail/linux-arm-kernel/2014-October/293147.html
(probably not last version)
Should i resend it to you?

-- 
Regards,
Oleksij



signature.asc
Description: OpenPGP digital signature

Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-14 Thread Mike Turquette

Quoting Oleksij Rempel (2015-01-08 00:59:27)
> diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
> new file mode 100644
> index 000..6b1c220
> --- /dev/null
> +++ b/drivers/clk/clk-asm9260.c



> +static const char *clk_names[] = {
> +   [REFCLK]= "oscillator",
> +   [SYSPLL]= "pll",
> +   [I2S0_MCLK] = "i2s0_mclk",
> +   [I2S1_MCLK] = "i2s1_mclk",
> +   [RTC_OSC]   = "rtc_osc",
> +   [USB_PLL]   = "usb_pll",
> +};

Why keep this list of names? Only clk_names[REFCLK] is used below and it
is overwritten by the name supplied by DT.



> +static void __init asm9260_acc_init(struct device_node *np)
> +{
> +   struct clk *clk;
> +   u32 rate;
> +   int n;
> +   u32 accuracy = 0;
> +
> +   base = of_io_request_and_map(np, 0, np->name);
> +   if (!base)
> +   panic("%s: unable to map resource", np->name);
> +
> +   /* register pll */
> +   rate = (ioread32(base + HW_SYSPLLCTRL) & 0x) * 100;
> +
> +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
> +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
> +   clk = clk_register_fixed_rate_with_accuracy(NULL, clk_names[SYSPLL],
> +   clk_names[REFCLK], 0, rate, accuracy);

This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
__clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
propagate accuracy through the clock tree already.

> +
> +   if (IS_ERR(clk))
> +   panic("%s: can't register REFCLK. Check DT!", np->name);
> +
> +   for (n = 0; n < ARRAY_SIZE(asm9260_mux_clks); n++) {
> +   const struct asm9260_mux_clock *mc = _mux_clks[n];
> +
> +   mc->parent_names[0] = clk_names[REFCLK];
> +   clk = clk_register_mux_table(NULL, mc->name, mc->parent_names,
> +   mc->num_parents, mc->flags, base + mc->offset,
> +   0, mc->mask, 0, mc->table, _clk_lock);
> +   }
> +
> +   /* clock mux gate cells */
> +   for (n = 0; n < ARRAY_SIZE(asm9260_mux_gates); n++) {
> +   const struct asm9260_gate_data *gd = _mux_gates[n];
> +
> +   clk = clk_register_gate(NULL, gd->name,
> +   gd->parent_name, gd->flags | CLK_SET_RATE_PARENT,
> +   base + gd->reg, gd->bit_idx, 0, _clk_lock);
> +   }
> +
> +   /* clock div cells */
> +   for (n = 0; n < ARRAY_SIZE(asm9260_div_clks); n++) {
> +   const struct asm9260_div_clk *dc = _div_clks[n];
> +
> +   clks[dc->idx] = clk_register_divider(NULL, dc->name,
> +   dc->parent_name, CLK_SET_RATE_PARENT,
> +   base + dc->reg, 0, 8, CLK_DIVIDER_ONE_BASED,
> +   _clk_lock);
> +   }
> +
> +   /* clock ahb gate cells */
> +   for (n = 0; n < ARRAY_SIZE(asm9260_ahb_gates); n++) {
> +   const struct asm9260_gate_data *gd = _ahb_gates[n];
> +
> +   clks[gd->idx] = clk_register_gate(NULL, gd->name,
> +   gd->parent_name, gd->flags, base + gd->reg,
> +   gd->bit_idx, 0, _clk_lock);
> +   }
> +
> +   /* check for errors on leaf clocks */
> +   for (n = 0; n < MAX_CLKS; n++) {
> +   if (!IS_ERR(clks[n]))
> +   continue;
> +
> +   pr_err("%s: Unable to register leaf clock %d\n",
> +   np->full_name, n);
> +   goto fail;
> +   }
> +
> +   /* register clk-provider */
> +   clk_data.clks = clks;
> +   clk_data.clk_num = MAX_CLKS;
> +   of_clk_add_provider(np, of_clk_src_onecell_get, _data);
> +   return;
> +fail:
> +   iounmap(base);
> +}
> +CLK_OF_DECLARE(asm9260_acc, "alphascale,asm9260-clock-controller",
> +   asm9260_acc_init);

Where is the DT binding definition for this clock provider?

Thanks,
Mike
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Re: [PATCH] ARM: clk: add clk-asm9260 driver

2015-01-14 Thread Mike Turquette

Quoting Oleksij Rempel (2015-01-08 00:59:27)
 diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
 new file mode 100644
 index 000..6b1c220
 --- /dev/null
 +++ b/drivers/clk/clk-asm9260.c

snip

 +static const char *clk_names[] = {
 +   [REFCLK]= oscillator,
 +   [SYSPLL]= pll,
 +   [I2S0_MCLK] = i2s0_mclk,
 +   [I2S1_MCLK] = i2s1_mclk,
 +   [RTC_OSC]   = rtc_osc,
 +   [USB_PLL]   = usb_pll,
 +};

Why keep this list of names? Only clk_names[REFCLK] is used below and it
is overwritten by the name supplied by DT.

snip

 +static void __init asm9260_acc_init(struct device_node *np)
 +{
 +   struct clk *clk;
 +   u32 rate;
 +   int n;
 +   u32 accuracy = 0;
 +
 +   base = of_io_request_and_map(np, 0, np-name);
 +   if (!base)
 +   panic(%s: unable to map resource, np-name);
 +
 +   /* register pll */
 +   rate = (ioread32(base + HW_SYSPLLCTRL)  0x) * 100;
 +
 +   clk_names[REFCLK] = of_clk_get_parent_name(np, 0);
 +   accuracy = clk_get_accuracy(__clk_lookup(clk_names[REFCLK]));
 +   clk = clk_register_fixed_rate_with_accuracy(NULL, clk_names[SYSPLL],
 +   clk_names[REFCLK], 0, rate, accuracy);

This is different. Why do the PLLs inherit REFCLKs accuracy? Please see
__clk_recalc_accuracies in drivers/clk/clk.c if you haven't already. We
propagate accuracy through the clock tree already.

 +
 +   if (IS_ERR(clk))
 +   panic(%s: can't register REFCLK. Check DT!, np-name);
 +
 +   for (n = 0; n  ARRAY_SIZE(asm9260_mux_clks); n++) {
 +   const struct asm9260_mux_clock *mc = asm9260_mux_clks[n];
 +
 +   mc-parent_names[0] = clk_names[REFCLK];
 +   clk = clk_register_mux_table(NULL, mc-name, mc-parent_names,
 +   mc-num_parents, mc-flags, base + mc-offset,
 +   0, mc-mask, 0, mc-table, asm9260_clk_lock);
 +   }
 +
 +   /* clock mux gate cells */
 +   for (n = 0; n  ARRAY_SIZE(asm9260_mux_gates); n++) {
 +   const struct asm9260_gate_data *gd = asm9260_mux_gates[n];
 +
 +   clk = clk_register_gate(NULL, gd-name,
 +   gd-parent_name, gd-flags | CLK_SET_RATE_PARENT,
 +   base + gd-reg, gd-bit_idx, 0, asm9260_clk_lock);
 +   }
 +
 +   /* clock div cells */
 +   for (n = 0; n  ARRAY_SIZE(asm9260_div_clks); n++) {
 +   const struct asm9260_div_clk *dc = asm9260_div_clks[n];
 +
 +   clks[dc-idx] = clk_register_divider(NULL, dc-name,
 +   dc-parent_name, CLK_SET_RATE_PARENT,
 +   base + dc-reg, 0, 8, CLK_DIVIDER_ONE_BASED,
 +   asm9260_clk_lock);
 +   }
 +
 +   /* clock ahb gate cells */
 +   for (n = 0; n  ARRAY_SIZE(asm9260_ahb_gates); n++) {
 +   const struct asm9260_gate_data *gd = asm9260_ahb_gates[n];
 +
 +   clks[gd-idx] = clk_register_gate(NULL, gd-name,
 +   gd-parent_name, gd-flags, base + gd-reg,
 +   gd-bit_idx, 0, asm9260_clk_lock);
 +   }
 +
 +   /* check for errors on leaf clocks */
 +   for (n = 0; n  MAX_CLKS; n++) {
 +   if (!IS_ERR(clks[n]))
 +   continue;
 +
 +   pr_err(%s: Unable to register leaf clock %d\n,
 +   np-full_name, n);
 +   goto fail;
 +   }
 +
 +   /* register clk-provider */
 +   clk_data.clks = clks;
 +   clk_data.clk_num = MAX_CLKS;
 +   of_clk_add_provider(np, of_clk_src_onecell_get, clk_data);
 +   return;
 +fail:
 +   iounmap(base);
 +}
 +CLK_OF_DECLARE(asm9260_acc, alphascale,asm9260-clock-controller,
 +   asm9260_acc_init);

Where is the DT binding definition for this clock provider?

Thanks,
Mike
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[PATCH] ARM: clk: add clk-asm9260 driver

2015-01-08 Thread Oleksij Rempel

Provide CLK support for Alphascale ASM9260 SoC.

Signed-off-by: Oleksij Rempel 
---
 drivers/clk/Makefile   |   1 +
 drivers/clk/clk-asm9260.c  | 359 +
 include/dt-bindings/clock/alphascale,asm9260.h |  97 +++
 3 files changed, 457 insertions(+)
 create mode 100644 drivers/clk/clk-asm9260.c
 create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d5fba5b..3c41a68 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -16,6 +16,7 @@ endif
 
 # hardware specific clock types
 # please keep this section sorted lexicographically by file/directory path name
+obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
 obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)+= clk-axi-clkgen.o
 obj-$(CONFIG_ARCH_AXXIA)   += clk-axm5516.o
 obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
new file mode 100644
index 000..6b1c220
--- /dev/null
+++ b/drivers/clk/clk-asm9260.c
@@ -0,0 +1,359 @@
+/*
+ * Copyright (c) 2014 Oleksij Rempel .
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see .
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#define HW_AHBCLKCTRL0 0x0020
+#define HW_AHBCLKCTRL1 0x0030
+#define HW_SYSPLLCTRL  0x0100
+#define HW_MAINCLKSEL  0x0120
+#define HW_MAINCLKUEN  0x0124
+#define HW_UARTCLKSEL  0x0128
+#define HW_UARTCLKUEN  0x012c
+#define HW_I2S0CLKSEL  0x0130
+#define HW_I2S0CLKUEN  0x0134
+#define HW_I2S1CLKSEL  0x0138
+#define HW_I2S1CLKUEN  0x013c
+#define HW_WDTCLKSEL   0x0160
+#define HW_WDTCLKUEN   0x0164
+#define HW_CLKOUTCLKSEL0x0170
+#define HW_CLKOUTCLKUEN0x0174
+#define HW_CPUCLKDIV   0x017c
+#define HW_SYSAHBCLKDIV0x0180
+#define HW_I2S0MCLKDIV 0x0190
+#define HW_I2S0SCLKDIV 0x0194
+#define HW_I2S1MCLKDIV 0x0188
+#define HW_I2S1SCLKDIV 0x018c
+#define HW_UART0CLKDIV 0x0198
+#define HW_UART1CLKDIV 0x019c
+#define HW_UART2CLKDIV 0x01a0
+#define HW_UART3CLKDIV 0x01a4
+#define HW_UART4CLKDIV 0x01a8
+#define HW_UART5CLKDIV 0x01ac
+#define HW_UART6CLKDIV 0x01b0
+#define HW_UART7CLKDIV 0x01b4
+#define HW_UART8CLKDIV 0x01b8
+#define HW_UART9CLKDIV 0x01bc
+#define HW_SPI0CLKDIV  0x01c0
+#define HW_SPI1CLKDIV  0x01c4
+#define HW_QUADSPICLKDIV   0x01c8
+#define HW_SSP0CLKDIV  0x01d0
+#define HW_NANDCLKDIV  0x01d4
+#define HW_TRACECLKDIV 0x01e0
+#define HW_CAMMCLKDIV  0x01e8
+#define HW_WDTCLKDIV   0x01ec
+#define HW_CLKOUTCLKDIV0x01f4
+#define HW_MACCLKDIV   0x01f8
+#define HW_LCDCLKDIV   0x01fc
+#define HW_ADCANACLKDIV0x0200
+
+static struct clk *clks[MAX_CLKS];
+static struct clk_onecell_data clk_data;
+static DEFINE_SPINLOCK(asm9260_clk_lock);
+
+struct asm9260_div_clk {
+   unsigned int idx;
+   const char *name;
+   const char *parent_name;
+   u32 reg;
+};
+
+struct asm9260_gate_data {
+   unsigned int idx;
+   const char *name;
+   const char *parent_name;
+   u32 reg;
+   u8 bit_idx;
+   unsigned long flags;
+};
+
+struct asm9260_mux_clock {
+   u8  mask;
+   u32 *table;
+   const char  *name;
+   const char  **parent_names;
+   u8  num_parents;
+   unsigned long   offset;
+   unsigned long   flags;
+};
+
+static void __iomem *base;
+
+enum {
+   REFCLK, SYSPLL, I2S0_MCLK, I2S1_MCLK, RTC_OSC, USB_PLL,
+};
+
+static const char *clk_names[] = {
+   [REFCLK]= "oscillator",
+   [SYSPLL]= "pll",
+   [I2S0_MCLK] = "i2s0_mclk",
+   [I2S1_MCLK] = "i2s1_mclk",
+   [RTC_OSC]   = "rtc_osc",
+   [USB_PLL]   = "usb_pll",
+};
+
+static const struct asm9260_div_clk asm9260_div_clks[] __initconst = {
+   { CLKID_SYS_CPU,"cpu_div", "main_gate", HW_CPUCLKDIV },
+   { CLKID_SYS_AHB,"ahb_div", "cpu_div", HW_SYSAHBCLKDIV },
+
+   /* i2s has two deviders: one for

[PATCH] ARM: clk: add clk-asm9260 driver

2015-01-08 Thread Oleksij Rempel

Provide CLK support for Alphascale ASM9260 SoC.

Signed-off-by: Oleksij Rempel li...@rempel-privat.de
---
 drivers/clk/Makefile   |   1 +
 drivers/clk/clk-asm9260.c  | 359 +
 include/dt-bindings/clock/alphascale,asm9260.h |  97 +++
 3 files changed, 457 insertions(+)
 create mode 100644 drivers/clk/clk-asm9260.c
 create mode 100644 include/dt-bindings/clock/alphascale,asm9260.h

diff --git a/drivers/clk/Makefile b/drivers/clk/Makefile
index d5fba5b..3c41a68 100644
--- a/drivers/clk/Makefile
+++ b/drivers/clk/Makefile
@@ -16,6 +16,7 @@ endif
 
 # hardware specific clock types
 # please keep this section sorted lexicographically by file/directory path name
+obj-$(CONFIG_MACH_ASM9260) += clk-asm9260.o
 obj-$(CONFIG_COMMON_CLK_AXI_CLKGEN)+= clk-axi-clkgen.o
 obj-$(CONFIG_ARCH_AXXIA)   += clk-axm5516.o
 obj-$(CONFIG_ARCH_BCM2835) += clk-bcm2835.o
diff --git a/drivers/clk/clk-asm9260.c b/drivers/clk/clk-asm9260.c
new file mode 100644
index 000..6b1c220
--- /dev/null
+++ b/drivers/clk/clk-asm9260.c
@@ -0,0 +1,359 @@
+/*
+ * Copyright (c) 2014 Oleksij Rempel li...@rempel-privat.de.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program.  If not, see http://www.gnu.org/licenses/.
+ */
+
+#include linux/clk.h
+#include linux/clkdev.h
+#include linux/err.h
+#include linux/io.h
+#include linux/clk-provider.h
+#include linux/spinlock.h
+#include linux/of.h
+#include linux/of_address.h
+#include dt-bindings/clock/alphascale,asm9260.h
+
+#define HW_AHBCLKCTRL0 0x0020
+#define HW_AHBCLKCTRL1 0x0030
+#define HW_SYSPLLCTRL  0x0100
+#define HW_MAINCLKSEL  0x0120
+#define HW_MAINCLKUEN  0x0124
+#define HW_UARTCLKSEL  0x0128
+#define HW_UARTCLKUEN  0x012c
+#define HW_I2S0CLKSEL  0x0130
+#define HW_I2S0CLKUEN  0x0134
+#define HW_I2S1CLKSEL  0x0138
+#define HW_I2S1CLKUEN  0x013c
+#define HW_WDTCLKSEL   0x0160
+#define HW_WDTCLKUEN   0x0164
+#define HW_CLKOUTCLKSEL0x0170
+#define HW_CLKOUTCLKUEN0x0174
+#define HW_CPUCLKDIV   0x017c
+#define HW_SYSAHBCLKDIV0x0180
+#define HW_I2S0MCLKDIV 0x0190
+#define HW_I2S0SCLKDIV 0x0194
+#define HW_I2S1MCLKDIV 0x0188
+#define HW_I2S1SCLKDIV 0x018c
+#define HW_UART0CLKDIV 0x0198
+#define HW_UART1CLKDIV 0x019c
+#define HW_UART2CLKDIV 0x01a0
+#define HW_UART3CLKDIV 0x01a4
+#define HW_UART4CLKDIV 0x01a8
+#define HW_UART5CLKDIV 0x01ac
+#define HW_UART6CLKDIV 0x01b0
+#define HW_UART7CLKDIV 0x01b4
+#define HW_UART8CLKDIV 0x01b8
+#define HW_UART9CLKDIV 0x01bc
+#define HW_SPI0CLKDIV  0x01c0
+#define HW_SPI1CLKDIV  0x01c4
+#define HW_QUADSPICLKDIV   0x01c8
+#define HW_SSP0CLKDIV  0x01d0
+#define HW_NANDCLKDIV  0x01d4
+#define HW_TRACECLKDIV 0x01e0
+#define HW_CAMMCLKDIV  0x01e8
+#define HW_WDTCLKDIV   0x01ec
+#define HW_CLKOUTCLKDIV0x01f4
+#define HW_MACCLKDIV   0x01f8
+#define HW_LCDCLKDIV   0x01fc
+#define HW_ADCANACLKDIV0x0200
+
+static struct clk *clks[MAX_CLKS];
+static struct clk_onecell_data clk_data;
+static DEFINE_SPINLOCK(asm9260_clk_lock);
+
+struct asm9260_div_clk {
+   unsigned int idx;
+   const char *name;
+   const char *parent_name;
+   u32 reg;
+};
+
+struct asm9260_gate_data {
+   unsigned int idx;
+   const char *name;
+   const char *parent_name;
+   u32 reg;
+   u8 bit_idx;
+   unsigned long flags;
+};
+
+struct asm9260_mux_clock {
+   u8  mask;
+   u32 *table;
+   const char  *name;
+   const char  **parent_names;
+   u8  num_parents;
+   unsigned long   offset;
+   unsigned long   flags;
+};
+
+static void __iomem *base;
+
+enum {
+   REFCLK, SYSPLL, I2S0_MCLK, I2S1_MCLK, RTC_OSC, USB_PLL,
+};
+
+static const char *clk_names[] = {
+   [REFCLK]= oscillator,
+   [SYSPLL]= pll,
+   [I2S0_MCLK] = i2s0_mclk,
+   [I2S1_MCLK] = i2s1_mclk,
+   [RTC_OSC]   = rtc_osc,
+   [USB_PLL]   = usb_pll,
+};
+
+static const struct asm9260_div_clk asm9260_div_clks[] __initconst = {
+   {

Re: [PATCH] ARM: clk: add clk-asm9260 driver

Re: [PATCH] ARM: clk: add clk-asm9260 driver

Re: [PATCH] ARM: clk: add clk-asm9260 driver

Re: [PATCH] ARM: clk: add clk-asm9260 driver

Re: [PATCH] ARM: clk: add clk-asm9260 driver

Re: [PATCH] ARM: clk: add clk-asm9260 driver

[PATCH] ARM: clk: add clk-asm9260 driver

[PATCH] ARM: clk: add clk-asm9260 driver

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