Re: [PATCH 4/4] soc: mediatek: pm-domains: Add a power domain names for mt8167

2021-03-02 Thread Hsin-Yi Wang
On Fri, Feb 26, 2021 at 1:50 AM Enric Balletbo i Serra
 wrote:
>
> Add the power domains names for the mt8167 SoC.
>
> Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
> Signed-off-by: Enric Balletbo i Serra 
Reviewed-by: Hsin-Yi Wang 
> ---
>
>  drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++
>  1 file changed, 7 insertions(+)
>
> diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h 
> b/drivers/soc/mediatek/mt8167-pm-domains.h
> index ad0b8dfa0527..15559ddf26e4 100644
> --- a/drivers/soc/mediatek/mt8167-pm-domains.h
> +++ b/drivers/soc/mediatek/mt8167-pm-domains.h
> @@ -15,6 +15,7 @@
>
>  static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
> [MT8167_POWER_DOMAIN_MM] = {
> +   .name = "mm",
> .sta_mask = PWR_STATUS_DISP,
> .ctl_offs = SPM_DIS_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -26,6 +27,7 @@ static const struct scpsys_domain_data 
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_VDEC] = {
> +   .name = "vdec",
> .sta_mask = PWR_STATUS_VDEC,
> .ctl_offs = SPM_VDE_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> @@ -33,6 +35,7 @@ static const struct scpsys_domain_data 
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_ISP] = {
> +   .name = "isp",
> .sta_mask = PWR_STATUS_ISP,
> .ctl_offs = SPM_ISP_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> @@ -40,6 +43,7 @@ static const struct scpsys_domain_data 
> scpsys_domain_data_mt8167[] = {
> .caps = MTK_SCPD_ACTIVE_WAKEUP,
> },
> [MT8167_POWER_DOMAIN_MFG_ASYNC] = {
> +   .name = "mfg_async",
> .sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
> .ctl_offs = SPM_MFG_ASYNC_PWR_CON,
> .sram_pdn_bits = 0,
> @@ -50,18 +54,21 @@ static const struct scpsys_domain_data 
> scpsys_domain_data_mt8167[] = {
> },
> },
> [MT8167_POWER_DOMAIN_MFG_2D] = {
> +   .name = "mfg_2d",
> .sta_mask = MT8167_PWR_STATUS_MFG_2D,
> .ctl_offs = SPM_MFG_2D_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_MFG] = {
> +   .name = "mfg",
> .sta_mask = PWR_STATUS_MFG,
> .ctl_offs = SPM_MFG_PWR_CON,
> .sram_pdn_bits = GENMASK(11, 8),
> .sram_pdn_ack_bits = GENMASK(15, 12),
> },
> [MT8167_POWER_DOMAIN_CONN] = {
> +   .name = "conn",
> .sta_mask = PWR_STATUS_CONN,
> .ctl_offs = SPM_CONN_PWR_CON,
> .sram_pdn_bits = GENMASK(8, 8),
> --
> 2.30.0
>


[PATCH 4/4] soc: mediatek: pm-domains: Add a power domain names for mt8167

2021-02-25 Thread Enric Balletbo i Serra
Add the power domains names for the mt8167 SoC.

Fixes: 207f13b419a6 ("soc: mediatek: pm-domains: Add support for mt8167")
Signed-off-by: Enric Balletbo i Serra 
---

 drivers/soc/mediatek/mt8167-pm-domains.h | 7 +++
 1 file changed, 7 insertions(+)

diff --git a/drivers/soc/mediatek/mt8167-pm-domains.h 
b/drivers/soc/mediatek/mt8167-pm-domains.h
index ad0b8dfa0527..15559ddf26e4 100644
--- a/drivers/soc/mediatek/mt8167-pm-domains.h
+++ b/drivers/soc/mediatek/mt8167-pm-domains.h
@@ -15,6 +15,7 @@
 
 static const struct scpsys_domain_data scpsys_domain_data_mt8167[] = {
[MT8167_POWER_DOMAIN_MM] = {
+   .name = "mm",
.sta_mask = PWR_STATUS_DISP,
.ctl_offs = SPM_DIS_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -26,6 +27,7 @@ static const struct scpsys_domain_data 
scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_VDEC] = {
+   .name = "vdec",
.sta_mask = PWR_STATUS_VDEC,
.ctl_offs = SPM_VDE_PWR_CON,
.sram_pdn_bits = GENMASK(8, 8),
@@ -33,6 +35,7 @@ static const struct scpsys_domain_data 
scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_ISP] = {
+   .name = "isp",
.sta_mask = PWR_STATUS_ISP,
.ctl_offs = SPM_ISP_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
@@ -40,6 +43,7 @@ static const struct scpsys_domain_data 
scpsys_domain_data_mt8167[] = {
.caps = MTK_SCPD_ACTIVE_WAKEUP,
},
[MT8167_POWER_DOMAIN_MFG_ASYNC] = {
+   .name = "mfg_async",
.sta_mask = MT8167_PWR_STATUS_MFG_ASYNC,
.ctl_offs = SPM_MFG_ASYNC_PWR_CON,
.sram_pdn_bits = 0,
@@ -50,18 +54,21 @@ static const struct scpsys_domain_data 
scpsys_domain_data_mt8167[] = {
},
},
[MT8167_POWER_DOMAIN_MFG_2D] = {
+   .name = "mfg_2d",
.sta_mask = MT8167_PWR_STATUS_MFG_2D,
.ctl_offs = SPM_MFG_2D_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8167_POWER_DOMAIN_MFG] = {
+   .name = "mfg",
.sta_mask = PWR_STATUS_MFG,
.ctl_offs = SPM_MFG_PWR_CON,
.sram_pdn_bits = GENMASK(11, 8),
.sram_pdn_ack_bits = GENMASK(15, 12),
},
[MT8167_POWER_DOMAIN_CONN] = {
+   .name = "conn",
.sta_mask = PWR_STATUS_CONN,
.ctl_offs = SPM_CONN_PWR_CON,
.sram_pdn_bits = GENMASK(8, 8),
-- 
2.30.0