The ir-rx51 driver for n900 has been disabled since the multiarch
changes as plat include directory no longer is SoC specific.
Let's fix it with minimal changes to pass the dmtimer calls in
pdata. Then the following changes can be done while things can
be tested to be working for each change:
1. Change the non-pwm dmtimer to use just hrtimer if possible
2. Change the pwm dmtimer to use Linux PWM API with the new
drivers/pwm/pwm-omap-dmtimer.c and remove the direct calls
to dmtimer functions
3. Parse configuration from device tree and drop the pdata
Note compilation of this depends on the previous patch
"ARM: OMAP2+: Add more functions to pwm pdata for ir-rx51".
Cc: Mauro Carvalho Chehab
Cc: Neil Armstrong
Cc: linux-me...@vger.kernel.org
Signed-off-by: Tony Lindgren
Signed-off-by: Ivaylo Dimitrov
Acked-by: Pavel Machek
---
drivers/media/rc/Kconfig | 2 +-
drivers/media/rc/ir-rx51.c | 99 +-
2 files changed, 54 insertions(+), 47 deletions(-)
diff --git a/drivers/media/rc/Kconfig b/drivers/media/rc/Kconfig
index bd4d685..370e16e 100644
--- a/drivers/media/rc/Kconfig
+++ b/drivers/media/rc/Kconfig
@@ -336,7 +336,7 @@ config IR_TTUSBIR
config IR_RX51
tristate "Nokia N900 IR transmitter diode"
- depends on OMAP_DM_TIMER && ARCH_OMAP2PLUS && LIRC &&
!ARCH_MULTIPLATFORM
+ depends on OMAP_DM_TIMER && PWM_OMAP_DMTIMER && ARCH_OMAP2PLUS && LIRC
---help---
Say Y or M here if you want to enable support for the IR
transmitter diode built in the Nokia N900 (RX51) device.
diff --git a/drivers/media/rc/ir-rx51.c b/drivers/media/rc/ir-rx51.c
index 4e1711a..da839c3 100644
--- a/drivers/media/rc/ir-rx51.c
+++ b/drivers/media/rc/ir-rx51.c
@@ -19,6 +19,7 @@
*
*/
+#include
#include
#include
#include
@@ -26,11 +27,9 @@
#include
#include
-#include
-#include
-
#include
#include
+#include
#include
#define LIRC_RX51_DRIVER_FEATURES (LIRC_CAN_SET_SEND_DUTY_CYCLE | \
@@ -44,8 +43,9 @@
#define TIMER_MAX_VALUE 0x
struct lirc_rx51 {
- struct omap_dm_timer *pwm_timer;
- struct omap_dm_timer *pulse_timer;
+ pwm_omap_dmtimer *pwm_timer;
+ pwm_omap_dmtimer *pulse_timer;
+ struct pwm_omap_dmtimer_pdata *dmtimer;
struct device*dev;
struct lirc_rx51_platform_data *pdata;
wait_queue_head_t wqueue;
@@ -63,14 +63,14 @@ struct lirc_rx51 {
static void lirc_rx51_on(struct lirc_rx51 *lirc_rx51)
{
- omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
- OMAP_TIMER_TRIGGER_OVERFLOW_AND_COMPARE);
+ lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
+ PWM_OMAP_DMTIMER_TRIGGER_OVERFLOW_AND_COMPARE);
}
static void lirc_rx51_off(struct lirc_rx51 *lirc_rx51)
{
- omap_dm_timer_set_pwm(lirc_rx51->pwm_timer, 0, 1,
- OMAP_TIMER_TRIGGER_NONE);
+ lirc_rx51->dmtimer->set_pwm(lirc_rx51->pwm_timer, 0, 1,
+ PWM_OMAP_DMTIMER_TRIGGER_NONE);
}
static int init_timing_params(struct lirc_rx51 *lirc_rx51)
@@ -79,12 +79,12 @@ static int init_timing_params(struct lirc_rx51 *lirc_rx51)
load = -(lirc_rx51->fclk_khz * 1000 / lirc_rx51->freq);
match = -(lirc_rx51->duty_cycle * -load / 100);
- omap_dm_timer_set_load(lirc_rx51->pwm_timer, 1, load);
- omap_dm_timer_set_match(lirc_rx51->pwm_timer, 1, match);
- omap_dm_timer_write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE - 2);
- omap_dm_timer_start(lirc_rx51->pwm_timer);
- omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer, 0);
- omap_dm_timer_start(lirc_rx51->pulse_timer);
+ lirc_rx51->dmtimer->set_load(lirc_rx51->pwm_timer, 1, load);
+ lirc_rx51->dmtimer->set_match(lirc_rx51->pwm_timer, 1, match);
+ lirc_rx51->dmtimer->write_counter(lirc_rx51->pwm_timer, TIMER_MAX_VALUE
- 2);
+ lirc_rx51->dmtimer->start(lirc_rx51->pwm_timer);
+ lirc_rx51->dmtimer->set_int_enable(lirc_rx51->pulse_timer, 0);
+ lirc_rx51->dmtimer->start(lirc_rx51->pulse_timer);
lirc_rx51->match = 0;
@@ -100,15 +100,15 @@ static int pulse_timer_set_timeout(struct lirc_rx51
*lirc_rx51, int usec)
BUG_ON(usec < 0);
if (lirc_rx51->match == 0)
- counter = omap_dm_timer_read_counter(lirc_rx51->pulse_timer);
+ counter =
lirc_rx51->dmtimer->read_counter(lirc_rx51->pulse_timer);
else
counter = lirc_rx51->match;
counter += (u32)(lirc_rx51->fclk_khz * usec / (1000));
- omap_dm_timer_set_match(lirc_rx51->pulse_timer, 1, counter);
- omap_dm_timer_set_int_enable(lirc_rx51->pulse_timer,
-OMAP_TIMER_INT_MATCH);
- if (tics_after(omap_dm_timer_read_counter(lirc_rx51->pulse_timer),
+ lirc_rx51->dmtimer->set_match(lirc_rx51->pulse_timer, 1, counter);
+ li
