Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Thursday 24 October 2013 03:08 PM, Kumar Gala wrote: > On Sep 30, 2013, at 8:59 AM, Sricharan R wrote: > >> In some socs the gic can be preceded by a crossbar IP which >> routes the peripheral interrupts to the gic inputs. The peripheral >> interrupts are associated with a fixed crossbar input line and the >> crossbar routes that to one of the free gic input line. >> >> The DT entries for peripherals provides the fixed crossbar input line >> as its interrupt number and the mapping code should associate this with >> a free gic input line. This patch adds the support inside the gic irqchip >> to handle such routable irqs. The routable irqs are registered in a linear >> domain. The registered routable domain's callback should be implemented >> to get a free irq and to configure the IP to route it. >> >> Cc: Thomas Gleixner >> Cc: Linus Walleij >> Cc: Santosh Shilimkar >> Cc: Russell King >> Cc: Tony Lindgren >> Cc: Rajendra Nayak >> Cc: Marc Zyngier >> Cc: Grant Likely >> Cc: Rob Herring >> Signed-off-by: Sricharan R >> --- >> Documentation/devicetree/bindings/arm/gic.txt |5 +++ >> arch/arm/boot/dts/dra7.dtsi |1 + >> drivers/irqchip/irq-gic.c | 57 >> + >> include/linux/irqchip/arm-gic.h |8 +++- >> 4 files changed, 61 insertions(+), 10 deletions(-) >> >> diff --git a/Documentation/devicetree/bindings/arm/gic.txt >> b/Documentation/devicetree/bindings/arm/gic.txt >> index 3dfb0c0..2d8c680 100644 >> --- a/Documentation/devicetree/bindings/arm/gic.txt >> +++ b/Documentation/devicetree/bindings/arm/gic.txt >> @@ -49,6 +49,11 @@ Optional >> regions, used when the GIC doesn't have banked registers. The offset is >> cpu-offset * cpu-nr. >> >> +- routable-irqs : Total number of gic irq inputs which are not directly >> + connected from the peripherals, but are routed dynamically >> + by a crossbar/multiplexer preceding the GIC. The GIC irq >> + input line is assigned dynamically when the corresponding >> + peripheral's crossbar line is mapped. > arm,routable-irqs ok will change here as well. Thanks for reviewing. Regards, Sricharan -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
Hi Thomas,
Thanks a lot for reviewing this.
On Thursday 24 October 2013 02:42 PM, Thomas Gleixner wrote:
> On Mon, 30 Sep 2013, Sricharan R wrote:
>> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
>> index 1760ceb..c5778ab 100644
>> --- a/drivers/irqchip/irq-gic.c
>> +++ b/drivers/irqchip/irq-gic.c
>> @@ -72,6 +72,8 @@ struct gic_chip_data {
>>
>> static DEFINE_RAW_SPINLOCK(irq_controller_lock);
>>
>> +const struct irq_domain_ops *gic_routable_irq_domain_ops;
>> +
>> /*
>> * The GIC mapping of CPU interfaces does not necessarily match
>> * the logical CPU numbering. Let's use a mapping as returned
>> @@ -675,11 +677,26 @@ static int gic_irq_domain_map(struct irq_domain *d,
>> unsigned int irq,
>> irq_set_chip_and_handler(irq, &gic_chip,
>> handle_fasteoi_irq);
>> set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
>> +
>> +if (gic_routable_irq_domain_ops &&
>> +gic_routable_irq_domain_ops->map)
>> +gic_routable_irq_domain_ops->map(d, irq, hw);
> Shudder. Why are you sprinkling these if (ops && ops->fun)
> conditionals all over the place instead of having a default ops
> implementation which handles the non crossbar case by proper empty
> functions. That code is not on a hot path so it does not matter at
> all.
>
Ok, Understand. Will add default ops to avoid these checks.
>> }
>> irq_set_chip_data(irq, d->host_data);
>> return 0;
>> }
>>
>> +static void gic_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
>> +{
>> +irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
>> +
>> +if (hw > 32) {
> Groan. This wants to be in the ops->unmap function. It's not related
> to the GIC core code.
Ok, will move this to unmap ops of the crossbar.
>> +if (gic_routable_irq_domain_ops &&
>> +gic_routable_irq_domain_ops->unmap)
>> +gic_routable_irq_domain_ops->unmap(d, irq);
>> +}
>> +}
>> +
>> static int gic_irq_domain_xlate(struct irq_domain *d,
>> struct device_node *controller,
>> const u32 *intspec, unsigned int intsize,
>> @@ -694,8 +711,15 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
>> *out_hwirq = intspec[1] + 16;
>>
>> /* For SPIs, we need to add 16 more to get the GIC irq ID number */
>> -if (!intspec[0])
>> -*out_hwirq += 16;
>> +if (!intspec[0]) {
>> +if (gic_routable_irq_domain_ops &&
>> +gic_routable_irq_domain_ops->xlate)
>> +*out_hwirq = gic_routable_irq_domain_ops->xlate(d,
>> +controller, intspec, intsize,
>> +out_hwirq, out_type);
>> +else
>> +*out_hwirq += 16;
>> +}
> So if you have a default xlate ops implementation then this boils down to
>
> if (!intspec[0])
> *out_hwirq = routing_ops->xlate()
>
> And the default (non crossbar) implementation would be:
>
> return *out_hwirq + 16;
>
Ok. This is better. Will change here.
Regards,
Sricharan
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Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Sep 30, 2013, at 8:59 AM, Sricharan R wrote:
> In some socs the gic can be preceded by a crossbar IP which
> routes the peripheral interrupts to the gic inputs. The peripheral
> interrupts are associated with a fixed crossbar input line and the
> crossbar routes that to one of the free gic input line.
>
> The DT entries for peripherals provides the fixed crossbar input line
> as its interrupt number and the mapping code should associate this with
> a free gic input line. This patch adds the support inside the gic irqchip
> to handle such routable irqs. The routable irqs are registered in a linear
> domain. The registered routable domain's callback should be implemented
> to get a free irq and to configure the IP to route it.
>
> Cc: Thomas Gleixner
> Cc: Linus Walleij
> Cc: Santosh Shilimkar
> Cc: Russell King
> Cc: Tony Lindgren
> Cc: Rajendra Nayak
> Cc: Marc Zyngier
> Cc: Grant Likely
> Cc: Rob Herring
> Signed-off-by: Sricharan R
> ---
> Documentation/devicetree/bindings/arm/gic.txt |5 +++
> arch/arm/boot/dts/dra7.dtsi |1 +
> drivers/irqchip/irq-gic.c | 57 +
> include/linux/irqchip/arm-gic.h |8 +++-
> 4 files changed, 61 insertions(+), 10 deletions(-)
>
> diff --git a/Documentation/devicetree/bindings/arm/gic.txt
> b/Documentation/devicetree/bindings/arm/gic.txt
> index 3dfb0c0..2d8c680 100644
> --- a/Documentation/devicetree/bindings/arm/gic.txt
> +++ b/Documentation/devicetree/bindings/arm/gic.txt
> @@ -49,6 +49,11 @@ Optional
> regions, used when the GIC doesn't have banked registers. The offset is
> cpu-offset * cpu-nr.
>
> +- routable-irqs : Total number of gic irq inputs which are not directly
> + connected from the peripherals, but are routed dynamically
> + by a crossbar/multiplexer preceding the GIC. The GIC irq
> + input line is assigned dynamically when the corresponding
> + peripheral's crossbar line is mapped.
arm,routable-irqs
> Example:
>
> intc: interrupt-controller@fff11000 {
- k
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Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Mon, 30 Sep 2013, Sricharan R wrote:
> diff --git a/drivers/irqchip/irq-gic.c b/drivers/irqchip/irq-gic.c
> index 1760ceb..c5778ab 100644
> --- a/drivers/irqchip/irq-gic.c
> +++ b/drivers/irqchip/irq-gic.c
> @@ -72,6 +72,8 @@ struct gic_chip_data {
>
> static DEFINE_RAW_SPINLOCK(irq_controller_lock);
>
> +const struct irq_domain_ops *gic_routable_irq_domain_ops;
> +
> /*
> * The GIC mapping of CPU interfaces does not necessarily match
> * the logical CPU numbering. Let's use a mapping as returned
> @@ -675,11 +677,26 @@ static int gic_irq_domain_map(struct irq_domain *d,
> unsigned int irq,
> irq_set_chip_and_handler(irq, &gic_chip,
>handle_fasteoi_irq);
> set_irq_flags(irq, IRQF_VALID | IRQF_PROBE);
> +
> + if (gic_routable_irq_domain_ops &&
> + gic_routable_irq_domain_ops->map)
> + gic_routable_irq_domain_ops->map(d, irq, hw);
Shudder. Why are you sprinkling these if (ops && ops->fun)
conditionals all over the place instead of having a default ops
implementation which handles the non crossbar case by proper empty
functions. That code is not on a hot path so it does not matter at
all.
> }
> irq_set_chip_data(irq, d->host_data);
> return 0;
> }
>
> +static void gic_irq_domain_unmap(struct irq_domain *d, unsigned int irq)
> +{
> + irq_hw_number_t hw = irq_get_irq_data(irq)->hwirq;
> +
> + if (hw > 32) {
Groan. This wants to be in the ops->unmap function. It's not related
to the GIC core code.
> + if (gic_routable_irq_domain_ops &&
> + gic_routable_irq_domain_ops->unmap)
> + gic_routable_irq_domain_ops->unmap(d, irq);
> + }
> +}
> +
> static int gic_irq_domain_xlate(struct irq_domain *d,
> struct device_node *controller,
> const u32 *intspec, unsigned int intsize,
> @@ -694,8 +711,15 @@ static int gic_irq_domain_xlate(struct irq_domain *d,
> *out_hwirq = intspec[1] + 16;
>
> /* For SPIs, we need to add 16 more to get the GIC irq ID number */
> - if (!intspec[0])
> - *out_hwirq += 16;
> + if (!intspec[0]) {
> + if (gic_routable_irq_domain_ops &&
> + gic_routable_irq_domain_ops->xlate)
> + *out_hwirq = gic_routable_irq_domain_ops->xlate(d,
> + controller, intspec, intsize,
> + out_hwirq, out_type);
> + else
> + *out_hwirq += 16;
> + }
So if you have a default xlate ops implementation then this boils down to
if (!intspec[0])
*out_hwirq = routing_ops->xlate()
And the default (non crossbar) implementation would be:
return *out_hwirq + 16;
Thanks,
tglx
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Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Mon, Sep 30, 2013 at 4:16 PM, Marc Zyngier wrote: > On 30/09/13 14:59, Sricharan R wrote: >> In some socs the gic can be preceded by a crossbar IP which >> routes the peripheral interrupts to the gic inputs. The peripheral >> interrupts are associated with a fixed crossbar input line and the >> crossbar routes that to one of the free gic input line. >> >> The DT entries for peripherals provides the fixed crossbar input line >> as its interrupt number and the mapping code should associate this with >> a free gic input line. This patch adds the support inside the gic irqchip >> to handle such routable irqs. The routable irqs are registered in a linear >> domain. The registered routable domain's callback should be implemented >> to get a free irq and to configure the IP to route it. > > Isn't this just another chained interrupt controller? How is it GIC > specific? I thought so from the beginning but I was dead wrong, as pointed out by tglx it is basically a hardware .map function, so its usecase will map to the irqdomain .map/.unmap so to say. Yours, Linus Walleij -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Monday 30 September 2013 07:52 PM, Santosh Shilimkar wrote: > On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote: >> On 30/09/13 14:59, Sricharan R wrote: >>> In some socs the gic can be preceded by a crossbar IP which >>> routes the peripheral interrupts to the gic inputs. The peripheral >>> interrupts are associated with a fixed crossbar input line and the >>> crossbar routes that to one of the free gic input line. >>> >>> The DT entries for peripherals provides the fixed crossbar input line >>> as its interrupt number and the mapping code should associate this with >>> a free gic input line. This patch adds the support inside the gic irqchip >>> to handle such routable irqs. The routable irqs are registered in a linear >>> domain. The registered routable domain's callback should be implemented >>> to get a free irq and to configure the IP to route it. >> Isn't this just another chained interrupt controller? How is it GIC >> specific? >> > No it isn't a irq controller rather a event router. Patch is missing > reference to the previous discussion. Previous discussion is here [1] > > Regards, > Santosh > > [1] https://lkml.org/lkml/2013/9/13/413 > Sorry, missed adding that and thanks for pointing it. Regards, Sricharan -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On 30/09/13 15:22, Santosh Shilimkar wrote: > On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote: >> On 30/09/13 14:59, Sricharan R wrote: >>> In some socs the gic can be preceded by a crossbar IP which >>> routes the peripheral interrupts to the gic inputs. The peripheral >>> interrupts are associated with a fixed crossbar input line and the >>> crossbar routes that to one of the free gic input line. >>> >>> The DT entries for peripherals provides the fixed crossbar input line >>> as its interrupt number and the mapping code should associate this with >>> a free gic input line. This patch adds the support inside the gic irqchip >>> to handle such routable irqs. The routable irqs are registered in a linear >>> domain. The registered routable domain's callback should be implemented >>> to get a free irq and to configure the IP to route it. >> >> Isn't this just another chained interrupt controller? How is it GIC >> specific? >> > No it isn't a irq controller rather a event router. Patch is missing > reference to the previous discussion. Previous discussion is here [1] > > Regards, > Santosh > > [1] https://lkml.org/lkml/2013/9/13/413 Right. I need to go and understand that bit first. Thanks Santosh. M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On Monday 30 September 2013 10:16 AM, Marc Zyngier wrote: > On 30/09/13 14:59, Sricharan R wrote: >> In some socs the gic can be preceded by a crossbar IP which >> routes the peripheral interrupts to the gic inputs. The peripheral >> interrupts are associated with a fixed crossbar input line and the >> crossbar routes that to one of the free gic input line. >> >> The DT entries for peripherals provides the fixed crossbar input line >> as its interrupt number and the mapping code should associate this with >> a free gic input line. This patch adds the support inside the gic irqchip >> to handle such routable irqs. The routable irqs are registered in a linear >> domain. The registered routable domain's callback should be implemented >> to get a free irq and to configure the IP to route it. > > Isn't this just another chained interrupt controller? How is it GIC > specific? > No it isn't a irq controller rather a event router. Patch is missing reference to the previous discussion. Previous discussion is here [1] Regards, Santosh [1] https://lkml.org/lkml/2013/9/13/413 -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Re: [RFC PATCH 1/6] DRIVERS: IRQCHIP: IRQ-GIC: Add support for routable irqs
On 30/09/13 14:59, Sricharan R wrote: > In some socs the gic can be preceded by a crossbar IP which > routes the peripheral interrupts to the gic inputs. The peripheral > interrupts are associated with a fixed crossbar input line and the > crossbar routes that to one of the free gic input line. > > The DT entries for peripherals provides the fixed crossbar input line > as its interrupt number and the mapping code should associate this with > a free gic input line. This patch adds the support inside the gic irqchip > to handle such routable irqs. The routable irqs are registered in a linear > domain. The registered routable domain's callback should be implemented > to get a free irq and to configure the IP to route it. Isn't this just another chained interrupt controller? How is it GIC specific? M. -- Jazz is not dead. It just smells funny... -- To unsubscribe from this list: send the line "unsubscribe linux-omap" in the body of a message to majord...@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
