[PATCH v1 0/2] rsnd: dts: change to use extended audio dmac register

2019-02-19 Thread Jiada Wang
According to user reference manual for R-CAR H3 and M3-W SoCs,
in order to access busif4 ~ busif7, extended audio dmac registers
(PDMASAREn, PDMADAREn, PDMACHCREn)
need to be used, rather than basic audio dmac registers
(PDMASARn, PDMADARn, PDMACHCRn)

This patch set updates H3 (= r8a7795) and M3-W (= r8a7796) 
to use extended audio dmac registers

Jiada Wang (2):
  arm64: dts: renesas: r8a7795: use extended audio dmac register
  arm64: dts: renesas: r8a7796: use extended audio dmac register

 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +-
 2 files changed, 2 insertions(+), 2 deletions(-)

-- 
2.19.2



[PATCH v1 2/2] arm64: dts: renesas: r8a7796: use extended audio dmac register

2019-02-19 Thread Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used

Signed-off-by: Jiada Wang 
---
 arch/arm64/boot/dts/renesas/r8a7796.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7796.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
index 0648d12778ed..1ca487480c79 100644
--- a/arch/arm64/boot/dts/renesas/r8a7796.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7796.dtsi
@@ -1775,7 +1775,7 @@
<0 0xec5a 0 0x100>,  /* ADG */
<0 0xec54 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>,  /* SSI */
-   <0 0xec74 0 0x200>;  /* Audio DMAC peri 
peri*/
+   <0 0xec76 0 0x200>;  /* Audio DMAC peri 
peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
clocks = <&cpg CPG_MOD 1005>,
-- 
2.19.2



[PATCH v1 1/2] arm64: dts: renesas: r8a7795: use extended audio dmac register

2019-02-19 Thread Jiada Wang
Basic audio dmac register only supports busif from 0 to 3,
in order to use busif4 ~ busif7, extended audio dmac register
need to be used.

Signed-off-by: Jiada Wang 
---
 arch/arm64/boot/dts/renesas/r8a7795.dtsi | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/arch/arm64/boot/dts/renesas/r8a7795.dtsi 
b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
index af9605d5db27..3adf0663451a 100644
--- a/arch/arm64/boot/dts/renesas/r8a7795.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a7795.dtsi
@@ -1836,7 +1836,7 @@
<0 0xec5a 0 0x100>,  /* ADG */
<0 0xec54 0 0x1000>, /* SSIU */
<0 0xec541000 0 0x280>,  /* SSI */
-   <0 0xec74 0 0x200>;  /* Audio DMAC peri 
peri*/
+   <0 0xec76 0 0x200>;  /* Audio DMAC peri 
peri*/
reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 
clocks = <&cpg CPG_MOD 1005>,
-- 
2.19.2



Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock

2018-11-21 Thread Jiada Wang

Hi Stephen


On 2018/11/04 12:14, Stephen Boyd wrote:

Quoting Jiada Wang (2018-10-31 05:00:49)

On 2018/10/30 3:29, Stephen Boyd wrote:

Quoting jiada_w...@mentor.com (2018-10-25 00:23:47)

+Required Properties:
+  - compatible: Must be "renesas,clk-avb"
+  - reg: Base address and length of the memory resource used by the AVB
+  - #clock-cells: Must be 1
+
+Example
+---
+
+   clk_avb: avb-clock@ec5a011c {
+   compatible = "renesas,clk-avb";
+   reg = <0 0xec5a011c 0 0x24>;

This is an odd register offset. Is this just one clk inside of a larger
clk controller?


Yes, avb_counter clock is part of Audio Clock Generator reg: <0
0xec5a 0 0x140>,
but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file,
with reg: <0 0xec5a 0 0x100>,
which leaves <0 0xec5a0100 0 0x140> currently not used by any module.


So why can't we expand the register size in the dts file and update the
audio clock generator driver to register this avb clock too? Presumably
the mapping is large enough to cover the clk registers already so it is
more of a formality to expand the register size than a requirement.

I am working on ver2 to expend register size to cover <0 0xec5a0100 0 0x140>
in audio clock generator (ADG) driver, but as provider of newly added 
"AVB_COUNTER" clock,

ADG driver also uses these clocks if necessary, so it keeps itself BUSY,
and cause ADG driver can't be unloaded.
my question is, is such use case allowed? (clock provider is also client 
of clocks).



Thanks,
Jiada



Re: [PATCH 3/4] arm64: renesas: ulcb-kf: add pcm3168 sound codec

2018-11-20 Thread Jiada Wang

Hi Morimoto-san


On 2018/11/08 22:36, Jiada Wang wrote:

Hi Morimoto-san

with the TDM Split patch-set you sent earlier in community,
together with this DTS change set,
I am able to test TDM Split mode,
just some minor findings.

On 2018/11/08 10:59, Kuninori Morimoto wrote:

From: Kuninori Morimoto 

KingFisher has pcm3168 sound codec. This patch enables it.
Because pcm3168 can't handle symmetric channel on playback/
capture, we need to handle it as different DAI.

Signed-off-by: Kuninori Morimoto 
---
  arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 151 
+++

  1 file changed, 151 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi 
b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi

index 1b316d79..fdd625d 100644
--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -6,11 +6,50 @@
   * Copyright (C) 2017 Cogent Embedded, Inc.
   */
  +/*
+ * SSI-PCM3168A
+ *    aplay   -D plughw:0,2 xxx.wav
+ *    arecord -D plughw:0,3 xxx.wav
+ */
+
  / {
  aliases {
  serial1 = &hscif0;
  serial2 = &scif1;
  };
+
+    clk8snd: clk8snd {
+    compatible = "fixed-clock";
+    #clock-cells = <0>;
+    clock-frequency = <24576000>;
+    };
This is the same clock as cs2000, why not directly refer to &cs2000 
from clksndsel,

otherwise, if snd_soc_rcar is loaded after snd_soc_pcm3168a_i2c,
load of snd_soc_pcm3168a_i2c fails with
"[    8.412356] pcm3168a 15-0044: Failed to reset device: -6"
and sound cards can not be created



Could you let me know your thoughts on this?

thanks,
Jiada


Thanks,
Jiada

+
+    clksnd: clksnd {
+    compatible = "fixed-clock";
+    #clock-cells = <0>;
+    clock-frequency = <22579200>;
+    };
+
+    clksndsel: clksndsel {
+    #clock-cells = <0>;
+    compatible = "gpio-mux-clock";
+    clocks = <&clk8snd>, <&clksnd>;
+    select-gpios = <&gpio_exp_75 13 GPIO_ACTIVE_HIGH>;
+    };
+
+    snd_3p3v: regulator-snd_3p3v {
+    compatible = "regulator-fixed";
+    regulator-name = "snd-3.3v";
+    regulator-min-microvolt = <330>;
+    regulator-max-microvolt = <330>;
+    };
+
+    snd_vcc5v: regulator-snd_vcc5v {
+    compatible = "regulator-fixed";
+    regulator-name = "snd-vcc5v";
+    regulator-min-microvolt = <500>;
+    regulator-max-microvolt = <500>;
+    };
  };
    &can0 {
@@ -44,6 +83,7 @@
  };
    &i2c2 {
+    /* U11 */
  gpio_exp_74: gpio@74 {
  compatible = "ti,tca9539";
  reg = <0x74>;
@@ -53,6 +93,13 @@
  interrupt-parent = <&gpio6>;
  interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
  +    audio_out_off {
+    gpio-hog;
+    gpios = <0 GPIO_ACTIVE_HIGH>; /* P00 */
+    output-high;
+    line-name = "Audio_Out_OFF";
+    };
+
  hub_pwen {
  gpio-hog;
  gpios = <6 GPIO_ACTIVE_HIGH>;
@@ -80,8 +127,16 @@
  output-high;
  line-name = "OTG EXTLPn";
  };
+
+    snd_rst {
+    gpio-hog;
+    gpios = <15 GPIO_ACTIVE_HIGH>; /* P17 */
+    output-high;
+    line-name = "SND_RST";
+    };
  };
  +    /* U5 */
  gpio_exp_75: gpio@75 {
  compatible = "ti,tca9539";
  reg = <0x75>;
@@ -98,6 +153,49 @@
  #size-cells = <0>;
  reg = <0x71>;
  reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+
+    /* Audio_SDA, Audio_SCL */
+    i2c@7 {
+    #address-cells = <1>;
+    #size-cells = <0>;
+    reg = <7>;
+
+    pcm3168a: audio-codec@44 {
+    #sound-dai-cells = <0>;
+    compatible = "ti,pcm3168a";
+    reg = <0x44>;
+    clocks = <&clksndsel>;
+    clock-names = "scki";
+
+    VDD1-supply    = <&snd_3p3v>;
+    VDD2-supply    = <&snd_3p3v>;
+    VCCAD1-supply    = <&snd_vcc5v>;
+    VCCAD2-supply    = <&snd_vcc5v>;
+    VCCDA1-supply    = <&snd_vcc5v>;
+    VCCDA2-supply    = <&snd_vcc5v>;
+
+    ports {
+    #address-cells = <1>;
+    #size-cells = <0>;
+    port@0 {
+    reg = <0>;
+    pcm3168a_endpoint_p: endpoint {
+    remote-endpoint = <&rsnd_endpoint2>;
+    clocks = <&clksndsel>;
+    mclk-fs = <51

Re: [PATCH 3/4] arm64: renesas: ulcb-kf: add pcm3168 sound codec

2018-11-08 Thread Jiada Wang

Hi Morimoto-san

with the TDM Split patch-set you sent earlier in community,
together with this DTS change set,
I am able to test TDM Split mode,
just some minor findings.

On 2018/11/08 10:59, Kuninori Morimoto wrote:

From: Kuninori Morimoto 

KingFisher has pcm3168 sound codec. This patch enables it.
Because pcm3168 can't handle symmetric channel on playback/
capture, we need to handle it as different DAI.

Signed-off-by: Kuninori Morimoto 
---
  arch/arm64/boot/dts/renesas/ulcb-kf.dtsi | 151 +++
  1 file changed, 151 insertions(+)

diff --git a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi 
b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
index 1b316d79..fdd625d 100644
--- a/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb-kf.dtsi
@@ -6,11 +6,50 @@
   * Copyright (C) 2017 Cogent Embedded, Inc.
   */
  
+/*

+ * SSI-PCM3168A
+ * aplay   -D plughw:0,2 xxx.wav
+ * arecord -D plughw:0,3 xxx.wav
+ */
+
  / {
aliases {
serial1 = &hscif0;
serial2 = &scif1;
};
+
+   clk8snd: clk8snd {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <24576000>;
+   };
This is the same clock as cs2000, why not directly refer to &cs2000 from 
clksndsel,

otherwise, if snd_soc_rcar is loaded after snd_soc_pcm3168a_i2c,
load of snd_soc_pcm3168a_i2c fails with
"[    8.412356] pcm3168a 15-0044: Failed to reset device: -6"
and sound cards can not be created

Thanks,
Jiada

+
+   clksnd: clksnd {
+   compatible = "fixed-clock";
+   #clock-cells = <0>;
+   clock-frequency = <22579200>;
+   };
+
+   clksndsel: clksndsel {
+   #clock-cells = <0>;
+   compatible = "gpio-mux-clock";
+   clocks = <&clk8snd>, <&clksnd>;
+   select-gpios = <&gpio_exp_75 13 GPIO_ACTIVE_HIGH>;
+   };
+
+   snd_3p3v: regulator-snd_3p3v {
+   compatible = "regulator-fixed";
+   regulator-name = "snd-3.3v";
+   regulator-min-microvolt = <330>;
+   regulator-max-microvolt = <330>;
+   };
+
+   snd_vcc5v: regulator-snd_vcc5v {
+   compatible = "regulator-fixed";
+   regulator-name = "snd-vcc5v";
+   regulator-min-microvolt = <500>;
+   regulator-max-microvolt = <500>;
+   };
  };
  
  &can0 {

@@ -44,6 +83,7 @@
  };
  
  &i2c2 {

+   /* U11 */
gpio_exp_74: gpio@74 {
compatible = "ti,tca9539";
reg = <0x74>;
@@ -53,6 +93,13 @@
interrupt-parent = <&gpio6>;
interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
  
+		audio_out_off {

+   gpio-hog;
+   gpios = <0 GPIO_ACTIVE_HIGH>; /* P00 */
+   output-high;
+   line-name = "Audio_Out_OFF";
+   };
+
hub_pwen {
gpio-hog;
gpios = <6 GPIO_ACTIVE_HIGH>;
@@ -80,8 +127,16 @@
output-high;
line-name = "OTG EXTLPn";
};
+
+   snd_rst {
+   gpio-hog;
+   gpios = <15 GPIO_ACTIVE_HIGH>; /* P17 */
+   output-high;
+   line-name = "SND_RST";
+   };
};
  
+	/* U5 */

gpio_exp_75: gpio@75 {
compatible = "ti,tca9539";
reg = <0x75>;
@@ -98,6 +153,49 @@
#size-cells = <0>;
reg = <0x71>;
reset-gpios = <&gpio5 3 GPIO_ACTIVE_LOW>;
+
+   /* Audio_SDA, Audio_SCL */
+   i2c@7 {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   reg = <7>;
+
+   pcm3168a: audio-codec@44 {
+   #sound-dai-cells = <0>;
+   compatible = "ti,pcm3168a";
+   reg = <0x44>;
+   clocks = <&clksndsel>;
+   clock-names = "scki";
+
+   VDD1-supply = <&snd_3p3v>;
+   VDD2-supply = <&snd_3p3v>;
+   VCCAD1-supply   = <&snd_vcc5v>;
+   VCCAD2-supply   = <&snd_vcc5v>;
+   VCCDA1-supply   = <&snd_vcc5v>;
+   VCCDA2-supply   = <&snd_vcc5v>;
+
+   ports {
+   #address-cells = <1>;
+   #size-cells = <0>;
+   port@0 {
+   reg = <0>;
+   pcm3168a_endpoint_p: endpoint {
+   

Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock

2018-10-31 Thread Jiada Wang

Hi Stephen

Thanks for your comments

On 2018/10/30 3:29, Stephen Boyd wrote:

Quoting jiada_w...@mentor.com (2018-10-25 00:23:47)

From: Jiada Wang 

Add device tree bindings for avb counter clock for Renesas
R-Car Socs.

Signed-off-by: Jiada Wang 
---
  .../bindings/clock/renesas,avb-clk.txt| 19 +++
  1 file changed, 19 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt

diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt 
b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt
new file mode 100644
index ..03bf50b5830c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt
@@ -0,0 +1,19 @@
+* Renesas AVB Counter Clock
+
+The AVB Counter Clocks are provided by avb_counter8 Clock Generator,
+avb_counter8 has dividers which operates with S0D1ϕ clock and has
+8 output clocks.
+
+Required Properties:
+  - compatible: Must be "renesas,clk-avb"
+  - reg: Base address and length of the memory resource used by the AVB
+  - #clock-cells: Must be 1
+
+Example
+---
+
+   clk_avb: avb-clock@ec5a011c {
+   compatible = "renesas,clk-avb";
+   reg = <0 0xec5a011c 0 0x24>;

This is an odd register offset. Is this just one clk inside of a larger
clk controller?

Yes, avb_counter clock is part of Audio Clock Generator reg: <0 
0xec5a 0 0x140>,
but "adg" has already been declared in R-Car GEN2/GEN3 SoC .dtsi file, 
with reg: <0 0xec5a 0 0x100>,

which leaves <0 0xec5a0100 0 0x140> currently not used by any module.

Thanks,
Jiada


Re: [PATCH linux-next v1 2/4] clk: renesas: Add binding document for AVB Counter Clock

2018-10-25 Thread Jiada Wang

Hi Rob


On 2018/10/26 6:49, Rob Herring wrote:

On Thu, Oct 25, 2018 at 04:23:47PM +0900, jiada_w...@mentor.com wrote:

From: Jiada Wang 

Add device tree bindings for avb counter clock for Renesas
R-Car Socs.

Signed-off-by: Jiada Wang 
---
  .../bindings/clock/renesas,avb-clk.txt| 19 +++
  1 file changed, 19 insertions(+)
  create mode 100644 Documentation/devicetree/bindings/clock/renesas,avb-clk.txt

diff --git a/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt 
b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt
new file mode 100644
index ..03bf50b5830c
--- /dev/null
+++ b/Documentation/devicetree/bindings/clock/renesas,avb-clk.txt
@@ -0,0 +1,19 @@
+* Renesas AVB Counter Clock
+
+The AVB Counter Clocks are provided by avb_counter8 Clock Generator,
+avb_counter8 has dividers which operates with S0D1ϕ clock and has
+8 output clocks.
+
+Required Properties:
+  - compatible: Must be "renesas,clk-avb"

Should be SoC specific?
yes, avb counter clock is SoC specific, I will move avb clock node to 
Soc .dtsi in next version


If the h/w block is called "AVB Counter" then use "avb-counter" in the
compatible string.

will update compatible string

+  - reg: Base address and length of the memory resource used by the AVB
+  - #clock-cells: Must be 1
+
+Example
+---
+
+   clk_avb: avb-clock@ec5a011c {

clock-controller@...

will replace with "clock-controller"

Thanks,
Jiada



+   compatible = "renesas,clk-avb";
+   reg = <0 0xec5a011c 0 0x24>;
+   #clock-cells = <1>;
+   };
--
2.17.0





Re: [PATCH linux-next v1 3/4] arm64: ulcb: Add avb counter clock

2018-10-25 Thread Jiada Wang

Hi Geert

Thanks for your comment


On 2018/10/26 5:22, Geert Uytterhoeven wrote:

Hi Jiada,

On Thu, Oct 25, 2018 at 9:24 AM  wrote:

From: Jiada Wang 

Add avb counter clock node to R-Car ULCB boards

Signed-off-by: Jiada Wang 

Thanks for your patch!


--- a/arch/arm64/boot/dts/renesas/ulcb.dtsi
+++ b/arch/arm64/boot/dts/renesas/ulcb.dtsi
@@ -32,6 +32,12 @@
 clock-frequency = <12288000>;
 };

+   clk_avb: avb-clock@ec5a011c {
+   compatible = "renesas,clk-avb";
+   reg = <0 0xec5a011c 0 0x24>;
+   #clock-cells = <1>;
+   };
+
 hdmi0-out {
 compatible = "hdmi-connector";
 type = "a";

Why would this belong in the board .dtsi, not in the SoC .dtsi?
(same for salvator-common.dtsi)

right, it belongs to Soc .dtsi, I will move it to each Soc .dtsi

How is this intended to be used by the AVB?

R-Car audio can use AVB clock to support continuous clock rate,
with out AVB clock, currently only limited rates are supports by R-Car audio

Thanks,
Jiada

Gr{oetje,eeting}s,

 Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- ge...@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
 -- Linus Torvalds




Re: [PATCH linux-next 01/10] ASoC: rsnd: ssi: Request dedicated dma channels for busif1 to 7

2018-10-02 Thread Jiada Wang

Hi Morimoto-san


On 2018/09/28 9:08, Kuninori Morimoto wrote:

Hi Jiada
Cc: linux-renesas-soc ML

Thank you for your patch


From: Jiada Wang 

Currently ssi driver only request dma channel for SSI_0,
which is used to transfer data to/from busif0.

But since busif1 to busif7 also maybe used, dedicated dma channels
are request for data transfer between these busif.

Signed-off-by: Jiada Wang 
---

(snip)

@@ -938,12 +940,20 @@ static struct dma_chan *rsnd_ssi_dma_req(struct 
rsnd_dai_stream *io,
  {
struct rsnd_priv *priv = rsnd_mod_to_priv(mod);
int is_play = rsnd_io_is_play(io);
-   char *name;
+   int busif = rsnd_ssi_get_busif(io);
+   char name[SSI_DMA_NAME_SIZE];
  
-	if (rsnd_ssi_use_busif(io))

-   name = is_play ? "rxu" : "txu";
-   else
-   name = is_play ? "rx" : "tx";
+   if (rsnd_ssi_use_busif(io)) {
+   if (is_play)
+   snprintf(name, SSI_DMA_NAME_SIZE, "rxu%d", busif);
+   else
+   snprintf(name, SSI_DMA_NAME_SIZE, "txu%d", busif);
+   } else {
+   if (is_play)
+   snprintf(name, SSI_DMA_NAME_SIZE, "rx");
+   else
+   snprintf(name, SSI_DMA_NAME_SIZE, "tx");
+   }

Unfortunately, this patch breaks "git bisect", and Gen2 platforms.
We need to keep existing "rxu/txu" more. Please consider compatibility.
# we can remove it 2 or 3 version later ?

If the commit which has this patch, but doesn't have [02/xx] or later,
it can't use BUSIF.

And your patch doesn't care Gen2 series.
DT compatibility is very sensitive...
Thanks for your review comments, I will send out v2 patch set to take 
care of GEN2 series,

and move this patch after other DT related patches

Thanks,
Jiada