Re: [PATCH 0/6] General device tree irq domain infrastructure
On Thu, 5 May 2011, Benjamin Herrenschmidt wrote: As for the mapping, I agree that the functionality is generally useful, I'm just not fond of the current implementation. I think it is more complex than it needs to be and I'm not excited about bring it over to the other architectures as-is. Nobody cares about the current implementation. What is important is indeed the functionality. The basic thing I think everybody agrees is that you need to extend the irq_desc (or data, whatever tglx prefers) with two bits of information: Some identifier of the domain and some identifier of the interrupt number within that domain. irq_data because that's what is handed into the callbacks and you probably want to have the HW number there. In addition, PIC code will need a way to perform efficient reverse mapping. You may decide that for simple IRQ controllers that handle a small linear range of interrupts, it's kosher to simply reserve a linear range of descriptors and use a simple offset, I'm find with that now that we no longer live in a world constrained by NR_IRQ. But the need for the radix tree remains for things that have massively large potential HW numbers such as we have on powerpc. For the majority of fixed hw interrupt controllers it is overkill. There is no need for a map table when all the irq descs (=32 of them) get allocated when the irq controller is instantiated and the mapping consists of 'virq = hw_irq + virq_base'. For instance, with the arm irq controllers, it's be more than sufficient to use irq_alloc_descs to obtain a range of irq numbers and then a simple of_irq_domain registration to handle the parsing. That's true if and only if you make NR_IRQ a non issue and if you accept the general wastage due to unused interrupts. The main problem has always been that hard limit which made me chose a more efficient mechanisms. Take a mac with 2 cascaded MPICs with 256 sources each which are mostly never used. I would need an NR_IRQs of 512 with your scheme (plus 16 because I do want to continue avoiding the ISA numbers), which is a waste of space, even with SPARSE_IRQ. Now I hope eventually NR_IRQ will go away and we'll have a more efficient mechanism to allocate descriptors and so it will become less of an issue. Well, NR_IRQS in the sparse case is irrelevant already and I'm looking into a way to remove the !SPARSE code completely. One thing we can do to avoid allocating 512 irq descriptors for the MAC case is to reserve the space and only allocate the descriptors you really need to be operational. For the cases where an interrupt controller isn't able to alloc all the irq descs at once, like for MSI, then yes the LINEAR and RADIX mappings are important. What bothers me though is the way irq_host needs to use unions and the -revmap_type value to implement multiple behaviours into a single type. That's the sort of thing that can be broken out into a library and instantiated only by the interrupt controllers that actually need it. But that's what it is really. You'll notice that on the fast path the interrupt controller code calls directly into the right type of revmap routine. You may want to refactor things a bit if you want, but the union served me well simply because I didnt have to bother doing lots of different alloc_bootmem back then. Nowadays, kmalloc is available much earlier so it might have become a non issue too. Similarly, it bothers me that that radix mapping makes up a significant portion of the code, yet it has only one user. significant ? Seriously ? Like 3 function calls ? It's nothing. We use an existing radix tree facility, and the amount of code in our irq.c is actually very small. Originally it was living in xics in fact, but I moved it out specifically because I wanted a common interface to remapping, so for example, I can expose the linux - hw mapping in debugfs generically, among others. And there is another reverse mapping implementation in the superH code. I'd be happier if each kind of mapping had its own structure that embedded a generic irq_host/irq_domain with mapping specific ops populated to manipulate it. Whatever, that's just plumbing, I don't care either way, that doesn't change the fact that the concept of domain doesn't have much to do with OF :-) Regardless, the immediate priority is to implement a mapper that will work for all architectures (or at least everything but powerpc and sparc). I oppose the implementation of a new mapper that doesn't include powerpc, that would be stupid. Either re-use ours or implement a new one that encompass our needs. I can't talk for sparc but I wouldn't be surprised if David thought about the same lines. x86 has already implemented a skeleton irq_domain because there wasn't any common code for it to use. ARM also needs the functionality immediately, and I don't want to see yet another
Re: [RFC][PATCH] powerpc: respect how command line nr_cpus is set
On May 4, 2011, at 9:25 PM, Benjamin Herrenschmidt wrote: On Wed, 2011-05-04 at 15:17 -0500, Kumar Gala wrote: We should utilize nr_cpus as the max # of CPUs that we can have present instead of NR_CPUS. This way we actually respect how nr_cpus is set on the command line rather than ignoring it. Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- I think this is what we should be doing, but would like someone else to take a look. The main question I have is should max_cpus absolutely limit the number of possible CPUs or should it limit the number that get automatically onlined at boot, potentially letting us bring the rest online later on ? Cheers, Ben. From Documentation/kernel-parameters.txt: nr_cpus=[SMP] Maximum number of processors that an SMP kernel could support. nr_cpus=n : n = 1 limits the kernel to supporting 'n' processors. Later in runtime you can not use hotplug cpu feature to put more cpu back to online. just like you compile the kernel NR_CPUS=n Which makes me think we should have max_cpus be an absolute limit. - k ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/6] General device tree irq domain infrastructure
On Thu, May 5, 2011 at 2:37 AM, Thomas Gleixner t...@linutronix.de wrote: On Thu, 5 May 2011, Benjamin Herrenschmidt wrote: As for the mapping, I agree that the functionality is generally useful, I'm just not fond of the current implementation. I think it is more complex than it needs to be and I'm not excited about bring it over to the other architectures as-is. Nobody cares about the current implementation. What is important is indeed the functionality. The basic thing I think everybody agrees is that you need to extend the irq_desc (or data, whatever tglx prefers) with two bits of information: Some identifier of the domain and some identifier of the interrupt number within that domain. irq_data because that's what is handed into the callbacks and you probably want to have the HW number there. Okay, I'll take another hack at it. Unfortunately I've got a great big unmaskable interrupt in the form of UDS next week, but I'll be back on it the week after. g. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 0/7] Consolidate sdhci pltfm OF drivers and get them self registered
Here are what the patch set does. * Remove .probe and .remove hooks from sdhci-pltfm.c and make it be a pure common helper function providers. * Add .probe and .remove hooks for sdhci pltfm drivers sdhci-cns3xxx, sdhci-dove, sdhci-tegra, and sdhci-esdhc-imx to make them self registered with calling helper functions created above. * Migrate the use of sdhci_of_host and sdhci_of_data to sdhci_pltfm_host and sdhci_pltfm_data, so that OF version host and data structure works can be saved, and pltfm version works for both cases. * Add OF common helper stuff into sdhci-pltfm.c, and make OF version sdhci drivers sdhci-of-esdhc and sdhci-of-hlwd become self registered as well, so that sdhci-of-core.c and sdhci-of.h can be removed. * Consolidate the OF and pltfm esdhc drivers into one with sharing the same pair of .probe and .remove hooks. * Eliminate include/linux/mmc/sdhci-pltfm.h with moving stuff into drivers/mmc/host/sdhci-pltfm.h. And the benefits we gain from the changes are: * Get the sdhci device driver follow the Linux trend that driver makes the registration by its own. * sdhci-pltfm.c becomes simple and clean as it only has common helper stuff there now. * All sdhci device specific things are going back its own driver. * The dt and non-dt drivers are consolidated to use the same pair of .probe and .remove hooks. * SDHCI driver for Freescale eSDHC controller found on both MPCxxx and i.MX platforms is consolidated to use the same one .probe function. It was only tested on i.mx51 babbage board, all other targets were build tested. Tested-by, Reviwed-by, and Acked-by are much appreciated. I attempt to get patch #1 ~ #6 go through Chris' tree, while the #7 through Sascha's tree. Regards, Shawn Changes since v1: * Rebase on cjb's mmc-next tree * Introduce helper function pair sdhci_pltfm_register and sdhci_pltfm_unregister * Eliminate variable 'scratch' in .remove hook to make the code look simple * Return ERR_PTR in sdhci_pltfm_init and use IS_ERR/PTR_ERR to check return value in .probe hooks * Correct MODULE_AUTHOR statement * Split esdhc conlidation patch to ease reviewing Shawn Guo (7): mmc: sdhci: make sdhci-pltfm device drivers self registered mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data mmc: sdhci: make sdhci-of device drivers self registered sdhci: rename sdhci-esdhc-imx.c to sdhci-esdhc.c mmc: sdhci: consolidate sdhci-of-esdhc and sdhci-esdhc-imx mmc: sdhci: merge two sdhci-pltfm.h into one ARM: mxc: remove esdhc.h and use the public one .../plat-mxc/devices/platform-sdhci-esdhc-imx.c|1 - arch/arm/plat-mxc/include/mach/devices-common.h|2 +- drivers/mmc/host/Kconfig | 77 ++-- drivers/mmc/host/Makefile | 17 +- drivers/mmc/host/sdhci-cns3xxx.c | 43 ++- drivers/mmc/host/sdhci-dove.c | 42 ++- drivers/mmc/host/sdhci-esdhc-imx.c | 331 --- drivers/mmc/host/sdhci-esdhc.c | 580 drivers/mmc/host/sdhci-esdhc.h | 81 --- drivers/mmc/host/sdhci-of-core.c | 250 - drivers/mmc/host/sdhci-of-esdhc.c | 91 --- drivers/mmc/host/sdhci-of-hlwd.c | 66 ++- drivers/mmc/host/sdhci-of.h| 42 -- drivers/mmc/host/sdhci-pltfm.c | 259 + drivers/mmc/host/sdhci-pltfm.h | 39 ++- drivers/mmc/host/sdhci-tegra.c | 118 +++-- include/linux/mmc/esdhc.h | 27 + include/linux/mmc/sdhci-pltfm.h| 35 -- 18 files changed, 1048 insertions(+), 1053 deletions(-) ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH v2 1/7] mmc: sdhci: make sdhci-pltfm device drivers self registered
The patch turns the common stuff in sdhci-pltfm.c into functions, and
add device drivers their own .probe and .remove which in turn call
into the common functions, so that those sdhci-pltfm device drivers
register itself and keep all device specific things away from common
sdhci-pltfm file.
Signed-off-by: Shawn Guo shawn@linaro.org
Acked-by: Arnd Bergmann a...@arndb.de
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/mmc/host/Kconfig | 32
drivers/mmc/host/Makefile | 11 +--
drivers/mmc/host/sdhci-cns3xxx.c | 42 +-
drivers/mmc/host/sdhci-dove.c | 42 +-
drivers/mmc/host/sdhci-esdhc-imx.c | 112 ++---
drivers/mmc/host/sdhci-pltfm.c | 157 +---
drivers/mmc/host/sdhci-pltfm.h | 17 +++-
drivers/mmc/host/sdhci-tegra.c | 118 +++
include/linux/mmc/sdhci-pltfm.h|6 --
9 files changed, 317 insertions(+), 220 deletions(-)
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index b981715..799e935 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -113,28 +113,27 @@ config MMC_SDHCI_OF_HLWD
If unsure, say N.
config MMC_SDHCI_PLTFM
- tristate SDHCI support on the platform specific bus
+ bool
depends on MMC_SDHCI
help
- This selects the platform specific bus support for Secure Digital Host
- Controller Interface.
-
- If you have a controller with this interface, say Y or M here.
-
- If unsure, say N.
+ This selects the platform common function support for Secure Digital
+ Host Controller Interface.
config MMC_SDHCI_CNS3XXX
- bool SDHCI support on the Cavium Networks CNS3xxx SoC
+ tristate SDHCI support on the Cavium Networks CNS3xxx SoC
depends on ARCH_CNS3XXX
- depends on MMC_SDHCI_PLTFM
+ depends on MMC_SDHCI
+ select MMC_SDHCI_PLTFM
help
This selects the SDHCI support for CNS3xxx System-on-Chip devices.
If unsure, say N.
config MMC_SDHCI_ESDHC_IMX
- bool SDHCI platform support for the Freescale eSDHC i.MX controller
- depends on MMC_SDHCI_PLTFM (ARCH_MX25 || ARCH_MX35 || ARCH_MX5)
+ tristate SDHCI platform support for the Freescale eSDHC i.MX
controller
+ depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5
+ depends on MMC_SDHCI
+ select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
This selects the Freescale eSDHC controller support on the platform
@@ -143,9 +142,10 @@ config MMC_SDHCI_ESDHC_IMX
If unsure, say N.
config MMC_SDHCI_DOVE
- bool SDHCI support on Marvell's Dove SoC
+ tristate SDHCI support on Marvell's Dove SoC
depends on ARCH_DOVE
- depends on MMC_SDHCI_PLTFM
+ depends on MMC_SDHCI
+ select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
This selects the Secure Digital Host Controller Interface in
@@ -154,8 +154,10 @@ config MMC_SDHCI_DOVE
If unsure, say N.
config MMC_SDHCI_TEGRA
- bool SDHCI platform support for the Tegra SD/MMC Controller
- depends on MMC_SDHCI_PLTFM ARCH_TEGRA
+ tristate SDHCI platform support for the Tegra SD/MMC Controller
+ depends on ARCH_TEGRA
+ depends on MMC_SDHCI
+ select MMC_SDHCI_PLTFM
select MMC_SDHCI_IO_ACCESSORS
help
This selects the Tegra SD/MMC controller. If you have a Tegra
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 4f1df0a..95fddb8 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -43,12 +43,11 @@ obj-$(CONFIG_MMC_SH_MMCIF) += sh_mmcif.o
obj-$(CONFIG_MMC_JZ4740) += jz4740_mmc.o
obj-$(CONFIG_MMC_USHC) += ushc.o
-obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-platform.o
-sdhci-platform-y := sdhci-pltfm.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_CNS3XXX) += sdhci-cns3xxx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_DOVE)+= sdhci-dove.o
-sdhci-platform-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
+obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
+obj-$(CONFIG_MMC_SDHCI_CNS3XXX)+= sdhci-cns3xxx.o
+obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
+obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
+obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
sdhci-of-y := sdhci-of-core.o
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index 9ebd1d7..ac4b26f 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -86,7 +86,7 @@ static struct sdhci_ops sdhci_cns3xxx_ops = {
.set_clock = sdhci_cns3xxx_set_clock,
[PATCH v2 2/7] mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
The patch migrates the use of sdhci_of_host and sdhci_of_data to
sdhci_pltfm_host and sdhci_pltfm_data, so that the former pair can
be eliminated.
Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
---
drivers/mmc/host/sdhci-of-core.c | 30 +++---
drivers/mmc/host/sdhci-of-esdhc.c | 36 +++-
drivers/mmc/host/sdhci-of-hlwd.c | 20 +++-
drivers/mmc/host/sdhci-of.h | 15 +++
drivers/mmc/host/sdhci-pltfm.h|4
5 files changed, 52 insertions(+), 53 deletions(-)
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
index f9b611f..6b2de9e 100644
--- a/drivers/mmc/host/sdhci-of-core.c
+++ b/drivers/mmc/host/sdhci-of-core.c
@@ -59,7 +59,7 @@ void sdhci_be32bs_writel(struct sdhci_host *host, u32 val,
int reg)
void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
{
- struct sdhci_of_host *of_host = sdhci_priv(host);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
int base = reg ~0x3;
int shift = (reg 0x2) * 8;
@@ -69,10 +69,10 @@ void sdhci_be32bs_writew(struct sdhci_host *host, u16 val,
int reg)
* Postpone this write, we must do it together with a
* command write that is down below.
*/
- of_host-xfer_mode_shadow = val;
+ pltfm_host-xfer_mode_shadow = val;
return;
case SDHCI_COMMAND:
- sdhci_be32bs_writel(host, val 16 | of_host-xfer_mode_shadow,
+ sdhci_be32bs_writel(host, val 16 |
pltfm_host-xfer_mode_shadow,
SDHCI_TRANSFER_MODE);
return;
}
@@ -127,7 +127,7 @@ static bool __devinit sdhci_of_wp_inverted(struct
device_node *np)
static int __devinit sdhci_of_probe(struct platform_device *ofdev)
{
struct device_node *np = ofdev-dev.of_node;
- struct sdhci_of_data *sdhci_of_data;
+ struct sdhci_pltfm_data *pdata;
struct sdhci_host *host;
struct sdhci_of_host *of_host;
const __be32 *clk;
@@ -136,16 +136,16 @@ static int __devinit sdhci_of_probe(struct
platform_device *ofdev)
if (!ofdev-dev.of_match)
return -EINVAL;
- sdhci_of_data = ofdev-dev.of_match-data;
+ pdata = ofdev-dev.of_match-data;
if (!of_device_is_available(np))
return -ENODEV;
- host = sdhci_alloc_host(ofdev-dev, sizeof(*of_host));
+ host = sdhci_alloc_host(ofdev-dev, sizeof(*pltfm_host));
if (IS_ERR(host))
return -ENOMEM;
- of_host = sdhci_priv(host);
+ pltfm_host = sdhci_priv(host);
dev_set_drvdata(ofdev-dev, host);
host-ioaddr = of_iomap(np, 0);
@@ -161,9 +161,9 @@ static int __devinit sdhci_of_probe(struct platform_device
*ofdev)
}
host-hw_name = dev_name(ofdev-dev);
- if (sdhci_of_data) {
- host-quirks = sdhci_of_data-quirks;
- host-ops = sdhci_of_data-ops;
+ if (pdata) {
+ host-quirks = pdata-quirks;
+ host-ops = pdata-ops;
}
if (of_get_property(np, sdhci,auto-cmd12, NULL))
@@ -178,7 +178,7 @@ static int __devinit sdhci_of_probe(struct platform_device
*ofdev)
clk = of_get_property(np, clock-frequency, size);
if (clk size == sizeof(*clk) *clk)
- of_host-clock = be32_to_cpup(clk);
+ pltfm_host-clock = be32_to_cpup(clk);
ret = sdhci_add_host(host);
if (ret)
@@ -208,12 +208,12 @@ static int __devexit sdhci_of_remove(struct
platform_device *ofdev)
static const struct of_device_id sdhci_of_match[] = {
#ifdef CONFIG_MMC_SDHCI_OF_ESDHC
- { .compatible = fsl,mpc8379-esdhc, .data = sdhci_esdhc, },
- { .compatible = fsl,mpc8536-esdhc, .data = sdhci_esdhc, },
- { .compatible = fsl,esdhc, .data = sdhci_esdhc, },
+ { .compatible = fsl,mpc8379-esdhc, .data = sdhci_esdhc_pdata, },
+ { .compatible = fsl,mpc8536-esdhc, .data = sdhci_esdhc_pdata, },
+ { .compatible = fsl,esdhc, .data = sdhci_esdhc_pdata, },
#endif
#ifdef CONFIG_MMC_SDHCI_OF_HLWD
- { .compatible = nintendo,hollywood-sdhci, .data = sdhci_hlwd, },
+ { .compatible = nintendo,hollywood-sdhci, .data = sdhci_hlwd_pdata,
},
#endif
{ .compatible = generic-sdhci, },
{},
diff --git a/drivers/mmc/host/sdhci-of-esdhc.c
b/drivers/mmc/host/sdhci-of-esdhc.c
index ba40d6d..492bcd7 100644
--- a/drivers/mmc/host/sdhci-of-esdhc.c
+++ b/drivers/mmc/host/sdhci-of-esdhc.c
@@ -60,32 +60,34 @@ static int esdhc_of_enable_dma(struct sdhci_host *host)
static unsigned int esdhc_of_get_max_clock(struct sdhci_host *host)
{
- struct sdhci_of_host *of_host = sdhci_priv(host);
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- return of_host-clock;
[PATCH v2 3/7] mmc: sdhci: make sdhci-of device drivers self registered
The patch turns the sdhci-of-core common stuff into helper functions
added into sdhci-pltfm.c, and makes sdhci-of device drviers self
registered using the same pair of .probe and .remove used by
sdhci-pltfm device drivers.
As a result, sdhci-of-core.c and sdhci-of.h can be eliminated with
those common things merged into sdhci-pltfm.c and sdhci-pltfm.h
respectively.
Signed-off-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/Kconfig | 15 +--
drivers/mmc/host/Makefile |7 +-
drivers/mmc/host/sdhci-of-core.c | 250 -
drivers/mmc/host/sdhci-of-esdhc.c | 53 -
drivers/mmc/host/sdhci-of-hlwd.c | 50 +++-
drivers/mmc/host/sdhci-of.h | 33 -
drivers/mmc/host/sdhci-pltfm.c| 104 +++-
drivers/mmc/host/sdhci-pltfm.h| 12 ++
8 files changed, 220 insertions(+), 304 deletions(-)
delete mode 100644 drivers/mmc/host/sdhci-of-core.c
delete mode 100644 drivers/mmc/host/sdhci-of.h
diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig
index 799e935..fdd20ad 100644
--- a/drivers/mmc/host/Kconfig
+++ b/drivers/mmc/host/Kconfig
@@ -81,19 +81,11 @@ config MMC_RICOH_MMC
If unsure, say Y.
-config MMC_SDHCI_OF
- tristate SDHCI support on OpenFirmware platforms
- depends on MMC_SDHCI OF
- help
- This selects the OF support for Secure Digital Host Controller
- Interfaces.
-
- If unsure, say N.
-
config MMC_SDHCI_OF_ESDHC
bool SDHCI OF support for the Freescale eSDHC controller
- depends on MMC_SDHCI_OF
+ depends on MMC_SDHCI
depends on PPC_OF
+ select MMC_SDHCI_PLTFM
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Freescale eSDHC controller support.
@@ -102,8 +94,9 @@ config MMC_SDHCI_OF_ESDHC
config MMC_SDHCI_OF_HLWD
bool SDHCI OF support for the Nintendo Wii SDHCI controllers
- depends on MMC_SDHCI_OF
+ depends on MMC_SDHCI
depends on PPC_OF
+ select MMC_SDHCI_PLTFM
select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
help
This selects the Secure Digital Host Controller Interface (SDHCI)
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 95fddb8..01d38a1 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -48,11 +48,8 @@ obj-$(CONFIG_MMC_SDHCI_CNS3XXX) +=
sdhci-cns3xxx.o
obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
-
-obj-$(CONFIG_MMC_SDHCI_OF) += sdhci-of.o
-sdhci-of-y := sdhci-of-core.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
-sdhci-of-$(CONFIG_MMC_SDHCI_OF_HLWD) += sdhci-of-hlwd.o
+obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
+obj-$(CONFIG_MMC_SDHCI_OF_HLWD)+= sdhci-of-hlwd.o
ifeq ($(CONFIG_CB710_DEBUG),y)
CFLAGS-cb710-mmc+= -DDEBUG
diff --git a/drivers/mmc/host/sdhci-of-core.c b/drivers/mmc/host/sdhci-of-core.c
deleted file mode 100644
index 6b2de9e..000
--- a/drivers/mmc/host/sdhci-of-core.c
+++ /dev/null
@@ -1,250 +0,0 @@
-/*
- * OpenFirmware bindings for Secure Digital Host Controller Interface.
- *
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#include linux/err.h
-#include linux/module.h
-#include linux/init.h
-#include linux/io.h
-#include linux/interrupt.h
-#include linux/delay.h
-#include linux/of.h
-#include linux/of_platform.h
-#include linux/of_address.h
-#include linux/of_irq.h
-#include linux/mmc/host.h
-#ifdef CONFIG_PPC
-#include asm/machdep.h
-#endif
-#include sdhci-of.h
-#include sdhci.h
-
-#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-
-/*
- * These accessors are designed for big endian hosts doing I/O to
- * little endian controllers incorporating a 32-bit hardware byte swapper.
- */
-
-u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-{
- return in_be32(host-ioaddr + reg);
-}
-
-u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
-{
- return in_be16(host-ioaddr + (reg ^ 0x2));
-}
-
-u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
-{
- return in_8(host-ioaddr + (reg ^ 0x3));
-}
-
-void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
-{
- out_be32(host-ioaddr + reg, val);
-}
-
-void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
[PATCH v2 4/7] sdhci: rename sdhci-esdhc-imx.c to sdhci-esdhc.c
The patch renames the file to prepare for the consolidation
sdhci-of-esdhc and sdhci-esdhc-imx.
Signed-off-by: Shawn Guo shawn@linaro.org
---
drivers/mmc/host/Makefile |2 +-
drivers/mmc/host/sdhci-esdhc-imx.c | 381
drivers/mmc/host/sdhci-esdhc.c | 381
3 files changed, 382 insertions(+), 382 deletions(-)
delete mode 100644 drivers/mmc/host/sdhci-esdhc-imx.c
create mode 100644 drivers/mmc/host/sdhci-esdhc.c
diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile
index 01d38a1..186f0ed 100644
--- a/drivers/mmc/host/Makefile
+++ b/drivers/mmc/host/Makefile
@@ -45,7 +45,7 @@ obj-$(CONFIG_MMC_USHC)+= ushc.o
obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o
obj-$(CONFIG_MMC_SDHCI_CNS3XXX)+= sdhci-cns3xxx.o
-obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc-imx.o
+obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc.o
obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o
obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o
obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o
diff --git a/drivers/mmc/host/sdhci-esdhc-imx.c
b/drivers/mmc/host/sdhci-esdhc-imx.c
deleted file mode 100644
index 8da57d4..000
--- a/drivers/mmc/host/sdhci-esdhc-imx.c
+++ /dev/null
@@ -1,381 +0,0 @@
-/*
- * Freescale eSDHC i.MX controller driver for the platform bus.
- *
- * derived from the OF-version.
- *
- * Copyright (c) 2010 Pengutronix e.K.
- * Author: Wolfram Sang w.s...@pengutronix.de
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License.
- */
-
-#include linux/io.h
-#include linux/delay.h
-#include linux/err.h
-#include linux/clk.h
-#include linux/gpio.h
-#include linux/slab.h
-#include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
-#include linux/mmc/mmc.h
-#include linux/mmc/sdio.h
-#include mach/hardware.h
-#include mach/esdhc.h
-#include sdhci.h
-#include sdhci-pltfm.h
-#include sdhci-esdhc.h
-
-/* VENDOR SPEC register */
-#define SDHCI_VENDOR_SPEC 0xC0
-#define SDHCI_VENDOR_SPEC_SDIO_QUIRK 0x0002
-
-#define ESDHC_FLAG_GPIO_FOR_CD_WP (1 0)
-/*
- * The CMDTYPE of the CMD register (offset 0xE) should be set to
- * 11 when the STOP CMD12 is issued on imx53 to abort one
- * open ended multi-blk IO. Otherwise the TC INT wouldn't
- * be generated.
- * In exact block transfer, the controller doesn't complete the
- * operations automatically as required at the end of the
- * transfer and remains on hold if the abort command is not sent.
- * As a result, the TC flag is not asserted and SW received timeout
- * exeception. Bit1 of Vendor Spec registor is used to fix it.
- */
-#define ESDHC_FLAG_MULTIBLK_NO_INT (1 1)
-
-struct pltfm_imx_data {
- int flags;
- u32 scratchpad;
-};
-
-static inline void esdhc_clrset_le(struct sdhci_host *host, u32 mask, u32 val,
int reg)
-{
- void __iomem *base = host-ioaddr + (reg ~0x3);
- u32 shift = (reg 0x3) * 8;
-
- writel(((readl(base) ~(mask shift)) | (val shift)), base);
-}
-
-static u32 esdhc_readl_le(struct sdhci_host *host, int reg)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = pltfm_host-priv;
-
- /* fake CARD_PRESENT flag on mx25/35 */
- u32 val = readl(host-ioaddr + reg);
-
- if (unlikely((reg == SDHCI_PRESENT_STATE)
-(imx_data-flags ESDHC_FLAG_GPIO_FOR_CD_WP))) {
- struct esdhc_platform_data *boarddata =
- host-mmc-parent-platform_data;
-
- if (boarddata gpio_is_valid(boarddata-cd_gpio)
-gpio_get_value(boarddata-cd_gpio))
- /* no card, if a valid gpio says so... */
- val = SDHCI_CARD_PRESENT;
- else
- /* ... in all other cases assume card is present */
- val |= SDHCI_CARD_PRESENT;
- }
-
- return val;
-}
-
-static void esdhc_writel_le(struct sdhci_host *host, u32 val, int reg)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- struct pltfm_imx_data *imx_data = pltfm_host-priv;
-
- if (unlikely((reg == SDHCI_INT_ENABLE || reg == SDHCI_SIGNAL_ENABLE)
-(imx_data-flags ESDHC_FLAG_GPIO_FOR_CD_WP)))
- /*
-* these interrupts won't work with a custom card_detect gpio
-* (only applied to mx25/35)
-*/
- val = ~(SDHCI_INT_CARD_REMOVE | SDHCI_INT_CARD_INSERT);
-
- if (unlikely((imx_data-flags ESDHC_FLAG_MULTIBLK_NO_INT)
-(reg == SDHCI_INT_STATUS)
-(val SDHCI_INT_DATA_END))) {
-
[PATCH v2 5/7] mmc: sdhci: consolidate sdhci-of-esdhc and sdhci-esdhc-imx
This patch is to consolidate SDHCI driver for Freescale eSDHC controller found on both MPCxxx and i.MX platforms. It merges sdhci-of-esdhc.c into sdhci-esdhc.c, so that the same pair of .probe/.remove hook works with eSDHC for two platforms. As the results, sdhci-of-esdhc.c and sdhci-esdhc.h are removed, and header esdhc.h containing the definition of esdhc_platform_data is put into the public folder. Signed-off-by: Shawn Guo shawn@linaro.org --- drivers/mmc/host/Kconfig | 38 --- drivers/mmc/host/Makefile |3 +- drivers/mmc/host/sdhci-esdhc.c| 244 + drivers/mmc/host/sdhci-esdhc.h| 81 drivers/mmc/host/sdhci-of-esdhc.c | 142 - include/linux/mmc/esdhc.h | 27 6 files changed, 273 insertions(+), 262 deletions(-) delete mode 100644 drivers/mmc/host/sdhci-esdhc.h delete mode 100644 drivers/mmc/host/sdhci-of-esdhc.c create mode 100644 include/linux/mmc/esdhc.h diff --git a/drivers/mmc/host/Kconfig b/drivers/mmc/host/Kconfig index fdd20ad..e32cb76 100644 --- a/drivers/mmc/host/Kconfig +++ b/drivers/mmc/host/Kconfig @@ -81,17 +81,6 @@ config MMC_RICOH_MMC If unsure, say Y. -config MMC_SDHCI_OF_ESDHC - bool SDHCI OF support for the Freescale eSDHC controller - depends on MMC_SDHCI - depends on PPC_OF - select MMC_SDHCI_PLTFM - select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER - help - This selects the Freescale eSDHC controller support. - - If unsure, say N. - config MMC_SDHCI_OF_HLWD bool SDHCI OF support for the Nintendo Wii SDHCI controllers depends on MMC_SDHCI @@ -122,15 +111,34 @@ config MMC_SDHCI_CNS3XXX If unsure, say N. +config MMC_SDHCI_ESDHC + bool + depends on MMC_SDHCI + select MMC_SDHCI_PLTFM + help + This selects SDHCI driver for Freescale eSDHC controller. + +config MMC_SDHCI_ESDHC_MPC + bool SDHCI support for the Freescale eSDHC MPC controller + depends on MMC_SDHCI + depends on PPC_OF PPC_CLOCK + select MMC_SDHCI_ESDHC + select MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER + help + This selects the Freescale eSDHC controller support on the + MPC platforms. + + If unsure, say N. + config MMC_SDHCI_ESDHC_IMX - tristate SDHCI platform support for the Freescale eSDHC i.MX controller + tristate SDHCI support for the Freescale eSDHC i.MX controller depends on ARCH_MX25 || ARCH_MX35 || ARCH_MX5 depends on MMC_SDHCI - select MMC_SDHCI_PLTFM + select MMC_SDHCI_ESDHC select MMC_SDHCI_IO_ACCESSORS help - This selects the Freescale eSDHC controller support on the platform - bus, found on platforms like mx35/51. + This selects the Freescale eSDHC controller support on platforms + like mx25/mx35/mx5x. If unsure, say N. diff --git a/drivers/mmc/host/Makefile b/drivers/mmc/host/Makefile index 186f0ed..a3f1df8 100644 --- a/drivers/mmc/host/Makefile +++ b/drivers/mmc/host/Makefile @@ -45,10 +45,9 @@ obj-$(CONFIG_MMC_USHC) += ushc.o obj-$(CONFIG_MMC_SDHCI_PLTFM) += sdhci-pltfm.o obj-$(CONFIG_MMC_SDHCI_CNS3XXX)+= sdhci-cns3xxx.o -obj-$(CONFIG_MMC_SDHCI_ESDHC_IMX) += sdhci-esdhc.o +obj-$(CONFIG_MMC_SDHCI_ESDHC) += sdhci-esdhc.o obj-$(CONFIG_MMC_SDHCI_DOVE) += sdhci-dove.o obj-$(CONFIG_MMC_SDHCI_TEGRA) += sdhci-tegra.o -obj-$(CONFIG_MMC_SDHCI_OF_ESDHC) += sdhci-of-esdhc.o obj-$(CONFIG_MMC_SDHCI_OF_HLWD)+= sdhci-of-hlwd.o ifeq ($(CONFIG_CB710_DEBUG),y) diff --git a/drivers/mmc/host/sdhci-esdhc.c b/drivers/mmc/host/sdhci-esdhc.c index 8da57d4..f3b4ff5 100644 --- a/drivers/mmc/host/sdhci-esdhc.c +++ b/drivers/mmc/host/sdhci-esdhc.c @@ -1,7 +1,11 @@ /* - * Freescale eSDHC i.MX controller driver for the platform bus. + * Freescale eSDHC i.MX controller driver for MPCxxx and i.MX. * - * derived from the OF-version. + * Copyright (c) 2007 Freescale Semiconductor, Inc. + * Author: Xiaobo Xie x@freescale.com + * + * Copyright (c) 2009 MontaVista Software, Inc. + * Author: Anton Vorontsov avoront...@ru.mvista.com * * Copyright (c) 2010 Pengutronix e.K. * Author: Wolfram Sang w.s...@pengutronix.de @@ -21,11 +25,40 @@ #include linux/mmc/sdhci-pltfm.h #include linux/mmc/mmc.h #include linux/mmc/sdio.h +#include linux/mmc/esdhc.h +#ifdef CONFIG_MMC_SDHCI_ESDHC_IMX #include mach/hardware.h -#include mach/esdhc.h +#endif #include sdhci.h #include sdhci-pltfm.h -#include sdhci-esdhc.h + +/* + * Ops and quirks for the Freescale eSDHC controller. + */ + +#define ESDHC_DEFAULT_QUIRKS (SDHCI_QUIRK_FORCE_BLK_SZ_2048 | \ + SDHCI_QUIRK_NO_BUSY_IRQ | \ + SDHCI_QUIRK_NONSTANDARD_CLOCK | \ +
[PATCH v2 6/7] mmc: sdhci: merge two sdhci-pltfm.h into one
The structure sdhci_pltfm_data is not necessarily to be in a public
header like include/linux/mmc/sdhci-pltfm.h, so the patch moves it
into drivers/mmc/host/sdhci-pltfm.h and eliminates the former one.
Signed-off-by: Shawn Guo shawn@linaro.org
Reviewed-by: Grant Likely grant.lik...@secretlab.ca
Reviewed-by: Wolfram Sang w.s...@pengutronix.de
---
drivers/mmc/host/sdhci-cns3xxx.c |1 -
drivers/mmc/host/sdhci-esdhc.c |1 -
drivers/mmc/host/sdhci-pltfm.h |6 +-
include/linux/mmc/sdhci-pltfm.h | 29 -
4 files changed, 5 insertions(+), 32 deletions(-)
delete mode 100644 include/linux/mmc/sdhci-pltfm.h
diff --git a/drivers/mmc/host/sdhci-cns3xxx.c b/drivers/mmc/host/sdhci-cns3xxx.c
index ac4b26f..025d1a5 100644
--- a/drivers/mmc/host/sdhci-cns3xxx.c
+++ b/drivers/mmc/host/sdhci-cns3xxx.c
@@ -15,7 +15,6 @@
#include linux/delay.h
#include linux/device.h
#include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
#include mach/cns3xxx.h
#include sdhci.h
#include sdhci-pltfm.h
diff --git a/drivers/mmc/host/sdhci-esdhc.c b/drivers/mmc/host/sdhci-esdhc.c
index f3b4ff5..f005cb8 100644
--- a/drivers/mmc/host/sdhci-esdhc.c
+++ b/drivers/mmc/host/sdhci-esdhc.c
@@ -22,7 +22,6 @@
#include linux/gpio.h
#include linux/slab.h
#include linux/mmc/host.h
-#include linux/mmc/sdhci-pltfm.h
#include linux/mmc/mmc.h
#include linux/mmc/sdio.h
#include linux/mmc/esdhc.h
diff --git a/drivers/mmc/host/sdhci-pltfm.h b/drivers/mmc/host/sdhci-pltfm.h
index fe27b83..fd72694 100644
--- a/drivers/mmc/host/sdhci-pltfm.h
+++ b/drivers/mmc/host/sdhci-pltfm.h
@@ -14,9 +14,13 @@
#include linux/clk.h
#include linux/types.h
#include linux/platform_device.h
-#include linux/mmc/sdhci-pltfm.h
#include linux/mmc/sdhci.h
+struct sdhci_pltfm_data {
+ struct sdhci_ops *ops;
+ unsigned int quirks;
+};
+
struct sdhci_pltfm_host {
struct clk *clk;
void *priv; /* to handle quirks across io-accessor calls */
diff --git a/include/linux/mmc/sdhci-pltfm.h b/include/linux/mmc/sdhci-pltfm.h
deleted file mode 100644
index f1c2ac3..000
--- a/include/linux/mmc/sdhci-pltfm.h
+++ /dev/null
@@ -1,29 +0,0 @@
-/*
- * Platform data declarations for the sdhci-pltfm driver.
- *
- * Copyright (c) 2010 MontaVista Software, LLC.
- *
- * Author: Anton Vorontsov avoront...@ru.mvista.com
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or (at
- * your option) any later version.
- */
-
-#ifndef _SDHCI_PLTFM_H
-#define _SDHCI_PLTFM_H
-
-struct sdhci_ops;
-
-/**
- * struct sdhci_pltfm_data - SDHCI platform-specific information hooks
- * @ops: optional pointer to the platform-provided SDHCI ops
- * @quirks: optional SDHCI quirks
- */
-struct sdhci_pltfm_data {
- struct sdhci_ops *ops;
- unsigned int quirks;
-};
-
-#endif /* _SDHCI_PLTFM_H */
--
1.7.4.1
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[PATCH v2 7/7] ARM: mxc: remove esdhc.h and use the public one
Signed-off-by: Shawn Guo shawn@linaro.org
---
.../plat-mxc/devices/platform-sdhci-esdhc-imx.c|1 -
arch/arm/plat-mxc/include/mach/devices-common.h|2 +-
2 files changed, 1 insertions(+), 2 deletions(-)
diff --git a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
index 6b2940b..b401689 100644
--- a/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
+++ b/arch/arm/plat-mxc/devices/platform-sdhci-esdhc-imx.c
@@ -8,7 +8,6 @@
#include mach/hardware.h
#include mach/devices-common.h
-#include mach/esdhc.h
#define imx_sdhci_esdhc_imx_data_entry_single(soc, _id, hwid) \
{ \
diff --git a/arch/arm/plat-mxc/include/mach/devices-common.h
b/arch/arm/plat-mxc/include/mach/devices-common.h
index 8658c9c..c95ab13 100644
--- a/arch/arm/plat-mxc/include/mach/devices-common.h
+++ b/arch/arm/plat-mxc/include/mach/devices-common.h
@@ -243,7 +243,7 @@ struct imx_mxc_w1_data {
struct platform_device *__init imx_add_mxc_w1(
const struct imx_mxc_w1_data *data);
-#include mach/esdhc.h
+#include linux/mmc/esdhc.h
struct imx_sdhci_esdhc_imx_data {
int id;
resource_size_t iobase;
--
1.7.4.1
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Re: [PATCH v2 5/7] mmc: sdhci: consolidate sdhci-of-esdhc and sdhci-esdhc-imx
On Thu, May 05, 2011 at 09:22:56PM +0800, Shawn Guo wrote: This patch is to consolidate SDHCI driver for Freescale eSDHC controller found on both MPCxxx and i.MX platforms. It merges sdhci-of-esdhc.c into sdhci-esdhc.c, so that the same pair of .probe/.remove hook works with eSDHC for two platforms. As the results, sdhci-of-esdhc.c and sdhci-esdhc.h are removed, and header esdhc.h containing the definition of esdhc_platform_data is put into the public folder. Signed-off-by: Shawn Guo shawn@linaro.org I'm not sure if that makes sense to merge these two. I'd rather vote for renaming sdhci-of-esdhc to sdhci-esdhc-mpc. :-) -- Anton Vorontsov Email: cbouatmai...@gmail.com ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 3/7] mmc: sdhci: make sdhci-of device drivers self registered
On Thu, May 05, 2011 at 09:22:54PM +0800, Shawn Guo wrote:
[...]
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
[...]
-#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-
-/*
- * These accessors are designed for big endian hosts doing I/O to
- * little endian controllers incorporating a 32-bit hardware byte swapper.
- */
-
-u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-{
- return in_be32(host-ioaddr + reg);
-}
-
-u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
-{
- return in_be16(host-ioaddr + (reg ^ 0x2));
-}
-
-u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
-{
- return in_8(host-ioaddr + (reg ^ 0x3));
-}
-
-void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
-{
- out_be32(host-ioaddr + reg, val);
-}
-
-void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- int base = reg ~0x3;
- int shift = (reg 0x2) * 8;
-
- switch (reg) {
- case SDHCI_TRANSFER_MODE:
- /*
- * Postpone this write, we must do it together with a
- * command write that is down below.
- */
- pltfm_host-xfer_mode_shadow = val;
- return;
- case SDHCI_COMMAND:
- sdhci_be32bs_writel(host, val 16 |
pltfm_host-xfer_mode_shadow,
- SDHCI_TRANSFER_MODE);
- return;
- }
- clrsetbits_be32(host-ioaddr + base, 0x shift, val shift);
-}
-
-void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
-{
- int base = reg ~0x3;
- int shift = (reg 0x3) * 8;
-
- clrsetbits_be32(host-ioaddr + base , 0xff shift, val shift);
-}
-#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
[...]
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+/*
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
+ */
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
+{
+ return in_be32(host-ioaddr + reg);
+}
+
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
+{
+ return in_be16(host-ioaddr + (reg ^ 0x2));
+}
+
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
+{
+ return in_8(host-ioaddr + (reg ^ 0x3));
+}
+
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
+{
+ out_be32(host-ioaddr + reg, val);
+}
+
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ int base = reg ~0x3;
+ int shift = (reg 0x2) * 8;
+
+ switch (reg) {
+ case SDHCI_TRANSFER_MODE:
+ /*
+ * Postpone this write, we must do it together with a
+ * command write that is down below.
+ */
+ pltfm_host-xfer_mode_shadow = val;
+ return;
+ case SDHCI_COMMAND:
+ sdhci_be32bs_writel(host, val 16 |
pltfm_host-xfer_mode_shadow,
+ SDHCI_TRANSFER_MODE);
+ return;
+ }
+ clrsetbits_be32(host-ioaddr + base, 0x shift, val shift);
+}
+
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+ int base = reg ~0x3;
+ int shift = (reg 0x3) * 8;
+
+ clrsetbits_be32(host-ioaddr + base , 0xff shift, val shift);
+}
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
I noticed you're very careful wrt copyright/authorship notices,
except for this case. How about retaining copyright stuff when
you merge these two files?
The patch itself looks great though.
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
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Re: [PATCH v2 2/7] mmc: sdhci: eliminate sdhci_of_host and sdhci_of_data
On Thu, May 05, 2011 at 09:22:53PM +0800, Shawn Guo wrote: The patch migrates the use of sdhci_of_host and sdhci_of_data to sdhci_pltfm_host and sdhci_pltfm_data, so that the former pair can be eliminated. Signed-off-by: Shawn Guo shawn@linaro.org Reviewed-by: Grant Likely grant.lik...@secretlab.ca Acked-by: Anton Vorontsov cbouatmai...@gmail.com Thanks! -- Anton Vorontsov Email: cbouatmai...@gmail.com ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH v2 1/7] mmc: sdhci: make sdhci-pltfm device drivers self registered
On Thu, May 05, 2011 at 09:22:52PM +0800, Shawn Guo wrote:
[...]
+static int __devinit sdhci_cns3xxx_probe(struct platform_device *pdev)
+{
+ return sdhci_pltfm_register(pdev, sdhci_cns3xxx_pdata);
+}
+
+static int __devexit sdhci_cns3xxx_remove(struct platform_device *pdev)
+{
+ return sdhci_pltfm_unregister(pdev);
+}
+
+static struct platform_driver sdhci_cns3xxx_driver = {
+ .driver = {
+ .name = sdhci-cns3xxx,
+ .owner = THIS_MODULE,
+ },
+ .probe = sdhci_cns3xxx_probe,
+ .remove = __devexit_p(sdhci_cns3xxx_remove),
+#ifdef CONFIG_PM
+ .suspend= sdhci_pltfm_suspend,
+ .resume = sdhci_pltfm_resume,
+#endif
+};
+
+static int __init sdhci_cns3xxx_init(void)
+{
+ return platform_driver_register(sdhci_cns3xxx_driver);
+}
+module_init(sdhci_cns3xxx_init);
+
+static void __exit sdhci_cns3xxx_exit(void)
+{
+ platform_driver_unregister(sdhci_cns3xxx_driver);
+}
+module_exit(sdhci_cns3xxx_exit);
I don't think I like this duplicate code for each platform sub-
driver. It's repetitive and annoying. :-/
But considering that ARM will be multiplatform soon, we don't
want to have every mach-* stuff in the single sdhci-pltfm.
So... OK. If that compiles, I'm fine with it. :-D
Acked-by: Anton Vorontsov cbouatmai...@gmail.com
Thanks!
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[PATCH v2] powerpc: Use the deterministic mode of ar
Cc: Benjamin Herrenschmidt b...@kernel.crashing.org Cc: Paul Mackerras pau...@samba.org Cc: linuxppc-dev@lists.ozlabs.org Signed-off-by: Michal Marek mma...@suse.cz --- Hi, this version fixes build with binutils = 2.19 by first checking if ar(1) supports the D option. It depends on a previous patch in the kbuild tree, commit 40df759e (kbuild: Fix build with binutils = 2.19) in linux-next, so it will need to go through the kbuild tree. But feedback from the PPC maintainers would be appreciated. Thanks Michal --- arch/powerpc/boot/Makefile |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 8917816..f0543f8 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile @@ -127,7 +127,7 @@ quiet_cmd_bootas = BOOTAS $@ cmd_bootas = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTAFLAGS) -c -o $@ $ quiet_cmd_bootar = BOOTAR $@ - cmd_bootar = $(CROSS32AR) -cr $@. $(filter-out FORCE,$^); mv $@. $@ + cmd_bootar = $(CROSS32AR) -cr$(KBUILD_ARFLAGS) $@. $(filter-out FORCE,$^); mv $@. $@ $(obj-libfdt): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c FORCE $(call if_changed_dep,bootcc) -- 1.7.4.1 ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 0/1] ppc4xx: Fix PCIe scanning for the 460SX
Also, the patch removes the code for waiting for the link to be up with a comment What DCR has the link status on the 460SX?. Please fix that (Tirumala, can you provide the missing information ?) It is not one register. Here is the flow for Gen-1. 1. PECFGn_DLLSTA[3] will be asserted when pci-e link comes up. 2. now progream the UTL buffer configuration registers. 3. SW should assert PEUTLn_PCTL[0] to cause flow control initialization. This is memory mapped using GPL register REGBH , REBAL and REGMSK 4. Now check for the PEUTLN_PSTA[8] for the flow control init completion. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
Re: [PATCH 2/2] powerpc: add support for MPIC message register API
On 05/03/2011 10:19 AM, Scott Wood wrote:
In the absence of partitioning, no driver should need a specific one. With
partitioning, let the system designer mark those resources as reserved so
they don't get allocated. :-)
That seem reasonable. Back to the device tree then. One option is to bring
back the sister-send property 'mpic-msgr-send-mask', which was discussed some
months back. For example, consider:
/* OS 1 */
mpic_msgr_block0: mpic-msgr-block@41400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x41400 0x200;
interrupts = 0xb0 2 0xb2 2;
mpic-msgr-receive-mask = 0x5;
mpic-msgr-send-mask = 0xa;
};
mpic_msgr_block1: mpic-msgr-block@42400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x42400 0x200;
interrupts = 0xb4 2 0xb6 2;
mpic-msgr-receive-mask = 0x5;
};
/* OS 2 */
mpic_msgr_block0: mpic-msgr-block@41400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x41400 0x200;
interrupts = 0xb0 2 0xb2 2;
mpic-msgr-receive-mask = 0xa;
mpic-msgr-send-mask = 0x5;
};
mpic_msgr_block1: mpic-msgr-block@42400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x42400 0x200;
interrupts = 0xb4 2 0xb6 2;
mpic-msgr-send-mask = 0x5;
};
In block0 for both OSes, all registers are partitioned and are thus not
available for allocation. In block1 for both OSes, registers 0 and 2 are
reserved and registers 1 and 3 are available for general allocation.
So any register mentioned in one of 'mpic-msgr-receive-mask' or
'mpic-msgr-send-mask' is out of the running for general allocation.
If neither of the properties appear, then all registers are available
for general allocation.
You could get into trouble with this method with cases like:
/* OS 1 */
mpic_msgr_block0: mpic-msgr-block@41400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x41400 0x200;
interrupts = 0xb0 2 0xb2 2;
mpic-msgr-send-mask = 0xa;
};
/* OS 2 */
mpic_msgr_block0: mpic-msgr-block@41400 {
compatible = fsl,mpic-v3.1-msgr;
reg = 0x41400 0x200;
interrupts = 0xb0 2 0xb2 2;
mpic-msgr-receive-mask = 0x5;
};
Now OS 1 has registers 0 and 2 available for general allocation, which
OS 2 is receiving on. However, we already have that problem if someone
botches the masks. So I am not very worried about that.
Clearly this is just one method, but I think tagging what is available from the
device tree is a must.
Thoughts?
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Re: [RFC][PATCH] powerpc: respect how command line nr_cpus is set
From Documentation/kernel-parameters.txt: nr_cpus=[SMP] Maximum number of processors that an SMP kernel could support. nr_cpus=n : n = 1 limits the kernel to supporting 'n' processors. Later in runtime you can not use hotplug cpu feature to put more cpu back to online. just like you compile the kernel NR_CPUS=n Which makes me think we should have max_cpus be an absolute limit. Ok, looks like I've been confusing nr_cpus= vs. max_cpus= or something like that. I'll have a look at your patch later today. Cheers, Ben. ___ Linuxppc-dev mailing list Linuxppc-dev@lists.ozlabs.org https://lists.ozlabs.org/listinfo/linuxppc-dev
[PATCH 2/2] powerpc/pseries: Add support for IO event interrupts
From: Tseng-Hui (Frank) Lin th...@linux.vnet.ibm.com
This patch adds support for handling IO Event interrupts which come
through at the /event-sources/ibm,io-events device tree node.
The interrupts come through ibm,io-events device tree node are generated
by the firmware to report IO events. The firmware uses the same interrupt
to report multiple types of events for multiple devices. Each device may
have its own event handler. This patch implements a plateform interrupt
handler that is triggered by the IO event interrupts come through
ibm,io-events device tree node, pull in the IO events from RTAS and call
device event handlers registered in the notifier list.
Device event handlers are expected to use atomic_notifier_chain_register()
and atomic_notifier_chain_unregister() to register/unregister their
event handler in pseries_ioei_notifier_list list with IO event interrupt.
Device event handlers are responsible to identify if the event belongs
to the device event handler. The device event handle should return NOTIFY_OK
after the event is handled if the event belongs to the device event handler,
or NOTIFY_DONE otherwise.
Change log:
- Fixed compilation errors
- Fix comments to be docbook compliant
- Fix some code format
Signed-off-by: Tseng-Hui (Frank) Lin th...@us.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
arch/powerpc/include/asm/io_event_irq.h | 54 ++
arch/powerpc/platforms/pseries/Kconfig| 18 ++
arch/powerpc/platforms/pseries/Makefile |1 +
arch/powerpc/platforms/pseries/io_event_irq.c | 231 +
4 files changed, 304 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/io_event_irq.h
b/arch/powerpc/include/asm/io_event_irq.h
new file mode 100644
index 000..b1a9a1b
--- /dev/null
+++ b/arch/powerpc/include/asm/io_event_irq.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2010, 2011 Mark Nelson and Tseng-Hui (Frank) Lin, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_POWERPC_IO_EVENT_IRQ_H
+#define _ASM_POWERPC_IO_EVENT_IRQ_H
+
+#include linux/types.h
+#include linux/notifier.h
+
+#define PSERIES_IOEI_RPC_MAX_LEN 216
+
+#define PSERIES_IOEI_TYPE_ERR_DETECTED 0x01
+#define PSERIES_IOEI_TYPE_ERR_RECOVERED0x02
+#define PSERIES_IOEI_TYPE_EVENT0x03
+#define PSERIES_IOEI_TYPE_RPC_PASS_THRU0x04
+
+#define PSERIES_IOEI_SUBTYPE_NOT_APP 0x00
+#define PSERIES_IOEI_SUBTYPE_REBALANCE_REQ 0x01
+#define PSERIES_IOEI_SUBTYPE_NODE_ONLINE 0x03
+#define PSERIES_IOEI_SUBTYPE_NODE_OFFLINE 0x04
+#define PSERIES_IOEI_SUBTYPE_DUMP_SIZE_CHANGE 0x05
+#define PSERIES_IOEI_SUBTYPE_TORRENT_IRV_UPDATE0x06
+#define PSERIES_IOEI_SUBTYPE_TORRENT_HFI_CFGED 0x07
+
+#define PSERIES_IOEI_SCOPE_NOT_APP 0x00
+#define PSERIES_IOEI_SCOPE_RIO_HUB 0x36
+#define PSERIES_IOEI_SCOPE_RIO_BRIDGE 0x37
+#define PSERIES_IOEI_SCOPE_PHB 0x38
+#define PSERIES_IOEI_SCOPE_EADS_GLOBAL 0x39
+#define PSERIES_IOEI_SCOPE_EADS_SLOT 0x3A
+#define PSERIES_IOEI_SCOPE_TORRENT_HUB 0x3B
+#define PSERIES_IOEI_SCOPE_SERVICE_PROC0x51
+
+/* Platform Event Log Format, Version 6, data portition of IO event section */
+struct pseries_io_event {
+ uint8_t event_type; /* 0x00 IO-Event Type */
+ uint8_t rpc_data_len; /* 0x01 RPC data length */
+ uint8_t scope; /* 0x02 Error/Event Scope */
+ uint8_t event_subtype; /* 0x03 I/O-Event Sub-Type */
+ uint32_t drc_index; /* 0x04 DRC Index */
+ uint8_t rpc_data[PSERIES_IOEI_RPC_MAX_LEN];
+ /* 0x08 RPC Data (0-216 bytes, */
+ /* padded to 4 bytes alignment) */
+};
+
+extern struct atomic_notifier_head pseries_ioei_notifier_list;
+
+#endif /* _ASM_POWERPC_IO_EVENT_IRQ_H */
diff --git a/arch/powerpc/platforms/pseries/Kconfig
b/arch/powerpc/platforms/pseries/Kconfig
index b044922..71af4c5 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -50,6 +50,24 @@ config SCANLOG
tristate Scanlog dump interface
depends on RTAS_PROC PPC_PSERIES
+config IO_EVENT_IRQ
+ bool IO Event Interrupt support
+ depends on PPC_PSERIES
+ default y
+ help
+ Select this option, if you want to enable support for IO Event
+ interrupts. IO event interrupt is a mechanism provided by RTAS
+ to return information about hardware error and non-error events
+ which may need OS attention. RTAS returns events
[PATCH] powerpc, hw_breakpoints: Fix CONFIG_HAVE_HW_BREAKPOINT off-case in ptrace_set_debugreg
We make use of ptrace_get_breakpoints() / ptrace_put_breakpoints()
to protect ptrace_set_debugreg() even if CONFIG_HAVE_HW_BREAKPOINT
if off. However in this case, these APIs are not implemented.
To fix this, push the protection down inside the relevant ifdef.
Best would be to export the code inside CONFIG_HAVE_HW_BREAKPOINT
into a standalone function to cleanup the ifdefury there and call
the breakpoint ref API inside. But as it is more invasive, this
should be rather made in an -rc1.
Fixes:
arch/powerpc/kernel/ptrace.c:1594: error: implicit declaration of function
'ptrace_get_breakpoints'
make[2]: *** [arch/powerpc/kernel/ptrace.o] Error 1
make[1]: *** [arch/powerpc/kernel] Error 2
make: *** [sub-make] Error 2
Reported-by: Ingo Molnar mi...@elte.hu
Signed-off-by: Frederic Weisbecker fweis...@gmail.com
Cc: Prasad pra...@linux.vnet.ibm.com
Cc: v2.6.33.. sta...@kernel.org
---
arch/powerpc/kernel/ptrace.c | 15 +++
1 files changed, 11 insertions(+), 4 deletions(-)
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 4edeeb3..a6ae1cf 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -933,12 +933,16 @@ int ptrace_set_debugreg(struct task_struct *task,
unsigned long addr,
if (data !(data DABR_TRANSLATION))
return -EIO;
#ifdef CONFIG_HAVE_HW_BREAKPOINT
+ if (ptrace_get_breakpoints(task) 0)
+ return -ESRCH;
+
bp = thread-ptrace_bps[0];
if ((!data) || !(data (DABR_DATA_WRITE | DABR_DATA_READ))) {
if (bp) {
unregister_hw_breakpoint(bp);
thread-ptrace_bps[0] = NULL;
}
+ ptrace_put_breakpoints(task);
return 0;
}
if (bp) {
@@ -948,9 +952,12 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned
long addr,
(DABR_DATA_WRITE | DABR_DATA_READ),
attr.bp_type);
ret = modify_user_hw_breakpoint(bp, attr);
- if (ret)
+ if (ret) {
+ ptrace_put_breakpoints(task);
return ret;
+ }
thread-ptrace_bps[0] = bp;
+ ptrace_put_breakpoints(task);
thread-dabr = data;
return 0;
}
@@ -965,9 +972,12 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned
long addr,
ptrace_triggered, task);
if (IS_ERR(bp)) {
thread-ptrace_bps[0] = NULL;
+ ptrace_put_breakpoints(task);
return PTR_ERR(bp);
}
+ ptrace_put_breakpoints(task);
+
#endif /* CONFIG_HAVE_HW_BREAKPOINT */
/* Move contents to the DABR register */
@@ -1591,10 +1601,7 @@ long arch_ptrace(struct task_struct *child, long request,
}
case PTRACE_SET_DEBUGREG:
- if (ptrace_get_breakpoints(child) 0)
- return -ESRCH;
ret = ptrace_set_debugreg(child, addr, data);
- ptrace_put_breakpoints(child);
break;
#ifdef CONFIG_PPC64
--
1.7.3.2
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Re: [PATCH 3/3] [repost] powerpc/eeh: Display eeh error location for bus and device
On Wed, 2011-05-04 at 15:57 -0700, Richard A Lary wrote:
From: Richard A Lary rl...@linux.vnet.ibm.com
For adapters which have devices under a PCIe switch/bridge it is informative
to display information for both the PCIe switch/bridge and the device on
which the bus error was detected.
rebased to powerpc-next
Signed-off-by: Richard A Lary rl...@linux.vnet.ibm.com
---
Not sure what you're doing but it still doesn't apply for me. I think
the patch is whitespace damaged. IE. Some spaces have been added at
the beginning of each line. IE. context lines (nor patch lines
that start with - or +) seem to have -two- spaces at the beginning
of each line for some reason.
I suspect whatever you're using for email is corrupting patches.
Cheers,
Ben.
---
arch/powerpc/platforms/pseries/eeh_driver.c | 22 13 +9 - 0 !
1 file changed, 13 insertions(+), 9 deletions(-)
Index: b/arch/powerpc/platforms/pseries/eeh_driver.c
===
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -328,7 +328,7 @@ struct pci_dn * handle_eeh_events (struc
struct pci_bus *frozen_bus;
int rc = 0;
enum pci_ers_result result = PCI_ERS_RESULT_NONE;
- const char *location, *pci_str, *drv_str;
+ const char *location, *pci_str, *drv_str, *bus_pci_str, *bus_drv_str;
frozen_dn = find_device_pe(event-dn);
if (!frozen_dn) {
@@ -364,13 +364,8 @@ struct pci_dn * handle_eeh_events (struc
frozen_pdn = PCI_DN(frozen_dn);
frozen_pdn-eeh_freeze_count++;
- if (frozen_pdn-pcidev) {
- pci_str = pci_name (frozen_pdn-pcidev);
- drv_str = pcid_name (frozen_pdn-pcidev);
- } else {
- pci_str = eeh_pci_name(event-dev);
- drv_str = pcid_name (event-dev);
- }
+ pci_str = eeh_pci_name(event-dev);
+ drv_str = pcid_name(event-dev);
if (frozen_pdn-eeh_freeze_count EEH_MAX_ALLOWED_FREEZES)
goto excess_failures;
@@ -378,8 +373,17 @@ struct pci_dn * handle_eeh_events (struc
printk(KERN_WARNING
EEH: This PCI device has failed %d times in the last hour:\n,
frozen_pdn-eeh_freeze_count);
+
+ if (frozen_pdn-pcidev) {
+ bus_pci_str = pci_name(frozen_pdn-pcidev);
+ bus_drv_str = pcid_name(frozen_pdn-pcidev);
+ printk(KERN_WARNING
+ EEH: Bus location=%s driver=%s pci addr=%s\n,
+ location, bus_drv_str, bus_pci_str);
+ }
+
printk(KERN_WARNING
- EEH: location=%s driver=%s pci addr=%s\n,
+ EEH: Device location=%s driver=%s pci addr=%s\n,
location, drv_str, pci_str);
/* Walk the various device drivers attached to this slot through
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Re: [PATCH 3/3] [repost] powerpc/eeh: Display eeh error location for bus and device
On Fri, 2011-05-06 at 10:46 +1000, Benjamin Herrenschmidt wrote:
On Wed, 2011-05-04 at 15:57 -0700, Richard A Lary wrote:
From: Richard A Lary rl...@linux.vnet.ibm.com
For adapters which have devices under a PCIe switch/bridge it is
informative
to display information for both the PCIe switch/bridge and the device on
which the bus error was detected.
rebased to powerpc-next
Signed-off-by: Richard A Lary rl...@linux.vnet.ibm.com
---
Not sure what you're doing but it still doesn't apply for me. I think
the patch is whitespace damaged. IE. Some spaces have been added at
the beginning of each line. IE. context lines (nor patch lines
that start with - or +) seem to have -two- spaces at the beginning
of each line for some reason.
I suspect whatever you're using for email is corrupting patches.
BTW. I've hand applied it this time.
Cheers,
Ben.
Cheers,
Ben.
---
arch/powerpc/platforms/pseries/eeh_driver.c | 2213 +9 -
0 !
1 file changed, 13 insertions(+), 9 deletions(-)
Index: b/arch/powerpc/platforms/pseries/eeh_driver.c
===
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -328,7 +328,7 @@ struct pci_dn * handle_eeh_events (struc
struct pci_bus *frozen_bus;
int rc = 0;
enum pci_ers_result result = PCI_ERS_RESULT_NONE;
- const char *location, *pci_str, *drv_str;
+ const char *location, *pci_str, *drv_str, *bus_pci_str, *bus_drv_str;
frozen_dn = find_device_pe(event-dn);
if (!frozen_dn) {
@@ -364,13 +364,8 @@ struct pci_dn * handle_eeh_events (struc
frozen_pdn = PCI_DN(frozen_dn);
frozen_pdn-eeh_freeze_count++;
- if (frozen_pdn-pcidev) {
- pci_str = pci_name (frozen_pdn-pcidev);
- drv_str = pcid_name (frozen_pdn-pcidev);
- } else {
- pci_str = eeh_pci_name(event-dev);
- drv_str = pcid_name (event-dev);
- }
+ pci_str = eeh_pci_name(event-dev);
+ drv_str = pcid_name(event-dev);
if (frozen_pdn-eeh_freeze_count EEH_MAX_ALLOWED_FREEZES)
goto excess_failures;
@@ -378,8 +373,17 @@ struct pci_dn * handle_eeh_events (struc
printk(KERN_WARNING
EEH: This PCI device has failed %d times in the last hour:\n,
frozen_pdn-eeh_freeze_count);
+
+ if (frozen_pdn-pcidev) {
+ bus_pci_str = pci_name(frozen_pdn-pcidev);
+ bus_drv_str = pcid_name(frozen_pdn-pcidev);
+ printk(KERN_WARNING
+ EEH: Bus location=%s driver=%s pci addr=%s\n,
+ location, bus_drv_str, bus_pci_str);
+ }
+
printk(KERN_WARNING
- EEH: location=%s driver=%s pci addr=%s\n,
+ EEH: Device location=%s driver=%s pci addr=%s\n,
location, drv_str, pci_str);
/* Walk the various device drivers attached to this slot through
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Re: [PATCH 3/4] powerpc/mpic: parse 4-cell intspec types other than zero
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/include/asm/mpic.h |2 ++
arch/powerpc/sysdev/mpic.c | 37 -
2 files changed, 38 insertions(+), 1 deletions(-)
Ben,
Did you plan on review and pull this in or expect me to?
- k
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 7005ee0..25a0cb3 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -371,6 +371,8 @@ struct mpic
* NOTE: This flag trumps MPIC_WANTS_RESET.
*/
#define MPIC_NO_RESET 0x4000
+/* Freescale MPIC (compatible includes fsl,mpic) */
+#define MPIC_FSL 0x8000
/* MPIC HW modification ID */
#define MPIC_REGSET_MASK 0xf000
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 0f7c671..69f96ec 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -6,6 +6,7 @@
* with various broken implementations of this HW.
*
* Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
+ * Copyright 2010-2011 Freescale Semiconductor, Inc.
*
* This file is subject to the terms and conditions of the GNU General Public
* License. See the file COPYING in the main directory of this archive
@@ -1030,6 +1031,7 @@ static int mpic_host_xlate(struct irq_host *h, struct
device_node *ct,
irq_hw_number_t *out_hwirq, unsigned int *out_flags)
{
+ struct mpic *mpic = h-host_data;
static unsigned char map_mpic_senses[4] = {
IRQ_TYPE_EDGE_RISING,
IRQ_TYPE_LEVEL_LOW,
@@ -1038,7 +1040,38 @@ static int mpic_host_xlate(struct irq_host *h, struct
device_node *ct,
};
*out_hwirq = intspec[0];
- if (intsize 1) {
+ if (intsize = 4 (mpic-flags MPIC_FSL)) {
+ /*
+ * Freescale MPIC with extended intspec:
+ * First two cells are as usual. Third specifies
+ * an interrupt type. Fourth is type-specific data.
+ *
+ * See Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+ */
+ switch (intspec[2]) {
+ case 0:
+ case 1: /* no EISR/EIMR support for now, treat as shared IRQ */
+ break;
+ case 2:
+ if (intspec[0] = ARRAY_SIZE(mpic-ipi_vecs))
+ return -EINVAL;
+
+ *out_hwirq = mpic-ipi_vecs[intspec[0]];
+ break;
+ case 3:
+ if (intspec[0] = ARRAY_SIZE(mpic-timer_vecs))
+ return -EINVAL;
+
+ *out_hwirq = mpic-timer_vecs[intspec[0]];
+ break;
+ default:
+ pr_debug(%s: unknown irq type %u\n,
+ __func__, intspec[2]);
+ return -EINVAL;
+ }
+
+ *out_flags = map_mpic_senses[intspec[1] 3];
+ } else if (intsize 1) {
u32 mask = 0x3;
/* Apple invented a new race of encoding on machines with
@@ -1137,6 +1170,8 @@ struct mpic * __init mpic_alloc(struct device_node
*node,
/* Check for big-endian in device-tree */
if (node of_get_property(node, big-endian, NULL) != NULL)
mpic-flags |= MPIC_BIG_ENDIAN;
+ if (node of_device_is_compatible(node, fsl,mpic))
+ mpic-flags |= MPIC_FSL;
/* Look for protected sources */
if (node) {
--
1.7.1
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Re: [PATCH 4/4] powerpc/mpic: add the mpic global timer support
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
Add support for MPIC timers as requestable interrupt sources.
Based on http://patchwork.ozlabs.org/patch/20941/ by Dave Liu.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/include/asm/mpic.h |3 +-
arch/powerpc/sysdev/mpic.c | 92 ---
2 files changed, 88 insertions(+), 7 deletions(-)
Ben,
Did you plan on review and pull this in or expect me to?
- k
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index 25a0cb3..664bee6 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -263,6 +263,7 @@ struct mpic
#ifdef CONFIG_SMP
struct irq_chip hc_ipi;
#endif
+ struct irq_chip hc_tm;
const char *name;
/* Flags */
unsigned intflags;
@@ -281,7 +282,7 @@ struct mpic
/* vector numbers used for internal sources (ipi/timers) */
unsigned intipi_vecs[4];
- unsigned inttimer_vecs[4];
+ unsigned inttimer_vecs[8];
/* Spurious vector to program into unused sources */
unsigned intspurious_vec;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 69f96ec..c173e67 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -219,6 +219,28 @@ static inline void _mpic_ipi_write(struct mpic *mpic,
unsigned int ipi, u32 valu
_mpic_write(mpic-reg_type, mpic-gregs, offset, value);
}
+static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm = 4)
+ offset += 0x1000 / 4;
+
+ return _mpic_read(mpic-reg_type, mpic-tmregs, offset);
+}
+
+static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32
value)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm = 4)
+ offset += 0x1000 / 4;
+
+ _mpic_write(mpic-reg_type, mpic-tmregs, offset, value);
+}
+
static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
{
unsigned int cpu = mpic_processor_id(mpic);
@@ -269,6 +291,8 @@ static inline void _mpic_irq_write(struct mpic *mpic,
unsigned int src_no,
#define mpic_write(b,r,v) _mpic_write(mpic-reg_type,(b),(r),(v))
#define mpic_ipi_read(i) _mpic_ipi_read(mpic,(i))
#define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v))
+#define mpic_tm_read(i) _mpic_tm_read(mpic,(i))
+#define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))
#define mpic_cpu_read(i) _mpic_cpu_read(mpic,(i))
#define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v))
#define mpic_irq_read(s,r)_mpic_irq_read(mpic,(s),(r))
@@ -628,6 +652,13 @@ static unsigned int mpic_is_ipi(struct mpic *mpic,
unsigned int irq)
return (src = mpic-ipi_vecs[0] src = mpic-ipi_vecs[3]);
}
+/* Determine if the linux irq is a timer */
+static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq)
+{
+ unsigned int src = mpic_irq_to_hw(irq);
+
+ return (src = mpic-timer_vecs[0] src = mpic-timer_vecs[7]);
+}
/* Convert a cpu mask from logical to physical cpu numbers. */
static inline u32 mpic_physmask(u32 cpumask)
@@ -814,6 +845,25 @@ static void mpic_end_ipi(struct irq_data *d)
#endif /* CONFIG_SMP */
+static void mpic_unmask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d-irq) - mpic-timer_vecs[0];
+
+ DBG(%s: enable_tm: %d (tm %d)\n, mpic-name, irq, src);
+ mpic_tm_write(src, mpic_tm_read(src) ~MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
+static void mpic_mask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d-irq) - mpic-timer_vecs[0];
+
+ mpic_tm_write(src, mpic_tm_read(src) | MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
bool force)
{
@@ -948,6 +998,12 @@ static struct irq_chip mpic_ipi_chip = {
};
#endif /* CONFIG_SMP */
+static struct irq_chip mpic_tm_chip = {
+ .irq_mask = mpic_mask_tm,
+ .irq_unmask = mpic_unmask_tm,
+ .irq_eoi= mpic_end_irq,
+};
+
#ifdef CONFIG_MPIC_U3_HT_IRQS
static struct irq_chip mpic_irq_ht_chip = {
.irq_startup= mpic_startup_ht_irq,
@@ -991,6 +1047,16 @@ static int mpic_host_map(struct irq_host *h, unsigned
int virq,
}
#endif /* CONFIG_SMP */
+ if (hw = mpic-timer_vecs[0] hw = mpic-timer_vecs[7]) {
+ WARN_ON(!(mpic-flags MPIC_PRIMARY));
+
+
Re: [PATCH v2 3/7] mmc: sdhci: make sdhci-of device drivers self registered
On Thu, May 05, 2011 at 06:23:44PM +0400, Anton Vorontsov wrote:
On Thu, May 05, 2011 at 09:22:54PM +0800, Shawn Guo wrote:
[...]
- * Copyright (c) 2007 Freescale Semiconductor, Inc.
- * Copyright (c) 2009 MontaVista Software, Inc.
- *
- * Authors: Xiaobo Xie x@freescale.com
- * Anton Vorontsov avoront...@ru.mvista.com
[...]
-#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
-
-/*
- * These accessors are designed for big endian hosts doing I/O to
- * little endian controllers incorporating a 32-bit hardware byte swapper.
- */
-
-u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
-{
- return in_be32(host-ioaddr + reg);
-}
-
-u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
-{
- return in_be16(host-ioaddr + (reg ^ 0x2));
-}
-
-u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
-{
- return in_8(host-ioaddr + (reg ^ 0x3));
-}
-
-void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
-{
- out_be32(host-ioaddr + reg, val);
-}
-
-void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
-{
- struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
- int base = reg ~0x3;
- int shift = (reg 0x2) * 8;
-
- switch (reg) {
- case SDHCI_TRANSFER_MODE:
- /*
-* Postpone this write, we must do it together with a
-* command write that is down below.
-*/
- pltfm_host-xfer_mode_shadow = val;
- return;
- case SDHCI_COMMAND:
- sdhci_be32bs_writel(host, val 16 |
pltfm_host-xfer_mode_shadow,
- SDHCI_TRANSFER_MODE);
- return;
- }
- clrsetbits_be32(host-ioaddr + base, 0x shift, val shift);
-}
-
-void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
-{
- int base = reg ~0x3;
- int shift = (reg 0x3) * 8;
-
- clrsetbits_be32(host-ioaddr + base , 0xff shift, val shift);
-}
-#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
[...]
+#ifdef CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER
+/*
+ * These accessors are designed for big endian hosts doing I/O to
+ * little endian controllers incorporating a 32-bit hardware byte swapper.
+ */
+u32 sdhci_be32bs_readl(struct sdhci_host *host, int reg)
+{
+ return in_be32(host-ioaddr + reg);
+}
+
+u16 sdhci_be32bs_readw(struct sdhci_host *host, int reg)
+{
+ return in_be16(host-ioaddr + (reg ^ 0x2));
+}
+
+u8 sdhci_be32bs_readb(struct sdhci_host *host, int reg)
+{
+ return in_8(host-ioaddr + (reg ^ 0x3));
+}
+
+void sdhci_be32bs_writel(struct sdhci_host *host, u32 val, int reg)
+{
+ out_be32(host-ioaddr + reg, val);
+}
+
+void sdhci_be32bs_writew(struct sdhci_host *host, u16 val, int reg)
+{
+ struct sdhci_pltfm_host *pltfm_host = sdhci_priv(host);
+ int base = reg ~0x3;
+ int shift = (reg 0x2) * 8;
+
+ switch (reg) {
+ case SDHCI_TRANSFER_MODE:
+ /*
+* Postpone this write, we must do it together with a
+* command write that is down below.
+*/
+ pltfm_host-xfer_mode_shadow = val;
+ return;
+ case SDHCI_COMMAND:
+ sdhci_be32bs_writel(host, val 16 |
pltfm_host-xfer_mode_shadow,
+ SDHCI_TRANSFER_MODE);
+ return;
+ }
+ clrsetbits_be32(host-ioaddr + base, 0x shift, val shift);
+}
+
+void sdhci_be32bs_writeb(struct sdhci_host *host, u8 val, int reg)
+{
+ int base = reg ~0x3;
+ int shift = (reg 0x3) * 8;
+
+ clrsetbits_be32(host-ioaddr + base , 0xff shift, val shift);
+}
+#endif /* CONFIG_MMC_SDHCI_BIG_ENDIAN_32BIT_BYTE_SWAPPER */
I noticed you're very careful wrt copyright/authorship notices,
except for this case. How about retaining copyright stuff when
you merge these two files?
Obviously, need to be more careful. Will add. Thanks.
--
Regards,
Shawn
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Re: [PATCH 4/4] powerpc/mpic: add the mpic global timer support
On Thu, 2011-05-05 at 20:07 -0500, Kumar Gala wrote:
On Mar 24, 2011, at 4:43 PM, Scott Wood wrote:
Add support for MPIC timers as requestable interrupt sources.
Based on http://patchwork.ozlabs.org/patch/20941/ by Dave Liu.
Signed-off-by: Dave Liu dave...@freescale.com
Signed-off-by: Scott Wood scottw...@freescale.com
---
arch/powerpc/include/asm/mpic.h |3 +-
arch/powerpc/sysdev/mpic.c | 92
---
2 files changed, 88 insertions(+), 7 deletions(-)
Ben,
Did you plan on review and pull this in or expect me to?
I might have been waiting for you I think ... :-) Or I wasn't sure. Feel
free to pick them up (if you do so, tag them as such in patchwork).
Cheers,
Ben.
- k
diff --git a/arch/powerpc/include/asm/mpic.h
b/arch/powerpc/include/asm/mpic.h
index 25a0cb3..664bee6 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -263,6 +263,7 @@ struct mpic
#ifdef CONFIG_SMP
struct irq_chip hc_ipi;
#endif
+ struct irq_chip hc_tm;
const char *name;
/* Flags */
unsigned intflags;
@@ -281,7 +282,7 @@ struct mpic
/* vector numbers used for internal sources (ipi/timers) */
unsigned intipi_vecs[4];
- unsigned inttimer_vecs[4];
+ unsigned inttimer_vecs[8];
/* Spurious vector to program into unused sources */
unsigned intspurious_vec;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 69f96ec..c173e67 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -219,6 +219,28 @@ static inline void _mpic_ipi_write(struct mpic *mpic,
unsigned int ipi, u32 valu
_mpic_write(mpic-reg_type, mpic-gregs, offset, value);
}
+static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm = 4)
+ offset += 0x1000 / 4;
+
+ return _mpic_read(mpic-reg_type, mpic-tmregs, offset);
+}
+
+static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32
value)
+{
+ unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+ ((tm 3) * MPIC_INFO(TIMER_STRIDE));
+
+ if (tm = 4)
+ offset += 0x1000 / 4;
+
+ _mpic_write(mpic-reg_type, mpic-tmregs, offset, value);
+}
+
static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
{
unsigned int cpu = mpic_processor_id(mpic);
@@ -269,6 +291,8 @@ static inline void _mpic_irq_write(struct mpic *mpic,
unsigned int src_no,
#define mpic_write(b,r,v) _mpic_write(mpic-reg_type,(b),(r),(v))
#define mpic_ipi_read(i)_mpic_ipi_read(mpic,(i))
#define mpic_ipi_write(i,v) _mpic_ipi_write(mpic,(i),(v))
+#define mpic_tm_read(i)_mpic_tm_read(mpic,(i))
+#define mpic_tm_write(i,v) _mpic_tm_write(mpic,(i),(v))
#define mpic_cpu_read(i)_mpic_cpu_read(mpic,(i))
#define mpic_cpu_write(i,v) _mpic_cpu_write(mpic,(i),(v))
#define mpic_irq_read(s,r) _mpic_irq_read(mpic,(s),(r))
@@ -628,6 +652,13 @@ static unsigned int mpic_is_ipi(struct mpic *mpic,
unsigned int irq)
return (src = mpic-ipi_vecs[0] src = mpic-ipi_vecs[3]);
}
+/* Determine if the linux irq is a timer */
+static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq)
+{
+ unsigned int src = mpic_irq_to_hw(irq);
+
+ return (src = mpic-timer_vecs[0] src = mpic-timer_vecs[7]);
+}
/* Convert a cpu mask from logical to physical cpu numbers. */
static inline u32 mpic_physmask(u32 cpumask)
@@ -814,6 +845,25 @@ static void mpic_end_ipi(struct irq_data *d)
#endif /* CONFIG_SMP */
+static void mpic_unmask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d-irq) - mpic-timer_vecs[0];
+
+ DBG(%s: enable_tm: %d (tm %d)\n, mpic-name, irq, src);
+ mpic_tm_write(src, mpic_tm_read(src) ~MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
+static void mpic_mask_tm(struct irq_data *d)
+{
+ struct mpic *mpic = mpic_from_irq_data(d);
+ unsigned int src = mpic_irq_to_hw(d-irq) - mpic-timer_vecs[0];
+
+ mpic_tm_write(src, mpic_tm_read(src) | MPIC_VECPRI_MASK);
+ mpic_tm_read(src);
+}
+
int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
bool force)
{
@@ -948,6 +998,12 @@ static struct irq_chip mpic_ipi_chip = {
};
#endif /* CONFIG_SMP */
+static struct irq_chip mpic_tm_chip = {
+ .irq_mask = mpic_mask_tm,
+ .irq_unmask = mpic_unmask_tm,
+ .irq_eoi= mpic_end_irq,
+};
+
#ifdef CONFIG_MPIC_U3_HT_IRQS
static struct irq_chip mpic_irq_ht_chip = {
.irq_startup= mpic_startup_ht_irq,
Re: [PATCH 2/2] powerpc/pseries: Add support for IO event interrupts
On Thu, 2011-05-05 at 17:32 -0500, Tseng-Hui (Frank) Lin wrote:
From: Tseng-Hui (Frank) Lin th...@linux.vnet.ibm.com
This patch adds support for handling IO Event interrupts which come
through at the /event-sources/ibm,io-events device tree node.
The interrupts come through ibm,io-events device tree node are generated
by the firmware to report IO events. The firmware uses the same interrupt
to report multiple types of events for multiple devices. Each device may
have its own event handler. This patch implements a plateform interrupt
handler that is triggered by the IO event interrupts come through
ibm,io-events device tree node, pull in the IO events from RTAS and call
device event handlers registered in the notifier list.
Device event handlers are expected to use atomic_notifier_chain_register()
and atomic_notifier_chain_unregister() to register/unregister their
event handler in pseries_ioei_notifier_list list with IO event interrupt.
Device event handlers are responsible to identify if the event belongs
to the device event handler. The device event handle should return NOTIFY_OK
after the event is handled if the event belongs to the device event handler,
or NOTIFY_DONE otherwise.
Change log:
- Fixed compilation errors
- Fix comments to be docbook compliant
- Fix some code format
Signed-off-by: Tseng-Hui (Frank) Lin th...@us.ibm.com
Signed-off-by: Benjamin Herrenschmidt b...@kernel.crashing.org
---
Next time, please put the change log -after- the --- so it is not part
of what gets committed. I've fixed it up by hand for now.
Cheers,
Ben.
arch/powerpc/include/asm/io_event_irq.h | 54 ++
arch/powerpc/platforms/pseries/Kconfig| 18 ++
arch/powerpc/platforms/pseries/Makefile |1 +
arch/powerpc/platforms/pseries/io_event_irq.c | 231
+
4 files changed, 304 insertions(+), 0 deletions(-)
diff --git a/arch/powerpc/include/asm/io_event_irq.h
b/arch/powerpc/include/asm/io_event_irq.h
new file mode 100644
index 000..b1a9a1b
--- /dev/null
+++ b/arch/powerpc/include/asm/io_event_irq.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2010, 2011 Mark Nelson and Tseng-Hui (Frank) Lin, IBM
Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+
+#ifndef _ASM_POWERPC_IO_EVENT_IRQ_H
+#define _ASM_POWERPC_IO_EVENT_IRQ_H
+
+#include linux/types.h
+#include linux/notifier.h
+
+#define PSERIES_IOEI_RPC_MAX_LEN 216
+
+#define PSERIES_IOEI_TYPE_ERR_DETECTED 0x01
+#define PSERIES_IOEI_TYPE_ERR_RECOVERED 0x02
+#define PSERIES_IOEI_TYPE_EVENT 0x03
+#define PSERIES_IOEI_TYPE_RPC_PASS_THRU 0x04
+
+#define PSERIES_IOEI_SUBTYPE_NOT_APP 0x00
+#define PSERIES_IOEI_SUBTYPE_REBALANCE_REQ 0x01
+#define PSERIES_IOEI_SUBTYPE_NODE_ONLINE 0x03
+#define PSERIES_IOEI_SUBTYPE_NODE_OFFLINE0x04
+#define PSERIES_IOEI_SUBTYPE_DUMP_SIZE_CHANGE0x05
+#define PSERIES_IOEI_SUBTYPE_TORRENT_IRV_UPDATE 0x06
+#define PSERIES_IOEI_SUBTYPE_TORRENT_HFI_CFGED 0x07
+
+#define PSERIES_IOEI_SCOPE_NOT_APP 0x00
+#define PSERIES_IOEI_SCOPE_RIO_HUB 0x36
+#define PSERIES_IOEI_SCOPE_RIO_BRIDGE0x37
+#define PSERIES_IOEI_SCOPE_PHB 0x38
+#define PSERIES_IOEI_SCOPE_EADS_GLOBAL 0x39
+#define PSERIES_IOEI_SCOPE_EADS_SLOT 0x3A
+#define PSERIES_IOEI_SCOPE_TORRENT_HUB 0x3B
+#define PSERIES_IOEI_SCOPE_SERVICE_PROC 0x51
+
+/* Platform Event Log Format, Version 6, data portition of IO event section
*/
+struct pseries_io_event {
+ uint8_t event_type; /* 0x00 IO-Event Type */
+ uint8_t rpc_data_len; /* 0x01 RPC data length */
+ uint8_t scope; /* 0x02 Error/Event Scope */
+ uint8_t event_subtype; /* 0x03 I/O-Event Sub-Type */
+ uint32_t drc_index; /* 0x04 DRC Index */
+ uint8_t rpc_data[PSERIES_IOEI_RPC_MAX_LEN];
+ /* 0x08 RPC Data (0-216 bytes, */
+ /* padded to 4 bytes alignment) */
+};
+
+extern struct atomic_notifier_head pseries_ioei_notifier_list;
+
+#endif /* _ASM_POWERPC_IO_EVENT_IRQ_H */
diff --git a/arch/powerpc/platforms/pseries/Kconfig
b/arch/powerpc/platforms/pseries/Kconfig
index b044922..71af4c5 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -50,6 +50,24 @@ config SCANLOG
tristate Scanlog dump interface
depends on RTAS_PROC PPC_PSERIES
+config IO_EVENT_IRQ
+ bool IO Event Interrupt support
+ depends on
