Re: [PATCHv2 1/3] powerpc/cacheinfo: Lookup cache by dt node and thread-group id
* Parth Shah [2021-07-28 23:26:05]: > From: "Gautham R. Shenoy" > > Currently the cacheinfo code on powerpc indexes the "cache" objects > (modelling the L1/L2/L3 caches) where the key is device-tree node > corresponding to that cache. On some of the POWER server platforms > thread-groups within the core share different sets of caches (Eg: On > SMT8 POWER9 systems, threads 0,2,4,6 of a core share L1 cache and > threads 1,3,5,7 of the same core share another L1 cache). On such > platforms, there is a single device-tree node corresponding to that > cache and the cache-configuration within the threads of the core is > indicated via "ibm,thread-groups" device-tree property. > > Since the current code is not aware of the "ibm,thread-groups" > property, on the aforementoined systems, cacheinfo code still treats > all the threads in the core to be sharing the cache because of the > single device-tree node (In the earlier example, the cacheinfo code > would says CPUs 0-7 share L1 cache). > > In this patch, we make the powerpc cacheinfo code aware of the > "ibm,thread-groups" property. We indexe the "cache" objects by the > key-pair (device-tree node, thread-group id). For any CPUX, for a > given level of cache, the thread-group id is defined to be the first > CPU in the "ibm,thread-groups" cache-group containing CPUX. For levels > of cache which are not represented in "ibm,thread-groups" property, > the thread-group id is -1. > > Signed-off-by: Gautham R. Shenoy > [parth: Remove "static" keyword for the definition of > "thread_group_l1_cache_map" > and "thread_group_l2_cache_map" to get rid of the compile error.] > Signed-off-by: Parth Shah Looks good to me. Reviewed-by: Srikar Dronamraju > --- > arch/powerpc/include/asm/smp.h | 3 ++ > arch/powerpc/kernel/cacheinfo.c | 80 - > arch/powerpc/kernel/smp.c | 4 +- > 3 files changed, 63 insertions(+), 24 deletions(-) > > diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h > index 03b3d010cbab..1259040cc3a4 100644 > --- a/arch/powerpc/include/asm/smp.h > +++ b/arch/powerpc/include/asm/smp.h > @@ -33,6 +33,9 @@ extern bool coregroup_enabled; > extern int cpu_to_chip_id(int cpu); > extern int *chip_id_lookup_table; > > +DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map); > +DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map); > + > #ifdef CONFIG_SMP > > struct smp_ops_t { > diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c > index 6f903e9aa20b..5a6925d87424 100644 > --- a/arch/powerpc/kernel/cacheinfo.c > +++ b/arch/powerpc/kernel/cacheinfo.c > @@ -120,6 +120,7 @@ struct cache { > struct cpumask shared_cpu_map; /* online CPUs using this cache */ > int type; /* split cache disambiguation */ > int level; /* level not explicit in device tree */ > + int group_id; /* id of the group of threads that share > this cache */ > struct list_head list; /* global list of cache objects */ > struct cache *next_local; /* next cache of >= level */ > }; > @@ -142,22 +143,24 @@ static const char *cache_type_string(const struct cache > *cache) > } > > static void cache_init(struct cache *cache, int type, int level, > -struct device_node *ofnode) > +struct device_node *ofnode, int group_id) > { > cache->type = type; > cache->level = level; > cache->ofnode = of_node_get(ofnode); > + cache->group_id = group_id; > INIT_LIST_HEAD(>list); > list_add(>list, _list); > } > > -static struct cache *new_cache(int type, int level, struct device_node > *ofnode) > +static struct cache *new_cache(int type, int level, > +struct device_node *ofnode, int group_id) > { > struct cache *cache; > > cache = kzalloc(sizeof(*cache), GFP_KERNEL); > if (cache) > - cache_init(cache, type, level, ofnode); > + cache_init(cache, type, level, ofnode, group_id); > > return cache; > } > @@ -309,20 +312,24 @@ static struct cache *cache_find_first_sibling(struct > cache *cache) > return cache; > > list_for_each_entry(iter, _list, list) > - if (iter->ofnode == cache->ofnode && iter->next_local == cache) > + if (iter->ofnode == cache->ofnode && > + iter->group_id == cache->group_id && > + iter->next_local == cache) > return iter; > > return cache; > } > > -/* return the first cache on a local list matching node */ > -static struct cache *cache_lookup_by_node(const struct device_node *node) > +/* return the first cache on a local list matching node and thread-group id > */ > +static struct cache *cache_lookup_by_node_group(const struct device_node > *node, > + int group_id) > { >
[PATCHv2 1/3] powerpc/cacheinfo: Lookup cache by dt node and thread-group id
From: "Gautham R. Shenoy" Currently the cacheinfo code on powerpc indexes the "cache" objects (modelling the L1/L2/L3 caches) where the key is device-tree node corresponding to that cache. On some of the POWER server platforms thread-groups within the core share different sets of caches (Eg: On SMT8 POWER9 systems, threads 0,2,4,6 of a core share L1 cache and threads 1,3,5,7 of the same core share another L1 cache). On such platforms, there is a single device-tree node corresponding to that cache and the cache-configuration within the threads of the core is indicated via "ibm,thread-groups" device-tree property. Since the current code is not aware of the "ibm,thread-groups" property, on the aforementoined systems, cacheinfo code still treats all the threads in the core to be sharing the cache because of the single device-tree node (In the earlier example, the cacheinfo code would says CPUs 0-7 share L1 cache). In this patch, we make the powerpc cacheinfo code aware of the "ibm,thread-groups" property. We indexe the "cache" objects by the key-pair (device-tree node, thread-group id). For any CPUX, for a given level of cache, the thread-group id is defined to be the first CPU in the "ibm,thread-groups" cache-group containing CPUX. For levels of cache which are not represented in "ibm,thread-groups" property, the thread-group id is -1. Signed-off-by: Gautham R. Shenoy [parth: Remove "static" keyword for the definition of "thread_group_l1_cache_map" and "thread_group_l2_cache_map" to get rid of the compile error.] Signed-off-by: Parth Shah --- arch/powerpc/include/asm/smp.h | 3 ++ arch/powerpc/kernel/cacheinfo.c | 80 - arch/powerpc/kernel/smp.c | 4 +- 3 files changed, 63 insertions(+), 24 deletions(-) diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h index 03b3d010cbab..1259040cc3a4 100644 --- a/arch/powerpc/include/asm/smp.h +++ b/arch/powerpc/include/asm/smp.h @@ -33,6 +33,9 @@ extern bool coregroup_enabled; extern int cpu_to_chip_id(int cpu); extern int *chip_id_lookup_table; +DECLARE_PER_CPU(cpumask_var_t, thread_group_l1_cache_map); +DECLARE_PER_CPU(cpumask_var_t, thread_group_l2_cache_map); + #ifdef CONFIG_SMP struct smp_ops_t { diff --git a/arch/powerpc/kernel/cacheinfo.c b/arch/powerpc/kernel/cacheinfo.c index 6f903e9aa20b..5a6925d87424 100644 --- a/arch/powerpc/kernel/cacheinfo.c +++ b/arch/powerpc/kernel/cacheinfo.c @@ -120,6 +120,7 @@ struct cache { struct cpumask shared_cpu_map; /* online CPUs using this cache */ int type; /* split cache disambiguation */ int level; /* level not explicit in device tree */ + int group_id; /* id of the group of threads that share this cache */ struct list_head list; /* global list of cache objects */ struct cache *next_local; /* next cache of >= level */ }; @@ -142,22 +143,24 @@ static const char *cache_type_string(const struct cache *cache) } static void cache_init(struct cache *cache, int type, int level, - struct device_node *ofnode) + struct device_node *ofnode, int group_id) { cache->type = type; cache->level = level; cache->ofnode = of_node_get(ofnode); + cache->group_id = group_id; INIT_LIST_HEAD(>list); list_add(>list, _list); } -static struct cache *new_cache(int type, int level, struct device_node *ofnode) +static struct cache *new_cache(int type, int level, + struct device_node *ofnode, int group_id) { struct cache *cache; cache = kzalloc(sizeof(*cache), GFP_KERNEL); if (cache) - cache_init(cache, type, level, ofnode); + cache_init(cache, type, level, ofnode, group_id); return cache; } @@ -309,20 +312,24 @@ static struct cache *cache_find_first_sibling(struct cache *cache) return cache; list_for_each_entry(iter, _list, list) - if (iter->ofnode == cache->ofnode && iter->next_local == cache) + if (iter->ofnode == cache->ofnode && + iter->group_id == cache->group_id && + iter->next_local == cache) return iter; return cache; } -/* return the first cache on a local list matching node */ -static struct cache *cache_lookup_by_node(const struct device_node *node) +/* return the first cache on a local list matching node and thread-group id */ +static struct cache *cache_lookup_by_node_group(const struct device_node *node, + int group_id) { struct cache *cache = NULL; struct cache *iter; list_for_each_entry(iter, _list, list) { - if (iter->ofnode != node) + if (iter->ofnode != node || + iter->group_id != group_id)