Re: [PATCH] CPM UART: Fix break generation
On 31 Οκτ 2006, at 9:58 ΠΜ, Laurent Pinchart wrote: When generating a break condition on a serial port, the CPM must be told beforehand how long the break should be. Unfortunately, this information is not available through the current serial break handling API. This patch works around the problem by requesting a 32767 characters break followed by a 0 characters break after the requested duration. The CPM will stop the first break when the second one is requested. This might not work with future CPM revisions. ACK, Nice one Laurent ;) Regards Pantelis ___ Linuxppc-embedded mailing list Linuxppc-embedded@ozlabs.org https://ozlabs.org/mailman/listinfo/linuxppc-embedded
[PATCH] CPM UART: Fix break generation
When generating a break condition on a serial port, the CPM must be told
beforehand how long the break should be. Unfortunately, this information is
not available through the current serial break handling API. This patch works
around the problem by requesting a 32767 characters break followed by a 0
characters break after the requested duration. The CPM will stop the first
break when the second one is requested. This might not work with future CPM
revisions.
Signed-off-by: Laurent Pinchart [EMAIL PROTECTED]
---
drivers/serial/cpm_uart/cpm_uart_core.c |9 +
1 files changed, 9 insertions(+), 0 deletions(-)
diff --git a/drivers/serial/cpm_uart/cpm_uart_core.c
b/drivers/serial/cpm_uart/cpm_uart_core.c
index c29d87d..aa0a284 100644
--- a/drivers/serial/cpm_uart/cpm_uart_core.c
+++ b/drivers/serial/cpm_uart/cpm_uart_core.c
@@ -239,14 +239,23 @@ static void cpm_uart_break_ctl(struct ua
{
struct uart_cpm_port *pinfo = (struct uart_cpm_port *)port;
int line = pinfo - cpm_uart_ports;
+ volatile u16 *brkcr = IS_SMC(pinfo) ? pinfo-smcup-smc_brkcr
+ : pinfo-sccup-scc_brkcr;
pr_debug(CPM uart[%d]:break ctrl, break_state: %d\n, port-line,
break_state);
if (break_state)
+ {
+ *brkcr = 32767;
cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
+ }
else
+ {
+ *brkcr = 0;
+ cpm_line_cr_cmd(line, CPM_CR_STOP_TX);
cpm_line_cr_cmd(line, CPM_CR_RESTART_TX);
+ }
}
/*
--
1.4.GIT
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Does the CPM uart driver need more memory barriers ?
Hi everybody, while trying to debug a serial port issue, I found out some code might seemed to miss write memory barriers. Does the volatile keyword guarantee that gcc will no reorder memory writes, or is the attached patched needed ? Best regards, Laurent Pinchart -- next part -- A non-text attachment was scrubbed... Name: cpm_wmb.patch Type: text/x-diff Size: 578 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20060517/dbb2412a/attachment.patch
[PATCH 3/4] PPC32: Update board-specific code of the CPM UART users
This has the relevant updates/additions to the BSP code so that proper
platform_info struct well be passed to the CPM UART drivers. The changes
covered mpc866ads, mpc885ads and mpc8272ads.
Signed-off-by: Vitaly Bordug vbordug at ru.mvista.com
---
arch/ppc/platforms/mpc8272ads_setup.c | 114 +++
arch/ppc/platforms/mpc866ads_setup.c | 140 +
arch/ppc/platforms/mpc885ads_setup.c | 131 +++
arch/ppc/platforms/pq2ads.c | 31 +++
4 files changed, 415 insertions(+), 1 deletions(-)
diff --git a/arch/ppc/platforms/mpc8272ads_setup.c
b/arch/ppc/platforms/mpc8272ads_setup.c
index bc9b94f..d5c8a3a 100644
--- a/arch/ppc/platforms/mpc8272ads_setup.c
+++ b/arch/ppc/platforms/mpc8272ads_setup.c
@@ -26,11 +26,35 @@
#include asm/irq.h
#include asm/ppc_sys.h
#include asm/ppcboot.h
+#include linux/fs_uart_pd.h
#include pq2ads_pd.h
static void init_fcc1_ioports(void);
static void init_fcc2_ioports(void);
+static void init_scc1_uart_ioports(void);
+static void init_scc4_uart_ioports(void);
+
+static struct fs_uart_platform_info mpc8272_uart_pdata[] = {
+ [fsid_scc1_uart] = {
+ .init_ioports = init_scc1_uart_ioports,
+ .fs_no = fsid_scc1_uart,
+ .brg= 1,
+ .tx_num_fifo= 4,
+ .tx_buf_size= 32,
+ .rx_num_fifo= 4,
+ .rx_buf_size= 32,
+ },
+ [fsid_scc4_uart] = {
+ .init_ioports = init_scc4_uart_ioports,
+ .fs_no = fsid_scc4_uart,
+ .brg= 4,
+ .tx_num_fifo= 4,
+ .tx_buf_size= 32,
+ .rx_num_fifo= 4,
+ .rx_buf_size= 32,
+ },
+};
static struct fs_mii_bus_info mii_bus_info = {
.method = fsmii_bitbang,
@@ -201,6 +225,55 @@ static void __init mpc8272ads_fixup_enet
}
}
+static void mpc8272ads_fixup_uart_pdata(struct platform_device *pdev,
+ int idx)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+ int num = ARRAY_SIZE(mpc8272_uart_pdata);
+ int id = fs_uart_id_scc2fsid(idx);
+
+ /* no need to alter anything if console */
+ if ((id = num) (!pdev-dev.platform_data)) {
+ pinfo = mpc8272_uart_pdata[id];
+ pinfo-uart_clk = bd-bi_intfreq;
+ pdev-dev.platform_data = pinfo;
+ }
+}
+
+static void init_scc1_uart_ioports(void)
+{
+ cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+/* SCC1 is only on port D */
+ setbits32(immap-im_ioport.iop_ppard,0x0003);
+ clrbits32(immap-im_ioport.iop_psord,0x0001);
+ setbits32(immap-im_ioport.iop_psord,0x0002);
+ clrbits32(immap-im_ioport.iop_pdird,0x0001);
+ setbits32(immap-im_ioport.iop_pdird,0x0002);
+
+/* Wire BRG1 to SCC1 */
+ clrbits32(immap-im_cpmux.cmx_scr,0x00ff);
+
+ iounmap(immap);
+}
+
+static void init_scc4_uart_ioports(void)
+{
+ cpm2_map_t* immap = ioremap(CPM_MAP_ADDR, sizeof(cpm2_map_t));
+
+ setbits32(immap-im_ioport.iop_ppard,0x0600);
+ clrbits32(immap-im_ioport.iop_psord,0x0600);
+ clrbits32(immap-im_ioport.iop_pdird,0x0200);
+ setbits32(immap-im_ioport.iop_pdird,0x0400);
+
+/* Wire BRG4 to SCC4 */
+ clrbits32(immap-im_cpmux.cmx_scr,0x00ff);
+ setbits32(immap-im_cpmux.cmx_scr,0x001b);
+
+ iounmap(immap);
+}
+
static int mpc8272ads_platform_notify(struct device *dev)
{
static const struct platform_notify_dev_map dev_map[] = {
@@ -209,6 +282,10 @@ static int mpc8272ads_platform_notify(st
.rtn = mpc8272ads_fixup_enet_pdata
},
{
+ .bus_id = fsl-cpm-scc:uart,
+ .rtn = mpc
+ },
+ {
.bus_id = NULL
}
};
@@ -230,7 +307,44 @@ int __init mpc8272ads_init(void)
ppc_sys_device_enable(MPC82xx_CPM_FCC1);
ppc_sys_device_enable(MPC82xx_CPM_FCC2);
+ /* to be ready for console, let's attach pdata here */
+#ifdef CONFIG_SERIAL_CPM_SCC1
+ ppc_sys_device_setfunc(MPC82xx_CPM_SCC1, PPC_SYS_FUNC_UART);
+ ppc_sys_device_enable(MPC82xx_CPM_SCC1);
+
+#endif
+
+#ifdef CONFIG_SERIAL_CPM_SCC4
+ ppc_sys_device_setfunc(MPC82xx_CPM_SCC4, PPC_SYS_FUNC_UART);
+ ppc_sys_device_enable(MPC82xx_CPM_SCC4);
+#endif
+
+
return 0;
}
+/*
+ To prevent confusion, console selection is gross:
+ by 0 assumed SCC1 and by 1 assumed SCC4
+ */
+struct platform_device* early_uart_get_pdev(int index)
+{
+ bd_t *bd = (bd_t *) __res;
+ struct fs_uart_platform_info *pinfo;
+
+ struct platform_device
CPM uart
Hi all,
thanks for helping me.
Now it works with my configuration.
I added SCC_NUM_BASE as it is without console. And now it works.
#ifdef SCC_CONSOLE
switch (state-smc_scc_num - SCC_NUM_BASE) {
/*SCC_NUM_BASE added*/
case 0:
page = CPM_CR_SCC1_PAGE;
sblock = CPM_CR_SCC1_SBLOCK;
break;
case 1:
page = CPM_CR_SCC2_PAGE;
sblock = CPM_CR_SCC2_SBLOCK;
break;
case 2:
page = CPM_CR_SCC3_PAGE;
sblock = CPM_CR_SCC3_SBLOCK;
break;
}
#else
.
.
.
Seems the use of SMC in conjunction with console on SCC was not planed in this
version.
Furthermore i will test it and post if it fails.
Best regards
Marco
-
Marco Schramel
CPM uart
Hi,
on my target (MPC8270, 2.4.25) SCC1, SCC2 and SCC3 will work fine as ttyS0 ..
ttyS2 with console at ttyS0.
It works with this code in arch/ppc/8260_io/uart.c
#define CONFIG_SERIAL_CONSOLE_PORT 0
#define SCC_NUM_BASE0 /* SCC base tty number */
#define SCC_IDX_BASE0 /* table index */
static struct serial_state rs_table[] = {
/* UART CLK PORT IRQ FLAGS NUM */
{ 0, 0, PROFF_SCC1, SIU_INT_SCC1, 0, SCC_NUM_BASE}, /*
SCC1 ttyS0 */
{ 0, 0, PROFF_SCC2, SIU_INT_SCC2, 0, SCC_NUM_BASE + 1},/*
SCC2 ttyS1 */
{ 0, 0, PROFF_SCC3, SIU_INT_SCC3, 0, SCC_NUM_BASE +2}, /*
SCC3 ttyS2 */
Now i need the two SMC's.
I changed the source to:
#define CONFIG_SERIAL_CONSOLE_PORT 2
#define SCC_NUM_BASE2 /* SCC base tty number */
#define SCC_IDX_BASE2 /* table index */
static struct serial_state rs_table[] = {
/* UART CLK PORT IRQ FLAGS NUM */
{ 0, 0, PROFF_SMC1, SIU_INT_SMC1, 0, 0},/* SMC1 ttyS0 */
{ 0, 0, PROFF_SMC2, SIU_INT_SMC2, 0, 1},/* SMC2 ttyS1 */
{ 0, 0, PROFF_SCC1, SIU_INT_SCC1, 0, SCC_NUM_BASE},/* SCC1
ttyS2 */
{ 0, 0, PROFF_SCC2, SIU_INT_SCC2, 0, SCC_NUM_BASE + 1},/*
SCC2 ttyS3 */
{ 0, 0, PROFF_SCC3, SIU_INT_SCC3, 0, SCC_NUM_BASE + 2},/*
SCC3 ttyS4 */
and passed the bootloader the correct console=ttyS2.
During booting kernel hangs on initializing ttyS2 forever.
What could be wrong ? I only changed the io port configuration in the init
function.
Thanks in advance
Marco
-
Marco Schramel
CPM uart
On Apr 14, 2005, at 3:26 AM, Marco Schramel wrote: During booting kernel hangs on initializing ttyS2 forever. That is the console port, so take a look at the code for its initialization for something affected by this configuration. What kernel are you using? There have been lots of updates in recent versions. What could be wrong ? I only changed the io port configuration in the init function. Heh :-) There are lots of permutations of serial ports that probably haven't been tested. You probably found one of them. Thanks. -- Dan
CPM uart
Hi Dan, thanks for your answer. During booting kernel hangs on initializing ttyS2 forever. That is the console port, so take a look at the code for its initialization for something affected by this configuration. What kernel are you using? There have been lots of updates in recent versions. I use kernel version 2.4.25 of denx and the uart version is static char *serial_name = CPM UART driver; static char *serial_version = 0.01; Are there newer versions? Sorry, but i am not up to date with the uart. Is my configuration so extraordinary ;-) ? Thanks Marco -- - Marco Schramel
CPM uart
Hi Steven,
thank you for your answer.
The selection of the BRGs is hard coded last time I checked. When you
add SMC1 and SMC2 it may use the wrong BRG for SCC1. Check the BRG
registers, the cmx_smr register and cmx_scr register and make sure
everything matches up.
But this original code seems to be ok.
static int rs_brg_map[] = {
6, /* BRG7 for SMC1 */
7, /* BRG8 for SMC2 */
0, /* BRG1 for SCC1 */
1, /* BRG2 for SCC2 */
2, /* BRG3 for SCC3 */
};
/* Wire BRG7 to SMC1 and BRG8 to SMC2 */
immap-im_cpmux.cmx_smr = 0x11;
Best regards
Marco
CPM uart
On Apr 14, 2005, at 9:34 AM, Marco Schramel wrote: The selection of the BRGs is hard coded last time I checked. Newer drivers don't do this. They are probably stuck in the linuxppc_devel kernels and never made it into the main tree. The only problem with BRGs will be with 8xx, where the max is 4 and some variants have fewer. -- Dan
CPM uart
On Apr 14, 2005, at 8:54 AM, Marco Schramel wrote: I use kernel version 2.4.25 of denx and the uart version is static char *serial_name = CPM UART driver; static char *serial_version = 0.01; I don't remember the progress of the new cpm serial drivers in 2.4, I've been spending too much time in 2.6. If you find a 2.4 kernel with the new serial driver model (drivers/seral/cpm_uart) that would be a big help. Are there newer versions? Sorry, but i am not up to date with the uart. Is my configuration so extraordinary ;-) ? Yes, there are newer versions and I've never tried what you are doing. The console code has always been sensitive to configurations. Although the #defines may look like it will work, the code often isn't there to support it, and I know wasn't there in that old version of the code. Thanks. -- Dan
CPM uart
Hi Marco, On Thursday 14 April 2005 09:54, Marco Schramel wrote: Hi Dan, thanks for your answer. During booting kernel hangs on initializing ttyS2 forever. That is the console port, so take a look at the code for its initialization for something affected by this configuration. What kernel are you using? There have been lots of updates in recent versions. I use kernel version 2.4.25 of denx and the uart version is ^^ Perusing that code, I can see that the console routines assume that there are _no_ SMC ports initialized before the SCC ports in rs_table. This should be fixed before attempting to run your system again. I suggest you to seek all smc_scc_num references inside both the console routines and the #ifdef SCC_CONSOLE ... #endif code snippets. They should be subtracted by SCC_NUM_BASE whenever they're used to access SCC-related stuff, AFAIK. HTH, Ricardo Scop. \|/ ___ -*- (@ @)/|\ / V \| R SCOP Consult. /( )\ Linux-based communications --^^---^^+-- rscop at matrix.com.br +55 51 999-36-777 Porto Alegre, RS - BRazil
CPM uart
On Apr 14, 2005, at 7:24 PM, Ricardo Scop wrote: I suggest you to seek all smc_scc_num references inside both the console routines and the #ifdef SCC_CONSOLE ... #endif code snippets. They should be subtracted by SCC_NUM_BASE whenever they're used to access SCC-related stuff, This has all been corrected in later versions of the driver. Take a look at the linuxppc_2.4_devel or some other BK ppc kernels. Start at penguinppc.org for kernel access information. Yes, I know, it shouldn't be in this state, but it is. Find the various kernel sources and peruse for what fits your requirements. Thanks. -- Dan
[PATCH] compile fix for cpm uart driver
Hi, cpm_uart_cpm1.c doesn't compile due to a missing bracket (linuxppc-2.5 tree). Please apply. Signed-off-by: Andreas Oberritter obi at saftware.de -- next part -- A non-text attachment was scrubbed... Name: cpm_uart_cpm1.diff Type: text/x-patch Size: 513 bytes Desc: not available Url : http://ozlabs.org/pipermail/linuxppc-embedded/attachments/20040719/e1327066/attachment.bin
MPC8260 CPM UART driver for SCC4
Hi Does anybody have a MPC8260 CPM UART driver that can has been tested with SCC4 ? Thanks in advance Joao Vicente ** Sent via the linuxppc-embedded mail list. See http://lists.linuxppc.org/
