[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp VirtRegMap.cpp
Changes in directory llvm/lib/CodeGen: RegAllocSimple.cpp updated: 1.80 -> 1.81 VirtRegMap.cpp updated: 1.87 -> 1.88 --- Log message: Move findTiedToSrcOperand to TargetInstrDescriptor. --- Diffs of the changes: (+3 -4) RegAllocSimple.cpp |3 +-- VirtRegMap.cpp |4 ++-- 2 files changed, 3 insertions(+), 4 deletions(-) Index: llvm/lib/CodeGen/RegAllocSimple.cpp diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.80 llvm/lib/CodeGen/RegAllocSimple.cpp:1.81 --- llvm/lib/CodeGen/RegAllocSimple.cpp:1.80Fri Dec 8 01:59:51 2006 +++ llvm/lib/CodeGen/RegAllocSimple.cpp Fri Dec 8 12:45:48 2006 @@ -198,8 +198,7 @@ unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { -int TiedOp = TM->getInstrInfo()-> - findTiedToSrcOperand(MI->getInstrDescriptor(), i); +int TiedOp = MI->getInstrDescriptor()->findTiedToSrcOperand(i); if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.87 llvm/lib/CodeGen/VirtRegMap.cpp:1.88 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.87Fri Dec 8 02:02:34 2006 +++ llvm/lib/CodeGen/VirtRegMap.cpp Fri Dec 8 12:45:48 2006 @@ -99,7 +99,7 @@ ModRef MRInfo; const TargetInstrDescriptor *TID = OldMI->getInstrDescriptor(); if (TID->getOperandConstraint(OpNo, TOI::TIED_TO) != -1 || - TII.findTiedToSrcOperand(TID, OpNo) != -1) { + TID->findTiedToSrcOperand(OpNo) != -1) { // Folded a two-address operand. MRInfo = isModRef; } else if (OldMI->getOperand(OpNo).isDef()) { @@ -851,7 +851,7 @@ // If this def is part of a two-address operand, make sure to execute // the store from the correct physical register. unsigned PhysReg; -int TiedOp = TII->findTiedToSrcOperand(MI.getInstrDescriptor(), i); +int TiedOp = MI.getInstrDescriptor()->findTiedToSrcOperand(i); if (TiedOp != -1) PhysReg = MI.getOperand(TiedOp).getReg(); else { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp
Changes in directory llvm/lib/CodeGen: RegAllocSimple.cpp updated: 1.79 -> 1.80 --- Log message: findTiedToSrcOperand() changed. --- Diffs of the changes: (+2 -2) RegAllocSimple.cpp |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/RegAllocSimple.cpp diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.79 llvm/lib/CodeGen/RegAllocSimple.cpp:1.80 --- llvm/lib/CodeGen/RegAllocSimple.cpp:1.79Thu Dec 7 14:28:15 2006 +++ llvm/lib/CodeGen/RegAllocSimple.cpp Fri Dec 8 01:59:51 2006 @@ -198,8 +198,8 @@ unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { -int TiedOp = TM->getInstrInfo() - ->findTiedToSrcOperand(MI->getOpcode(), i); +int TiedOp = TM->getInstrInfo()-> + findTiedToSrcOperand(MI->getInstrDescriptor(), i); if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp VirtRegMap.cpp
Changes in directory llvm/lib/CodeGen: RegAllocSimple.cpp updated: 1.75 -> 1.76 VirtRegMap.cpp updated: 1.77 -> 1.78 --- Log message: Rename --- Diffs of the changes: (+2 -2) RegAllocSimple.cpp |2 +- VirtRegMap.cpp |2 +- 2 files changed, 2 insertions(+), 2 deletions(-) Index: llvm/lib/CodeGen/RegAllocSimple.cpp diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.75 llvm/lib/CodeGen/RegAllocSimple.cpp:1.76 --- llvm/lib/CodeGen/RegAllocSimple.cpp:1.75Wed Nov 1 17:06:55 2006 +++ llvm/lib/CodeGen/RegAllocSimple.cpp Wed Nov 1 17:18:32 2006 @@ -200,7 +200,7 @@ if (physReg == 0) { if (op.isDef()) { int TiedOp = TM->getInstrInfo() - ->getTiedToSrcOperand(MI->getOpcode(), i); + ->findTiedToSrcOperand(MI->getOpcode(), i); if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { Index: llvm/lib/CodeGen/VirtRegMap.cpp diff -u llvm/lib/CodeGen/VirtRegMap.cpp:1.77 llvm/lib/CodeGen/VirtRegMap.cpp:1.78 --- llvm/lib/CodeGen/VirtRegMap.cpp:1.77Wed Nov 1 17:06:55 2006 +++ llvm/lib/CodeGen/VirtRegMap.cpp Wed Nov 1 17:18:32 2006 @@ -821,7 +821,7 @@ // If this def is part of a two-address operand, make sure to execute // the store from the correct physical register. unsigned PhysReg; -int TiedOp = TII->getTiedToSrcOperand(MI.getOpcode(), i); +int TiedOp = TII->findTiedToSrcOperand(MI.getOpcode(), i); if (TiedOp != -1) PhysReg = MI.getOperand(TiedOp).getReg(); else ___ llvm-commits mailing list llvm-commits@cs.uiuc.edu http://lists.cs.uiuc.edu/mailman/listinfo/llvm-commits
[llvm-commits] CVS: llvm/lib/CodeGen/RegAllocSimple.cpp TwoAddressInstructionPass.cpp VirtRegMap.cpp
Changes in directory llvm/lib/CodeGen: RegAllocSimple.cpp updated: 1.74 -> 1.75 TwoAddressInstructionPass.cpp updated: 1.38 -> 1.39 VirtRegMap.cpp updated: 1.76 -> 1.77 --- Log message: Two-address instructions no longer have to be A := A op C. Now any pair of dest / src operands can be tied together. --- Diffs of the changes: (+144 -118) RegAllocSimple.cpp| 17 +-- TwoAddressInstructionPass.cpp | 229 ++ VirtRegMap.cpp| 16 +- 3 files changed, 144 insertions(+), 118 deletions(-) Index: llvm/lib/CodeGen/RegAllocSimple.cpp diff -u llvm/lib/CodeGen/RegAllocSimple.cpp:1.74 llvm/lib/CodeGen/RegAllocSimple.cpp:1.75 --- llvm/lib/CodeGen/RegAllocSimple.cpp:1.74Mon Sep 4 21:12:02 2006 +++ llvm/lib/CodeGen/RegAllocSimple.cpp Wed Nov 1 17:06:55 2006 @@ -199,17 +199,20 @@ unsigned physReg = Virt2PhysRegMap[virtualReg]; if (physReg == 0) { if (op.isDef()) { -if (!TM->getInstrInfo()->isTwoAddrInstr(MI->getOpcode()) || i) { +int TiedOp = TM->getInstrInfo() + ->getTiedToSrcOperand(MI->getOpcode(), i); +if (TiedOp == -1) { physReg = getFreeReg(virtualReg); } else { - // must be same register number as the first operand - // This maps a = b + c into b = b + c, and saves b into a's spot. - assert(MI->getOperand(1).isRegister() && - MI->getOperand(1).getReg() && - MI->getOperand(1).isUse() && + // must be same register number as the source operand that is + // tied to. This maps a = b + c into b = b + c, and saves b into + // a's spot. + assert(MI->getOperand(TiedOp).isRegister() && + MI->getOperand(TiedOp).getReg() && + MI->getOperand(TiedOp).isUse() && "Two address instruction invalid!"); - physReg = MI->getOperand(1).getReg(); + physReg = MI->getOperand(TiedOp).getReg(); } spillVirtReg(MBB, next(MI), virtualReg, physReg); } else { Index: llvm/lib/CodeGen/TwoAddressInstructionPass.cpp diff -u llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.38 llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.39 --- llvm/lib/CodeGen/TwoAddressInstructionPass.cpp:1.38 Mon Sep 4 21:12:02 2006 +++ llvm/lib/CodeGen/TwoAddressInstructionPass.cpp Wed Nov 1 17:06:55 2006 @@ -95,122 +95,141 @@ mi != me; ++mi) { unsigned opcode = mi->getOpcode(); - // ignore if it is not a two-address instruction - if (!TII.isTwoAddrInstr(opcode)) -continue; - - ++NumTwoAddressInstrs; - DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM)); - assert(mi->getOperand(1).isRegister() && mi->getOperand(1).getReg() && - mi->getOperand(1).isUse() && "two address instruction invalid"); - - // if the two operands are the same we just remove the use - // and mark the def as def&use, otherwise we have to insert a copy. - if (mi->getOperand(0).getReg() != mi->getOperand(1).getReg()) { -// rewrite: -// a = b op c -// to: -// a = b -// a = a op c -unsigned regA = mi->getOperand(0).getReg(); -unsigned regB = mi->getOperand(1).getReg(); - -assert(MRegisterInfo::isVirtualRegister(regA) && - MRegisterInfo::isVirtualRegister(regB) && - "cannot update physical register live information"); + bool FirstTied = true; + for (unsigned si = 1, e = TII.getNumOperands(opcode); si < e; ++si) { +int ti = TII.getOperandConstraint(opcode, si, TargetInstrInfo::TIED_TO); +if (ti == -1) + continue; + +if (FirstTied) { + ++NumTwoAddressInstrs; + DEBUG(std::cerr << '\t'; mi->print(std::cerr, &TM)); +} +FirstTied = false; + +assert(mi->getOperand(si).isRegister() && mi->getOperand(si).getReg() && + mi->getOperand(si).isUse() && "two address instruction invalid"); + +// if the two operands are the same we just remove the use +// and mark the def as def&use, otherwise we have to insert a copy. +if (mi->getOperand(ti).getReg() != mi->getOperand(si).getReg()) { + // rewrite: + // a = b op c + // to: + // a = b + // a = a op c + unsigned regA = mi->getOperand(ti).getReg(); + unsigned regB = mi->getOperand(si).getReg(); + + assert(MRegisterInfo::isVirtualRegister(regA) && + MRegisterInfo::isVirtualRegister(regB) && + "cannot update physical register live information"); #ifndef NDEBUG -// First, verify that we do not have a use of a in the instruction (a = -// b + a for example) because our transformation will not work