[Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.
Coffee Lake has a gen9 graphics following KBL. From 3D perspective, CFL is a clone of KBL/SKL features. v2: Change commit message, correct alignment v3: Update IDs. v4: Initialize l3_banks, correct nomenclature Cc: Benjamin Widawsky Cc: Anuj Phogat Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- include/pci_ids/i965_pci_ids.h | 11 +++ src/intel/common/gen_device_info.c | 26 ++ src/intel/common/gen_device_info.h | 1 + 3 files changed, 38 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index b296359..57e70b7 100644 --- a/include/pci_ids/i965_pci_ids.h +++ b/include/pci_ids/i965_pci_ids.h @@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)") CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4") CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)") CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)") +CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") +CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 2x6 GT1)") +CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") +CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") +CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") +CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") +CHIPSET(0x3E94, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 3x8 GT2)") +CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)") +CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)") +CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)") +CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 3x8 GT3)") CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)") CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)") CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)") diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c index 423748e..a1541ed 100644 --- a/src/intel/common/gen_device_info.c +++ b/src/intel/common/gen_device_info.c @@ -607,6 +607,32 @@ static const struct gen_device_info gen_device_info_glk_2x6 = { .is_geminilake = true, }; +static const struct gen_device_info gen_device_info_cfl_gt1 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 1, + .l3_banks = 2, + + .num_slices = 1, +}; +static const struct gen_device_info gen_device_info_cfl_gt2 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 2, + .l3_banks = 4, + + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_cfl_gt3 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 3, + .l3_banks = 8, + + .num_slices = 2, +}; + #define GEN10_HW_INFO \ .gen = 10, \ .num_thread_per_eu = 7, \ diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h index cc83857..a83251c 100644 --- a/src/intel/common/gen_device_info.h +++ b/src/intel/common/gen_device_info.h @@ -46,6 +46,7 @@ struct gen_device_info bool is_broxton; bool is_kabylake; bool is_geminilake; + bool is_coffeelake; bool is_cannonlake; bool has_hiz_and_separate_stencil; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH] i965/CFL: Add PCI Ids for Coffee Lake.
Coffee Lake has a gen9 graphics following KBL. From 3D perspective, CFL is a clone of KBL/SKL features. v2: Change commit message, correct alignment v3: Update IDs. Cc: Benjamin Widawsky Cc: Anuj Phogat Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- include/pci_ids/i965_pci_ids.h | 11 +++ src/intel/common/gen_device_info.c | 23 +++ src/intel/common/gen_device_info.h | 1 + 3 files changed, 35 insertions(+) diff --git a/include/pci_ids/i965_pci_ids.h b/include/pci_ids/i965_pci_ids.h index b296359..5e9566c 100644 --- a/include/pci_ids/i965_pci_ids.h +++ b/include/pci_ids/i965_pci_ids.h @@ -165,6 +165,17 @@ CHIPSET(0x5927, kbl_gt3, "Intel(R) Iris Plus Graphics 650 (Kaby Lake GT3)") CHIPSET(0x593B, kbl_gt4, "Intel(R) Kabylake GT4") CHIPSET(0x3184, glk, "Intel(R) HD Graphics (Geminilake)") CHIPSET(0x3185, glk_2x6, "Intel(R) HD Graphics (Geminilake 2x6)") +CHIPSET(0x3E90, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 6x1)") +CHIPSET(0x3E93, cfl_gt1, "Intel(R) HD Graphics (Coffeelake 4x1)") +CHIPSET(0x3E91, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 4x2)") +CHIPSET(0x3E92, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 6x2)") +CHIPSET(0x3E96, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 6x2)") +CHIPSET(0x3E9B, cfl_gt2, "Intel(R) HD Graphics (Coffeelake 6x2)") +CHIPSET(0x3E94, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 4x3)") +CHIPSET(0x3EA6, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 4x3)") +CHIPSET(0x3EA7, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 4x3)") +CHIPSET(0x3EA8, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 4x3)") +CHIPSET(0x3EA5, cfl_gt3, "Intel(R) HD Graphics (Coffeelake 4x3)") CHIPSET(0x5A49, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)") CHIPSET(0x5A4A, cnl_2x8, "Intel(R) HD Graphics (Cannonlake 2x8 GT0.5)") CHIPSET(0x5A41, cnl_3x8, "Intel(R) HD Graphics (Cannonlake 3x8 GT1)") diff --git a/src/intel/common/gen_device_info.c b/src/intel/common/gen_device_info.c index 423748e..d49beaa 100644 --- a/src/intel/common/gen_device_info.c +++ b/src/intel/common/gen_device_info.c @@ -607,6 +607,29 @@ static const struct gen_device_info gen_device_info_glk_2x6 = { .is_geminilake = true, }; +static const struct gen_device_info gen_device_info_cfl_gt1 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 1, + + .num_slices = 1, +}; +static const struct gen_device_info gen_device_info_cfl_gt2 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 2, + + .num_slices = 1, +}; + +static const struct gen_device_info gen_device_info_cfl_gt3 = { + GEN9_FEATURES, + .is_coffeelake = true, + .gt = 3, + + .num_slices = 2, +}; + #define GEN10_HW_INFO \ .gen = 10, \ .num_thread_per_eu = 7, \ diff --git a/src/intel/common/gen_device_info.h b/src/intel/common/gen_device_info.h index cc83857..a83251c 100644 --- a/src/intel/common/gen_device_info.h +++ b/src/intel/common/gen_device_info.h @@ -46,6 +46,7 @@ struct gen_device_info bool is_broxton; bool is_kabylake; bool is_geminilake; + bool is_coffeelake; bool is_cannonlake; bool has_hiz_and_separate_stencil; -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH libdrm 3/3] intel: PCI Ids for U SKU in CFL
Add the PCI IDs for U SKU IN CFL by following the spec. v2: Update IDs Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- intel/intel_chipset.h | 12 +++- 1 file changed, 11 insertions(+), 1 deletion(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index fed5a0d..891b50f 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -228,6 +228,10 @@ #define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 #define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B #define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94 +#define PCI_CHIP_COFFEELAKE_U_GT3_1 0x3EA5 +#define PCI_CHIP_COFFEELAKE_U_GT3_2 0x3EA6 +#define PCI_CHIP_COFFEELAKE_U_GT3_3 0x3EA7 +#define PCI_CHIP_COFFEELAKE_U_GT3_4 0x3EA8 #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ @@ -469,8 +473,14 @@ #define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \ (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2) +#define IS_CFL_U(devid) ((devid) == PCI_CHIP_COFFEELAKE_U_GT3_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_3 || \ + (devid) == PCI_CHIP_COFFEELAKE_U_GT3_4) + #define IS_COFFEELAKE(devid) (IS_CFL_S(devid) || \ - IS_CFL_H(devid)) + IS_CFL_H(devid) || \ + IS_CFL_U(devid)) #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH libdrm 2/3] intel: PCI Ids for H SKU in CFL
Add the PCI IDs for H SKU IN CFL by following the spec. v2: Update IDs Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- intel/intel_chipset.h | 8 +++- 1 file changed, 7 insertions(+), 1 deletion(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index aeb72ba..fed5a0d 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -226,6 +226,8 @@ #define PCI_CHIP_COFFEELAKE_S_GT2_1 0x3E91 #define PCI_CHIP_COFFEELAKE_S_GT2_2 0x3E92 #define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 +#define PCI_CHIP_COFFEELAKE_H_GT2_1 0x3E9B +#define PCI_CHIP_COFFEELAKE_H_GT2_2 0x3E94 #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ @@ -464,7 +466,11 @@ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_2 || \ (devid) == PCI_CHIP_COFFEELAKE_S_GT2_3) -#define IS_COFFEELAKE(devid) (IS_CFL_S(devid)) +#define IS_CFL_H(devid) ((devid) == PCI_CHIP_COFFEELAKE_H_GT2_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_H_GT2_2) + +#define IS_COFFEELAKE(devid) (IS_CFL_S(devid) || \ + IS_CFL_H(devid)) #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev
[Mesa-dev] [PATCH libdrm 1/3] intel: PCI Ids for S SKU in CFL
Add the PCI IDs for S SKU IN CFL by following the spec. v2: Update IDs. Cc: Rodrigo Vivi Signed-off-by: Anusha Srivatsa --- intel/intel_chipset.h | 17 - 1 file changed, 16 insertions(+), 1 deletion(-) diff --git a/intel/intel_chipset.h b/intel/intel_chipset.h index 41fc0da..aeb72ba 100644 --- a/intel/intel_chipset.h +++ b/intel/intel_chipset.h @@ -221,6 +221,12 @@ #define PCI_CHIP_GLK 0x3184 #define PCI_CHIP_GLK_2X6 0x3185 +#define PCI_CHIP_COFFEELAKE_S_GT1_1 0x3E90 +#define PCI_CHIP_COFFEELAKE_S_GT1_2 0x3E93 +#define PCI_CHIP_COFFEELAKE_S_GT2_1 0x3E91 +#define PCI_CHIP_COFFEELAKE_S_GT2_2 0x3E92 +#define PCI_CHIP_COFFEELAKE_S_GT2_3 0x3E96 + #define IS_MOBILE(devid) ((devid) == PCI_CHIP_I855_GM || \ (devid) == PCI_CHIP_I915_GM || \ (devid) == PCI_CHIP_I945_GM || \ @@ -452,10 +458,19 @@ #define IS_GEMINILAKE(devid) ((devid) == PCI_CHIP_GLK || \ (devid) == PCI_CHIP_GLK_2X6) +#define IS_CFL_S(devid) ((devid) == PCI_CHIP_COFFEELAKE_S_GT1_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT1_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_1 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_2 || \ + (devid) == PCI_CHIP_COFFEELAKE_S_GT2_3) + +#define IS_COFFEELAKE(devid) (IS_CFL_S(devid)) + #define IS_GEN9(devid) (IS_SKYLAKE(devid) || \ IS_BROXTON(devid) || \ IS_KABYLAKE(devid) || \ -IS_GEMINILAKE(devid)) +IS_GEMINILAKE(devid) || \ +IS_COFFEELAKE(devid)) #define IS_9XX(dev)(IS_GEN3(dev) || \ IS_GEN4(dev) || \ -- 2.7.4 ___ mesa-dev mailing list mesa-dev@lists.freedesktop.org https://lists.freedesktop.org/mailman/listinfo/mesa-dev