Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-30 Thread Michel Dänzer 
On 30.07.2015 01:27, Anuj Phogat wrote:
 On Wed, Jul 29, 2015 at 12:20 AM, Iago Toral ito...@igalia.com wrote:
 Funny, we had 3 instances of the same function with the same
 implementation :), there is still util_is_power_of_two in Gallium btw.

 Yes.  I wasn't sure if we can use main/imports.h in gallium.

We can't, that's what src/util/ is for.


-- 
Earthling Michel Dänzer   |   http://www.amd.com
Libre software enthusiast | Mesa and X developer
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Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-29 Thread Anuj Phogat 
On Wed, Jul 29, 2015 at 12:20 AM, Iago Toral ito...@igalia.com wrote:
 Funny, we had 3 instances of the same function with the same
 implementation :), there is still util_is_power_of_two in Gallium btw.

Yes.  I wasn't sure if we can use main/imports.h in gallium. So, I didn't
touch it.

 Reviewed-by: Iago Toral Quiroga ito...@igalia.com

 On Tue, 2015-07-28 at 16:48 -0700, Anuj Phogat wrote:
 Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
 ---
  src/mesa/drivers/common/meta_blit.c   |  6 +++---
  src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
  src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
  src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
  src/mesa/drivers/dri/i965/intel_blit.c|  8 
  src/mesa/main/format_parser.py|  6 +++---
  src/mesa/main/macros.h| 11 ---
  9 files changed, 18 insertions(+), 29 deletions(-)

 diff --git a/src/mesa/drivers/common/meta_blit.c 
 b/src/mesa/drivers/common/meta_blit.c
 index 317a304..71d18de 100644
 --- a/src/mesa/drivers/common/meta_blit.c
 +++ b/src/mesa/drivers/common/meta_blit.c
 @@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
 y_scale = samples * 0.5;

 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 }

 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
* (so the floating point exponent just gets increased), rather 
 than
* doing a naive sum and dividing.
*/
 - assert(is_power_of_two(samples));
 + assert(_mesa_is_pow_two(samples));
   /* Fetch each individual sample. */
   sample_resolve = rzalloc_size(mem_ctx, 1);
   for (i = 0; i  samples; i++) {
 diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
 b/src/mesa/drivers/dri/i915/i915_texstate.c
 index aef5ff9..f653f44 100644
 --- a/src/mesa/drivers/dri/i915/i915_texstate.c
 +++ b/src/mesa/drivers/dri/i915/i915_texstate.c
 @@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
 unit, GLuint ss3)
 * Thus, I guess we need do this for other platforms as well.
 */
if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
 -  !is_power_of_two(firstImage-Height))
 +  !_mesa_is_pow_two(firstImage-Height))
   return false;

state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
 diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
 b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 index 01d3a56..96d4f37 100644
 --- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 +++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 @@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment 
 *ir)
return visit_continue_with_parent;
 }
 if (ir-lhs-as_dereference_variable() 
 -   is_power_of_two(ir-write_mask) 
 +   _mesa_is_pow_two(ir-write_mask) 
 !ir-condition) {
/* If we're writing just a channel, then channel-splitting the LHS is 
 OK.
 */
 diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
 b/src/mesa/drivers/dri/i965/brw_reg.h
 index c8b1341..4867148 100644
 --- a/src/mesa/drivers/dri/i965/brw_reg.h
 +++ b/src/mesa/drivers/dri/i965/brw_reg.h
 @@ -853,7 +853,7 @@ static inline struct brw_reg
  spread(struct brw_reg reg, unsigned s)
  {
 if (s) {
 -  assert(is_power_of_two(s));
 +  assert(_mesa_is_pow_two(s));

if (reg.hstride)
   reg.hstride += cvt(s) - 1;
 diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
 b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 index 85c0864..fb78b08 100644
 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
 +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 @@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 int i = 0;

 /* Alignment computations below assume bpp = 8 and a power of 2. */
 -   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
 +   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));

 switch(mt-target) {
 case GL_TEXTURE_1D:
 @@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 ret_align = mt-tr_mode == INTEL_MIPTREE_TRMODE_YF ?
 align_yf[i] :

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-29 Thread Neil Roberts 
It seems a bit weird to modify the the is_power_of_two functions in
format_parser.py, was that intentional? It doesn't look like those
functions are actually used anywhere so maybe we could just remove them,
although it would probably make sense to do that in a separate patch.

Regards,
- Neil

Anuj Phogat anuj.pho...@gmail.com writes:

 Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
 ---
  src/mesa/drivers/common/meta_blit.c   |  6 +++---
  src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
  src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
  src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
  src/mesa/drivers/dri/i965/intel_blit.c|  8 
  src/mesa/main/format_parser.py|  6 +++---
  src/mesa/main/macros.h| 11 ---
  9 files changed, 18 insertions(+), 29 deletions(-)

 diff --git a/src/mesa/drivers/common/meta_blit.c 
 b/src/mesa/drivers/common/meta_blit.c
 index 317a304..71d18de 100644
 --- a/src/mesa/drivers/common/meta_blit.c
 +++ b/src/mesa/drivers/common/meta_blit.c
 @@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
 y_scale = samples * 0.5;
  
 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 }
  
 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
* (so the floating point exponent just gets increased), rather than
* doing a naive sum and dividing.
*/
 - assert(is_power_of_two(samples));
 + assert(_mesa_is_pow_two(samples));
   /* Fetch each individual sample. */
   sample_resolve = rzalloc_size(mem_ctx, 1);
   for (i = 0; i  samples; i++) {
 diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
 b/src/mesa/drivers/dri/i915/i915_texstate.c
 index aef5ff9..f653f44 100644
 --- a/src/mesa/drivers/dri/i915/i915_texstate.c
 +++ b/src/mesa/drivers/dri/i915/i915_texstate.c
 @@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
 unit, GLuint ss3)
 * Thus, I guess we need do this for other platforms as well.
 */
if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
 -  !is_power_of_two(firstImage-Height))
 +  !_mesa_is_pow_two(firstImage-Height))
   return false;
  
state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
 diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
 b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 index 01d3a56..96d4f37 100644
 --- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 +++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 @@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment 
 *ir)
return visit_continue_with_parent;
 }
 if (ir-lhs-as_dereference_variable() 
 -   is_power_of_two(ir-write_mask) 
 +   _mesa_is_pow_two(ir-write_mask) 
 !ir-condition) {
/* If we're writing just a channel, then channel-splitting the LHS is 
 OK.
 */
 diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
 b/src/mesa/drivers/dri/i965/brw_reg.h
 index c8b1341..4867148 100644
 --- a/src/mesa/drivers/dri/i965/brw_reg.h
 +++ b/src/mesa/drivers/dri/i965/brw_reg.h
 @@ -853,7 +853,7 @@ static inline struct brw_reg
  spread(struct brw_reg reg, unsigned s)
  {
 if (s) {
 -  assert(is_power_of_two(s));
 +  assert(_mesa_is_pow_two(s));
  
if (reg.hstride)
   reg.hstride += cvt(s) - 1;
 diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
 b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 index 85c0864..fb78b08 100644
 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
 +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 @@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 int i = 0;
  
 /* Alignment computations below assume bpp = 8 and a power of 2. */
 -   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
 +   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));
  
 switch(mt-target) {
 case GL_TEXTURE_1D:
 @@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 ret_align = mt-tr_mode == INTEL_MIPTREE_TRMODE_YF ?
 align_yf[i] : align_ys[i];
  
 -

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-29 Thread Anuj Phogat 
On Wed, Jul 29, 2015 at 8:16 AM, Neil Roberts n...@linux.intel.com wrote:
 It seems a bit weird to modify the the is_power_of_two functions in
 format_parser.py, was that intentional? It doesn't look like those
 functions are actually used anywhere so maybe we could just remove them,
 although it would probably make sense to do that in a separate patch.

Right. It doesn't make sense to make changes in  format_parser.py. It
was a 'sed' job. I'll remove these changes before pushing. I'll remove the
unused functions in format_parser.py in a separate patch.
Thanks.

 Regards,
 - Neil

 Anuj Phogat anuj.pho...@gmail.com writes:

 Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
 ---
  src/mesa/drivers/common/meta_blit.c   |  6 +++---
  src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
  src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
  src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
  src/mesa/drivers/dri/i965/intel_blit.c|  8 
  src/mesa/main/format_parser.py|  6 +++---
  src/mesa/main/macros.h| 11 ---
  9 files changed, 18 insertions(+), 29 deletions(-)

 diff --git a/src/mesa/drivers/common/meta_blit.c 
 b/src/mesa/drivers/common/meta_blit.c
 index 317a304..71d18de 100644
 --- a/src/mesa/drivers/common/meta_blit.c
 +++ b/src/mesa/drivers/common/meta_blit.c
 @@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
 y_scale = samples * 0.5;

 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 }

 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
* (so the floating point exponent just gets increased), rather 
 than
* doing a naive sum and dividing.
*/
 - assert(is_power_of_two(samples));
 + assert(_mesa_is_pow_two(samples));
   /* Fetch each individual sample. */
   sample_resolve = rzalloc_size(mem_ctx, 1);
   for (i = 0; i  samples; i++) {
 diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
 b/src/mesa/drivers/dri/i915/i915_texstate.c
 index aef5ff9..f653f44 100644
 --- a/src/mesa/drivers/dri/i915/i915_texstate.c
 +++ b/src/mesa/drivers/dri/i915/i915_texstate.c
 @@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
 unit, GLuint ss3)
 * Thus, I guess we need do this for other platforms as well.
 */
if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
 -  !is_power_of_two(firstImage-Height))
 +  !_mesa_is_pow_two(firstImage-Height))
   return false;

state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
 diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
 b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 index 01d3a56..96d4f37 100644
 --- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 +++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 @@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment 
 *ir)
return visit_continue_with_parent;
 }
 if (ir-lhs-as_dereference_variable() 
 -   is_power_of_two(ir-write_mask) 
 +   _mesa_is_pow_two(ir-write_mask) 
 !ir-condition) {
/* If we're writing just a channel, then channel-splitting the LHS is 
 OK.
 */
 diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
 b/src/mesa/drivers/dri/i965/brw_reg.h
 index c8b1341..4867148 100644
 --- a/src/mesa/drivers/dri/i965/brw_reg.h
 +++ b/src/mesa/drivers/dri/i965/brw_reg.h
 @@ -853,7 +853,7 @@ static inline struct brw_reg
  spread(struct brw_reg reg, unsigned s)
  {
 if (s) {
 -  assert(is_power_of_two(s));
 +  assert(_mesa_is_pow_two(s));

if (reg.hstride)
   reg.hstride += cvt(s) - 1;
 diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
 b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 index 85c0864..fb78b08 100644
 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
 +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 @@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 int i = 0;

 /* Alignment computations below assume bpp = 8 and a power of 2. */
 -   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
 +   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-29 Thread Iago Toral 
Funny, we had 3 instances of the same function with the same
implementation :), there is still util_is_power_of_two in Gallium btw.

Reviewed-by: Iago Toral Quiroga ito...@igalia.com

On Tue, 2015-07-28 at 16:48 -0700, Anuj Phogat wrote:
 Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
 ---
  src/mesa/drivers/common/meta_blit.c   |  6 +++---
  src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
  src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
  src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
  src/mesa/drivers/dri/i965/intel_blit.c|  8 
  src/mesa/main/format_parser.py|  6 +++---
  src/mesa/main/macros.h| 11 ---
  9 files changed, 18 insertions(+), 29 deletions(-)
 
 diff --git a/src/mesa/drivers/common/meta_blit.c 
 b/src/mesa/drivers/common/meta_blit.c
 index 317a304..71d18de 100644
 --- a/src/mesa/drivers/common/meta_blit.c
 +++ b/src/mesa/drivers/common/meta_blit.c
 @@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
 y_scale = samples * 0.5;
  
 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 }
  
 /* We expect only power of 2 samples in source multisample buffer. */
 -   assert(samples  0  is_power_of_two(samples));
 +   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
 @@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
* (so the floating point exponent just gets increased), rather than
* doing a naive sum and dividing.
*/
 - assert(is_power_of_two(samples));
 + assert(_mesa_is_pow_two(samples));
   /* Fetch each individual sample. */
   sample_resolve = rzalloc_size(mem_ctx, 1);
   for (i = 0; i  samples; i++) {
 diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
 b/src/mesa/drivers/dri/i915/i915_texstate.c
 index aef5ff9..f653f44 100644
 --- a/src/mesa/drivers/dri/i915/i915_texstate.c
 +++ b/src/mesa/drivers/dri/i915/i915_texstate.c
 @@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
 unit, GLuint ss3)
 * Thus, I guess we need do this for other platforms as well.
 */
if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
 -  !is_power_of_two(firstImage-Height))
 +  !_mesa_is_pow_two(firstImage-Height))
   return false;
  
state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
 diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
 b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 index 01d3a56..96d4f37 100644
 --- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 +++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
 @@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment 
 *ir)
return visit_continue_with_parent;
 }
 if (ir-lhs-as_dereference_variable() 
 -   is_power_of_two(ir-write_mask) 
 +   _mesa_is_pow_two(ir-write_mask) 
 !ir-condition) {
/* If we're writing just a channel, then channel-splitting the LHS is 
 OK.
 */
 diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
 b/src/mesa/drivers/dri/i965/brw_reg.h
 index c8b1341..4867148 100644
 --- a/src/mesa/drivers/dri/i965/brw_reg.h
 +++ b/src/mesa/drivers/dri/i965/brw_reg.h
 @@ -853,7 +853,7 @@ static inline struct brw_reg
  spread(struct brw_reg reg, unsigned s)
  {
 if (s) {
 -  assert(is_power_of_two(s));
 +  assert(_mesa_is_pow_two(s));
  
if (reg.hstride)
   reg.hstride += cvt(s) - 1;
 diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
 b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 index 85c0864..fb78b08 100644
 --- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
 +++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
 @@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 int i = 0;
  
 /* Alignment computations below assume bpp = 8 and a power of 2. */
 -   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
 +   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));
  
 switch(mt-target) {
 case GL_TEXTURE_1D:
 @@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct 
 brw_context *brw,
 ret_align = mt-tr_mode == INTEL_MIPTREE_TRMODE_YF ?
 align_yf[i] : align_ys[i];
  
 -   assert(is_power_of_two(mt-num_samples));
 +   assert(_mesa_is_pow_two(mt-num_samples));
  
 switch (mt-num_samples) {
 case

[Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-28 Thread Anuj Phogat 
Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
 src/mesa/drivers/common/meta_blit.c   |  6 +++---
 src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
 src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
 src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
 src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
 src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
 src/mesa/drivers/dri/i965/intel_blit.c|  8 
 src/mesa/main/format_parser.py|  6 +++---
 src/mesa/main/macros.h| 11 ---
 9 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 317a304..71d18de 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
y_scale = samples * 0.5;
 
/* We expect only power of 2 samples in source multisample buffer. */
-   assert(samples  0  is_power_of_two(samples));
+   assert(samples  0  _mesa_is_pow_two(samples));
while (samples  (shader_offset + 1)) {
   shader_offset++;
}
@@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
}
 
/* We expect only power of 2 samples in source multisample buffer. */
-   assert(samples  0  is_power_of_two(samples));
+   assert(samples  0  _mesa_is_pow_two(samples));
while (samples  (shader_offset + 1)) {
   shader_offset++;
}
@@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
   * (so the floating point exponent just gets increased), rather than
   * doing a naive sum and dividing.
   */
- assert(is_power_of_two(samples));
+ assert(_mesa_is_pow_two(samples));
  /* Fetch each individual sample. */
  sample_resolve = rzalloc_size(mem_ctx, 1);
  for (i = 0; i  samples; i++) {
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
b/src/mesa/drivers/dri/i915/i915_texstate.c
index aef5ff9..f653f44 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
unit, GLuint ss3)
* Thus, I guess we need do this for other platforms as well.
*/
   if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
-  !is_power_of_two(firstImage-Height))
+  !_mesa_is_pow_two(firstImage-Height))
  return false;
 
   state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
index 01d3a56..96d4f37 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
@@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment *ir)
   return visit_continue_with_parent;
}
if (ir-lhs-as_dereference_variable() 
-   is_power_of_two(ir-write_mask) 
+   _mesa_is_pow_two(ir-write_mask) 
!ir-condition) {
   /* If we're writing just a channel, then channel-splitting the LHS is OK.
*/
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
b/src/mesa/drivers/dri/i965/brw_reg.h
index c8b1341..4867148 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -853,7 +853,7 @@ static inline struct brw_reg
 spread(struct brw_reg reg, unsigned s)
 {
if (s) {
-  assert(is_power_of_two(s));
+  assert(_mesa_is_pow_two(s));
 
   if (reg.hstride)
  reg.hstride += cvt(s) - 1;
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 85c0864..fb78b08 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context 
*brw,
int i = 0;
 
/* Alignment computations below assume bpp = 8 and a power of 2. */
-   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
+   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));
 
switch(mt-target) {
case GL_TEXTURE_1D:
@@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context 
*brw,
ret_align = mt-tr_mode == INTEL_MIPTREE_TRMODE_YF ?
align_yf[i] : align_ys[i];
 
-   assert(is_power_of_two(mt-num_samples));
+   assert(_mesa_is_pow_two(mt-num_samples));
 
switch (mt-num_samples) {
case 2:
@@ -199,7 +199,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context 
*brw,
   mt-target != GL_TEXTURE_1D_ARRAY);
 
/* Alignment computations below assume bpp = 8 and a power of 2. */
-   assert (bpp = 8  bpp = 128  is_power_of_two(bpp)) ;
+   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp)) ;
 
switch(mt-target) {

Re: [Mesa-dev] [PATCH] Delete duplicate function is_power_of_two() and use _mesa_is_pow_two()

2015-07-28 Thread Tapani Pälli 

Reviewed-by: Tapani Pälli tapani.pa...@intel.com

On 07/29/2015 02:48 AM, Anuj Phogat wrote:

Signed-off-by: Anuj Phogat anuj.pho...@gmail.com
---
  src/mesa/drivers/common/meta_blit.c   |  6 +++---
  src/mesa/drivers/dri/i915/i915_texstate.c |  2 +-
  src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp |  2 +-
  src/mesa/drivers/dri/i965/brw_reg.h   |  2 +-
  src/mesa/drivers/dri/i965/brw_tex_layout.c|  8 
  src/mesa/drivers/dri/i965/brw_vec4_generator.cpp  |  2 +-
  src/mesa/drivers/dri/i965/intel_blit.c|  8 
  src/mesa/main/format_parser.py|  6 +++---
  src/mesa/main/macros.h| 11 ---
  9 files changed, 18 insertions(+), 29 deletions(-)

diff --git a/src/mesa/drivers/common/meta_blit.c 
b/src/mesa/drivers/common/meta_blit.c
index 317a304..71d18de 100644
--- a/src/mesa/drivers/common/meta_blit.c
+++ b/src/mesa/drivers/common/meta_blit.c
@@ -82,7 +82,7 @@ setup_glsl_msaa_blit_scaled_shader(struct gl_context *ctx,
 y_scale = samples * 0.5;

 /* We expect only power of 2 samples in source multisample buffer. */
-   assert(samples  0  is_power_of_two(samples));
+   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
@@ -263,7 +263,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
 }

 /* We expect only power of 2 samples in source multisample buffer. */
-   assert(samples  0  is_power_of_two(samples));
+   assert(samples  0  _mesa_is_pow_two(samples));
 while (samples  (shader_offset + 1)) {
shader_offset++;
 }
@@ -434,7 +434,7 @@ setup_glsl_msaa_blit_shader(struct gl_context *ctx,
* (so the floating point exponent just gets increased), rather than
* doing a naive sum and dividing.
*/
- assert(is_power_of_two(samples));
+ assert(_mesa_is_pow_two(samples));
   /* Fetch each individual sample. */
   sample_resolve = rzalloc_size(mem_ctx, 1);
   for (i = 0; i  samples; i++) {
diff --git a/src/mesa/drivers/dri/i915/i915_texstate.c 
b/src/mesa/drivers/dri/i915/i915_texstate.c
index aef5ff9..f653f44 100644
--- a/src/mesa/drivers/dri/i915/i915_texstate.c
+++ b/src/mesa/drivers/dri/i915/i915_texstate.c
@@ -342,7 +342,7 @@ i915_update_tex_unit(struct intel_context *intel, GLuint 
unit, GLuint ss3)
 * Thus, I guess we need do this for other platforms as well.
 */
if (tObj-Target == GL_TEXTURE_CUBE_MAP_ARB 
-  !is_power_of_two(firstImage-Height))
+  !_mesa_is_pow_two(firstImage-Height))
   return false;

state[I915_TEXREG_SS3] = ss3; /* SS3_NORMALIZED_COORDS */
diff --git a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp 
b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
index 01d3a56..96d4f37 100644
--- a/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
+++ b/src/mesa/drivers/dri/i965/brw_fs_vector_splitting.cpp
@@ -173,7 +173,7 @@ ir_vector_reference_visitor::visit_enter(ir_assignment *ir)
return visit_continue_with_parent;
 }
 if (ir-lhs-as_dereference_variable() 
-   is_power_of_two(ir-write_mask) 
+   _mesa_is_pow_two(ir-write_mask) 
 !ir-condition) {
/* If we're writing just a channel, then channel-splitting the LHS is 
OK.
 */
diff --git a/src/mesa/drivers/dri/i965/brw_reg.h 
b/src/mesa/drivers/dri/i965/brw_reg.h
index c8b1341..4867148 100644
--- a/src/mesa/drivers/dri/i965/brw_reg.h
+++ b/src/mesa/drivers/dri/i965/brw_reg.h
@@ -853,7 +853,7 @@ static inline struct brw_reg
  spread(struct brw_reg reg, unsigned s)
  {
 if (s) {
-  assert(is_power_of_two(s));
+  assert(_mesa_is_pow_two(s));

if (reg.hstride)
   reg.hstride += cvt(s) - 1;
diff --git a/src/mesa/drivers/dri/i965/brw_tex_layout.c 
b/src/mesa/drivers/dri/i965/brw_tex_layout.c
index 85c0864..fb78b08 100644
--- a/src/mesa/drivers/dri/i965/brw_tex_layout.c
+++ b/src/mesa/drivers/dri/i965/brw_tex_layout.c
@@ -63,7 +63,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context 
*brw,
 int i = 0;

 /* Alignment computations below assume bpp = 8 and a power of 2. */
-   assert (bpp = 8  bpp = 128  is_power_of_two(bpp));
+   assert (bpp = 8  bpp = 128  _mesa_is_pow_two(bpp));

 switch(mt-target) {
 case GL_TEXTURE_1D:
@@ -95,7 +95,7 @@ tr_mode_horizontal_texture_alignment(const struct brw_context 
*brw,
 ret_align = mt-tr_mode == INTEL_MIPTREE_TRMODE_YF ?
 align_yf[i] : align_ys[i];

-   assert(is_power_of_two(mt-num_samples));
+   assert(_mesa_is_pow_two(mt-num_samples));

 switch (mt-num_samples) {
 case 2:
@@ -199,7 +199,7 @@ tr_mode_vertical_texture_alignment(const struct brw_context 
*brw,
mt-target != GL_TEXTURE_1D_ARRAY);

 /* Alignment computations below assume bpp = 8 and a power of 2. */
-