Re: [PATCH v3 3/4] hw/misc: Add MIPS Trickbox device
On 08/03/2023 01.07, Philippe Mathieu-Daudé wrote: From: Jiaxun Yang MIPS Trickbox is a emulated device present in MIPS's IASIM simulator for decades. It's capable of managing simulator status, signaling interrupts, doing DMA and EJTAG signal stimulations. For now we just use definition of this device and implement power management related functions. Signed-off-by: Jiaxun Yang Message-Id: <20230304223803.55764-2-jiaxun.y...@flygoat.com> [PMD: Remove pointless mask in mips_trickbox_write(), declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()] Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + hw/misc/mips_trickbox.c | 97 + hw/misc/trace-events| 4 ++ include/hw/misc/mips_trickbox.h | 39 + 5 files changed, 144 insertions(+) create mode 100644 hw/misc/mips_trickbox.c create mode 100644 include/hw/misc/mips_trickbox.h diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 2ef5781ef8..9f09da23c1 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -85,6 +85,9 @@ config STM32F4XX_EXTI config MIPS_ITU bool +config MIPS_TRICKBOX +bool + config MPS2_FPGAIO bool select LED diff --git a/hw/misc/meson.build b/hw/misc/meson.build index a40245ad44..4b6c50832c 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -136,6 +136,7 @@ specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c')) specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c')) specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c')) +specific_ss.add(when: 'CONFIG_MIPS_TRICKBOX', if_true: files('mips_trickbox.c')) softmmu_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c')) diff --git a/hw/misc/mips_trickbox.c b/hw/misc/mips_trickbox.c new file mode 100644 index 00..86b00a8c0d --- /dev/null +++ b/hw/misc/mips_trickbox.c @@ -0,0 +1,97 @@ +/* + * SPDX-License-Identifier: LGPL-2.0-or-later + * + * MIPS Trickbox I'd maybe add the description from the commit message here to tell the one who's looking at this source code what this file is all about. + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "qapi/error.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "trace.h" +#include "sysemu/runstate.h" +#include "hw/misc/mips_trickbox.h" + +static uint64_t mips_trickbox_read(void *opaque, hwaddr addr, unsigned int size) +{ +uint64_t value = 0; + +qemu_log_mask(LOG_UNIMP, +"%s: unimplemented register read 0x%02"HWADDR_PRIx"\n", +__func__, addr); +trace_mips_trickbox_read(size, value); Does it really make sense to have both, a trace point and a log for the same thing? Thomas
Re: [PATCH v3 2/4] configs/targets: Have all MIPS targets select FDT
On 08/03/2023 01.07, Philippe Mathieu-Daudé wrote: With the introduction of the MIPS virt machine in a pair of commits, all MIPS targets will require libfdt. Define TARGET_NEED_FDT in all mips*-softmmu.mak files. Signed-off-by: Philippe Mathieu-Daudé --- configs/targets/mips-softmmu.mak | 1 + configs/targets/mips64-softmmu.mak | 1 + configs/targets/mipsel-softmmu.mak | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/targets/mips-softmmu.mak b/configs/targets/mips-softmmu.mak index 7787a4d94c..a5c1db82c9 100644 --- a/configs/targets/mips-softmmu.mak +++ b/configs/targets/mips-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_BIG_ENDIAN=y TARGET_SUPPORTS_MTTCG=y +TARGET_NEED_FDT=y diff --git a/configs/targets/mips64-softmmu.mak b/configs/targets/mips64-softmmu.mak index 568d66650c..398e0fc244 100644 --- a/configs/targets/mips64-softmmu.mak +++ b/configs/targets/mips64-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_BIG_ENDIAN=y +TARGET_NEED_FDT=y diff --git a/configs/targets/mipsel-softmmu.mak b/configs/targets/mipsel-softmmu.mak index c7c41f4fb7..3ddebca575 100644 --- a/configs/targets/mipsel-softmmu.mak +++ b/configs/targets/mipsel-softmmu.mak @@ -1,3 +1,4 @@ TARGET_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_SUPPORTS_MTTCG=y +TARGET_NEED_FDT=y Reviewed-by: Thomas Huth
Re: [PATCH v10 9/9] KVM: Enable and expose KVM_MEM_PRIVATE
On Wed, Mar 08, 2023 at 12:13:24AM +, Ackerley Tng wrote: > Chao Peng writes: > > > On Sat, Jan 14, 2023 at 12:01:01AM +, Sean Christopherson wrote: > > > On Fri, Dec 02, 2022, Chao Peng wrote: > > ... > > > Strongly prefer to use similar logic to existing code that detects wraps: > > > > mem->restricted_offset + mem->memory_size < > > > mem->restricted_offset > > > > This is also where I'd like to add the "gfn is aligned to offset" > > > check, though > > > my brain is too fried to figure that out right now. > > > Used count_trailing_zeros() for this TODO, unsure we have other better > > approach. > > > diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c > > index afc8c26fa652..fd34c5f7cd2f 100644 > > --- a/virt/kvm/kvm_main.c > > +++ b/virt/kvm/kvm_main.c > > @@ -56,6 +56,7 @@ > > #include > > #include > > #include > > +#include > > > #include "coalesced_mmio.h" > > #include "async_pf.h" > > @@ -2087,6 +2088,19 @@ static bool kvm_check_memslot_overlap(struct > > kvm_memslots *slots, int id, > > return false; > > } > > > +/* > > + * Return true when ALIGNMENT(offset) >= ALIGNMENT(gpa). > > + */ > > +static bool kvm_check_rmem_offset_alignment(u64 offset, u64 gpa) > > +{ > > + if (!offset) > > + return true; > > + if (!gpa) > > + return false; > > + > > + return !!(count_trailing_zeros(offset) >= count_trailing_zeros(gpa)); > > Perhaps we could do something like > > #define lowest_set_bit(val) (val & -val) > > and use > > return lowest_set_bit(offset) >= lowest_set_bit(gpa); I see kernel already has fls64(), that looks what we need ;) > > Please help me to understand: why must ALIGNMENT(offset) >= > ALIGNMENT(gpa)? Why is it not sufficient to have both gpa and offset be > aligned to PAGE_SIZE? Yes, it's sufficient. Here we just want to be conservative on the uAPI as Sean explained this at [1]: I would rather reject memslot if the gfn has lesser alignment than the offset. I'm totally ok with this approach _if_ there's a use case. Until such a use case presents itself, I would rather be conservative from a uAPI perspective. [1] https://lore.kernel.org/all/y8hldehbrw+oo...@google.com/ Chao > > > +} > > + > > /* > >* Allocate some memory and give it an address in the guest physical > > address > >* space. > > @@ -2128,7 +2142,8 @@ int __kvm_set_memory_region(struct kvm *kvm, > > if (mem->flags & KVM_MEM_PRIVATE && > > (mem->restrictedmem_offset & (PAGE_SIZE - 1) || > > mem->restrictedmem_offset + mem->memory_size < > > mem->restrictedmem_offset || > > -0 /* TODO: require gfn be aligned with restricted offset */)) > > +!kvm_check_rmem_offset_alignment(mem->restrictedmem_offset, > > + mem->guest_phys_addr))) > > return -EINVAL; > > if (as_id >= kvm_arch_nr_memslot_as_ids(kvm) || id >= KVM_MEM_SLOTS_NUM) > > return -EINVAL;
Re: [PATCH v3 1/4] gitlab-ci: Remove mips64-softmmu from build-without-defaults job
On 08/03/2023 01.07, Philippe Mathieu-Daudé wrote: With the introduction of the MIPS virt machine in a pair of commits, all MIPS targets will require libfdt. Since the 'build-without-defaults' job is configured with '--disable-fdt', it won't be able to build any MIPS target. In particular this job triggers: ../meson.build:2809:2: ERROR: Problem encountered: fdt not available but required by targets mips64-softmmu Remove 'mips64-softmmu' from the job TARGETS. To still cover a big-endian target in qtests, replace it by the s390x target. Signed-off-by: Philippe Mathieu-Daudé --- .gitlab-ci.d/buildtest.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index 44b8275299..4897229f1a 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -526,9 +526,9 @@ build-without-defaults: --disable-pie --disable-qom-cast-debug --disable-strip -TARGETS: avr-softmmu mips64-softmmu s390x-softmmu sh4-softmmu +TARGETS: avr-softmmu s390x-softmmu sh4-softmmu sparc64-softmmu hexagon-linux-user i386-linux-user s390x-linux-user -MAKE_CHECK_ARGS: check-unit check-qtest-avr check-qtest-mips64 +MAKE_CHECK_ARGS: check-unit check-qtest-avr check-qtest-s390x Did you check whether this really works? IIRC the qtests fail with s390x if it is compiled with --without-default-devices ...? Thomas
Re: [PULL 00/51] Net patches
On 8/3/23 07:56, Jason Wang wrote: On Wed, Mar 8, 2023 at 4:43 AM Philippe Mathieu-Daudé wrote: On 7/3/23 18:01, Peter Maydell wrote: On Tue, 7 Mar 2023 at 07:08, Jason Wang wrote: The following changes since commit 817fd33836e73812df2f1907612b57750fcb9491: Merge tag 'audio-pull-request' of https://gitlab.com/marcandre.lureau/qemu into staging (2023-03-06 14:06:06 +) are available in the git repository at: https://github.com/jasowang/qemu.git tags/net-pull-request for you to fetch changes up to c19b566a3898510ec2b3e881b3fb78614b240414: hw/net/eepro100: Replace DO_UPCAST(EEPRO100State) by EEPRO100() (2023-03-07 14:55:39 +0800) build-oss-fuzz failed on something involving fuzzing eepro100: https://gitlab.com/qemu-project/qemu/-/jobs/3889073821 Jason, please drop my patches. I'll look at that failure. Before "hw/net/eepro100: Convert reset handler to DeviceReset", e100_pci_reset() is only called once from DeviceRealize _before_ the device is realized. After, 1/ it can be called multiple times and 2/ it seems to do stuffs that really belong to DeviceRealize (should be called once), in particular pci_add_capability(). I *think* it should be illegal to call pci_add_capability() _after_ a device is realized. Auditing pci_add_capability(), there is only one other use before realize: amdvi_sysbus_realize() in hw/i386/amd_iommu.c.
Re: [PULL 00/51] Net patches
On Wed, Mar 8, 2023 at 1:01 AM Peter Maydell wrote: > > On Tue, 7 Mar 2023 at 07:08, Jason Wang wrote: > > > > The following changes since commit 817fd33836e73812df2f1907612b57750fcb9491: > > > > Merge tag 'audio-pull-request' of > > https://gitlab.com/marcandre.lureau/qemu into staging (2023-03-06 14:06:06 > > +) > > > > are available in the git repository at: > > > > https://github.com/jasowang/qemu.git tags/net-pull-request > > > > for you to fetch changes up to c19b566a3898510ec2b3e881b3fb78614b240414: > > > > hw/net/eepro100: Replace DO_UPCAST(EEPRO100State) by EEPRO100() > > (2023-03-07 14:55:39 +0800) > > > > > > > > > > Fails to build on Windows: > https://gitlab.com/qemu-project/qemu/-/jobs/3889073853 > https://gitlab.com/qemu-project/qemu/-/jobs/3889073855 > https://gitlab.com/qemu-project/qemu/-/jobs/3889073780 > https://gitlab.com/qemu-project/qemu/-/jobs/3889073778 > > ../tests/qtest/igb-test.c: In function 'data_test_init': > ../tests/qtest/igb-test.c:219:15: error: implicit declaration of > function 'socketpair'; did you mean 'socket_uri'? > [-Werror=implicit-function-declaration] > 219 | int ret = socketpair(PF_UNIX, SOCK_STREAM, 0, test_sockets); > | ^~ > | socket_uri > ../tests/qtest/igb-test.c:219:15: error: nested extern declaration of > 'socketpair' [-Werror=nested-externs] Will add ifndef to make sure windows won't try to compile the related test. > > build-oss-fuzz failed on something involving fuzzing eepro100: > https://gitlab.com/qemu-project/qemu/-/jobs/3889073821 > > The 'crash-test' jobs failed with an assertion > "qemu-system-i386: -device igb: MSI-X is not supported by interrupt > controller": > https://gitlab.com/qemu-project/qemu/-/jobs/3889073868 > https://gitlab.com/qemu-project/qemu/-/jobs/3889073873 This is because we use error_abort for msix/msi_init(). I think we can gracefully fail in those cases. Will send a new version of pull request. Thanks > > thanks > -- PMM >
Re: [PULL 00/51] Net patches
On Wed, Mar 8, 2023 at 4:43 AM Philippe Mathieu-Daudé wrote: > > On 7/3/23 18:01, Peter Maydell wrote: > > On Tue, 7 Mar 2023 at 07:08, Jason Wang wrote: > >> > >> The following changes since commit > >> 817fd33836e73812df2f1907612b57750fcb9491: > >> > >>Merge tag 'audio-pull-request' of > >> https://gitlab.com/marcandre.lureau/qemu into staging (2023-03-06 14:06:06 > >> +) > >> > >> are available in the git repository at: > >> > >>https://github.com/jasowang/qemu.git tags/net-pull-request > >> > >> for you to fetch changes up to c19b566a3898510ec2b3e881b3fb78614b240414: > >> > >>hw/net/eepro100: Replace DO_UPCAST(EEPRO100State) by EEPRO100() > >> (2023-03-07 14:55:39 +0800) > >> > >> > > > build-oss-fuzz failed on something involving fuzzing eepro100: > > https://gitlab.com/qemu-project/qemu/-/jobs/3889073821 > Jason, please drop my patches. I'll look at that failure. Ok. Thanks >
Re: [PATCH v4 04/11] osdep: implement qemu_socketpair() for win32
Hi On Tue, Mar 7, 2023 at 6:50 PM Daniel P. Berrangé wrote: > > On Mon, Mar 06, 2023 at 04:27:44PM +0400, marcandre.lur...@redhat.com wrote: > > From: Marc-André Lureau > > > > Manually implement a socketpair() function, using UNIX sockets and > > simple peer credential checking. > > > > QEMU doesn't make much use of socketpair, beside vhost-user which is not > > available for win32 at this point. However, I intend to use it for > > writing some new portable tests. > > > > Signed-off-by: Marc-André Lureau > > --- > > include/qemu/sockets.h | 2 - > > util/oslib-win32.c | 110 + > > 2 files changed, 110 insertions(+), 2 deletions(-) > > > > diff --git a/include/qemu/sockets.h b/include/qemu/sockets.h > > index 2b0698a7c9..d935fd80da 100644 > > --- a/include/qemu/sockets.h > > +++ b/include/qemu/sockets.h > > @@ -15,7 +15,6 @@ int inet_aton(const char *cp, struct in_addr *ia); > > bool fd_is_socket(int fd); > > int qemu_socket(int domain, int type, int protocol); > > > > -#ifndef WIN32 > > /** > > * qemu_socketpair: > > * @domain: specifies a communication domain, such as PF_UNIX > > @@ -30,7 +29,6 @@ int qemu_socket(int domain, int type, int protocol); > > * Return 0 on success. > > */ > > int qemu_socketpair(int domain, int type, int protocol, int sv[2]); > > -#endif > > > > int qemu_accept(int s, struct sockaddr *addr, socklen_t *addrlen); > > /* > > diff --git a/util/oslib-win32.c b/util/oslib-win32.c > > index 29a667ae3d..16f8a67f7e 100644 > > --- a/util/oslib-win32.c > > +++ b/util/oslib-win32.c > > @@ -310,6 +310,116 @@ bool qemu_socket_unselect(int sockfd, Error **errp) > > return qemu_socket_select(sockfd, NULL, 0, errp); > > } > > > > +int qemu_socketpair(int domain, int type, int protocol, int sv[2]) > > +{ > > +struct sockaddr_un addr = { > > +0, > > +}; > > +socklen_t socklen; > > +int listener = -1; > > +int client = -1; > > +int server = -1; > > +g_autofree char *path = NULL; > > +int tmpfd; > > +u_long arg; > > +int ret = -1; > > + > > +g_return_val_if_fail(sv != NULL, -1); > > + > > +addr.sun_family = AF_UNIX; > > +socklen = sizeof(addr); > > + > > +tmpfd = g_file_open_tmp(NULL, &path, NULL); > > +if (tmpfd == -1 || !path) { > > +errno = EACCES; > > +goto out; > > +} > > + > > +close(tmpfd); > > + > > +if (strlen(path) >= sizeof(addr.sun_path)) { > > +errno = EINVAL; > > +goto out; > > +} > > + > > +strncpy(addr.sun_path, path, sizeof(addr.sun_path) - 1); > > + > > +listener = socket(domain, type, protocol); > > +if (listener == -1) { > > +goto out; > > +} > > + > > +if (DeleteFile(path) == 0 && GetLastError() != ERROR_FILE_NOT_FOUND) { > > +errno = EACCES; > > +goto out; > > +} > > +g_clear_pointer(&path, g_free); > > + > > +if (bind(listener, (struct sockaddr *)&addr, socklen) == -1) { > > +goto out; > > +} > > + > > +if (listen(listener, 1) == -1) { > > +goto out; > > +} > > + > > +client = socket(domain, type, protocol); > > +if (client == -1) { > > +goto out; > > +} > > + > > +arg = 1; > > +if (ioctlsocket(client, FIONBIO, &arg) != NO_ERROR) { > > +goto out; > > +} > > + > > +if (connect(client, (struct sockaddr *)&addr, socklen) == -1 && > > +WSAGetLastError() != WSAEWOULDBLOCK) { > > +goto out; > > +} > > + > > +server = accept(listener, NULL, NULL); > > +if (server == -1) { > > +goto out; > > +} > > In theory at this point 'client' if connect() returned WSAEWOULDBLOCK, > then at this point it should be fully connected. I wonder if that is > actually guaranteed though, or should we do something to validate > there's no race condition ? > > > + > > +arg = 0; > > +if (ioctlsocket(client, FIONBIO, &arg) != NO_ERROR) { > > +goto out; > > +} > > + > > +arg = 0; > > +if (ioctlsocket(client, SIO_AF_UNIX_GETPEERPID, &arg) != NO_ERROR) { > > +goto out; > > +} > > Maybe this will force a synchronization point ? yeah, I guess switching back to sync and getting the peer pid, I assume the unix socket pair to be ready at this point. > > Alteratively select() + getsockopt(SO_ERROR) is what we used to > do to check for connect() completion (logic removed now but can > be seen in b2587932582333197c88bf663785b19f441989d7) > That's hopefully not necessary. thanks > > > > + > > +if (arg != GetCurrentProcessId()) { > > +errno = EPERM; > > +goto out; > > +} > > + > > +sv[0] = server; > > +server = -1; > > +sv[1] = client; > > +client = -1; > > +ret = 0; > > + > > +out: > > +if (listener != -1) { > > +close(listener); > > +} > > +if (client != -1) { > > +close(client); > > +} > > +if (server != -1) { > > +close(server); > > +
Re: [PATCH V2 3/5] memory: introduce memory_region_unmap_iommu_notifier_range()
On Wed, Mar 8, 2023 at 9:02 AM Michael S. Tsirkin wrote: > > On Thu, Feb 23, 2023 at 02:59:22PM +0800, Jason Wang wrote: > > This patch introduces a new helper to unmap the range of a specific > > IOMMU notifier. > > > > Signed-off-by: Jason Wang > > --- > > include/exec/memory.h | 10 ++ > > softmmu/memory.c | 13 + > > 2 files changed, 23 insertions(+) > > > > diff --git a/include/exec/memory.h b/include/exec/memory.h > > index 2e602a2fad..6fa0b071f0 100644 > > --- a/include/exec/memory.h > > +++ b/include/exec/memory.h > > @@ -1731,6 +1731,16 @@ void memory_region_notify_iommu(IOMMUMemoryRegion > > *iommu_mr, > > void memory_region_notify_iommu_one(IOMMUNotifier *notifier, > > IOMMUTLBEvent *event); > > > > +/** > > + * memory_region_unmap_iommu_notifier_range: notify a unmap for an IOMMU > > + * translation that covers the > > + * range of a notifier > > + * > > + * @notifier: the notifier to be notified > > + */ > > +void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *n); > > + > > + > > /** > > * memory_region_register_iommu_notifier: register a notifier for changes > > to > > * IOMMU translation entries. > > This causes doc warnings: > > /scm/qemu/docs/../include/exec/memory.h:1741: warning: Function parameter or > member 'n' not described in 'memory_region_unmap_iommu_notifier_range' > /scm/qemu/docs/../include/exec/memory.h:1741: warning: Excess function > parameter 'notifier' description in 'memory_region_unmap_iommu_notifier_range' > > > please fix. Will do. Thanks > > > > diff --git a/softmmu/memory.c b/softmmu/memory.c > > index 9d64efca26..ba43b4474e 100644 > > --- a/softmmu/memory.c > > +++ b/softmmu/memory.c > > @@ -1996,6 +1996,19 @@ void memory_region_notify_iommu_one(IOMMUNotifier > > *notifier, > > } > > } > > > > +void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *n) > > +{ > > +IOMMUTLBEvent event; > > + > > +event.type = IOMMU_NOTIFIER_UNMAP; > > +event.entry.target_as = &address_space_memory; > > +event.entry.iova = n->start; > > +event.entry.perm = IOMMU_NONE; > > +event.entry.addr_mask = n->end - n->start; > > + > > +memory_region_notify_iommu_one(n, &event); > > +} > > + > > void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, > > int iommu_idx, > > IOMMUTLBEvent event) > > -- > > 2.25.1 >
Re: stable releases
On Mon, Mar 06, 2023 at 09:57:58AM +0100, Thomas Huth wrote: > On 05/03/2023 11.27, Michael Tokarev wrote: > > Hi! > > > > For a few qemu major releases already, we did not have any stable minor > > releases. > > I'd love to change that, in order to consolidate efforts and to make better > > software in the end. But I need some (hopefully minor) help here. > > > > I collected changes from qemu/master which apparently should go to -stable. > > Published at git://isrv.corpit.ru/qemu.git , branch stable-7.2-staging > > (probably should publish it on github or gitlab). > > This contains stuff which I use on Debian in qemu package, which is based > > on 7.2 version now. The last 18 patches are not in Debian package yet, > > going to push it today or tomorrow. > > > > If nothing, this can be used as a base for actual 7.2.1 stable release, > > maybe with more changes added (or some changes removed). > > > > The help which I need is to be able to run some wider testing. Debian is > > a relatively good testbed, and it is used by qemu already in terms of > > bullseye-backports to run other tests, so it should be good, but I'd > > love to have wider coverage still. Maybe some CI stuff which qemu has > > for master, if not only just before actual release. Hi Michael, Thank you for offering to help with the stable releases. I think it would be in great hands and am happy to help in any way with getting things going there. I totally agree on Thomas' suggestions for next steps, and tried to list out whatever else came to mind regarding stable releases in general (sorry if things get a bit rambly). > > I'd suggest to get a gitlab.com account, and fork the qemu repository there. > Then you can run the CI on your own by pushing your patch to your forked > repository. > > You can also get some test additional coverage by running the avocado tests > with "make check-avocado" ... but beware that this downloads quite some > hundreds of MBs from the internet. And some tests are known to fail, so it's > maybe best to run them on the plain 7.2.0 tag first to see what works for > you and what does not work properly. As far as testing, I think some other good tests/areas to consider eventually adding would be: - qemu-iotests - VFIO/PCI passthrough tests of some sort if possible - live migration tests (especially things like 7.2.1 <-> 7.2.0 migration compatibility to allow for rolling out/back live upgrades and things of that sort) - Windows guests > > > And as usual, this needs help in picking up changes which should go to > > stable. But this is something which is always needed anyway. > > > > Let's resurrect qemu-stable :) The "current" stable process is documented at docs/devel/stable-process.rst As written, 7.2 support would end when 7.3/8.0 is released, and then 8.0.1 would be the next stable release afterward, but maybe there are more optimal ways to integrate/schedule things in your case so don't feel tied this approach. As far as this release goes I'd recommend going ahead and getting your stable-7.2-staging tree rebased on 7.2.0, along with whatever other patches you think should definitely be included. For me this would include all CVE fixes that went in after 7.2.0, and any patches tagged Cc:qemu-stable or forwarded to qemu-stable mailing list. But that's another area to decide on how you want to handle things. Maybe in some cases some important fixes are better to get out sooner rather than trying to make every release "complete". I'd usually then post the staging tree to the mailing list to see if there were any more candidates, which I think has pretty much always identified more commits to pull in and proven worthwhile; but probably depends on how frequently you cut releases. Maybe it makes sense to not even do tagged releases, and just have a rolling stable tree? Things to consider. Ideally you'd be able to eventually push trees to the official QEMU repo like I've done in the past. You'll need to work with the gitlab project maintainers on that. But if you need to host/tag them in your own repo until then that would probably be fine. Will want some way to communicate this to QEMU community though, and official git repo is probably the best way. I can also push your tree/tags as interim solution. Will also need to figure out how to handle uploading tarballs (assuming you still intend on distributing release tarballs). I can upload them in the meantime, but we will probably want to work with Paolo getting you access. If there's anything else I can help with please let me know. Thanks, Mike > > Please make sure to CC: qemu-stable and Michael Roth - I hope he can give > some directions for this effort. > > Thomas >
Re: [RESEND PATCH v6 8/8] hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
On Tue, Mar 07, 2023 at 07:26:41PM +, Fan Ni wrote: > > +typedef struct CXLError { > > +QTAILQ_ENTRY(CXLError) node; > > +int type; /* Error code as per FE definition */ > > +uint32_t header[32]; > Instead of using 32 here, would it be better to use > CXL_RAS_ERR_HEADER_NUM? merged as is, fix on top pls. -- MST
[PULL 68/73] hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
From: Jonathan Cameron CXL uses PCI AER Internal errors to signal to the host that an error has occurred. The host can then read more detailed status from the CXL RAS capability. For uncorrectable errors: support multiple injection in one operation as this is needed to reliably test multiple header logging support in an OS. The equivalent feature doesn't exist for correctable errors, so only one error need be injected at a time. Note: - Header content needs to be manually specified in a fashion that matches the specification for what can be in the header for each error type. Injection via QMP: { "execute": "qmp_capabilities" } ... { "execute": "cxl-inject-uncorrectable-errors", "arguments": { "path": "/machine/peripheral/cxl-pmem0", "errors": [ { "type": "cache-address-parity", "header": [ 3, 4] }, { "type": "cache-data-parity", "header": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31] }, { "type": "internal", "header": [ 1, 2, 4] } ] }} ... { "execute": "cxl-inject-correctable-error", "arguments": { "path": "/machine/peripheral/cxl-pmem0", "type": "physical" } } Signed-off-by: Jonathan Cameron Message-Id: <20230302133709.30373-9-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/cxl.json | 128 +++ qapi/qapi-schema.json | 1 + include/hw/cxl/cxl_component.h | 26 +++ include/hw/cxl/cxl_device.h| 11 ++ hw/cxl/cxl-component-utils.c | 4 +- hw/mem/cxl_type3.c | 281 + hw/mem/cxl_type3_stubs.c | 17 ++ hw/mem/meson.build | 2 + qapi/meson.build | 1 + 9 files changed, 470 insertions(+), 1 deletion(-) create mode 100644 qapi/cxl.json create mode 100644 hw/mem/cxl_type3_stubs.c diff --git a/qapi/cxl.json b/qapi/cxl.json new file mode 100644 index 00..4be7d46041 --- /dev/null +++ b/qapi/cxl.json @@ -0,0 +1,128 @@ +# -*- Mode: Python -*- +# vim: filetype=python + +## +# = CXL devices +## + +## +# @CxlUncorErrorType: +# +# Type of uncorrectable CXL error to inject. These errors are reported via +# an AER uncorrectable internal error with additional information logged at +# the CXL device. +# +# @cache-data-parity: Data error such as data parity or data ECC error CXL.cache +# @cache-address-parity: Address parity or other errors associated with the +#address field on CXL.cache +# @cache-be-parity: Byte enable parity or other byte enable errors on CXL.cache +# @cache-data-ecc: ECC error on CXL.cache +# @mem-data-parity: Data error such as data parity or data ECC error on CXL.mem +# @mem-address-parity: Address parity or other errors associated with the +# address field on CXL.mem +# @mem-be-parity: Byte enable parity or other byte enable errors on CXL.mem. +# @mem-data-ecc: Data ECC error on CXL.mem. +# @reinit-threshold: REINIT threshold hit. +# @rsvd-encoding: Received unrecognized encoding. +# @poison-received: Received poison from the peer. +# @receiver-overflow: Buffer overflows (first 3 bits of header log indicate which) +# @internal: Component specific error +# @cxl-ide-tx: Integrity and data encryption tx error. +# @cxl-ide-rx: Integrity and data encryption rx error. +# +# Since: 8.0 +## + +{ 'enum': 'CxlUncorErrorType', + 'data': ['cache-data-parity', + 'cache-address-parity', + 'cache-be-parity', + 'cache-data-ecc', + 'mem-data-parity', + 'mem-address-parity', + 'mem-be-parity', + 'mem-data-ecc', + 'reinit-threshold', + 'rsvd-encoding', + 'poison-received', + 'receiver-overflow', + 'internal', + 'cxl-ide-tx', + 'cxl-ide-rx' + ] + } + +## +# @CXLUncorErrorRecord: +# +# Record of a single error including header log. +# +# @type: Type of error +# @header: 16 DWORD of header. +# +# Since: 8.0 +## +{ 'struct': 'CXLUncorErrorRecord', + 'data': { + 'type': 'CxlUncorErrorType', + 'header': [ 'uint32' ] + } +} + +## +# @cxl-inject-uncorrectable-errors: +# +# Command to allow injection of multiple errors in one go. This allows testing +# of multiple header log handling in the OS. +# +# @path: CXL Type 3 device canonical QOM path +# @errors: Errors to inject +# +# Since: 8.0 +## +{ 'command': 'cxl-inject-uncorrectable-errors', + 'data': { 'path': 'str', + 'errors': [ 'CXLUncorErrorRecord' ] }} + +## +# @CxlCorErrorType: +# +# Type of CXL correctable error to inject +# +# @cache-data-ecc: Data ECC error on CXL.cache +# @mem-data-ecc: Data ECC error on CXL.mem +# @crc-threshold: Component specific and applicable to 68 byte Flit mode only. +# @cache-poison-received: Received poison from a pe
[PULL 69/73] hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers
From: Jonathan Cameron These two helpers enable host bridges to operate differently depending on the number of downstream ports, in particular if there is only a single port. Useful for CXL where HDM address decoders are allowed to be implicit in the host bridge if there is only a single root port. Signed-off-by: Jonathan Cameron Message-Id: <20230227153128.8164-2-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/pci/pcie_port.h | 2 ++ hw/pci/pcie_port.c | 38 ++ 2 files changed, 40 insertions(+) diff --git a/include/hw/pci/pcie_port.h b/include/hw/pci/pcie_port.h index 6c40e3733f..90e6cf45b8 100644 --- a/include/hw/pci/pcie_port.h +++ b/include/hw/pci/pcie_port.h @@ -41,6 +41,8 @@ struct PCIEPort { void pcie_port_init_reg(PCIDevice *d); PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn); +PCIDevice *pcie_find_port_first(PCIBus *bus); +int pcie_count_ds_ports(PCIBus *bus); #define TYPE_PCIE_SLOT "pcie-slot" OBJECT_DECLARE_SIMPLE_TYPE(PCIESlot, PCIE_SLOT) diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index 000633fec1..20ff2b39e8 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -161,6 +161,44 @@ PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn) return NULL; } +/* Find first port in devfn number order */ +PCIDevice *pcie_find_port_first(PCIBus *bus) +{ +int devfn; + +for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { +PCIDevice *d = bus->devices[devfn]; + +if (!d || !pci_is_express(d) || !d->exp.exp_cap) { +continue; +} + +if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) { +return d; +} +} + +return NULL; +} + +int pcie_count_ds_ports(PCIBus *bus) +{ +int dsp_count = 0; +int devfn; + +for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { +PCIDevice *d = bus->devices[devfn]; + +if (!d || !pci_is_express(d) || !d->exp.exp_cap) { +continue; +} +if (object_dynamic_cast(OBJECT(d), TYPE_PCIE_PORT)) { +dsp_count++; +} +} +return dsp_count; +} + static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler, BusState *bus) { -- MST
[PULL 50/73] acpi: pci: describe all functions on populated slots
From: Igor Mammedov describing all present devices on functions other than 0 was complicated when non hotplug and hotplug code was intermixed. So QEMU has been excluding non zero functions since they are not supported by hotplug code, then a condition to whitelist coldplugged bridges was added and later whitelisting of devices that advertise presence of their own AML description. With non hotplug and hotplug code separated, it is possible to relax rules and allow describing all non-hotpluggble functions and hence simplify conditions whether PCI device should be enumerated by generic (non-hotplug) code. Price of that simplification is an extra few Device() descriptors in DSDT exposing built-in chipset functions, which has no functional effect on guest side. Apart from that, the enumeration of non zero functions, allows to attach more NICs with acpi-index enabled directly on hostbridge (if hotplug is not required). Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-25-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 6 -- 1 file changed, 6 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 46f78e9338..8e2481fe5e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -494,12 +494,6 @@ static bool is_devfn_ignored_generic(const int devfn, const PCIBus *bus) if (DEVICE(pdev)->hotplugged) { return true; } -} else if (!get_dev_aml_func(DEVICE(pdev))) { -/* - * Ignore all other devices on !0 functions unless they - * have AML description (i.e have get_dev_aml_func() != 0) - */ -return true; } } return false; -- MST
[PULL 62/73] hw/pci/aer: Add missing routing for AER errors
From: Jonathan Cameron PCIe r6.0 Figure 6-3 "Pseudo Logic Diagram for Selected Error Message Control and Status Bits" includes a right hand branch under "All PCI Express devices" that allows for messages to be generated or sent onwards without SERR# being set as long as the appropriate per error class bit in the PCIe Device Control Register is set. Implement that branch thus enabling routing of ERR_COR, ERR_NONFATAL and ERR_FATAL under OSes that set these bits appropriately (e.g. Linux) Signed-off-by: Jonathan Cameron Reviewed-by: Dave Jiang Message-Id: <20230302133709.30373-3-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/pci/pcie_aer.c | 10 +- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 909e027d99..103667c368 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -192,8 +192,16 @@ static void pcie_aer_update_uncor_status(PCIDevice *dev) static bool pcie_aer_msg_alldev(PCIDevice *dev, const PCIEAERMsg *msg) { +uint16_t devctl = pci_get_word(dev->config + dev->exp.exp_cap + + PCI_EXP_DEVCTL); if (!(pcie_aer_msg_is_uncor(msg) && - (pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR))) { + (pci_get_word(dev->config + PCI_COMMAND) & PCI_COMMAND_SERR)) && +!((msg->severity == PCI_ERR_ROOT_CMD_NONFATAL_EN) && + (devctl & PCI_EXP_DEVCTL_NFERE)) && +!((msg->severity == PCI_ERR_ROOT_CMD_COR_EN) && + (devctl & PCI_EXP_DEVCTL_CERE)) && +!((msg->severity == PCI_ERR_ROOT_CMD_FATAL_EN) && + (devctl & PCI_EXP_DEVCTL_FERE))) { return false; } -- MST
[PULL 45/73] tests: acpi: whitelist DSDT before adding device with acpi-index to testcases
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-20-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..70244976c9 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,4 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.noacpihp", -- MST
[PULL 17/73] vdpa: add vhost_vdpa->suspended parameter
From: Eugenio Pérez This allows vhost_vdpa to track if it is safe to get the vring base from the device or not. If it is not, vhost can fall back to fetch idx from the guest buffer again. No functional change intended in this patch, later patches will use this field. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-6-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/vhost-vdpa.h | 2 ++ hw/virtio/vhost-vdpa.c | 8 2 files changed, 10 insertions(+) diff --git a/include/hw/virtio/vhost-vdpa.h b/include/hw/virtio/vhost-vdpa.h index 7997f09a8d..4a7d396674 100644 --- a/include/hw/virtio/vhost-vdpa.h +++ b/include/hw/virtio/vhost-vdpa.h @@ -42,6 +42,8 @@ typedef struct vhost_vdpa { bool shadow_vqs_enabled; /* Vdpa must send shadow addresses as IOTLB key for data queues, not GPA */ bool shadow_data; +/* Device suspended successfully */ +bool suspended; /* IOVA mapping used by the Shadow Virtqueue */ VhostIOVATree *iova_tree; GPtrArray *shadow_vqs; diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 1550b1e26a..517e3cdc8d 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -1193,6 +1193,14 @@ static int vhost_vdpa_get_vring_base(struct vhost_dev *dev, return 0; } +if (!v->suspended) { +/* + * Cannot trust in value returned by device, let vhost recover used + * idx from guest. + */ +return -1; +} + ret = vhost_vdpa_call(dev, VHOST_GET_VRING_BASE, ring); trace_vhost_vdpa_get_vring_base(dev, ring->index, ring->num); return ret; -- MST
[PULL 65/73] hw/mem/cxl-type3: Add AER extended capability
From: Jonathan Cameron This enables AER error injection to function as expected. It is intended as a building block in enabling CXL RAS error injection in the following patches. Signed-off-by: Jonathan Cameron Reviewed-by: Dave Jiang Message-Id: <20230302133709.30373-6-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/mem/cxl_type3.c | 13 + 1 file changed, 13 insertions(+) diff --git a/hw/mem/cxl_type3.c b/hw/mem/cxl_type3.c index 217a5e639b..6cdd988d1d 100644 --- a/hw/mem/cxl_type3.c +++ b/hw/mem/cxl_type3.c @@ -250,6 +250,7 @@ static void ct3d_config_write(PCIDevice *pci_dev, uint32_t addr, uint32_t val, pcie_doe_write_config(&ct3d->doe_cdat, addr, val, size); pci_default_write_config(pci_dev, addr, val, size); +pcie_aer_write_config(pci_dev, addr, val, size); } /* @@ -452,8 +453,19 @@ static void ct3_realize(PCIDevice *pci_dev, Error **errp) cxl_cstate->cdat.free_cdat_table = ct3_free_cdat_table; cxl_cstate->cdat.private = ct3d; cxl_doe_cdat_init(cxl_cstate, errp); + +pcie_cap_deverr_init(pci_dev); +/* Leave a bit of room for expansion */ +rc = pcie_aer_init(pci_dev, PCI_ERR_VER, 0x200, PCI_ERR_SIZEOF, NULL); +if (rc) { +goto err_release_cdat; +} + return; +err_release_cdat: +cxl_doe_cdat_release(cxl_cstate); +g_free(regs->special_ops); err_address_space_free: address_space_destroy(&ct3d->hostmem_as); return; @@ -465,6 +477,7 @@ static void ct3_exit(PCIDevice *pci_dev) CXLComponentState *cxl_cstate = &ct3d->cxl_cstate; ComponentRegisters *regs = &cxl_cstate->crb; +pcie_aer_exit(pci_dev); cxl_doe_cdat_release(cxl_cstate); g_free(regs->special_ops); address_space_destroy(&ct3d->hostmem_as); -- MST
[PULL 41/73] tests: acpi: update expected blobs
From: Igor Mammedov only following context change: - Local1 = Zero If ((Arg0 != ToUUID ("e5c937d0-3553-4d7a-9117-ea4d19c3434d") /* Device Labeling Interface */)) { Return (Local0) ... Return (Local0) } + Local1 = Zero Local2 = AIDX (DerefOf (Arg4 [Zero]), DerefOf (Arg4 [One] Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-16-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 35 -- tests/data/acpi/pc/DSDT | Bin 6360 -> 6360 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 6283 -> 6283 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7685 -> 7685 bytes tests/data/acpi/pc/DSDT.bridge| Bin 12487 -> 12487 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6824 -> 6824 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 8014 -> 8014 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 6323 -> 6323 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6432 -> 6432 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7719 -> 7719 bytes tests/data/acpi/pc/DSDT.nohpet| Bin 6218 -> 6218 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6366 -> 6366 bytes tests/data/acpi/pc/DSDT.roothp| Bin 9745 -> 9745 bytes tests/data/acpi/q35/DSDT | Bin 8252 -> 8252 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8269 -> 8269 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9577 -> 9577 bytes tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8531 -> 8531 bytes tests/data/acpi/q35/DSDT.applesmc | Bin 8298 -> 8298 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11481 -> 11481 bytes tests/data/acpi/q35/DSDT.core-count2 | Bin 32392 -> 32392 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8716 -> 8716 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9564 -> 9564 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9906 -> 9906 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8327 -> 8327 bytes tests/data/acpi/q35/DSDT.ipmismbus| Bin 8340 -> 8340 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8269 -> 8269 bytes tests/data/acpi/q35/DSDT.memhp| Bin 9611 -> 9611 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9382 -> 9382 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 12545 -> 12545 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8110 -> 8110 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8258 -> 8258 bytes tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8353 -> 8353 bytes tests/data/acpi/q35/DSDT.tis.tpm12| Bin 8858 -> 8858 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8884 -> 8884 bytes tests/data/acpi/q35/DSDT.viot | Bin 9361 -> 9361 bytes tests/data/acpi/q35/DSDT.xapic| Bin 35615 -> 35615 bytes 36 files changed, 35 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 7e7745db39..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,36 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT", -"tests/data/acpi/pc/DSDT.acpierst", -"tests/data/acpi/pc/DSDT.acpihmat", -"tests/data/acpi/pc/DSDT.bridge", -"tests/data/acpi/pc/DSDT.cphp", -"tests/data/acpi/pc/DSDT.dimmpxm", -"tests/data/acpi/pc/DSDT.hpbridge", -"tests/data/acpi/pc/DSDT.ipmikcs", -"tests/data/acpi/pc/DSDT.memhp", -"tests/data/acpi/pc/DSDT.nohpet", -"tests/data/acpi/pc/DSDT.numamem", -"tests/data/acpi/pc/DSDT.roothp", -"tests/data/acpi/q35/DSDT", -"tests/data/acpi/q35/DSDT.acpierst", -"tests/data/acpi/q35/DSDT.acpihmat", -"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", -"tests/data/acpi/q35/DSDT.applesmc", -"tests/data/acpi/q35/DSDT.bridge", -"tests/data/acpi/q35/DSDT.core-count2", -"tests/data/acpi/q35/DSDT.cphp", -"tests/data/acpi/q35/DSDT.cxl", -"tests/data/acpi/q35/DSDT.dimmpxm", -"tests/data/acpi/q35/DSDT.ipmibt", -"tests/data/acpi/q35/DSDT.ipmismbus", -"tests/data/acpi/q35/DSDT.ivrs", -"tests/data/acpi/q35/DSDT.memhp", -"tests/data/acpi/q35/DSDT.mmio64", -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/q35/DSDT.nohpet", -"tests/data/acpi/q35/DSDT.numamem", -"tests/data/acpi/q35/DSDT.pvpanic-isa", -"tests/data/acpi/q35/DSDT.tis.tpm12", -"tests/data/acpi/q35/DSDT.tis.tpm2", -"tests/data/acpi/q35/DSDT.viot", -"tests/data/acpi/q35/DSDT.xapic", diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT index 0b475fb5a966543fef2cd7672a0b198838a63151..ec133a6d3aabcfd22b7b46019338db2de255da70 100644 GIT binary patch delta 19 acmca%c*Af*JmcgfMinN8#LcaY!Quc(l?Foq delta 20 bcmca%c*Af*JR@@fL*nFkMwQKNj6vc6P%j3t diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst index 1
[PULL 35/73] x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set
From: Igor Mammedov (I practice [1] hasn't broke anything since on hardware side we unset hotplug_handler on such intermediate port => hotplug behind it has never worked) When deciding if bridge should be described, the original condition was cold_plugged_bridge && pcihp_bridge_en which was replaced [1] by bridge has ACPI_PCIHP_PROP_BSEL the later however is not the same thing as the original and flips to false if intermediate bridge has hotplug turned off (root-port with 'hotplug=off' option). Since we already in build_pci_bridge_aml(), the question if it's bridge is answered. Use DeviceState::hotplugged to make decision if bridge should describe its slots. What's left out is pcihp_bridge_en, which tells us if ACPI bridge hotplug is enabled. With hotplug and non hotplug part now being mostly separated, omitting this check will only lead to colplugged bridges describe occupied slots in case when ACPI bridge hotplug is disabled. Which makes behavior consistent with occupied slots on hostbridge. Ex (pc/DSDT.hpbrroot diff): ... Device (S20) { Name (_ADR, 0x0004) // _ADR: Address +Device (S08) +{ +Name (_ADR, 0x0001) // _ADR: Address +} + +Device (S10) +{ +Name (_ADR, 0x0002) // _ADR: Address +} } ... PS: testing shows that above doesn't affect adversely guest OS behavior: i.e. if ACPI bridge hotplug is enabled it's expected behaviour, and with ACPI bridge hotplug is disabled (a.k. native hotplug), it doesn't break slot enumeration nor native hotplug. (tested with RHEL9.0 and WS2022). 1) Fixes: 6c36ec46b0d ("pcihp: make bridge describe itself using AcpiDevAmlIfClass:build_dev_aml") Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-10-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/pci-bridge.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c index 5f3ee5157f..4fbf6da6ad 100644 --- a/hw/acpi/pci-bridge.c +++ b/hw/acpi/pci-bridge.c @@ -21,7 +21,7 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope) { PCIBridge *br = PCI_BRIDGE(adev); -if (object_property_find(OBJECT(&br->sec_bus), ACPI_PCIHP_PROP_BSEL)) { +if (!DEVICE(br)->hotplugged) { build_append_pci_bus_devices(scope, pci_bridge_get_sec_bus(br)); } } -- MST
[PULL 16/73] vdpa: rewind at get_base, not set_base
From: Eugenio Pérez At this moment it is only possible to migrate to a vdpa device running with x-svq=on. As a protective measure, the rewind of the inflight descriptors was done at the destination. That way if the source sent a virtqueue with inuse descriptors they are always discarded. Since this series allows to migrate also to passthrough devices with no SVQ, the right thing to do is to rewind at the source so the base of vrings are correct. Support for inflight descriptors may be added in the future. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230303172445.1089785-5-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-shadow-virtqueue.c | 8 ++-- hw/virtio/vhost-vdpa.c | 11 --- 2 files changed, 6 insertions(+), 13 deletions(-) diff --git a/hw/virtio/vhost-shadow-virtqueue.c b/hw/virtio/vhost-shadow-virtqueue.c index 515ccf870d..8361e70d1b 100644 --- a/hw/virtio/vhost-shadow-virtqueue.c +++ b/hw/virtio/vhost-shadow-virtqueue.c @@ -694,13 +694,17 @@ void vhost_svq_stop(VhostShadowVirtqueue *svq) g_autofree VirtQueueElement *elem = NULL; elem = g_steal_pointer(&svq->desc_state[i].elem); if (elem) { -virtqueue_detach_element(svq->vq, elem, 0); +/* + * TODO: This is ok for networking, but other kinds of devices + * might have problems with just unpop these. + */ +virtqueue_unpop(svq->vq, elem, 0); } } next_avail_elem = g_steal_pointer(&svq->next_guest_avail_elem); if (next_avail_elem) { -virtqueue_detach_element(svq->vq, next_avail_elem, 0); +virtqueue_unpop(svq->vq, next_avail_elem, 0); } svq->vq = NULL; g_free(svq->desc_next); diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 5cfa9d5d27..1550b1e26a 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -1170,18 +1170,7 @@ static int vhost_vdpa_set_vring_base(struct vhost_dev *dev, struct vhost_vring_state *ring) { struct vhost_vdpa *v = dev->opaque; -VirtQueue *vq = virtio_get_queue(dev->vdev, ring->index); -/* - * vhost-vdpa devices does not support in-flight requests. Set all of them - * as available. - * - * TODO: This is ok for networking, but other kinds of devices might - * have problems with these retransmissions. - */ -while (virtqueue_rewind(vq, 1)) { -continue; -} if (v->shadow_vqs_enabled) { /* * Device vring base was set at device start. SVQ base is handled by -- MST
[PULL 03/73] cryptodev: Introduce cryptodev alg type in QAPI
From: zhenwei pi Introduce cryptodev alg type in cryptodev.json, then apply this to related codes, and drop 'enum CryptoDevBackendAlgType'. There are two options: 1, { 'enum': 'QCryptodevBackendAlgType', 'prefix': 'CRYPTODEV_BACKEND_ALG', 'data': ['sym', 'asym']} Then we can keep 'CRYPTODEV_BACKEND_ALG_SYM' and avoid lots of changes. 2, changes in this patch(with prefix 'QCRYPTODEV_BACKEND_ALG'). To avoid breaking the rule of QAPI, use 2 here. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-4-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/cryptodev.json | 14 ++ include/sysemu/cryptodev.h | 8 +--- backends/cryptodev-builtin.c | 6 +++--- backends/cryptodev-lkcf.c| 4 ++-- backends/cryptodev.c | 6 +++--- hw/virtio/virtio-crypto.c| 14 +++--- 6 files changed, 30 insertions(+), 22 deletions(-) diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json index b65edbe183..ebb6852035 100644 --- a/qapi/cryptodev.json +++ b/qapi/cryptodev.json @@ -4,6 +4,20 @@ # This work is licensed under the terms of the GNU GPL, version 2 or later. # See the COPYING file in the top-level directory. +## +# @QCryptodevBackendAlgType: +# +# The supported algorithm types of a crypto device. +# +# @sym: symmetric encryption +# @asym: asymmetric Encryption +# +# Since: 8.0 +## +{ 'enum': 'QCryptodevBackendAlgType', + 'prefix': 'QCRYPTODEV_BACKEND_ALG', + 'data': ['sym', 'asym']} + ## # @QCryptodevBackendType: # diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index af152d09db..16f01dd48a 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -49,12 +49,6 @@ typedef struct CryptoDevBackendPeers CryptoDevBackendPeers; typedef struct CryptoDevBackendClient CryptoDevBackendClient; -enum CryptoDevBackendAlgType { -CRYPTODEV_BACKEND_ALG_SYM, -CRYPTODEV_BACKEND_ALG_ASYM, -CRYPTODEV_BACKEND_ALG__MAX, -}; - /** * CryptoDevBackendSymSessionInfo: * @@ -181,7 +175,7 @@ typedef struct CryptoDevBackendAsymOpInfo { } CryptoDevBackendAsymOpInfo; typedef struct CryptoDevBackendOpInfo { -enum CryptoDevBackendAlgType algtype; +QCryptodevBackendAlgType algtype; uint32_t op_code; uint64_t session_id; union { diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index 08895271eb..e70dcd5dad 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -537,7 +537,7 @@ static int cryptodev_builtin_operation( CryptoDevBackendBuiltinSession *sess; CryptoDevBackendSymOpInfo *sym_op_info; CryptoDevBackendAsymOpInfo *asym_op_info; -enum CryptoDevBackendAlgType algtype = op_info->algtype; +QCryptodevBackendAlgType algtype = op_info->algtype; int status = -VIRTIO_CRYPTO_ERR; Error *local_error = NULL; @@ -549,11 +549,11 @@ static int cryptodev_builtin_operation( } sess = builtin->sessions[op_info->session_id]; -if (algtype == CRYPTODEV_BACKEND_ALG_SYM) { +if (algtype == QCRYPTODEV_BACKEND_ALG_SYM) { sym_op_info = op_info->u.sym_op_info; status = cryptodev_builtin_sym_operation(sess, sym_op_info, &local_error); -} else if (algtype == CRYPTODEV_BACKEND_ALG_ASYM) { +} else if (algtype == QCRYPTODEV_BACKEND_ALG_ASYM) { asym_op_info = op_info->u.asym_op_info; status = cryptodev_builtin_asym_operation(sess, op_info->op_code, asym_op_info, &local_error); diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c index de3d1867c5..53a932b58d 100644 --- a/backends/cryptodev-lkcf.c +++ b/backends/cryptodev-lkcf.c @@ -477,7 +477,7 @@ static int cryptodev_lkcf_operation( CryptoDevBackendLKCF *lkcf = CRYPTODEV_BACKEND_LKCF(backend); CryptoDevBackendLKCFSession *sess; -enum CryptoDevBackendAlgType algtype = op_info->algtype; +QCryptodevBackendAlgType algtype = op_info->algtype; CryptoDevLKCFTask *task; if (op_info->session_id >= MAX_SESSIONS || @@ -488,7 +488,7 @@ static int cryptodev_lkcf_operation( } sess = lkcf->sess[op_info->session_id]; -if (algtype != CRYPTODEV_BACKEND_ALG_ASYM) { +if (algtype != QCRYPTODEV_BACKEND_ALG_ASYM) { error_report("algtype not supported: %u", algtype); return -VIRTIO_CRYPTO_NOTSUPP; } diff --git a/backends/cryptodev.c b/backends/cryptodev.c index 81941af816..c2a053db0e 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -120,10 +120,10 @@ int cryptodev_backend_crypto_operation( { VirtIOCryptoReq *req = opaque1; CryptoDevBackendOpInfo *op_info = &req->op_info; -enum CryptoDevBackendAlgType algtype = req->flags; +QCryptodevBackendAlgType algtype = req->flags; -if ((algtype != CRYPTODEV_BACKEND_ALG_SYM) -
[PULL 43/73] acpi: pci: add EDSM method to DSDT
From: Igor Mammedov it's a helper method for acpi-index support on PCI buses that do no support or have disabled ACPI PCI hotplug or for non-hotpluggble endpoint devices. (like non-hotpluggble NICs, integrated endpoints and later for machines that do not support ACPI PCI hotplug) no functional change, commit adds only EDSM method in DSDT without any users. (the follow up patches will use it) Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-18-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 54 1 file changed, 54 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index d8ec91b8e3..6f5501fb74 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -399,6 +399,58 @@ static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) aml_append(ctx, ifctx1); } +static Aml *aml_pci_edsm(void) +{ +Aml *method, *ifctx; +Aml *zero = aml_int(0); +Aml *func = aml_arg(2); +Aml *ret = aml_local(0); +Aml *aidx = aml_local(1); +Aml *params = aml_arg(4); + +method = aml_method("EDSM", 5, AML_SERIALIZED); + +/* get supported functions */ +ifctx = aml_if(aml_equal(func, zero)); +{ +/* 1: have supported functions */ +/* 7: support for function 7 */ +const uint8_t caps = 1 | BIT(7); +build_append_pci_dsm_func0_common(ifctx, ret); +aml_append(ifctx, aml_store(aml_int(caps), aml_index(ret, zero))); +aml_append(ifctx, aml_return(ret)); +} +aml_append(method, ifctx); + +/* handle specific functions requests */ +/* + * PCI Firmware Specification 3.1 + * 4.6.7. _DSM for Naming a PCI or PCI Express Device Under + *Operating Systems + */ +ifctx = aml_if(aml_equal(func, aml_int(7))); +{ + Aml *pkg = aml_package(2); + aml_append(pkg, zero); + /* optional, if not impl. should return null string */ + aml_append(pkg, aml_string("%s", "")); + aml_append(ifctx, aml_store(pkg, ret)); + + /* +* IASL is fine when initializing Package with computational data, +* however it makes guest unhappy /it fails to process such AML/. +* So use runtime assignment to set acpi-index after initializer +* to make OSPM happy. +*/ + aml_append(ifctx, + aml_store(aml_derefof(aml_index(params, aml_int(0))), aidx)); + aml_append(ifctx, aml_store(aidx, aml_index(ret, zero))); + aml_append(ifctx, aml_return(ret)); +} +aml_append(method, ifctx); + +return method; +} static void build_append_pcihp_notify_entry(Aml *method, int slot) { @@ -1398,6 +1450,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_HID", aml_eisaid("PNP0A03"))); aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); +aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); aml_append(dsdt, sb_scope); @@ -1413,6 +1466,7 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, aml_append(dev, aml_name_decl("_ADR", aml_int(0))); aml_append(dev, aml_name_decl("_UID", aml_int(pcmc->pci_root_uid))); aml_append(dev, build_q35_osc_method(!pm->pcihp_bridge_en)); +aml_append(dev, aml_pci_edsm()); aml_append(sb_scope, dev); if (mcfg_valid) { aml_append(sb_scope, build_q35_dram_controller(&mcfg)); -- MST
[PULL 37/73] pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled
From: Igor Mammedov commit [1] added ability to disable ACPI PCI hotplug on hostbridge but forgot to take into account that it should disable all ACPI hotplug machinery in case both hostbridge and bridge hotplug are disabled. Commit [2] tried to fix that, however it forgot to remove hotplug_handler override which hands hotplug control over to piix4 hotplug controller (uninitialized after [2]). As result at the time bridge is plugged in, its default (SHPC) hotplug handler is replaced by piix4 one in acpi_pcihp_device_plug_cb() ... if (!s->legacy_piix && ... qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev)); which is acting on uninitialized s->legacy_piix value (0 by default) that was supposed to be initialized by acpi_pcihp_init(), that is no longer called due to following condition being false: piix4_acpi_system_hot_add_init() if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { and the bridge ends up with piix4 as hotplug handler instead of shpc one. Followup hotplug on that bridge as result yields piix4 specific error: Error: Unsupported bus. Bus doesn't have property 'acpi-pcihp-bsel' set 1) 3d7e78aa777 (Introduce a new flag for i440fx to disable PCI hotplug on the root bus) 2) df4008c9c59 (piix4: don't reserve hw resources when hotplug is off globally) Fixes: df4008c9c59 (piix4: don't reserve hw resources when hotplug is off globally) Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-12-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/piix4.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/acpi/piix4.c b/hw/acpi/piix4.c index eac2125abd..8fc422829a 100644 --- a/hw/acpi/piix4.c +++ b/hw/acpi/piix4.c @@ -492,7 +492,6 @@ static void piix4_pm_realize(PCIDevice *dev, Error **errp) piix4_acpi_system_hot_add_init(pci_address_space_io(dev), pci_get_bus(dev), s); -qbus_set_hotplug_handler(BUS(pci_get_bus(dev)), OBJECT(s)); piix4_pm_add_properties(s); } @@ -564,6 +563,7 @@ static void piix4_acpi_system_hot_add_init(MemoryRegion *parent, if (s->use_acpi_hotplug_bridge || s->use_acpi_root_pci_hotplug) { acpi_pcihp_init(OBJECT(s), &s->acpi_pci_hotplug, bus, parent, s->use_acpi_hotplug_bridge, ACPI_PCIHP_ADDR_PIIX4); +qbus_set_hotplug_handler(BUS(pci_get_bus(PCI_DEVICE(s))), OBJECT(s)); } s->cpu_hotplug_legacy = true; -- MST
[PULL 66/73] hw/cxl: Fix endian issues in CXL RAS capability defaults / masks
From: Jonathan Cameron As these are about to be modified, fix the endian handle for this set of registers rather than making it worse. Note that CXL is currently only supported in QEMU on x86 (arm64 patches out of tree) so we aren't going to yet hit an problems with big endian. However it is good to avoid making things worse for that support in the future. Reviewed-by: Dave Jiang Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jonathan Cameron Message-Id: <20230302133709.30373-7-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/cxl/cxl-component-utils.c | 18 +- 1 file changed, 9 insertions(+), 9 deletions(-) diff --git a/hw/cxl/cxl-component-utils.c b/hw/cxl/cxl-component-utils.c index 3edd303a33..737b4764b9 100644 --- a/hw/cxl/cxl-component-utils.c +++ b/hw/cxl/cxl-component-utils.c @@ -141,17 +141,17 @@ static void ras_init_common(uint32_t *reg_state, uint32_t *write_msk) * Error status is RW1C but given bits are not yet set, it can * be handled as RO. */ -reg_state[R_CXL_RAS_UNC_ERR_STATUS] = 0; +stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_STATUS, 0); /* Bits 12-13 and 17-31 reserved in CXL 2.0 */ -reg_state[R_CXL_RAS_UNC_ERR_MASK] = 0x1cfff; -write_msk[R_CXL_RAS_UNC_ERR_MASK] = 0x1cfff; -reg_state[R_CXL_RAS_UNC_ERR_SEVERITY] = 0x1cfff; -write_msk[R_CXL_RAS_UNC_ERR_SEVERITY] = 0x1cfff; -reg_state[R_CXL_RAS_COR_ERR_STATUS] = 0; -reg_state[R_CXL_RAS_COR_ERR_MASK] = 0x7f; -write_msk[R_CXL_RAS_COR_ERR_MASK] = 0x7f; +stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff); +stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_MASK, 0x1cfff); +stl_le_p(reg_state + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff); +stl_le_p(write_msk + R_CXL_RAS_UNC_ERR_SEVERITY, 0x1cfff); +stl_le_p(reg_state + R_CXL_RAS_COR_ERR_STATUS, 0); +stl_le_p(reg_state + R_CXL_RAS_COR_ERR_MASK, 0x7f); +stl_le_p(write_msk + R_CXL_RAS_COR_ERR_MASK, 0x7f); /* CXL switches and devices must set */ -reg_state[R_CXL_RAS_ERR_CAP_CTRL] = 0x00; +stl_le_p(reg_state + R_CXL_RAS_ERR_CAP_CTRL, 0x00); } static void hdm_init_common(uint32_t *reg_state, uint32_t *write_msk, -- MST
[PULL 63/73] hw/pci-bridge/cxl_root_port: Wire up AER
From: Jonathan Cameron We are missing necessary config write handling for AER emulation in the CXL root port. Add it based on pcie_root_port.c Signed-off-by: Jonathan Cameron Reviewed-by: Dave Jiang Message-Id: <20230302133709.30373-4-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/pci-bridge/cxl_root_port.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c index 6664783974..00195257f7 100644 --- a/hw/pci-bridge/cxl_root_port.c +++ b/hw/pci-bridge/cxl_root_port.c @@ -187,12 +187,15 @@ static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { uint16_t slt_ctl, slt_sta; +uint32_t root_cmd = +pci_get_long(d->config + d->exp.aer_cap + PCI_ERR_ROOT_COMMAND); pcie_cap_slot_get(d, &slt_ctl, &slt_sta); pci_bridge_write_config(d, address, val, len); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len); pcie_aer_write_config(d, address, val, len); +pcie_aer_root_write_config(d, address, val, len, root_cmd); cxl_rp_dvsec_write_config(d, address, val, len); } -- MST
[PULL 73/73] virtio: refresh vring region cache after updating a virtqueue size
From: Carlos López When a virtqueue size is changed by the guest via virtio_queue_set_num(), its region cache is not automatically updated. If the size was increased, this could lead to accessing the cache out of bounds. For example, in vring_get_used_event(): static inline uint16_t vring_get_used_event(VirtQueue *vq) { return vring_avail_ring(vq, vq->vring.num); } static inline uint16_t vring_avail_ring(VirtQueue *vq, int i) { VRingMemoryRegionCaches *caches = vring_get_region_caches(vq); hwaddr pa = offsetof(VRingAvail, ring[i]); if (!caches) { return 0; } return virtio_lduw_phys_cached(vq->vdev, &caches->avail, pa); } vq->vring.num will be greater than caches->avail.len, which will trigger a failed assertion down the call path of virtio_lduw_phys_cached(). Fix this by calling virtio_queue_update_rings() after virtio_queue_set_num() if we are not already calling virtio_queue_set_rings(). Signed-off-by: Carlos López Message-Id: <20230302101447.4499-1-clo...@suse.de> Acked-by: Thomas Huth Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/s390x/virtio-ccw.c | 1 + hw/virtio/virtio-mmio.c | 5 ++--- hw/virtio/virtio-pci.c | 1 + 3 files changed, 4 insertions(+), 3 deletions(-) diff --git a/hw/s390x/virtio-ccw.c b/hw/s390x/virtio-ccw.c index e33e5207ab..89891ac58a 100644 --- a/hw/s390x/virtio-ccw.c +++ b/hw/s390x/virtio-ccw.c @@ -237,6 +237,7 @@ static int virtio_ccw_set_vqs(SubchDev *sch, VqInfoBlock *info, return -EINVAL; } virtio_queue_set_num(vdev, index, num); +virtio_queue_update_rings(vdev, index); } else if (virtio_queue_get_num(vdev, index) > num) { /* Fail if we don't have a big enough queue. */ return -EINVAL; diff --git a/hw/virtio/virtio-mmio.c b/hw/virtio/virtio-mmio.c index 23ba625eb6..c74822308f 100644 --- a/hw/virtio/virtio-mmio.c +++ b/hw/virtio/virtio-mmio.c @@ -350,10 +350,9 @@ static void virtio_mmio_write(void *opaque, hwaddr offset, uint64_t value, case VIRTIO_MMIO_QUEUE_NUM: trace_virtio_mmio_queue_write(value, VIRTQUEUE_MAX_SIZE); virtio_queue_set_num(vdev, vdev->queue_sel, value); +virtio_queue_update_rings(vdev, vdev->queue_sel); -if (proxy->legacy) { -virtio_queue_update_rings(vdev, vdev->queue_sel); -} else { +if (!proxy->legacy) { proxy->vqs[vdev->queue_sel].num = value; } break; diff --git a/hw/virtio/virtio-pci.c b/hw/virtio/virtio-pci.c index 247325c193..a0a2f2c965 100644 --- a/hw/virtio/virtio-pci.c +++ b/hw/virtio/virtio-pci.c @@ -1554,6 +1554,7 @@ static void virtio_pci_common_write(void *opaque, hwaddr addr, proxy->vqs[vdev->queue_sel].num = val; virtio_queue_set_num(vdev, vdev->queue_sel, proxy->vqs[vdev->queue_sel].num); +virtio_queue_update_rings(vdev, vdev->queue_sel); break; case VIRTIO_PCI_COMMON_Q_MSIX: vector = virtio_queue_vector(vdev, vdev->queue_sel); -- MST
[PULL 49/73] tests: acpi: whitelist DSDT before exposing non zero functions
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-24-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 37 + 1 file changed, 37 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..8911b10650 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,38 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT", +"tests/data/acpi/pc/DSDT.acpierst", +"tests/data/acpi/pc/DSDT.acpihmat", +"tests/data/acpi/pc/DSDT.bridge", +"tests/data/acpi/pc/DSDT.cphp", +"tests/data/acpi/pc/DSDT.dimmpxm", +"tests/data/acpi/pc/DSDT.hpbridge", +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/pc/DSDT.ipmikcs", +"tests/data/acpi/pc/DSDT.memhp", +"tests/data/acpi/pc/DSDT.nohpet", +"tests/data/acpi/pc/DSDT.numamem", +"tests/data/acpi/pc/DSDT.roothp", +"tests/data/acpi/q35/DSDT", +"tests/data/acpi/q35/DSDT.acpierst", +"tests/data/acpi/q35/DSDT.acpihmat", +"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", +"tests/data/acpi/q35/DSDT.applesmc", +"tests/data/acpi/q35/DSDT.bridge", +"tests/data/acpi/q35/DSDT.core-count2", +"tests/data/acpi/q35/DSDT.cphp", +"tests/data/acpi/q35/DSDT.cxl", +"tests/data/acpi/q35/DSDT.dimmpxm", +"tests/data/acpi/q35/DSDT.ipmibt", +"tests/data/acpi/q35/DSDT.ipmismbus", +"tests/data/acpi/q35/DSDT.ivrs", +"tests/data/acpi/q35/DSDT.memhp", +"tests/data/acpi/q35/DSDT.mmio64", +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.noacpihp", +"tests/data/acpi/q35/DSDT.nohpet", +"tests/data/acpi/q35/DSDT.numamem", +"tests/data/acpi/q35/DSDT.pvpanic-isa", +"tests/data/acpi/q35/DSDT.tis.tpm12", +"tests/data/acpi/q35/DSDT.tis.tpm2", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/DSDT.xapic", -- MST
[PULL 61/73] hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
From: Jonathan Cameron This register in AER should be both writeable and should have a default value with a couple of the errors masked including the Uncorrectable Internal Error used by CXL for it's error reporting. Signed-off-by: Jonathan Cameron Reviewed-by: Dave Jiang Message-Id: <20230302133709.30373-2-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- include/hw/pci/pcie_regs.h | 3 +++ hw/pci/pcie_aer.c | 4 2 files changed, 7 insertions(+) diff --git a/include/hw/pci/pcie_regs.h b/include/hw/pci/pcie_regs.h index 1fe0bdd25b..4972106c42 100644 --- a/include/hw/pci/pcie_regs.h +++ b/include/hw/pci/pcie_regs.h @@ -141,6 +141,9 @@ typedef enum PCIExpLinkWidth { PCI_ERR_UNC_ATOP_EBLOCKED |\ PCI_ERR_UNC_TLP_PRF_BLOCKED) +#define PCI_ERR_UNC_MASK_DEFAULT(PCI_ERR_UNC_INTN | \ + PCI_ERR_UNC_TLP_PRF_BLOCKED) + #define PCI_ERR_UNC_SEVERITY_DEFAULT(PCI_ERR_UNC_DLP | \ PCI_ERR_UNC_SDN | \ PCI_ERR_UNC_FCP | \ diff --git a/hw/pci/pcie_aer.c b/hw/pci/pcie_aer.c index 9a19be44ae..909e027d99 100644 --- a/hw/pci/pcie_aer.c +++ b/hw/pci/pcie_aer.c @@ -112,6 +112,10 @@ int pcie_aer_init(PCIDevice *dev, uint8_t cap_ver, uint16_t offset, pci_set_long(dev->w1cmask + offset + PCI_ERR_UNCOR_STATUS, PCI_ERR_UNC_SUPPORTED); +pci_set_long(dev->config + offset + PCI_ERR_UNCOR_MASK, + PCI_ERR_UNC_MASK_DEFAULT); +pci_set_long(dev->wmask + offset + PCI_ERR_UNCOR_MASK, + PCI_ERR_UNC_SUPPORTED); pci_set_long(dev->config + offset + PCI_ERR_UNCOR_SEVER, PCI_ERR_UNC_SEVERITY_DEFAULT); -- MST
[PULL 70/73] hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
From: Jonathan Cameron The CXL r3.0 specification allows for there to be no HDM decoders on CXL Host Bridges if they have only a single root port. Instead, all accesses directed to the host bridge (as specified in CXL Fixed Memory Windows) are assumed to be routed to the single root port. Linux currently assumes this implementation choice. So to simplify testing, make QEMU emulation also default to no HDM decoders under these particular circumstances, but provide a hdm_for_passthrough boolean option to have HDM decoders as previously. Technically this is breaking backwards compatibility, but given the only known software stack used with the QEMU emulation is the Linux kernel and this configuration did not work before this change, there are unlikely to be any complaints that it now works. The option is retained to allow testing of software that does allow for these HDM decoders to exist, once someone writes it. Reported-by: Fan Ni Reviewed-by: Fan Ni Tested-by: Fan Ni Signed-off-by: Jonathan Cameron -- v2: Pick up and fix typo in tag from Fan Ni Message-Id: <20230227153128.8164-3-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/cxl/cxl.h| 1 + include/hw/cxl/cxl_component.h | 1 + include/hw/pci/pci_bridge.h | 1 + hw/cxl/cxl-host.c | 31 hw/pci-bridge/pci_expander_bridge.c | 44 + 5 files changed, 61 insertions(+), 17 deletions(-) diff --git a/include/hw/cxl/cxl.h b/include/hw/cxl/cxl.h index b161be59b7..b2cffbb364 100644 --- a/include/hw/cxl/cxl.h +++ b/include/hw/cxl/cxl.h @@ -49,6 +49,7 @@ struct CXLHost { PCIHostState parent_obj; CXLComponentState cxl_cstate; +bool passthrough; }; #define TYPE_PXB_CXL_HOST "pxb-cxl-host" diff --git a/include/hw/cxl/cxl_component.h b/include/hw/cxl/cxl_component.h index ec4203b83f..42c7e581a7 100644 --- a/include/hw/cxl/cxl_component.h +++ b/include/hw/cxl/cxl_component.h @@ -247,6 +247,7 @@ static inline hwaddr cxl_decode_ig(int ig) } CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb); +bool cxl_get_hb_passthrough(PCIHostState *hb); void cxl_doe_cdat_init(CXLComponentState *cxl_cstate, Error **errp); void cxl_doe_cdat_release(CXLComponentState *cxl_cstate); diff --git a/include/hw/pci/pci_bridge.h b/include/hw/pci/pci_bridge.h index 63a7521567..81a058bb2c 100644 --- a/include/hw/pci/pci_bridge.h +++ b/include/hw/pci/pci_bridge.h @@ -92,6 +92,7 @@ struct PXBDev { uint8_t bus_nr; uint16_t numa_node; bool bypass_iommu; +bool hdm_for_passthrough; struct cxl_dev { CXLHost *cxl_host_bridge; /* Pointer to a CXLHost */ } cxl; diff --git a/hw/cxl/cxl-host.c b/hw/cxl/cxl-host.c index 3c1ec8732a..6e923ceeaf 100644 --- a/hw/cxl/cxl-host.c +++ b/hw/cxl/cxl-host.c @@ -146,21 +146,28 @@ static PCIDevice *cxl_cfmws_find_device(CXLFixedWindow *fw, hwaddr addr) return NULL; } -hb_cstate = cxl_get_hb_cstate(hb); -if (!hb_cstate) { -return NULL; -} +if (cxl_get_hb_passthrough(hb)) { +rp = pcie_find_port_first(hb->bus); +if (!rp) { +return NULL; +} +} else { +hb_cstate = cxl_get_hb_cstate(hb); +if (!hb_cstate) { +return NULL; +} -cache_mem = hb_cstate->crb.cache_mem_registers; +cache_mem = hb_cstate->crb.cache_mem_registers; -target_found = cxl_hdm_find_target(cache_mem, addr, &target); -if (!target_found) { -return NULL; -} +target_found = cxl_hdm_find_target(cache_mem, addr, &target); +if (!target_found) { +return NULL; +} -rp = pcie_find_port_by_pn(hb->bus, target); -if (!rp) { -return NULL; +rp = pcie_find_port_by_pn(hb->bus, target); +if (!rp) { +return NULL; +} } d = pci_bridge_get_sec_bus(PCI_BRIDGE(rp))->devices[0]; diff --git a/hw/pci-bridge/pci_expander_bridge.c b/hw/pci-bridge/pci_expander_bridge.c index e752a21292..ead33f0c05 100644 --- a/hw/pci-bridge/pci_expander_bridge.c +++ b/hw/pci-bridge/pci_expander_bridge.c @@ -15,6 +15,7 @@ #include "hw/pci/pci.h" #include "hw/pci/pci_bus.h" #include "hw/pci/pci_host.h" +#include "hw/pci/pcie_port.h" #include "hw/qdev-properties.h" #include "hw/pci/pci_bridge.h" #include "hw/pci-bridge/pci_expander_bridge.h" @@ -79,6 +80,13 @@ CXLComponentState *cxl_get_hb_cstate(PCIHostState *hb) return &host->cxl_cstate; } +bool cxl_get_hb_passthrough(PCIHostState *hb) +{ +CXLHost *host = PXB_CXL_HOST(hb); + +return host->passthrough; +} + static int pxb_bus_num(PCIBus *bus) { PXBDev *pxb = convert_to_pxb(bus->parent_dev); @@ -289,15 +297,32 @@ static int pxb_map_irq_fn(PCIDevice *pci_dev, int pin) return pin - PCI_SLOT(pxb->devfn); } -static void pxb_dev_reset(DeviceState *dev) +static void pxb_cxl_dev_reset(DeviceState *d
[PULL 30/73] tests: acpi: update expected blobs
From: Igor Mammedov expected changes: Basically adds devices present on root bus in form: Device (SXX) { Name (_ADR, 0x) // _ADR: Address } On top of that For q35.noacpihp, all ACPI PCI hotplug AML is removed and _OSC get native hotplug enabled: CreateDWordField (Arg3, 0x04, CDW2) CreateDWordField (Arg3, 0x08, CDW3) Local0 = CDW3 /* \_SB_.PCI0._OSC.CDW3 */ -Local0 &= 0x1E +Local0 &= 0x1F If ((Arg1 != One)) { CDW1 |= 0x08 Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-5-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 2 -- tests/data/acpi/pc/DSDT.hpbrroot| Bin 3081 -> 3115 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 8252 -> 7932 bytes 3 files changed, 2 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index b2c5312871..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,3 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/q35/DSDT.noacpihp", diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot index a71ed4fbaa14be655c28a5e03e50157b4476e480..d77752960285a5afa6d0c0a04e400842f6acd2ed 100644 GIT binary patch delta 100 zcmeB_SS`Wj66_M9&BMUJ_;DlGJx(rXm6-Tor+5Kx<;|Zse=<548N_qMJGuk`Rj@Eb YH}MA>S-=HY!2-qz6>JazgbH>B01xpO0 delta 66 zcmZ22(J8^@66_Mf$-}_Fcyc4xJx(r1rI`3&r+5KR#m%2Me=^D$TEuh2JGuk`RWLI| NH}MA>8NdZt7ywGL58eO( diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp index d68c472b460e4609a64ea67de3c4cebfca76164d..f35338db30a44638cc3a55d2870e0e377af4246f 100644 GIT binary patch delta 160 zcmdnv@W+@xe~< z0!|8(r^?wU^9LJR#B;8NdZtAOZ*#tY86SgbFr@073;jSil6K Lf@AYVxj04uw-F~b delta 485 zcmexkyT^gcCDVuVVj)AP$0<6$dFLLkhnl<(&P+5VJ?9S<|m&9n^yTw z6o2I_dDz)^Nx}m5shM0%OA-n|mNa+dFfjN7Nk)bwpq|>vNeq*dc>V(cLv12sVr^n2 zBNsbEVnJd@0s{k3uj=G1F7^T;Rwf2spgnLCAO;j9K~!xHVN{c1@)g}&BhAm~72V{; z65tUK#1Ze|>B1Y}7hvFMV8*}^9}40*dn$P3mlWibrYjVs7U!21C8rhx<$^;Txwtvv zor8h}dAYdU84vIr;9-=Q+$odE^Cozjb`K(;E8t+a1~*TcQr6% F000aMj?@4E -- MST
[PULL 71/73] hw/virtio/vhost-user: avoid using unitialized errp
From: Albert Esteve During protocol negotiation, when we the QEMU stub does not support a backend with F_CONFIG, it throws a warning and supresses the VHOST_USER_PROTOCOL_F_CONFIG bit. However, the warning uses warn_reportf_err macro and passes an unitialized errp pointer. However, the macro tries to edit the 'msg' member of the unitialized Error and segfaults. Instead, just use warn_report, which prints a warning message directly to the output. Fixes: 5653493 ("hw/virtio/vhost-user: don't suppress F_CONFIG when supported") Signed-off-by: Albert Esteve Message-Id: <20230302121719.9390-1-aest...@redhat.com> Reviewed-by: Peter Maydell Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-user.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/hw/virtio/vhost-user.c b/hw/virtio/vhost-user.c index 8968541514..e5285df4ba 100644 --- a/hw/virtio/vhost-user.c +++ b/hw/virtio/vhost-user.c @@ -2031,8 +2031,8 @@ static int vhost_user_backend_init(struct vhost_dev *dev, void *opaque, } else { if (virtio_has_feature(protocol_features, VHOST_USER_PROTOCOL_F_CONFIG)) { -warn_reportf_err(*errp, "vhost-user backend supports " - "VHOST_USER_PROTOCOL_F_CONFIG but QEMU does not."); +warn_report("vhost-user backend supports " +"VHOST_USER_PROTOCOL_F_CONFIG but QEMU does not."); protocol_features &= ~(1ULL << VHOST_USER_PROTOCOL_F_CONFIG); } } -- MST
[PULL 26/73] vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices
From: Eugenio Pérez vhost-vdpa devices can return this feature now that blockers have been set in case some features are not met. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230303172445.1089785-15-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 3 +-- 1 file changed, 1 insertion(+), 2 deletions(-) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 48ffb67a34..bc6bad23d5 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -1294,10 +1294,9 @@ static int vhost_vdpa_set_vring_call(struct vhost_dev *dev, static int vhost_vdpa_get_features(struct vhost_dev *dev, uint64_t *features) { -struct vhost_vdpa *v = dev->opaque; int ret = vhost_vdpa_get_dev_features(dev, features); -if (ret == 0 && v->shadow_vqs_enabled) { +if (ret == 0) { /* Add SVQ logging capabilities */ *features |= BIT_ULL(VHOST_F_LOG_ALL); } -- MST
[PULL 38/73] pci: fix 'hotplugglable' property behavior
From: Igor Mammedov Currently the property may flip its state during VM bring up or just doesn't work as the name implies. In particular with PCIE root port that has 'hotplug={on|off}' property, and when it's turned off, one would expect 'hotpluggable' == false for any devices attached to it. Which is not the case since qbus_is_hotpluggable() used by the property just checks for presence of any hotplug_handler set on bus. The problem is that name BusState::hotplug_handler from its inception is misnomer, as it handles not only hotplug but also in many cases coldplug as well (i.e. generic wiring interface), and it's fine to have hotplug_handler set on bus while it doesn't support hotplug (ex. pcie-slot with hotplug=off). Another case of root port flipping 'hotpluggable' state when ACPI PCI hotplug is enabled in this case root port with 'hotplug=off' starts as hotpluggable and then later on, pcihp hotplug_handler clears hotplug_handler explicitly after checking root port's 'hotplug' property. So root-port hotpluggablity check sort of works if pcihp is enabled but is broken if pcihp is disabled. One way to deal with the issue is to ask hotplug_handler if bus it controls is hotpluggable or not. To do that add is_hotpluggable_bus() hook to HotplugHandler interface and use it in 'hotpluggable' property + teach pcie-slot to actually look into 'hotplug' property state before deciding if bus is hotpluggable. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-13-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/hotplug.h | 2 ++ include/hw/qdev-core.h | 13 - hw/pci/pcie_port.c | 8 3 files changed, 22 insertions(+), 1 deletion(-) diff --git a/include/hw/hotplug.h b/include/hw/hotplug.h index e15f59c8b3..a9840ed485 100644 --- a/include/hw/hotplug.h +++ b/include/hw/hotplug.h @@ -48,6 +48,7 @@ typedef void (*hotplug_fn)(HotplugHandler *plug_handler, * @unplug: unplug callback. * Used for device removal with devices that implement * asynchronous and synchronous (surprise) removal. + * @is_hotpluggable_bus: called to check if bus/its parent allow hotplug on bus */ struct HotplugHandlerClass { /* */ @@ -58,6 +59,7 @@ struct HotplugHandlerClass { hotplug_fn plug; hotplug_fn unplug_request; hotplug_fn unplug; +bool (*is_hotpluggable_bus)(HotplugHandler *plug_handler, BusState *bus); }; /** diff --git a/include/hw/qdev-core.h b/include/hw/qdev-core.h index f5b3b2f89a..bd50ad5ee1 100644 --- a/include/hw/qdev-core.h +++ b/include/hw/qdev-core.h @@ -812,7 +812,18 @@ void qbus_set_bus_hotplug_handler(BusState *bus); static inline bool qbus_is_hotpluggable(BusState *bus) { - return bus->hotplug_handler; +HotplugHandler *plug_handler = bus->hotplug_handler; +bool ret = !!plug_handler; + +if (plug_handler) { +HotplugHandlerClass *hdc; + +hdc = HOTPLUG_HANDLER_GET_CLASS(plug_handler); +if (hdc->is_hotpluggable_bus) { +ret = hdc->is_hotpluggable_bus(plug_handler, bus); +} +} +return ret; } /** diff --git a/hw/pci/pcie_port.c b/hw/pci/pcie_port.c index 65a397ad23..000633fec1 100644 --- a/hw/pci/pcie_port.c +++ b/hw/pci/pcie_port.c @@ -161,6 +161,13 @@ PCIDevice *pcie_find_port_by_pn(PCIBus *bus, uint8_t pn) return NULL; } +static bool pcie_slot_is_hotpluggbale_bus(HotplugHandler *plug_handler, + BusState *bus) +{ +PCIESlot *s = PCIE_SLOT(bus->parent); +return s->hotplug; +} + static const TypeInfo pcie_port_type_info = { .name = TYPE_PCIE_PORT, .parent = TYPE_PCI_BRIDGE, @@ -188,6 +195,7 @@ static void pcie_slot_class_init(ObjectClass *oc, void *data) hc->plug = pcie_cap_slot_plug_cb; hc->unplug = pcie_cap_slot_unplug_cb; hc->unplug_request = pcie_cap_slot_unplug_request_cb; +hc->is_hotpluggable_bus = pcie_slot_is_hotpluggbale_bus; } static const TypeInfo pcie_slot_type_info = { -- MST
[PULL 23/73] vdpa: block migration if device has unsupported features
From: Eugenio Pérez A vdpa net device must initialize with SVQ in order to be migratable at this moment, and initialization code verifies some conditions. If the device is not initialized with the x-svq parameter, it will not expose _F_LOG so the vhost subsystem will block VM migration from its initialization. Next patches change this, so we need to verify migration conditions differently. QEMU only supports a subset of net features in SVQ, and it cannot migrate state that cannot track or restore in the destination. Add a migration blocker if the device offers an unsupported feature. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-12-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- net/vhost-vdpa.c | 12 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index 533ba54317..1089c35959 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -795,7 +795,8 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer, int nvqs, bool is_datapath, bool svq, - struct vhost_vdpa_iova_range iova_range) + struct vhost_vdpa_iova_range iova_range, + uint64_t features) { NetClientState *nc = NULL; VhostVDPAState *s; @@ -818,7 +819,10 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer, s->vhost_vdpa.shadow_vqs_enabled = svq; s->vhost_vdpa.iova_range = iova_range; s->vhost_vdpa.shadow_data = svq; -if (!is_datapath) { +if (queue_pair_index == 0) { +vhost_vdpa_net_valid_svq_features(features, + &s->vhost_vdpa.migration_blocker); +} else if (!is_datapath) { s->cvq_cmd_out_buffer = qemu_memalign(qemu_real_host_page_size(), vhost_vdpa_net_cvq_cmd_page_len()); memset(s->cvq_cmd_out_buffer, 0, vhost_vdpa_net_cvq_cmd_page_len()); @@ -956,7 +960,7 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name, for (i = 0; i < queue_pairs; i++) { ncs[i] = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name, vdpa_device_fd, i, 2, true, opts->x_svq, - iova_range); + iova_range, features); if (!ncs[i]) goto err; } @@ -964,7 +968,7 @@ int net_init_vhost_vdpa(const Netdev *netdev, const char *name, if (has_cvq) { nc = net_vhost_vdpa_init(peer, TYPE_VHOST_VDPA, name, vdpa_device_fd, i, 1, false, - opts->x_svq, iova_range); + opts->x_svq, iova_range, features); if (!nc) goto err; } -- MST
[PULL 27/73] Revert "tests/qtest: Check for devices in bios-tables-test"
From: Igor Mammedov This reverts commit c471eb4f40445908c1be7bb11a37ac676a0edae7. which broke acpi tables test and rebuild due to skipping some tests even thought none of devices tests depend on weren't disabled. As result it leads to some expected tables not being updated, merge conflicts and tests failure. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-2-imamm...@redhat.com> Acked-by: Fabiano Rosas Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 75 ++ 1 file changed, 4 insertions(+), 71 deletions(-) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index d29a4e47af..d8c8cda58e 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1008,12 +1008,6 @@ static void test_acpi_q35_multif_bridge(void) .machine = MACHINE_Q35, .variant = ".multi-bridge", }; - -if (!qtest_has_device("pcie-root-port")) { -g_test_skip("Device pcie-root-port is not available"); -goto out; -} - test_vm_prepare("-S" " -device virtio-balloon,id=balloon0,addr=0x4.0x2" " -device pcie-root-port,id=rp0,multifunction=on," @@ -1049,7 +1043,6 @@ static void test_acpi_q35_multif_bridge(void) /* check that reboot/reset doesn't change any ACPI tables */ qtest_qmp_send(data.qts, "{'execute':'system_reset' }"); process_acpi_tables(&data); -out: free_test_data(&data); } @@ -1403,11 +1396,6 @@ static void test_acpi_tcg_dimm_pxm(const char *machine) { test_data data; -if (!qtest_has_device("nvdimm")) { -g_test_skip("Device nvdimm is not available"); -return; -} - memset(&data, 0, sizeof(data)); data.machine = machine; data.variant = ".dimmpxm"; @@ -1456,11 +1444,6 @@ static void test_acpi_virt_tcg_memhp(void) .scan_len = 256ULL * 1024 * 1024, }; -if (!qtest_has_device("nvdimm")) { -g_test_skip("Device nvdimm is not available"); -goto out; -} - data.variant = ".memhp"; test_acpi_one(" -machine nvdimm=on" " -cpu cortex-a57" @@ -1474,7 +1457,7 @@ static void test_acpi_virt_tcg_memhp(void) " -device pc-dimm,id=dimm0,memdev=ram2,node=0" " -device nvdimm,id=dimm1,memdev=nvm0,node=1", &data); -out: + free_test_data(&data); } @@ -1492,11 +1475,6 @@ static void test_acpi_microvm_tcg(void) { test_data data; -if (!qtest_has_device("virtio-blk-device")) { -g_test_skip("Device virtio-blk-device is not available"); -return; -} - test_acpi_microvm_prepare(&data); test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=off", &data); @@ -1507,11 +1485,6 @@ static void test_acpi_microvm_usb_tcg(void) { test_data data; -if (!qtest_has_device("virtio-blk-device")) { -g_test_skip("Device virtio-blk-device is not available"); -return; -} - test_acpi_microvm_prepare(&data); data.variant = ".usb"; test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,usb=on,rtc=off", @@ -1523,11 +1496,6 @@ static void test_acpi_microvm_rtc_tcg(void) { test_data data; -if (!qtest_has_device("virtio-blk-device")) { -g_test_skip("Device virtio-blk-device is not available"); -return; -} - test_acpi_microvm_prepare(&data); data.variant = ".rtc"; test_acpi_one(" -machine microvm,acpi=on,ioapic2=off,rtc=on", @@ -1539,11 +1507,6 @@ static void test_acpi_microvm_pcie_tcg(void) { test_data data; -if (!qtest_has_device("virtio-blk-device")) { -g_test_skip("Device virtio-blk-device is not available"); -return; -} - test_acpi_microvm_prepare(&data); data.variant = ".pcie"; data.tcg_only = true; /* need constant host-phys-bits */ @@ -1556,11 +1519,6 @@ static void test_acpi_microvm_ioapic2_tcg(void) { test_data data; -if (!qtest_has_device("virtio-blk-device")) { -g_test_skip("Device virtio-blk-device is not available"); -return; -} - test_acpi_microvm_prepare(&data); data.variant = ".ioapic2"; test_acpi_one(" -machine microvm,acpi=on,ioapic2=on,rtc=off", @@ -1600,12 +1558,6 @@ static void test_acpi_virt_tcg_pxb(void) .ram_start = 0x4000ULL, .scan_len = 128ULL * 1024 * 1024, }; - -if (!qtest_has_device("pcie-root-port")) { -g_test_skip("Device pcie-root-port is not available"); -goto out; -} - /* * While using -cdrom, the cdrom would auto plugged into pxb-pcie, * the reason is the bus of pxb-pcie is also root bus, it would lead @@ -1624,7 +1576,7 @@ static void test_acpi_virt_tcg_pxb(void) " -cpu cortex-a57" " -device pxb-pcie,bus_nr=128", &data); -out: + free_test_data(&data); } @@ -1812,12
[PULL 20/73] vdpa: add vdpa net migration state notifier
From: Eugenio Pérez This allows net to restart the device backend to configure SVQ on it. Ideally, these changes should not be net specific and they could be done in: * vhost_vdpa_set_features (with VHOST_F_LOG_ALL) * vhost_vdpa_set_vring_addr (with .enable_log) * vhost_vdpa_set_log_base. However, the vdpa net backend is the one with enough knowledge to configure everything because of some reasons: * Queues might need to be shadowed or not depending on its kind (control vs data). * Queues need to share the same map translations (iova tree). Also, there are other problems that may have solutions but complicates the implementation at this stage: * We're basically duplicating vhost_dev_start and vhost_dev_stop, and they could go out of sync. If we want to reuse them, we need a way to skip some function calls to avoid recursiveness (either vhost_ops -> vhost_set_features, vhost_set_vring_addr, ...). * We need to traverse all vhost_dev of a given net device twice: one to stop and get the vq state and another one after the reset to configure properties like address, fd, etc. Because of that it is cleaner to restart the whole net backend and configure again as expected, similar to how vhost-kernel moves between userspace and passthrough. If more kinds of devices need dynamic switching to SVQ we can: * Create a callback struct like VhostOps and move most of the code there. VhostOps cannot be reused since all vdpa backend share them, and to personalize just for networking would be too heavy. * Add a parent struct or link all the vhost_vdpa or vhost_dev structs so we can traverse them. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-9-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- net/vhost-vdpa.c | 72 ++-- 1 file changed, 69 insertions(+), 3 deletions(-) diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index d195f48776..167b43679d 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -26,12 +26,15 @@ #include #include "standard-headers/linux/virtio_net.h" #include "monitor/monitor.h" +#include "migration/migration.h" +#include "migration/misc.h" #include "hw/virtio/vhost.h" /* Todo:need to add the multiqueue support here */ typedef struct VhostVDPAState { NetClientState nc; struct vhost_vdpa vhost_vdpa; +Notifier migration_state; VHostNetState *vhost_net; /* Control commands shadow buffers */ @@ -239,10 +242,59 @@ static VhostVDPAState *vhost_vdpa_net_first_nc_vdpa(VhostVDPAState *s) return DO_UPCAST(VhostVDPAState, nc, nc0); } +static void vhost_vdpa_net_log_global_enable(VhostVDPAState *s, bool enable) +{ +struct vhost_vdpa *v = &s->vhost_vdpa; +VirtIONet *n; +VirtIODevice *vdev; +int data_queue_pairs, cvq, r; + +/* We are only called on the first data vqs and only if x-svq is not set */ +if (s->vhost_vdpa.shadow_vqs_enabled == enable) { +return; +} + +vdev = v->dev->vdev; +n = VIRTIO_NET(vdev); +if (!n->vhost_started) { +return; +} + +data_queue_pairs = n->multiqueue ? n->max_queue_pairs : 1; +cvq = virtio_vdev_has_feature(vdev, VIRTIO_NET_F_CTRL_VQ) ? + n->max_ncs - n->max_queue_pairs : 0; +/* + * TODO: vhost_net_stop does suspend, get_base and reset. We can be smarter + * in the future and resume the device if read-only operations between + * suspend and reset goes wrong. + */ +vhost_net_stop(vdev, n->nic->ncs, data_queue_pairs, cvq); + +/* Start will check migration setup_or_active to configure or not SVQ */ +r = vhost_net_start(vdev, n->nic->ncs, data_queue_pairs, cvq); +if (unlikely(r < 0)) { +error_report("unable to start vhost net: %s(%d)", g_strerror(-r), -r); +} +} + +static void vdpa_net_migration_state_notifier(Notifier *notifier, void *data) +{ +MigrationState *migration = data; +VhostVDPAState *s = container_of(notifier, VhostVDPAState, + migration_state); + +if (migration_in_setup(migration)) { +vhost_vdpa_net_log_global_enable(s, true); +} else if (migration_has_failed(migration)) { +vhost_vdpa_net_log_global_enable(s, false); +} +} + static void vhost_vdpa_net_data_start_first(VhostVDPAState *s) { struct vhost_vdpa *v = &s->vhost_vdpa; +add_migration_state_change_notifier(&s->migration_state); if (v->shadow_vqs_enabled) { v->iova_tree = vhost_iova_tree_new(v->iova_range.first, v->iova_range.last); @@ -256,6 +308,15 @@ static int vhost_vdpa_net_data_start(NetClientState *nc) assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA); +if (s->always_svq || +migration_is_setup_or_active(migrate_get_current()->state)) { +v->shadow_vqs_enabled = true; +v->shadow_data = true; +
[PULL 67/73] hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use.
From: Jonathan Cameron This infrastructure will be reused for CXL RAS error injection in patches that follow. Reviewed-by: Dave Jiang Reviewed-by: Philippe Mathieu-Daudé Signed-off-by: Jonathan Cameron Message-Id: <20230302133709.30373-8-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/pci/pci-internal.h | 1 - include/hw/pci/pcie_aer.h | 1 + 2 files changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/pci/pci-internal.h b/hw/pci/pci-internal.h index 2ea356bdf5..a7d6d8a732 100644 --- a/hw/pci/pci-internal.h +++ b/hw/pci/pci-internal.h @@ -20,6 +20,5 @@ void pcibus_dev_print(Monitor *mon, DeviceState *dev, int indent); int pcie_aer_parse_error_string(const char *error_name, uint32_t *status, bool *correctable); -int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err); #endif diff --git a/include/hw/pci/pcie_aer.h b/include/hw/pci/pcie_aer.h index 65e71d98fe..1234fdc4e2 100644 --- a/include/hw/pci/pcie_aer.h +++ b/include/hw/pci/pcie_aer.h @@ -100,4 +100,5 @@ void pcie_aer_root_write_config(PCIDevice *dev, uint32_t addr, uint32_t val, int len, uint32_t root_cmd_prev); +int pcie_aer_inject_error(PCIDevice *dev, const PCIEAERErr *err); #endif /* QEMU_PCIE_AER_H */ -- MST
[PULL 52/73] tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-27-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 2 ++ 1 file changed, 2 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..ad2b429de8 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,3 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.noacpihp", -- MST
[PULL 56/73] acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable
From: Igor Mammedov previous commit ("pci: fix 'hotplugglable' property behavior") fixed pcie root port's 'hotpluggable' property to behave consistently. So we don't need a BSEL crutch anymore to see of device is not hotpluggable, drop it from 'generic' PCI slots description handling. BSEL is still used to decide if hotplug part should be called but that will be moved out of generic code to hotplug one by followup patches. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-31-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 8e2481fe5e..ce14866eda 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -591,7 +591,7 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); /* add _DSM if device has acpi-index set */ -if (pdev->acpi_index && !bsel && +if (pdev->acpi_index && !object_property_get_bool(OBJECT(pdev), "hotpluggable", &error_abort)) { aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); -- MST
[PULL 64/73] hw/pci-bridge/cxl_root_port: Wire up MSI
From: Jonathan Cameron Done to avoid fixing ACPI route description of traditional PCI interrupts on q35 and because we should probably move with the times anyway. Signed-off-by: Jonathan Cameron Reviewed-by: Dave Jiang Message-Id: <20230302133709.30373-5-jonathan.came...@huawei.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Fan Ni --- hw/pci-bridge/cxl_root_port.c | 61 +++ 1 file changed, 61 insertions(+) diff --git a/hw/pci-bridge/cxl_root_port.c b/hw/pci-bridge/cxl_root_port.c index 00195257f7..7dfd20aa67 100644 --- a/hw/pci-bridge/cxl_root_port.c +++ b/hw/pci-bridge/cxl_root_port.c @@ -22,6 +22,7 @@ #include "qemu/range.h" #include "hw/pci/pci_bridge.h" #include "hw/pci/pcie_port.h" +#include "hw/pci/msi.h" #include "hw/qdev-properties.h" #include "hw/sysbus.h" #include "qapi/error.h" @@ -29,6 +30,10 @@ #define CXL_ROOT_PORT_DID 0x7075 +#define CXL_RP_MSI_OFFSET 0x60 +#define CXL_RP_MSI_SUPPORTED_FLAGS PCI_MSI_FLAGS_MASKBIT +#define CXL_RP_MSI_NR_VECTOR2 + /* Copied from the gen root port which we derive */ #define GEN_PCIE_ROOT_PORT_AER_OFFSET 0x100 #define GEN_PCIE_ROOT_PORT_ACS_OFFSET \ @@ -47,6 +52,49 @@ typedef struct CXLRootPort { #define TYPE_CXL_ROOT_PORT "cxl-rp" DECLARE_INSTANCE_CHECKER(CXLRootPort, CXL_ROOT_PORT, TYPE_CXL_ROOT_PORT) +/* + * If two MSI vector are allocated, Advanced Error Interrupt Message Number + * is 1. otherwise 0. + * 17.12.5.10 RPERRSTS, 32:27 bit Advanced Error Interrupt Message Number. + */ +static uint8_t cxl_rp_aer_vector(const PCIDevice *d) +{ +switch (msi_nr_vectors_allocated(d)) { +case 1: +return 0; +case 2: +return 1; +case 4: +case 8: +case 16: +case 32: +default: +break; +} +abort(); +return 0; +} + +static int cxl_rp_interrupts_init(PCIDevice *d, Error **errp) +{ +int rc; + +rc = msi_init(d, CXL_RP_MSI_OFFSET, CXL_RP_MSI_NR_VECTOR, + CXL_RP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_64BIT, + CXL_RP_MSI_SUPPORTED_FLAGS & PCI_MSI_FLAGS_MASKBIT, + errp); +if (rc < 0) { +assert(rc == -ENOTSUP); +} + +return rc; +} + +static void cxl_rp_interrupts_uninit(PCIDevice *d) +{ +msi_uninit(d); +} + static void latch_registers(CXLRootPort *crp) { uint32_t *reg_state = crp->cxl_cstate.crb.cache_mem_registers; @@ -183,6 +231,15 @@ static void cxl_rp_dvsec_write_config(PCIDevice *dev, uint32_t addr, } } +static void cxl_rp_aer_vector_update(PCIDevice *d) +{ +PCIERootPortClass *rpc = PCIE_ROOT_PORT_GET_CLASS(d); + +if (rpc->aer_vector) { +pcie_aer_root_set_vector(d, rpc->aer_vector(d)); +} +} + static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val, int len) { @@ -192,6 +249,7 @@ static void cxl_rp_write_config(PCIDevice *d, uint32_t address, uint32_t val, pcie_cap_slot_get(d, &slt_ctl, &slt_sta); pci_bridge_write_config(d, address, val, len); +cxl_rp_aer_vector_update(d); pcie_cap_flr_write_config(d, address, val, len); pcie_cap_slot_write_config(d, slt_ctl, slt_sta, address, val, len); pcie_aer_write_config(d, address, val, len); @@ -220,6 +278,9 @@ static void cxl_root_port_class_init(ObjectClass *oc, void *data) rpc->aer_offset = GEN_PCIE_ROOT_PORT_AER_OFFSET; rpc->acs_offset = GEN_PCIE_ROOT_PORT_ACS_OFFSET; +rpc->aer_vector = cxl_rp_aer_vector; +rpc->interrupts_init = cxl_rp_interrupts_init; +rpc->interrupts_uninit = cxl_rp_interrupts_uninit; dc->hotpluggable = false; } -- MST
[PULL 72/73] virtio: fix reachable assertion due to stale value of cached region size
From: Carlos López In virtqueue_{split,packed}_get_avail_bytes() descriptors are read in a loop via MemoryRegionCache regions and calls to vring_{split,packed}_desc_read() - these take a region cache and the index of the descriptor to be read. For direct descriptors we use a cache provided by the caller, whose size matches that of the virtqueue vring. We limit the number of descriptors we can read by the size of that vring: max = vq->vring.num; ... MemoryRegionCache *desc_cache = &caches->desc; For indirect descriptors, we initialize a new cache and limit the number of descriptors by the size of the intermediate descriptor: len = address_space_cache_init(&indirect_desc_cache, vdev->dma_as, desc.addr, desc.len, false); desc_cache = &indirect_desc_cache; ... max = desc.len / sizeof(VRingDesc); However, the first initialization of `max` is done outside the loop where we process guest descriptors, while the second one is done inside. This means that a sequence of an indirect descriptor followed by a direct one will leave a stale value in `max`. If the second descriptor's `next` field is smaller than the stale value, but greater than the size of the virtqueue ring (and thus the cached region), a failed assertion will be triggered in address_space_read_cached() down the call chain. Fix this by initializing `max` inside the loop in both functions. Fixes: 9796d0ac8fb0 ("virtio: use address_space_map/unmap to access descriptors") Signed-off-by: Carlos López Message-Id: <20230302100358.3613-1-clo...@suse.de> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/virtio.c | 11 +-- 1 file changed, 5 insertions(+), 6 deletions(-) diff --git a/hw/virtio/virtio.c b/hw/virtio/virtio.c index f35178f5fc..98c4819fcc 100644 --- a/hw/virtio/virtio.c +++ b/hw/virtio/virtio.c @@ -1069,7 +1069,7 @@ static void virtqueue_split_get_avail_bytes(VirtQueue *vq, VRingMemoryRegionCaches *caches) { VirtIODevice *vdev = vq->vdev; -unsigned int max, idx; +unsigned int idx; unsigned int total_bufs, in_total, out_total; MemoryRegionCache indirect_desc_cache = MEMORY_REGION_CACHE_INVALID; int64_t len = 0; @@ -1078,13 +1078,12 @@ static void virtqueue_split_get_avail_bytes(VirtQueue *vq, idx = vq->last_avail_idx; total_bufs = in_total = out_total = 0; -max = vq->vring.num; - while ((rc = virtqueue_num_heads(vq, idx)) > 0) { MemoryRegionCache *desc_cache = &caches->desc; unsigned int num_bufs; VRingDesc desc; unsigned int i; +unsigned int max = vq->vring.num; num_bufs = total_bufs; @@ -1206,7 +1205,7 @@ static void virtqueue_packed_get_avail_bytes(VirtQueue *vq, VRingMemoryRegionCaches *caches) { VirtIODevice *vdev = vq->vdev; -unsigned int max, idx; +unsigned int idx; unsigned int total_bufs, in_total, out_total; MemoryRegionCache *desc_cache; MemoryRegionCache indirect_desc_cache = MEMORY_REGION_CACHE_INVALID; @@ -1218,14 +1217,14 @@ static void virtqueue_packed_get_avail_bytes(VirtQueue *vq, wrap_counter = vq->last_avail_wrap_counter; total_bufs = in_total = out_total = 0; -max = vq->vring.num; - for (;;) { unsigned int num_bufs = total_bufs; unsigned int i = idx; int rc; +unsigned int max = vq->vring.num; desc_cache = &caches->desc; + vring_packed_desc_read(vdev, &desc, desc_cache, idx, true); if (!is_desc_avail(desc.flags, wrap_counter)) { break; -- MST
[PULL 10/73] cryptodev: support QoS
From: zhenwei pi Add 'throttle-bps' and 'throttle-ops' limitation to set QoS. The two arguments work with both QEMU command line and QMP command. Example of QEMU command line: -object cryptodev-backend-builtin,id=cryptodev1,throttle-bps=1600,\ throttle-ops=100 Example of QMP command: virsh qemu-monitor-command buster --hmp qom-set /objects/cryptodev1 \ throttle-ops 100 or cancel limitation: virsh qemu-monitor-command buster --hmp qom-set /objects/cryptodev1 \ throttle-ops 0 Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-11-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/qom.json | 8 ++- include/sysemu/cryptodev.h | 7 ++ backends/cryptodev.c | 138 + 3 files changed, 152 insertions(+), 1 deletion(-) diff --git a/qapi/qom.json b/qapi/qom.json index 30e76653ad..a877b879b9 100644 --- a/qapi/qom.json +++ b/qapi/qom.json @@ -278,10 +278,16 @@ # cryptodev-backend and must be 1 for cryptodev-backend-builtin. # (default: 1) # +# @throttle-bps: limit total bytes per second (Since 8.0) +# +# @throttle-ops: limit total operations per second (Since 8.0) +# # Since: 2.8 ## { 'struct': 'CryptodevBackendProperties', - 'data': { '*queues': 'uint32' } } + 'data': { '*queues': 'uint32', +'*throttle-bps': 'uint64', +'*throttle-ops': 'uint64' } } ## # @CryptodevVhostUserProperties: diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index c0250c4a2c..bc021ce847 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -24,6 +24,7 @@ #define CRYPTODEV_H #include "qemu/queue.h" +#include "qemu/throttle.h" #include "qom/object.h" #include "qapi/qapi-types-cryptodev.h" @@ -187,6 +188,7 @@ typedef struct CryptoDevBackendOpInfo { CryptoDevBackendSymOpInfo *sym_op_info; CryptoDevBackendAsymOpInfo *asym_op_info; } u; +QTAILQ_ENTRY(CryptoDevBackendOpInfo) next; } CryptoDevBackendOpInfo; struct CryptoDevBackendClass { @@ -273,6 +275,11 @@ struct CryptoDevBackend { CryptoDevBackendConf conf; CryptodevBackendSymStat *sym_stat; CryptodevBackendAsymStat *asym_stat; + +ThrottleState ts; +ThrottleTimers tt; +ThrottleConfig tc; +QTAILQ_HEAD(, CryptoDevBackendOpInfo) opinfos; }; #define CryptodevSymStatInc(be, op, bytes) do { \ diff --git a/backends/cryptodev.c b/backends/cryptodev.c index 5ee7507ca5..7c10a2e1cb 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -28,6 +28,7 @@ #include "qapi/visitor.h" #include "qemu/config-file.h" #include "qemu/error-report.h" +#include "qemu/main-loop.h" #include "qom/object_interfaces.h" #include "hw/virtio/virtio-crypto.h" @@ -203,17 +204,53 @@ static int cryptodev_backend_account(CryptoDevBackend *backend, return len; } +static void cryptodev_backend_throttle_timer_cb(void *opaque) +{ +CryptoDevBackend *backend = (CryptoDevBackend *)opaque; +CryptoDevBackendOpInfo *op_info, *tmpop; +int ret; + +QTAILQ_FOREACH_SAFE(op_info, &backend->opinfos, next, tmpop) { +QTAILQ_REMOVE(&backend->opinfos, op_info, next); +ret = cryptodev_backend_account(backend, op_info); +if (ret < 0) { +op_info->cb(op_info->opaque, ret); +continue; +} + +throttle_account(&backend->ts, true, ret); +cryptodev_backend_operation(backend, op_info); +if (throttle_enabled(&backend->tc) && +throttle_schedule_timer(&backend->ts, &backend->tt, true)) { +break; +} +} +} + int cryptodev_backend_crypto_operation( CryptoDevBackend *backend, CryptoDevBackendOpInfo *op_info) { int ret; +if (!throttle_enabled(&backend->tc)) { +goto do_account; +} + +if (throttle_schedule_timer(&backend->ts, &backend->tt, true) || +!QTAILQ_EMPTY(&backend->opinfos)) { +QTAILQ_INSERT_TAIL(&backend->opinfos, op_info, next); +return 0; +} + +do_account: ret = cryptodev_backend_account(backend, op_info); if (ret < 0) { return ret; } +throttle_account(&backend->ts, true, ret); + return cryptodev_backend_operation(backend, op_info); } @@ -245,12 +282,98 @@ cryptodev_backend_set_queues(Object *obj, Visitor *v, const char *name, backend->conf.peers.queues = value; } +static void cryptodev_backend_set_throttle(CryptoDevBackend *backend, int field, + uint64_t value, Error **errp) +{ +uint64_t orig = backend->tc.buckets[field].avg; +bool enabled = throttle_enabled(&backend->tc); + +if (orig == value) { +return; +} + +backend->tc.buckets[field].avg = value; +if (!throttle_enabled(&backend->tc)) { +throttle_timers_destroy(&backend->tt); +cryptodev_backend_throttle_timer_c
[PULL 24/73] vdpa: block migration if SVQ does not admit a feature
From: Eugenio Pérez Next patches enable devices to be migrated even if vdpa netdev has not been started with x-svq. However, not all devices are migratable, so we need to block migration if we detect that. Block migration if we detect the device expose a feature SVQ does not know how to work with. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-13-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 15 +++ 1 file changed, 15 insertions(+) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index e9167977d5..48ffb67a34 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -443,6 +443,21 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp) return 0; } +/* + * If dev->shadow_vqs_enabled at initialization that means the device has + * been started with x-svq=on, so don't block migration + */ +if (dev->migration_blocker == NULL && !v->shadow_vqs_enabled) { +/* We don't have dev->features yet */ +uint64_t features; +ret = vhost_vdpa_get_dev_features(dev, &features); +if (unlikely(ret)) { +error_setg_errno(errp, -ret, "Could not get device features"); +return ret; +} +vhost_svq_valid_features(features, &dev->migration_blocker); +} + /* * Similar to VFIO, we end up pinning all guest memory and have to * disable discarding of RAM. -- MST
[PULL 25/73] vdpa net: allow VHOST_F_LOG_ALL
From: Eugenio Pérez Since some actions move to the start function instead of init, the device features may not be the parent vdpa device's, but the one returned by vhost backend. If transition to SVQ is supported, the vhost backend will return _F_LOG_ALL to signal the device is migratable. Add VHOST_F_LOG_ALL. HW dirty page tracking can be added on top of this change if the device supports it in the future. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230303172445.1089785-14-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- net/vhost-vdpa.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index 1089c35959..99904a0da7 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -101,6 +101,8 @@ static const uint64_t vdpa_svq_device_features = BIT_ULL(VIRTIO_NET_F_MQ) | BIT_ULL(VIRTIO_F_ANY_LAYOUT) | BIT_ULL(VIRTIO_NET_F_CTRL_MAC_ADDR) | +/* VHOST_F_LOG_ALL is exposed by SVQ */ +BIT_ULL(VHOST_F_LOG_ALL) | BIT_ULL(VIRTIO_NET_F_RSC_EXT) | BIT_ULL(VIRTIO_NET_F_STANDBY); -- MST
[PULL 48/73] tests: acpi: update expected blobs
From: Igor Mammedov the only chenge is addition of _DSM- > EDSM method on non-hotpluggable devices with configured acpi-index. Something like: +Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method +{ +Local0 = Package (0x01) +{ +0x65 +} +Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0)) +} Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-23-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 3 --- tests/data/acpi/pc/DSDT.hpbrroot| Bin 3260 -> 3309 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 12637 -> 12678 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 8114 -> 8188 bytes 4 files changed, 3 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 70244976c9..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,4 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/q35/DSDT.noacpihp", diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot index bfe0bf37180c0f0521d264d3e35b5f51feff2630..bee88c5ee815f0acf022b278876f0a212b1da84a 100644 GIT binary patch delta 134 zcmdlZ`Bsw4CDq#0Y(N938+q1Ms8h3 GB&`7G*&wt4 delta 85 zcmaDWxkr-ACDcQp~@f`7vEA0{{}H42A#z diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp index 44ee5e74c533f2c7554885b73adb947ed74b421f..c292c2369b011b779af44d0fa6fd2f7994098b2e 100644 GIT binary patch delta 199 zcmdmF|Hq!oCD=r+5K3t;rFx_Uh`vh8FQ0@s2J*JPZuX z3?kz3F2TM$1wt&0T&W35T!Ea7%&hE$$;)I_EG>hL5NcT&qMI~=4G;p13?dRx&8&>v lx{S!WU&$(%ng$yq6te?$s{|VuK&(d5`4w5`W;MAUMgVo#G5-Jn delta 125 zcmexkzsa7_A1_!3G8plNdG^$n`J+09-yC ANdN!< -- MST
[PULL 60/73] pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback
From: Igor Mammedov Provide pcihp specific callback to check if bus is hotpluggable and consolidate its scattered hotplug criteria there. While at it clean up no longer needed qbus_set_hotplug_handler(BUS(bus), NULL) workarounds since callback makes qbus_is_hotpluggable() return correct answer even if hotplug_handler is set on bus. PS: see ("pci: fix 'hotplugglable' property behavior") for details why callback was introduced. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-35-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/acpi/ich9.h | 1 + include/hw/acpi/pcihp.h | 1 + hw/acpi/acpi-pci-hotplug-stub.c | 4 hw/acpi/ich9.c | 6 + hw/acpi/pcihp.c | 42 ++--- hw/acpi/piix4.c | 8 +++ hw/isa/lpc_ich9.c | 1 + 7 files changed, 39 insertions(+), 24 deletions(-) diff --git a/include/hw/acpi/ich9.h b/include/hw/acpi/ich9.h index 57a542c4b8..2faf7f0cae 100644 --- a/include/hw/acpi/ich9.h +++ b/include/hw/acpi/ich9.h @@ -87,6 +87,7 @@ void ich9_pm_device_unplug_request_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); +bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus); void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list); #endif /* HW_ACPI_ICH9_H */ diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 04c98511a4..ef59810c17 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -58,6 +58,7 @@ typedef struct AcpiPciHpState { void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root, MemoryRegion *address_space_io, uint16_t io_base); +bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus); void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, diff --git a/hw/acpi/acpi-pci-hotplug-stub.c b/hw/acpi/acpi-pci-hotplug-stub.c index d1794399f7..dcee3ad7a1 100644 --- a/hw/acpi/acpi-pci-hotplug-stub.c +++ b/hw/acpi/acpi-pci-hotplug-stub.c @@ -40,3 +40,7 @@ void acpi_pcihp_reset(AcpiPciHpState *s) return; } +bool acpi_pcihp_is_hotpluggbale_bus(AcpiPciHpState *s, BusState *bus) +{ +return true; +} diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index f778ade7ea..25e2c7243e 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -578,6 +578,12 @@ void ich9_pm_device_unplug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, } } +bool ich9_pm_is_hotpluggable_bus(HotplugHandler *hotplug_dev, BusState *bus) +{ +ICH9LPCState *lpc = ICH9_LPC_DEVICE(hotplug_dev); +return acpi_pcihp_is_hotpluggbale_bus(&lpc->pm.acpi_pci_hotplug, bus); +} + void ich9_pm_ospm_status(AcpiDeviceIf *adev, ACPIOSTInfoList ***list) { ICH9LPCState *s = ICH9_LPC_DEVICE(adev); diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 34cad061a8..dcfb779a7a 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -121,20 +121,6 @@ static void acpi_set_pci_info(bool has_bridge_hotplug) } } -static void acpi_pcihp_disable_root_bus(void) -{ -Object *host = acpi_get_i386_pci_host(); -PCIBus *bus; - -bus = PCI_HOST_BRIDGE(host)->bus; -if (bus && qbus_is_hotpluggable(BUS(bus))) { -/* setting the hotplug handler to NULL makes the bus non-hotpluggable */ -qbus_set_hotplug_handler(BUS(bus), NULL); -} - -return; -} - static void acpi_pcihp_test_hotplug_bus(PCIBus *bus, void *opaque) { AcpiPciHpFind *find = opaque; @@ -278,9 +264,6 @@ static void acpi_pcihp_update(AcpiPciHpState *s) void acpi_pcihp_reset(AcpiPciHpState *s) { -if (!s->use_acpi_root_pci_hotplug) { -acpi_pcihp_disable_root_bus(); -} acpi_set_pci_info(s->use_acpi_hotplug_bridge); acpi_pcihp_update(s); } @@ -320,13 +303,6 @@ void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, object_dynamic_cast(OBJECT(dev), TYPE_PCI_BRIDGE)) { PCIBus *sec = pci_bridge_get_sec_bus(PCI_BRIDGE(pdev)); -/* Remove all hot-plug handlers if hot-plug is disabled on slot */ -if (object_dynamic_cast(OBJECT(dev), TYPE_PCIE_SLOT) && -!PCIE_SLOT(pdev)->hotplug) { -qbus_set_hotplug_handler(BUS(sec), NULL); -return; -} - qbus_set_hotplug_handler(BUS(sec), OBJECT(hotplug_dev)); /* We don't have to overwrite any other hotplug handler yet */ assert(QLIST_EMPTY(&sec->child)); @@ -385,6 +361,24 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, acpi_send_event(DEVICE(hotplug_de
[PULL 58/73] acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices()
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-33-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/acpi/pcihp.h | 2 ++ hw/acpi/pci-bridge.c| 12 +++- hw/i386/acpi-build.c| 9 - 3 files changed, 17 insertions(+), 6 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index 7e268c2c9c..cd18ebdcdc 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -71,6 +71,8 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, /* Called on reset */ void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off); +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus); + extern const VMStateDescription vmstate_acpi_pcihp_pci_status; #define VMSTATE_PCI_HOTPLUG(pcihp, state, test_pcihp, test_acpi_index) \ diff --git a/hw/acpi/pci-bridge.c b/hw/acpi/pci-bridge.c index 4fbf6da6ad..7baa7034a1 100644 --- a/hw/acpi/pci-bridge.c +++ b/hw/acpi/pci-bridge.c @@ -22,6 +22,16 @@ void build_pci_bridge_aml(AcpiDevAmlIf *adev, Aml *scope) PCIBridge *br = PCI_BRIDGE(adev); if (!DEVICE(br)->hotplugged) { -build_append_pci_bus_devices(scope, pci_bridge_get_sec_bus(br)); +PCIBus *sec_bus = pci_bridge_get_sec_bus(br); + +build_append_pci_bus_devices(scope, sec_bus); + +/* + * generate hotplug slots descriptors if + * bridge has ACPI PCI hotplug attached, + */ +if (object_property_find(OBJECT(sec_bus), ACPI_PCIHP_PROP_BSEL)) { +build_append_pcihp_slots(scope, sec_bus); +} } } diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 0459acfbb4..ec857a117e 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -520,7 +520,7 @@ static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) return false; } -static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) +void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) { int devfn; Aml *dev, *notify_method = NULL, *method; @@ -599,10 +599,6 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) /* device descriptor has been composed, add it into parent context */ aml_append(parent_scope, dev); } - -if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) { -build_append_pcihp_slots(parent_scope, bus); -} } static bool build_append_notfication_callback(Aml *parent_scope, @@ -1790,6 +1786,9 @@ build_dsdt(GArray *table_data, BIOSLinker *linker, Aml *scope = aml_scope("PCI0"); /* Scan all PCI buses. Generate tables to support hotplug. */ build_append_pci_bus_devices(scope, bus); +if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) { +build_append_pcihp_slots(scope, bus); +} aml_append(sb_scope, scope); } } -- MST
[PULL 36/73] tests: acpi: update expected blobs
From: Igor Mammedov BNUM numbering changes across DSDT due to addition of new bridges. Fixed missing PCI tree brunch (q35/DSDT.multi-bridge case): // -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off +Device (S50) +{ +Name (_ADR, 0x000A) // _ADR: Address // -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp +Device (S00) +{ +Name (_ADR, Zero) // _ADR: Address +Name (BSEL, Zero) +Device (S00) +{ +Name (_ADR, Zero) // _ADR: Address +Name (ASUN, Zero) +Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method +{ +Local0 = Package (0x02) +{ +BSEL, +ASUN +} +Return (PDSM (Arg0, Arg1, Arg2, Arg3, Local0)) +} + +Name (_SUN, Zero) // _SUN: Slot User Number +Method (_EJ0, 1, NotSerialized) // _EJx: Eject Device +{ +PCEJ (BSEL, _SUN) +} +} + +Method (DVNT, 2, NotSerialized) +{ +If ((Arg0 & One)) +{ +Notify (S00, Arg1) +} +} +} +} Fixed hotplug notification for leaf root port (hotplug=on) attached to intermediate root port (hotplug=off) (q35/DSDT.multi-bridge case) // -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off +Scope (S50) +{ // -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp +Scope (S00) +{ +Method (PCNT, 0, NotSerialized) +{ +BNUM = Zero +DVNT (PCIU, One) +DVNT (PCID, 0x03) +} +} + +Method (PCNT, 0, NotSerialized) +{ +^S00.PCNT () +} +} ... Method (PCNT, 0, NotSerialized) { +^S50.PCNT () ^S13.PCNT () Populated slots being described on coldplugged bridges even if ACPI bridge hotplug is disabled. (pc/DSDT.hpbridge and pc/DSDT.hpbrroot) ... Device (S18) { Name (_ADR, 0x0003) // _ADR: Address +Device (S08) +{ +Name (_ADR, 0x0001) // _ADR: Address +} + +Device (S10) +{ +Name (_ADR, 0x0002) // _ADR: Address +} } ... Device (S18) { Name (_ADR, 0x0003) // _ADR: Address +Device (S00) +{ +Name (_ADR, Zero) // _ADR: Address +} } Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-11-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 4 tests/data/acpi/pc/DSDT.hpbridge| Bin 6289 -> 6323 bytes tests/data/acpi/pc/DSDT.hpbrroot| Bin 3115 -> 3166 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 12337 -> 12545 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 7932 -> 8022 bytes 5 files changed, 4 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index a0dbb28cde..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,5 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/pc/DSDT.hpbridge", -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/q35/DSDT.noacpihp", diff --git a/tests/data/acpi/pc/DSDT.hpbridge b/tests/data/acpi/pc/DSDT.hpbridge index 834c27002edbd3e2298a71c9ff1b501e3a3314f7..5dea100bc9492bb2367aac8660522201785c1efb 100644 GIT binary patch delta 89 zcmbPexY>})CD3^ufg=ZJT73F2X3 bU}lJJ;tw`J2rz;L3=QBam^M$~W#k3`PB0c2 delta 55 zcmdmNIMI;HCDq)j=ZJT73F2X3 LVBWlmmysI)zZnl0 diff --git a/tests/data/acpi/pc/DSDT.hpbrroot b/tests/data/acpi/pc/DSDT.hpbrroot index d77752960285a5afa6d0c0a04e400842f6acd2ed..893ab221c2cca1829937a4c26152680313633df4 100644 GIT binary patch delta 121 zcmZ22aZiHFCDM`-bPVoYMYMVcCerGf=3^p=|=ZJT72?DBN iVTf+x4>quX3owEO3=t}rCV%HvRZs{vMyO%O)C2%vb{qNt delta 70 zcmca7v08%5CDmc@#99Wdz@U(DlzfFPVoZX%9}rNerM$44>mH0=ZJT
[PULL 22/73] vdpa net: block migration if the device has CVQ
From: Eugenio Pérez Devices with CVQ need to migrate state beyond vq state. Leaving this to future series. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-11-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/vhost-vdpa.h | 1 + hw/virtio/vhost-vdpa.c | 1 + net/vhost-vdpa.c | 9 + 3 files changed, 11 insertions(+) diff --git a/include/hw/virtio/vhost-vdpa.h b/include/hw/virtio/vhost-vdpa.h index 4a7d396674..c278a2a8de 100644 --- a/include/hw/virtio/vhost-vdpa.h +++ b/include/hw/virtio/vhost-vdpa.h @@ -50,6 +50,7 @@ typedef struct vhost_vdpa { const VhostShadowVirtqueueOps *shadow_vq_ops; void *shadow_vq_ops_opaque; struct vhost_dev *dev; +Error *migration_blocker; VhostVDPAHostNotifier notifier[VIRTIO_QUEUE_MAX]; } VhostVDPA; diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 49afa59261..e9167977d5 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -438,6 +438,7 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp) v->msg_type = VHOST_IOTLB_MSG_V2; vhost_vdpa_init_svq(dev, v); +error_propagate(&dev->migration_blocker, v->migration_blocker); if (!vhost_vdpa_first_dev(dev)) { return 0; } diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index 167b43679d..533ba54317 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -828,6 +828,15 @@ static NetClientState *net_vhost_vdpa_init(NetClientState *peer, s->vhost_vdpa.shadow_vq_ops = &vhost_vdpa_net_svq_ops; s->vhost_vdpa.shadow_vq_ops_opaque = s; + +/* + * TODO: We cannot migrate devices with CVQ as there is no way to set + * the device state (MAC, MQ, etc) before starting the datapath. + * + * Migration blocker ownership now belongs to s->vhost_vdpa. + */ +error_setg(&s->vhost_vdpa.migration_blocker, + "net vdpa cannot migrate with CVQ feature"); } ret = vhost_vdpa_add(nc, (void *)&s->vhost_vdpa, queue_pair_index, nvqs); if (ret) { -- MST
[PULL 40/73] pcihp: move PCI _DSM function 0 prolog into separate function
From: Igor Mammedov it will be reused by follow up patches that will implement static _DSM for non-hotpluggable devices. no functional AML change, only context one, where 'cap' (Local1) initialization is moved after UUID/revision checks. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-15-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 54 1 file changed, 30 insertions(+), 24 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index c691104d47..d8ec91b8e3 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -373,6 +373,33 @@ Aml *aml_pci_device_dsm(void) return method; } +static void build_append_pci_dsm_func0_common(Aml *ctx, Aml *retvar) +{ +Aml *UUID, *ifctx1; +uint8_t byte_list[1] = { 0 }; /* nothing supported yet */ + +aml_append(ctx, aml_store(aml_buffer(1, byte_list), retvar)); +/* + * PCI Firmware Specification 3.1 + * 4.6. _DSM Definitions for PCI + */ +UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); +ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); +{ +/* call is for unsupported UUID, bail out */ +aml_append(ifctx1, aml_return(retvar)); +} +aml_append(ctx, ifctx1); + +ifctx1 = aml_if(aml_lless(aml_arg(1), aml_int(2))); +{ +/* call is for unsupported REV, bail out */ +aml_append(ifctx1, aml_return(retvar)); +} +aml_append(ctx, ifctx1); +} + + static void build_append_pcihp_notify_entry(Aml *method, int slot) { Aml *if_ctx; @@ -570,14 +597,13 @@ static bool build_append_notfication_callback(Aml *parent_scope, static Aml *aml_pci_pdsm(void) { -Aml *method, *UUID, *ifctx, *ifctx1; +Aml *method, *ifctx, *ifctx1; Aml *ret = aml_local(0); Aml *caps = aml_local(1); Aml *acpi_index = aml_local(2); Aml *zero = aml_int(0); Aml *one = aml_int(1); Aml *func = aml_arg(2); -Aml *rev = aml_arg(1); Aml *params = aml_arg(4); Aml *bnum = aml_derefof(aml_index(params, aml_int(0))); Aml *sunum = aml_derefof(aml_index(params, aml_int(1))); @@ -587,29 +613,9 @@ static Aml *aml_pci_pdsm(void) /* get supported functions */ ifctx = aml_if(aml_equal(func, zero)); { -uint8_t byte_list[1] = { 0 }; /* nothing supported yet */ -aml_append(ifctx, aml_store(aml_buffer(1, byte_list), ret)); +build_append_pci_dsm_func0_common(ifctx, ret); + aml_append(ifctx, aml_store(zero, caps)); - - /* -* PCI Firmware Specification 3.1 -* 4.6. _DSM Definitions for PCI -*/ -UUID = aml_touuid("E5C937D0-3553-4D7A-9117-EA4D19C3434D"); -ifctx1 = aml_if(aml_lnot(aml_equal(aml_arg(0), UUID))); -{ -/* call is for unsupported UUID, bail out */ -aml_append(ifctx1, aml_return(ret)); -} -aml_append(ifctx, ifctx1); - -ifctx1 = aml_if(aml_lless(rev, aml_int(2))); -{ -/* call is for unsupported REV, bail out */ -aml_append(ifctx1, aml_return(ret)); -} -aml_append(ifctx, ifctx1); - aml_append(ifctx, aml_store(aml_call2("AIDX", bnum, sunum), acpi_index)); /* -- MST
[PULL 53/73] tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-28-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 6 -- 1 file changed, 4 insertions(+), 2 deletions(-) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index d7c34ba504..76d5100911 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1028,10 +1028,11 @@ static void test_acpi_q35_tcg_no_acpi_hotplug(void) "addr=7.0" " -device pci-testdev,bus=nohprp,acpi-index=501" " -device pcie-root-port,id=nohprpint,port=0x0,chassis=3,hotplug=off," - "addr=8.0" + "multifunction=on,addr=8.0" +" -device pci-testdev,bus=nohprpint,acpi-index=601,addr=8.1" " -device pcie-root-port,id=hprp2,port=0x0,chassis=4,bus=nohprpint," "addr=9.0" -" -device pci-testdev,bus=hprp2,acpi-index=601" +" -device pci-testdev,bus=hprp2,acpi-index=602" , &data); free_test_data(&data); } @@ -1053,6 +1054,7 @@ static void test_acpi_q35_multif_bridge(void) " -device pcie-root-port,id=rphptgt2,port=0x0,chassis=6,addr=2.2" " -device pcie-root-port,id=rphptgt3,port=0x0,chassis=7,addr=2.3" " -device pci-testdev,bus=pcie.0,addr=2.4" +" -device pci-testdev,bus=pcie.0,addr=2.5,acpi-index=102" " -device pci-testdev,bus=pcie.0,addr=5.0" " -device pci-testdev,bus=pcie.0,addr=0xf.0,acpi-index=101" " -device pci-testdev,bus=rp0,addr=0.0" -- MST
[PULL 55/73] pci: move acpi-index uniqueness check to generic PCI device code
From: Igor Mammedov acpi-index is now working with non-hotpluggable buses (pci/q35 machine hostbridge), it can be used even if ACPI PCI hotplug is disabled and as result acpi-index uniqueness check will be omitted (since the check is done by ACPI PCI hotplug handler, which isn't wired when ACPI PCI hotplug is disabled). Move check and related code to generic PCIDevice so it would be independent of ACPI PCI hotplug. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-30-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/acpi/pcihp.c | 56 hw/pci/pci.c| 57 + 2 files changed, 57 insertions(+), 56 deletions(-) diff --git a/hw/acpi/pcihp.c b/hw/acpi/pcihp.c index 5dc7377411..adf45e8443 100644 --- a/hw/acpi/pcihp.c +++ b/hw/acpi/pcihp.c @@ -54,21 +54,6 @@ typedef struct AcpiPciHpFind { PCIBus *bus; } AcpiPciHpFind; -static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data) -{ -return a - b; -} - -static GSequence *pci_acpi_index_list(void) -{ -static GSequence *used_acpi_index_list; - -if (!used_acpi_index_list) { -used_acpi_index_list = g_sequence_new(NULL); -} -return used_acpi_index_list; -} - static int acpi_pcihp_get_bsel(PCIBus *bus) { Error *local_err = NULL; @@ -300,8 +285,6 @@ void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off) acpi_pcihp_update(s); } -#define ONBOARD_INDEX_MAX (16 * 1024 - 1) - void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp) { @@ -314,34 +297,6 @@ void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, ACPI_PCIHP_PROP_BSEL "' set"); return; } - -/* - * capped by systemd (see: udev-builtin-net_id.c) - * as it's the only known user honor it to avoid users - * misconfigure QEMU and then wonder why acpi-index doesn't work - */ -if (pdev->acpi_index > ONBOARD_INDEX_MAX) { -error_setg(errp, "acpi-index should be less or equal to %u", - ONBOARD_INDEX_MAX); -return; -} - -/* - * make sure that acpi-index is unique across all present PCI devices - */ -if (pdev->acpi_index) { -GSequence *used_indexes = pci_acpi_index_list(); - -if (g_sequence_lookup(used_indexes, GINT_TO_POINTER(pdev->acpi_index), - g_cmp_uint32, NULL)) { -error_setg(errp, "a PCI device with acpi-index = %" PRIu32 - " already exist", pdev->acpi_index); -return; -} -g_sequence_insert_sorted(used_indexes, - GINT_TO_POINTER(pdev->acpi_index), - g_cmp_uint32, NULL); -} } void acpi_pcihp_device_plug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, @@ -401,17 +356,6 @@ void acpi_pcihp_device_unplug_cb(HotplugHandler *hotplug_dev, AcpiPciHpState *s, trace_acpi_pci_unplug(PCI_SLOT(pdev->devfn), acpi_pcihp_get_bsel(pci_get_bus(pdev))); -/* - * clean up acpi-index so it could reused by another device - */ -if (pdev->acpi_index) { -GSequence *used_indexes = pci_acpi_index_list(); - -g_sequence_remove(g_sequence_lookup(used_indexes, - GINT_TO_POINTER(pdev->acpi_index), - g_cmp_uint32, NULL)); -} - qdev_unrealize(dev); } diff --git a/hw/pci/pci.c b/hw/pci/pci.c index 034fe49e9a..def5000e7b 100644 --- a/hw/pci/pci.c +++ b/hw/pci/pci.c @@ -95,6 +95,21 @@ static const VMStateDescription vmstate_pcibus = { } }; +static gint g_cmp_uint32(gconstpointer a, gconstpointer b, gpointer user_data) +{ +return a - b; +} + +static GSequence *pci_acpi_index_list(void) +{ +static GSequence *used_acpi_index_list; + +if (!used_acpi_index_list) { +used_acpi_index_list = g_sequence_new(NULL); +} +return used_acpi_index_list; +} + static void pci_init_bus_master(PCIDevice *pci_dev) { AddressSpace *dma_as = pci_device_iommu_address_space(pci_dev); @@ -1246,6 +1261,17 @@ static void pci_qdev_unrealize(DeviceState *dev) do_pci_unregister_device(pci_dev); pci_dev->msi_trigger = NULL; + +/* + * clean up acpi-index so it could reused by another device + */ +if (pci_dev->acpi_index) { +GSequence *used_indexes = pci_acpi_index_list(); + +g_sequence_remove(g_sequence_lookup(used_indexes, + GINT_TO_POINTER(pci_dev->acpi_index), + g_cmp_uint32, NULL)); +} } void pci_register_bar(PCIDevice *pci_dev, int region_num, @@ -2005,6 +2031,8 @@ PCIDevice *pci_find_device(PCIBus *bus, int bus_num, uint8_t devfn) return bus->devices[devfn]; } +#define ONBOARD_INDEX_MAX (16 * 1024 -
[PULL 29/73] tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug
From: Igor Mammedov test bridge AML generator with ACPI PCI hotplug disabled (i.e. with native hotplug enabled/disabled per bridge/root port) PS: while at make sure that devices on pci-bridge are starting from addr=1.0 as slot 0 is not available there and test passes only because of a bug in ACPI hotplug that will be fixed by follow up patch Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-4-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 42 +++--- 1 file changed, 39 insertions(+), 3 deletions(-) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index d8c8cda58e..7828c6b7e6 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -949,9 +949,14 @@ static void test_acpi_piix4_no_acpi_pci_hotplug(void) data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); test_acpi_one("-global PIIX4_PM.acpi-root-pci-hotplug=off " "-global PIIX4_PM.acpi-pci-hotplug-with-bridge-support=off " - "-device pci-bridge,chassis_nr=1 " - "-device pci-testdev,bus=pci.0 " - "-device pci-testdev,bus=pci.1", &data); + "-device pci-bridge,chassis_nr=1,addr=4.0 " + "-device pci-testdev,bus=pci.0,addr=5.0 " + "-device pci-testdev,bus=pci.0,addr=6.0,acpi-index=101 " + "-device pci-testdev,bus=pci.1,addr=1.0 " + "-device pci-testdev,bus=pci.1,addr=2.0,acpi-index=201 " + "-device pci-bridge,id=nhpbr,chassis_nr=2,shpc=off,addr=7.0 " + "-device pci-testdev,bus=nhpbr,addr=1.0,acpi-index=301 " + , &data); free_test_data(&data); } @@ -1002,6 +1007,35 @@ static void test_acpi_q35_tcg_bridge(void) free_test_data(&data); } +static void test_acpi_q35_tcg_no_acpi_hotplug(void) +{ +test_data data; + +memset(&data, 0, sizeof(data)); +data.machine = MACHINE_Q35; +data.variant = ".noacpihp"; +data.required_struct_types = base_required_struct_types; +data.required_struct_types_len = ARRAY_SIZE(base_required_struct_types); +test_acpi_one("-global ICH9-LPC.acpi-pci-hotplug-with-bridge-support=off" +" -device pci-testdev,bus=pcie.0,acpi-index=101,addr=3.0" +" -device pci-bridge,chassis_nr=1,id=shpcbr,addr=4.0" +" -device pci-testdev,bus=shpcbr,addr=1.0,acpi-index=201" +" -device pci-bridge,chassis_nr=2,shpc=off,id=noshpcbr,addr=5.0" +" -device pci-testdev,bus=noshpcbr,addr=1.0,acpi-index=301" +" -device pcie-root-port,id=hprp,port=0x0,chassis=1,addr=6.0" +" -device pci-testdev,bus=hprp,acpi-index=401" +" -device pcie-root-port,id=nohprp,port=0x0,chassis=2,hotplug=off," + "addr=7.0" +" -device pci-testdev,bus=nohprp,acpi-index=501" +" -device pcie-root-port,id=nohprpint,port=0x0,chassis=3,hotplug=off," + "addr=8.0" +" -device pcie-root-port,id=hprp2,port=0x0,chassis=4,bus=nohprpint," + "addr=9.0" +" -device pci-testdev,bus=hprp2,acpi-index=601" +, &data); +free_test_data(&data); +} + static void test_acpi_q35_multif_bridge(void) { test_data data = { @@ -2094,6 +2128,8 @@ int main(int argc, char *argv[]) test_acpi_q35_tcg_tpm12_tis); } qtest_add_func("acpi/q35/bridge", test_acpi_q35_tcg_bridge); +qtest_add_func("acpi/q35/no-acpi-hotplug", + test_acpi_q35_tcg_no_acpi_hotplug); qtest_add_func("acpi/q35/multif-bridge", test_acpi_q35_multif_bridge); qtest_add_func("acpi/q35/mmio64", test_acpi_q35_tcg_mmio64); -- MST
[PULL 31/73] tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-6-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..dabc024f53 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,2 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/q35/DSDT.multi-bridge", -- MST
[PULL 47/73] acpi: pci: support acpi-index for non-hotpluggable devices
From: Igor Mammedov Inject static _DSM (EDSM) if non-hotpluggable device has acpi-index configured on it. It lets use acpi-index non-hotpluggable devices / devices attached to non-hotpluggable bus. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-22-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 25 + 1 file changed, 25 insertions(+) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index 6f5501fb74..46f78e9338 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -452,6 +452,25 @@ static Aml *aml_pci_edsm(void) return method; } +static Aml *aml_pci_static_endpoint_dsm(PCIDevice *pdev) +{ +Aml *method; + +g_assert(pdev->acpi_index != 0); +method = aml_method("_DSM", 4, AML_SERIALIZED); +{ +Aml *params = aml_local(0); +Aml *pkg = aml_package(1); +aml_append(pkg, aml_int(pdev->acpi_index)); +aml_append(method, aml_store(pkg, params)); +aml_append(method, +aml_return(aml_call5("EDSM", aml_arg(0), aml_arg(1), + aml_arg(2), aml_arg(3), params)) +); +} +return method; +} + static void build_append_pcihp_notify_entry(Aml *method, int slot) { Aml *if_ctx; @@ -577,6 +596,12 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) aml_append(dev, aml_name_decl("_ADR", aml_int(adr))); call_dev_aml_func(DEVICE(bus->devices[devfn]), dev); +/* add _DSM if device has acpi-index set */ +if (pdev->acpi_index && !bsel && +!object_property_get_bool(OBJECT(pdev), "hotpluggable", + &error_abort)) { +aml_append(dev, aml_pci_static_endpoint_dsm(pdev)); +} /* device descriptor has been composed, add it into parent context */ aml_append(parent_scope, dev); -- MST
[PULL 57/73] acpi: pci: move BSEL into build_append_pcihp_slots()
From: Igor Mammedov Generic PCI enumeration code doesn't really need access to BSEL value, it is only used as means to decide if hotplug enumerator should be called. Use stateless object_property_find() to do that, and move the rest of BSEL handling into build_append_pcihp_slots() where it belongs. This cleans up generic code a bit from hotplug stuff and follow up patch will remove remaining call to build_append_pcihp_slots() from generic code, making it possible to use without ACPI PCI hotplug dependencies. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-32-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 15 ++- 1 file changed, 6 insertions(+), 9 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index ce14866eda..0459acfbb4 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -520,12 +520,14 @@ static bool is_devfn_ignored_hotplug(const int devfn, const PCIBus *bus) return false; } -static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus, - QObject *bsel) +static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus) { int devfn; Aml *dev, *notify_method = NULL, *method; +QObject *bsel = object_property_get_qobject(OBJECT(bus), +ACPI_PCIHP_PROP_BSEL, NULL); uint64_t bsel_val = qnum_get_uint(qobject_to(QNum, bsel)); +qobject_unref(bsel); aml_append(parent_scope, aml_name_decl("BSEL", aml_int(bsel_val))); notify_method = aml_method("DVNT", 2, AML_NOTSERIALIZED); @@ -570,12 +572,9 @@ static void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus, void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) { -QObject *bsel; int devfn; Aml *dev; -bsel = object_property_get_qobject(OBJECT(bus), ACPI_PCIHP_PROP_BSEL, NULL); - for (devfn = 0; devfn < ARRAY_SIZE(bus->devices); devfn++) { /* ACPI spec: 1.0b: Table 6-2 _ADR Object Bus Types, PCI type */ int adr = PCI_SLOT(devfn) << 16 | PCI_FUNC(devfn); @@ -601,11 +600,9 @@ void build_append_pci_bus_devices(Aml *parent_scope, PCIBus *bus) aml_append(parent_scope, dev); } -if (bsel) { -build_append_pcihp_slots(parent_scope, bus, bsel); +if (object_property_find(OBJECT(bus), ACPI_PCIHP_PROP_BSEL)) { +build_append_pcihp_slots(parent_scope, bus); } - -qobject_unref(bsel); } static bool build_append_notfication_callback(Aml *parent_scope, -- MST
[PULL 46/73] tests: acpi: add device with acpi-index on non-hotpluggble bus
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-21-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 295d80740e..d7c34ba504 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1054,6 +1054,7 @@ static void test_acpi_q35_multif_bridge(void) " -device pcie-root-port,id=rphptgt3,port=0x0,chassis=7,addr=2.3" " -device pci-testdev,bus=pcie.0,addr=2.4" " -device pci-testdev,bus=pcie.0,addr=5.0" +" -device pci-testdev,bus=pcie.0,addr=0xf.0,acpi-index=101" " -device pci-testdev,bus=rp0,addr=0.0" " -device pci-testdev,bus=br1" " -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off" -- MST
[PULL 04/73] cryptodev: Introduce server type in QAPI
From: zhenwei pi Introduce cryptodev service type in cryptodev.json, then apply this to related codes. Now we can remove VIRTIO_CRYPTO_SERVICE_xxx dependence from QEMU cryptodev. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-5-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/cryptodev.json | 11 +++ backends/cryptodev-builtin.c| 8 backends/cryptodev-lkcf.c | 2 +- backends/cryptodev-vhost-user.c | 6 +++--- hw/virtio/virtio-crypto.c | 27 +-- 5 files changed, 44 insertions(+), 10 deletions(-) diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json index ebb6852035..8732a30524 100644 --- a/qapi/cryptodev.json +++ b/qapi/cryptodev.json @@ -18,6 +18,17 @@ 'prefix': 'QCRYPTODEV_BACKEND_ALG', 'data': ['sym', 'asym']} +## +# @QCryptodevBackendServiceType: +# +# The supported service types of a crypto device. +# +# Since: 8.0 +## +{ 'enum': 'QCryptodevBackendServiceType', + 'prefix': 'QCRYPTODEV_BACKEND_SERVICE', + 'data': ['cipher', 'hash', 'mac', 'aead', 'akcipher']} + ## # @QCryptodevBackendType: # diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index e70dcd5dad..c0fbb650d7 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -79,10 +79,10 @@ static void cryptodev_builtin_init( backend->conf.peers.ccs[0] = cc; backend->conf.crypto_services = - 1u << VIRTIO_CRYPTO_SERVICE_CIPHER | - 1u << VIRTIO_CRYPTO_SERVICE_HASH | - 1u << VIRTIO_CRYPTO_SERVICE_MAC | - 1u << VIRTIO_CRYPTO_SERVICE_AKCIPHER; + 1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER | + 1u << QCRYPTODEV_BACKEND_SERVICE_HASH | + 1u << QCRYPTODEV_BACKEND_SERVICE_MAC | + 1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER; backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC; backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1; backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA; diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c index 53a932b58d..edec99f104 100644 --- a/backends/cryptodev-lkcf.c +++ b/backends/cryptodev-lkcf.c @@ -230,7 +230,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp) backend->conf.peers.ccs[0] = cc; backend->conf.crypto_services = -1u << VIRTIO_CRYPTO_SERVICE_AKCIPHER; +1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER; backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA; lkcf->running = true; diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index 580bd1abb0..b1d9eb735f 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -221,9 +221,9 @@ static void cryptodev_vhost_user_init( cryptodev_vhost_user_event, NULL, s, NULL, true); backend->conf.crypto_services = - 1u << VIRTIO_CRYPTO_SERVICE_CIPHER | - 1u << VIRTIO_CRYPTO_SERVICE_HASH | - 1u << VIRTIO_CRYPTO_SERVICE_MAC; + 1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER | + 1u << QCRYPTODEV_BACKEND_SERVICE_HASH | + 1u << QCRYPTODEV_BACKEND_SERVICE_MAC; backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC; backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1; diff --git a/hw/virtio/virtio-crypto.c b/hw/virtio/virtio-crypto.c index 0d1be0ada9..e4f0de4d1c 100644 --- a/hw/virtio/virtio-crypto.c +++ b/hw/virtio/virtio-crypto.c @@ -997,12 +997,35 @@ static void virtio_crypto_reset(VirtIODevice *vdev) } } +static uint32_t virtio_crypto_init_services(uint32_t qservices) +{ +uint32_t vservices = 0; + +if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_CIPHER)) { +vservices |= (1 << VIRTIO_CRYPTO_SERVICE_CIPHER); +} +if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_HASH)) { +vservices |= (1 << VIRTIO_CRYPTO_SERVICE_HASH); +} +if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_MAC)) { +vservices |= (1 << VIRTIO_CRYPTO_SERVICE_MAC); +} +if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_AEAD)) { +vservices |= (1 << VIRTIO_CRYPTO_SERVICE_AEAD); +} +if (qservices & (1 << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER)) { +vservices |= (1 << VIRTIO_CRYPTO_SERVICE_AKCIPHER); +} + +return vservices; +} + static void virtio_crypto_init_config(VirtIODevice *vdev) { VirtIOCrypto *vcrypto = VIRTIO_CRYPTO(vdev); -vcrypto->conf.crypto_services = - vcrypto->conf.cryptodev->conf.crypto_services; +vcrypto->conf.crypto_services = virtio_crypto_init_services( + vcrypto->conf.crypto
[PULL 44/73] tests: acpi: update expected blobs
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-19-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 37 -- tests/data/acpi/pc/DSDT | Bin 6360 -> 6454 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 6283 -> 6377 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7685 -> 7779 bytes tests/data/acpi/pc/DSDT.bridge| Bin 12487 -> 12581 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6824 -> 6918 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 8014 -> 8108 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 6323 -> 6417 bytes tests/data/acpi/pc/DSDT.hpbrroot | Bin 3166 -> 3260 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6432 -> 6526 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7719 -> 7813 bytes tests/data/acpi/pc/DSDT.nohpet| Bin 6218 -> 6312 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6366 -> 6460 bytes tests/data/acpi/pc/DSDT.roothp| Bin 9745 -> 9839 bytes tests/data/acpi/q35/DSDT | Bin 8252 -> 8344 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8269 -> 8361 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9577 -> 9669 bytes tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8531 -> 8623 bytes tests/data/acpi/q35/DSDT.applesmc | Bin 8298 -> 8390 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11481 -> 11573 bytes tests/data/acpi/q35/DSDT.core-count2 | Bin 32392 -> 32484 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8716 -> 8808 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9564 -> 9656 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9906 -> 9998 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8327 -> 8419 bytes tests/data/acpi/q35/DSDT.ipmismbus| Bin 8340 -> 8432 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8269 -> 8361 bytes tests/data/acpi/q35/DSDT.memhp| Bin 9611 -> 9703 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9382 -> 9474 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 12545 -> 12637 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 8022 -> 8114 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8110 -> 8202 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8258 -> 8350 bytes tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8353 -> 8445 bytes tests/data/acpi/q35/DSDT.tis.tpm12| Bin 8858 -> 8950 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8884 -> 8976 bytes tests/data/acpi/q35/DSDT.viot | Bin 9361 -> 9453 bytes tests/data/acpi/q35/DSDT.xapic| Bin 35615 -> 35707 bytes 38 files changed, 37 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 8911b10650..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,38 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT", -"tests/data/acpi/pc/DSDT.acpierst", -"tests/data/acpi/pc/DSDT.acpihmat", -"tests/data/acpi/pc/DSDT.bridge", -"tests/data/acpi/pc/DSDT.cphp", -"tests/data/acpi/pc/DSDT.dimmpxm", -"tests/data/acpi/pc/DSDT.hpbridge", -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/pc/DSDT.ipmikcs", -"tests/data/acpi/pc/DSDT.memhp", -"tests/data/acpi/pc/DSDT.nohpet", -"tests/data/acpi/pc/DSDT.numamem", -"tests/data/acpi/pc/DSDT.roothp", -"tests/data/acpi/q35/DSDT", -"tests/data/acpi/q35/DSDT.acpierst", -"tests/data/acpi/q35/DSDT.acpihmat", -"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", -"tests/data/acpi/q35/DSDT.applesmc", -"tests/data/acpi/q35/DSDT.bridge", -"tests/data/acpi/q35/DSDT.core-count2", -"tests/data/acpi/q35/DSDT.cphp", -"tests/data/acpi/q35/DSDT.cxl", -"tests/data/acpi/q35/DSDT.dimmpxm", -"tests/data/acpi/q35/DSDT.ipmibt", -"tests/data/acpi/q35/DSDT.ipmismbus", -"tests/data/acpi/q35/DSDT.ivrs", -"tests/data/acpi/q35/DSDT.memhp", -"tests/data/acpi/q35/DSDT.mmio64", -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/q35/DSDT.noacpihp", -"tests/data/acpi/q35/DSDT.nohpet", -"tests/data/acpi/q35/DSDT.numamem", -"tests/data/acpi/q35/DSDT.pvpanic-isa", -"tests/data/acpi/q35/DSDT.tis.tpm12", -"tests/data/acpi/q35/DSDT.tis.tpm2", -"tests/data/acpi/q35/DSDT.viot", -"tests/data/acpi/q35/DSDT.xapic", diff --git a/tests/data/acpi/pc/DSDT b/tests/data/acpi/pc/DSDT index ec133a6d3aabcfd22b7b46019338db2de255da70..521062a756d1fcd5939683e41071d29407a45b22 100644 GIT binary patch delta 111 zcmca%xXp;mCDrvw L2$9@4(Om)nP{SR3 delta 57 zcmdmHbiHokY4008b%5ODwi diff --git a/tests/data/acpi/pc/DSDT.acpierst b/tests/data/acpi/pc/DSDT.acpierst index 2b4b7f31919f360e038e37de713639da753f13aa..12b9e94bf1449995d460edffd40d1ff7b9f292cc 100644 GI
[PULL 08/73] cryptodev: Use CryptoDevBackendOpInfo for operation
From: zhenwei pi Move queue_index, CryptoDevCompletionFunc and opaque into struct CryptoDevBackendOpInfo, then cryptodev_backend_crypto_operation() needs an argument CryptoDevBackendOpInfo *op_info only. And remove VirtIOCryptoReq from cryptodev. It's also possible to hide VirtIOCryptoReq into virtio-crypto.c in the next step. (In theory, VirtIOCryptoReq is a private structure used by virtio-crypto only) Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-9-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/sysemu/cryptodev.h | 26 ++ backends/cryptodev-builtin.c | 9 +++-- backends/cryptodev-lkcf.c| 9 +++-- backends/cryptodev.c | 18 +- hw/virtio/virtio-crypto.c| 7 --- 5 files changed, 25 insertions(+), 44 deletions(-) diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index 16f01dd48a..048a627035 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -174,9 +174,14 @@ typedef struct CryptoDevBackendAsymOpInfo { uint8_t *dst; } CryptoDevBackendAsymOpInfo; +typedef void (*CryptoDevCompletionFunc) (void *opaque, int ret); + typedef struct CryptoDevBackendOpInfo { QCryptodevBackendAlgType algtype; uint32_t op_code; +uint32_t queue_index; +CryptoDevCompletionFunc cb; +void *opaque; /* argument for cb */ uint64_t session_id; union { CryptoDevBackendSymOpInfo *sym_op_info; @@ -184,7 +189,6 @@ typedef struct CryptoDevBackendOpInfo { } u; } CryptoDevBackendOpInfo; -typedef void (*CryptoDevCompletionFunc) (void *opaque, int ret); struct CryptoDevBackendClass { ObjectClass parent_class; @@ -204,10 +208,7 @@ struct CryptoDevBackendClass { void *opaque); int (*do_op)(CryptoDevBackend *backend, - CryptoDevBackendOpInfo *op_info, - uint32_t queue_index, - CryptoDevCompletionFunc cb, - void *opaque); + CryptoDevBackendOpInfo *op_info); }; struct CryptoDevBackendClient { @@ -335,24 +336,17 @@ int cryptodev_backend_close_session( /** * cryptodev_backend_crypto_operation: * @backend: the cryptodev backend object - * @opaque1: pointer to a VirtIOCryptoReq object - * @queue_index: queue index of cryptodev backend client - * @errp: pointer to a NULL-initialized error object - * @cb: callbacks when operation is completed - * @opaque2: parameter passed to cb + * @op_info: pointer to a CryptoDevBackendOpInfo object * - * Do crypto operation, such as encryption and - * decryption + * Do crypto operation, such as encryption, decryption, signature and + * verification * * Returns: 0 for success and cb will be called when creation is completed, * negative value for error, and cb will not be called. */ int cryptodev_backend_crypto_operation( CryptoDevBackend *backend, - void *opaque1, - uint32_t queue_index, - CryptoDevCompletionFunc cb, - void *opaque2); + CryptoDevBackendOpInfo *op_info); /** * cryptodev_backend_set_used: diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index c45b5906c5..39d0455280 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -539,10 +539,7 @@ static int cryptodev_builtin_asym_operation( static int cryptodev_builtin_operation( CryptoDevBackend *backend, - CryptoDevBackendOpInfo *op_info, - uint32_t queue_index, - CryptoDevCompletionFunc cb, - void *opaque) + CryptoDevBackendOpInfo *op_info) { CryptoDevBackendBuiltin *builtin = CRYPTODEV_BACKEND_BUILTIN(backend); @@ -574,8 +571,8 @@ static int cryptodev_builtin_operation( if (local_error) { error_report_err(local_error); } -if (cb) { -cb(opaque, status); +if (op_info->cb) { +op_info->cb(op_info->opaque, status); } return 0; } diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c index edec99f104..45aba1ff67 100644 --- a/backends/cryptodev-lkcf.c +++ b/backends/cryptodev-lkcf.c @@ -469,10 +469,7 @@ static void *cryptodev_lkcf_worker(void *arg) static int cryptodev_lkcf_operation( CryptoDevBackend *backend, -CryptoDevBackendOpInfo *op_info, -uint32_t queue_index, -CryptoDevCompletionFunc cb, -void *opaque) +CryptoDevBackendOpInfo *op_info) { CryptoDevBackendLKCF *lkcf = CRYPTODEV_BACKEND_LKCF(backend); @@ -495,8 +492,8 @@ static int cryptodev_lkcf_operation( task = g_new0(CryptoDevLKCFTask, 1); task->op_info = op_info; -task->cb = cb; -task->opaque = opaque; +task->cb = op_info->cb; +task->opaque = op_info->opaque; task->sess = sess;
[PULL 19/73] vdpa: move vhost reset after get vring base
From: Eugenio Pérez The function vhost.c:vhost_dev_stop calls vhost operation vhost_dev_start(false). In the case of vdpa it totally reset and wipes the device, making the fetching of the vring base (virtqueue state) totally useless. The kernel backend does not use vhost_dev_start vhost op callback, but vhost-user do. A patch to make vhost_user_dev_start more similar to vdpa is desirable, but it can be added on top. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-8-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/virtio/vhost-backend.h | 4 hw/virtio/vhost-vdpa.c| 24 +--- hw/virtio/vhost.c | 3 +++ 3 files changed, 24 insertions(+), 7 deletions(-) diff --git a/include/hw/virtio/vhost-backend.h b/include/hw/virtio/vhost-backend.h index c5ab49051e..ec3fbae58d 100644 --- a/include/hw/virtio/vhost-backend.h +++ b/include/hw/virtio/vhost-backend.h @@ -130,6 +130,9 @@ typedef bool (*vhost_force_iommu_op)(struct vhost_dev *dev); typedef int (*vhost_set_config_call_op)(struct vhost_dev *dev, int fd); + +typedef void (*vhost_reset_status_op)(struct vhost_dev *dev); + typedef struct VhostOps { VhostBackendType backend_type; vhost_backend_init vhost_backend_init; @@ -177,6 +180,7 @@ typedef struct VhostOps { vhost_get_device_id_op vhost_get_device_id; vhost_force_iommu_op vhost_force_iommu; vhost_set_config_call_op vhost_set_config_call; +vhost_reset_status_op vhost_reset_status; } VhostOps; int vhost_backend_update_device_iotlb(struct vhost_dev *dev, diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index aecc01c6a7..c9a82ce5e0 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -1146,14 +1146,23 @@ static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started) if (started) { memory_listener_register(&v->listener, &address_space_memory); return vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_DRIVER_OK); -} else { -vhost_vdpa_reset_device(dev); -vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE | - VIRTIO_CONFIG_S_DRIVER); -memory_listener_unregister(&v->listener); - -return 0; } + +return 0; +} + +static void vhost_vdpa_reset_status(struct vhost_dev *dev) +{ +struct vhost_vdpa *v = dev->opaque; + +if (dev->vq_index + dev->nvqs != dev->vq_index_end) { +return; +} + +vhost_vdpa_reset_device(dev); +vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE | + VIRTIO_CONFIG_S_DRIVER); +memory_listener_unregister(&v->listener); } static int vhost_vdpa_set_log_base(struct vhost_dev *dev, uint64_t base, @@ -1337,4 +1346,5 @@ const VhostOps vdpa_ops = { .vhost_vq_get_addr = vhost_vdpa_vq_get_addr, .vhost_force_iommu = vhost_vdpa_force_iommu, .vhost_set_config_call = vhost_vdpa_set_config_call, +.vhost_reset_status = vhost_vdpa_reset_status, }; diff --git a/hw/virtio/vhost.c b/hw/virtio/vhost.c index eb8c4c378c..a266396576 100644 --- a/hw/virtio/vhost.c +++ b/hw/virtio/vhost.c @@ -2049,6 +2049,9 @@ void vhost_dev_stop(struct vhost_dev *hdev, VirtIODevice *vdev, bool vrings) hdev->vqs + i, hdev->vq_index + i); } +if (hdev->vhost_ops->vhost_reset_status) { +hdev->vhost_ops->vhost_reset_status(hdev); +} if (vhost_dev_has_iommu(hdev)) { if (hdev->vhost_ops->vhost_set_iotlb_callback) { -- MST
[PULL 51/73] tests: acpi: update expected blobs
From: Igor Mammedov in PC machine case piix3-ide and PIIX4_PM get exposed +Device (S09) +{ +Name (_ADR, 0x00010001) // _ADR: Address +} + +Device (S0B) +{ +Name (_ADR, 0x00010003) // _ADR: Address +} in q35 machine case ich9-ahci gets exposed +Device (SFA) +{ +Name (_ADR, 0x001F0002) // _ADR: Address +} and addtional pci-testdev, virtio-balloon exposed in q35 multi-bridge test case +Device (S14) +{ +Name (_ADR, 0x00020004) // _ADR: Address +} + ... +Device (S22) +{ +Name (_ADR, 0x00040002) // _ADR: Address +} Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-26-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 37 -- tests/data/acpi/pc/DSDT | Bin 6454 -> 6488 bytes tests/data/acpi/pc/DSDT.acpierst | Bin 6377 -> 6411 bytes tests/data/acpi/pc/DSDT.acpihmat | Bin 7779 -> 7813 bytes tests/data/acpi/pc/DSDT.bridge| Bin 12581 -> 12615 bytes tests/data/acpi/pc/DSDT.cphp | Bin 6918 -> 6952 bytes tests/data/acpi/pc/DSDT.dimmpxm | Bin 8108 -> 8142 bytes tests/data/acpi/pc/DSDT.hpbridge | Bin 6417 -> 6451 bytes tests/data/acpi/pc/DSDT.hpbrroot | Bin 3309 -> 3343 bytes tests/data/acpi/pc/DSDT.ipmikcs | Bin 6526 -> 6560 bytes tests/data/acpi/pc/DSDT.memhp | Bin 7813 -> 7847 bytes tests/data/acpi/pc/DSDT.nohpet| Bin 6312 -> 6346 bytes tests/data/acpi/pc/DSDT.numamem | Bin 6460 -> 6494 bytes tests/data/acpi/pc/DSDT.roothp| Bin 9839 -> 9873 bytes tests/data/acpi/q35/DSDT | Bin 8344 -> 8361 bytes tests/data/acpi/q35/DSDT.acpierst | Bin 8361 -> 8378 bytes tests/data/acpi/q35/DSDT.acpihmat | Bin 9669 -> 9686 bytes tests/data/acpi/q35/DSDT.acpihmat-noinitiator | Bin 8623 -> 8640 bytes tests/data/acpi/q35/DSDT.applesmc | Bin 8390 -> 8407 bytes tests/data/acpi/q35/DSDT.bridge | Bin 11573 -> 11590 bytes tests/data/acpi/q35/DSDT.core-count2 | Bin 32484 -> 32501 bytes tests/data/acpi/q35/DSDT.cphp | Bin 8808 -> 8825 bytes tests/data/acpi/q35/DSDT.cxl | Bin 9656 -> 9673 bytes tests/data/acpi/q35/DSDT.dimmpxm | Bin 9998 -> 10015 bytes tests/data/acpi/q35/DSDT.ipmibt | Bin 8419 -> 8436 bytes tests/data/acpi/q35/DSDT.ipmismbus| Bin 8432 -> 8449 bytes tests/data/acpi/q35/DSDT.ivrs | Bin 8361 -> 8378 bytes tests/data/acpi/q35/DSDT.memhp| Bin 9703 -> 9720 bytes tests/data/acpi/q35/DSDT.mmio64 | Bin 9474 -> 9491 bytes tests/data/acpi/q35/DSDT.multi-bridge | Bin 12678 -> 12729 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 8188 -> 8205 bytes tests/data/acpi/q35/DSDT.nohpet | Bin 8202 -> 8219 bytes tests/data/acpi/q35/DSDT.numamem | Bin 8350 -> 8367 bytes tests/data/acpi/q35/DSDT.pvpanic-isa | Bin 8445 -> 8462 bytes tests/data/acpi/q35/DSDT.tis.tpm12| Bin 8950 -> 8967 bytes tests/data/acpi/q35/DSDT.tis.tpm2 | Bin 8976 -> 8993 bytes tests/data/acpi/q35/DSDT.viot | Bin 9453 -> 9470 bytes tests/data/acpi/q35/DSDT.xapic| Bin 35707 -> 35724 bytes 38 files changed, 37 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index 8911b10650..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,38 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/pc/DSDT", -"tests/data/acpi/pc/DSDT.acpierst", -"tests/data/acpi/pc/DSDT.acpihmat", -"tests/data/acpi/pc/DSDT.bridge", -"tests/data/acpi/pc/DSDT.cphp", -"tests/data/acpi/pc/DSDT.dimmpxm", -"tests/data/acpi/pc/DSDT.hpbridge", -"tests/data/acpi/pc/DSDT.hpbrroot", -"tests/data/acpi/pc/DSDT.ipmikcs", -"tests/data/acpi/pc/DSDT.memhp", -"tests/data/acpi/pc/DSDT.nohpet", -"tests/data/acpi/pc/DSDT.numamem", -"tests/data/acpi/pc/DSDT.roothp", -"tests/data/acpi/q35/DSDT", -"tests/data/acpi/q35/DSDT.acpierst", -"tests/data/acpi/q35/DSDT.acpihmat", -"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", -"tests/data/acpi/q35/DSDT.applesmc", -"tests/data/acpi/q35/DSDT.bridge", -"tests/data/acpi/q35/DSDT.core-count2", -"tests/data/acpi/q35/DSDT.cphp", -"tests/data/acpi/q35/DSDT.cxl", -"tests/data/acpi/q35/DSDT.dimmpxm", -"tests/data/acpi/q35/DSDT.ipmibt", -"tests/data/acpi/q35/DSDT.ipmismbus", -"tests/data/acpi/q35/DSDT.ivrs", -"tests/data/acpi/q35/DSDT.memhp", -"t
[PULL 54/73] tests: acpi: update expected blobs
From: Igor Mammedov an extra devices at non-zero function address with static _DSM method get exposed, ex: +Device (S15) +{ +Name (_ADR, 0x00020005) // _ADR: Address +Method (_DSM, 4, Serialized) // _DSM: Device-Specific Method +{ +Local0 = Package (0x01) +{ +0x66 +} +Return (EDSM (Arg0, Arg1, Arg2, Arg3, Local0)) +} +} Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-29-imamm...@redhat.com> --- tests/qtest/bios-tables-test-allowed-diff.h | 2 -- tests/data/acpi/q35/DSDT.multi-bridge | Bin 12729 -> 12770 bytes tests/data/acpi/q35/DSDT.noacpihp | Bin 8205 -> 8248 bytes 3 files changed, 2 deletions(-) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index ad2b429de8..dfb8523c8b 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,3 +1 @@ /* List of comma-separated changed AML files to ignore */ -"tests/data/acpi/q35/DSDT.multi-bridge", -"tests/data/acpi/q35/DSDT.noacpihp", diff --git a/tests/data/acpi/q35/DSDT.multi-bridge b/tests/data/acpi/q35/DSDT.multi-bridge index 4e4b5229502000550f169948393ba8cbc7a793d5..9ae8ee0b41738bd8951b9449abcfc67c293fdce1 100644 GIT binary patch delta 81 zcmdm){3w~rCD
[PULL 34/73] tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests
From: Igor Mammedov follow up fix for missing root-port AML will affect these tests by adding non-hotpluggable Device descriptors of colplugged bridges when bridge hotplug is disabled. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-9-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 3 +++ 1 file changed, 3 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dabc024f53..a0dbb28cde 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1,2 +1,5 @@ /* List of comma-separated changed AML files to ignore */ "tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/pc/DSDT.hpbridge", +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/q35/DSDT.noacpihp", -- MST
[PULL 09/73] cryptodev: Account statistics
From: zhenwei pi Account OPS/BPS for crypto device, this will be used for 'query-stats' QEMU monitor command and QoS in the next step. Note that a crypto device may support symmetric mode, asymmetric mode, both symmetric and asymmetric mode. So we use two structure to describe the statistics of a crypto device. Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-10-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin Reviewed-by: Daniel P. Berrangé --- include/sysemu/cryptodev.h | 49 +++ backends/cryptodev.c | 68 +++--- 2 files changed, 112 insertions(+), 5 deletions(-) diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index 048a627035..c0250c4a2c 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -246,6 +246,24 @@ struct CryptoDevBackendConf { uint64_t max_size; }; +typedef struct CryptodevBackendSymStat { +int64_t encrypt_ops; +int64_t decrypt_ops; +int64_t encrypt_bytes; +int64_t decrypt_bytes; +} CryptodevBackendSymStat; + +typedef struct CryptodevBackendAsymStat { +int64_t encrypt_ops; +int64_t decrypt_ops; +int64_t sign_ops; +int64_t verify_ops; +int64_t encrypt_bytes; +int64_t decrypt_bytes; +int64_t sign_bytes; +int64_t verify_bytes; +} CryptodevBackendAsymStat; + struct CryptoDevBackend { Object parent_obj; @@ -253,8 +271,39 @@ struct CryptoDevBackend { /* Tag the cryptodev backend is used by virtio-crypto or not */ bool is_used; CryptoDevBackendConf conf; +CryptodevBackendSymStat *sym_stat; +CryptodevBackendAsymStat *asym_stat; }; +#define CryptodevSymStatInc(be, op, bytes) do { \ + be->sym_stat->op##_bytes += (bytes); \ + be->sym_stat->op##_ops += 1; \ +} while (/*CONSTCOND*/0) + +#define CryptodevSymStatIncEncrypt(be, bytes) \ +CryptodevSymStatInc(be, encrypt, bytes) + +#define CryptodevSymStatIncDecrypt(be, bytes) \ +CryptodevSymStatInc(be, decrypt, bytes) + +#define CryptodevAsymStatInc(be, op, bytes) do { \ +be->asym_stat->op##_bytes += (bytes); \ +be->asym_stat->op##_ops += 1; \ +} while (/*CONSTCOND*/0) + +#define CryptodevAsymStatIncEncrypt(be, bytes) \ +CryptodevAsymStatInc(be, encrypt, bytes) + +#define CryptodevAsymStatIncDecrypt(be, bytes) \ +CryptodevAsymStatInc(be, decrypt, bytes) + +#define CryptodevAsymStatIncSign(be, bytes) \ +CryptodevAsymStatInc(be, sign, bytes) + +#define CryptodevAsymStatIncVerify(be, bytes) \ +CryptodevAsymStatInc(be, verify, bytes) + + /** * cryptodev_backend_new_client: * diff --git a/backends/cryptodev.c b/backends/cryptodev.c index ba7b0bc770..5ee7507ca5 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -107,6 +107,9 @@ void cryptodev_backend_cleanup( if (bc->cleanup) { bc->cleanup(backend, errp); } + +g_free(backend->sym_stat); +g_free(backend->asym_stat); } int cryptodev_backend_create_session( @@ -154,16 +157,61 @@ static int cryptodev_backend_operation( return -VIRTIO_CRYPTO_NOTSUPP; } +static int cryptodev_backend_account(CryptoDevBackend *backend, + CryptoDevBackendOpInfo *op_info) +{ +enum QCryptodevBackendAlgType algtype = op_info->algtype; +int len; + +if (algtype == QCRYPTODEV_BACKEND_ALG_ASYM) { +CryptoDevBackendAsymOpInfo *asym_op_info = op_info->u.asym_op_info; +len = asym_op_info->src_len; +switch (op_info->op_code) { +case VIRTIO_CRYPTO_AKCIPHER_ENCRYPT: +CryptodevAsymStatIncEncrypt(backend, len); +break; +case VIRTIO_CRYPTO_AKCIPHER_DECRYPT: +CryptodevAsymStatIncDecrypt(backend, len); +break; +case VIRTIO_CRYPTO_AKCIPHER_SIGN: +CryptodevAsymStatIncSign(backend, len); +break; +case VIRTIO_CRYPTO_AKCIPHER_VERIFY: +CryptodevAsymStatIncVerify(backend, len); +break; +default: +return -VIRTIO_CRYPTO_NOTSUPP; +} +} else if (algtype == QCRYPTODEV_BACKEND_ALG_SYM) { +CryptoDevBackendSymOpInfo *sym_op_info = op_info->u.sym_op_info; +len = sym_op_info->src_len; +switch (op_info->op_code) { +case VIRTIO_CRYPTO_CIPHER_ENCRYPT: +CryptodevSymStatIncEncrypt(backend, len); +break; +case VIRTIO_CRYPTO_CIPHER_DECRYPT: +CryptodevSymStatIncDecrypt(backend, len); +break; +default: +return -VIRTIO_CRYPTO_NOTSUPP; +} +} else { +error_report("Unsupported cryptodev alg type: %" PRIu32 "", algtype); +return -VIRTIO_CRYPTO_NOTSUPP; +} + +return len; +} + int cryptodev_backend_crypto_operation( CryptoDevBackend *backend, CryptoDevBackendOpInfo *op_info) { -QCryptodevBackendAlgType algtyp
[PULL 59/73] pcihp: move fields enabling hotplug into AcpiPciHpState
From: Igor Mammedov ... instead of duplicating them in piix4 and lpc and then trying to pass them to pcihp routines as arguments. it simplifies call sites and places pcihp specific in its own structure. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-34-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/hw/acpi/pcihp.h | 8 include/hw/acpi/piix4.h | 2 -- hw/acpi/acpi-pci-hotplug-stub.c | 5 ++--- hw/acpi/ich9.c | 15 +++ hw/acpi/pcihp.c | 16 hw/acpi/piix4.c | 23 +-- 6 files changed, 34 insertions(+), 35 deletions(-) diff --git a/include/hw/acpi/pcihp.h b/include/hw/acpi/pcihp.h index cd18ebdcdc..04c98511a4 100644 --- a/include/hw/acpi/pcihp.h +++ b/include/hw/acpi/pcihp.h @@ -49,14 +49,14 @@ typedef struct AcpiPciHpState { uint32_t acpi_index; PCIBus *root; MemoryRegion io; -bool legacy_piix; uint16_t io_base; uint16_t io_len; +bool use_acpi_hotplug_bridge; +bool use_acpi_root_pci_hotplug; } AcpiPciHpState; void acpi_pcihp_init(Object *owner, AcpiPciHpState *, PCIBus *root, - MemoryRegion *address_space_io, bool bridges_enabled, - uint16_t io_base); + MemoryRegion *address_space_io, uint16_t io_base); void acpi_pcihp_device_pre_plug_cb(HotplugHandler *hotplug_dev, DeviceState *dev, Error **errp); @@ -69,7 +69,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, Error **errp); /* Called on reset */ -void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off); +void acpi_pcihp_reset(AcpiPciHpState *s); void build_append_pcihp_slots(Aml *parent_scope, PCIBus *bus); diff --git a/include/hw/acpi/piix4.h b/include/hw/acpi/piix4.h index be1f8ea80e..eb1c122d80 100644 --- a/include/hw/acpi/piix4.h +++ b/include/hw/acpi/piix4.h @@ -57,8 +57,6 @@ struct PIIX4PMState { Notifier powerdown_notifier; AcpiPciHpState acpi_pci_hotplug; -bool use_acpi_hotplug_bridge; -bool use_acpi_root_pci_hotplug; bool not_migrate_acpi_index; uint8_t disable_s3; diff --git a/hw/acpi/acpi-pci-hotplug-stub.c b/hw/acpi/acpi-pci-hotplug-stub.c index a43f6dafc9..d1794399f7 100644 --- a/hw/acpi/acpi-pci-hotplug-stub.c +++ b/hw/acpi/acpi-pci-hotplug-stub.c @@ -5,8 +5,7 @@ const VMStateDescription vmstate_acpi_pcihp_pci_status; void acpi_pcihp_init(Object *owner, AcpiPciHpState *s, PCIBus *root_bus, - MemoryRegion *address_space_io, bool bridges_enabled, - uint16_t io_base) + MemoryRegion *address_space_io, uint16_t io_base) { return; } @@ -36,7 +35,7 @@ void acpi_pcihp_device_unplug_request_cb(HotplugHandler *hotplug_dev, return; } -void acpi_pcihp_reset(AcpiPciHpState *s, bool acpihp_root_off) +void acpi_pcihp_reset(AcpiPciHpState *s) { return; } diff --git a/hw/acpi/ich9.c b/hw/acpi/ich9.c index d23bfcaa6b..f778ade7ea 100644 --- a/hw/acpi/ich9.c +++ b/hw/acpi/ich9.c @@ -218,7 +218,7 @@ static bool vmstate_test_use_pcihp(void *opaque) { ICH9LPCPMRegs *s = opaque; -return s->use_acpi_hotplug_bridge; +return s->acpi_pci_hotplug.use_acpi_hotplug_bridge; } static const VMStateDescription vmstate_pcihp_state = { @@ -277,8 +277,8 @@ static void pm_reset(void *opaque) } pm->smi_en_wmask = ~0; -if (pm->use_acpi_hotplug_bridge) { -acpi_pcihp_reset(&pm->acpi_pci_hotplug, true); +if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) { +acpi_pcihp_reset(&pm->acpi_pci_hotplug); } acpi_update_sci(&pm->acpi_regs, pm->irq); @@ -316,12 +316,11 @@ void ich9_pm_init(PCIDevice *lpc_pci, ICH9LPCPMRegs *pm, qemu_irq sci_irq) acpi_pm_tco_init(&pm->tco_regs, &pm->io); } -if (pm->use_acpi_hotplug_bridge) { +if (pm->acpi_pci_hotplug.use_acpi_hotplug_bridge) { acpi_pcihp_init(OBJECT(lpc_pci), &pm->acpi_pci_hotplug, pci_get_bus(lpc_pci), pci_address_space_io(lpc_pci), -true, ACPI_PCIHP_ADDR_ICH9); qbus_set_hotplug_handler(BUS(pci_get_bus(lpc_pci)), @@ -403,14 +402,14 @@ static bool ich9_pm_get_acpi_pci_hotplug(Object *obj, Error **errp) { ICH9LPCState *s = ICH9_LPC_DEVICE(obj); -return s->pm.use_acpi_hotplug_bridge; +return s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge; } static void ich9_pm_set_acpi_pci_hotplug(Object *obj, bool value, Error **errp) { ICH9LPCState *s = ICH9_LPC_DEVICE(obj); -s->pm.use_acpi_hotplug_bridge = value; +s->pm.acpi_pci_hotplug.use_acpi_hotplug_bridge = value; } static bool ich9_pm_get_keep_pci_slot_hpc(Object *obj, Error **errp) @@ -435,7 +434,7 @@ v
[PULL 32/73] tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP'
From: Igor Mammedov Following corner case wasn't covered: -device pcie-root-port,id=NO_HOTPLUG,hotplug=off -device pcie-root-port,bus=NO_HOTPLUG when intermediate root-port has explicitly disabled hotplug, all hierarchy below it is not described anymore (used to be described in 7.2) So as result we see only NO_HOTPLUG root-port described +Device (S50) +{ +Name (_ADR, 0x000A) // _ADR: Address +} and no children nor notification chain for them are being composed. Follow up patches will fix missing leaf root-port descriptor and notification chain that should accompany it. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-7-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test.c | 5 - 1 file changed, 4 insertions(+), 1 deletion(-) diff --git a/tests/qtest/bios-tables-test.c b/tests/qtest/bios-tables-test.c index 7828c6b7e6..295d80740e 100644 --- a/tests/qtest/bios-tables-test.c +++ b/tests/qtest/bios-tables-test.c @@ -1055,7 +1055,10 @@ static void test_acpi_q35_multif_bridge(void) " -device pci-testdev,bus=pcie.0,addr=2.4" " -device pci-testdev,bus=pcie.0,addr=5.0" " -device pci-testdev,bus=rp0,addr=0.0" -" -device pci-testdev,bus=br1", &data); +" -device pci-testdev,bus=br1" +" -device pcie-root-port,id=rpnohp,chassis=8,addr=0xA.0,hotplug=off" +" -device pcie-root-port,id=rp3,chassis=9,bus=rpnohp" +, &data); /* hotplugged bridges section */ qtest_qmp_device_add(data.qts, "pci-bridge", "hpbr1", -- MST
[PULL 28/73] tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot
From: Igor Mammedov for q35.noacpihp use plain default Q35 DSDT table as a starting point. Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-3-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 2 ++ tests/data/acpi/q35/DSDT.noacpihp | Bin 0 -> 8252 bytes 2 files changed, 2 insertions(+) create mode 100644 tests/data/acpi/q35/DSDT.noacpihp diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..b2c5312871 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,3 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/q35/DSDT.noacpihp", diff --git a/tests/data/acpi/q35/DSDT.noacpihp b/tests/data/acpi/q35/DSDT.noacpihp new file mode 100644 index ..d68c472b460e4609a64ea67de3c4cebfca76164d GIT binary patch literal 8252 zcmb7JOKcm*8J^`sS}m8-l3H7~>{x`8ppO&@W#@%Hf|9#@*`iEwDLcg);8Jp0*$I$E z5(9Ap1F`}nj!#Wk2R$-@0`%6NdaZ$8+M90;&{Ge+EP5*dS-ZGGk3-x|ap-Ho;wfo^WamPH3nZN48=`{ABvb-Y&D z>^ED!U3qAkX5SM>X|rGPyUgrwwtVKU&Gs(^UgqAL%=53Tj@Gloox-B!gzbNx|8C{< zFTc3*Ugg0r{_*R3Z(11u&f(X@@A;U%q7NhMOf+&nA6_?Z6P=%19W8!72>B)$dk3-p71ry;JtetLT^44GJsP=}(pzvuSYX^QVJ@gTIJF=Gh2}p#IIaG8k0~ylT020Vk^K?XHn~ zC}R&AZ6lXFFc)LMnWkqJx8YhY;~C<2s`p;SZ>JpSjOfz?p`k zTrqt`2{v-8a~(fu=STj`@CJ(uX@f;E8;q7e7X$zBmB0Txc^wqM z=ZvOvhBGB}M%Rf@)j6x_oYi#B>N*jsI!#Tdsp&Lzod{K(bDGXMP3N4h6QQcp(sWvy zPD|H`P}P~!bmlajIbA10Ri~}#v^AZ!t`niEGq35)YdZ6~PK2t?c}?fMrgL7`iBQ$K zpy^!DbS~&R5vn>JO{b&jbab5vRh*NIToxv1$})O0TD zIuWWmT}`K}>2!6S2vwcOG@ZvZoyT;Y2vwcOHJ!&boyT>Z2vwc1F)?THS!qerxuokv zsOmhS={%w7JfZ7EsOmh)nU!QFJjt2WWU@OcnBJ3+n0|s?)|ks0b6IC1RGFtV<|&PN zN@pTenWr`8X^nYWXChRYPif4jH0Dz}6QRmH!Az;Y%GRDqI#3Mj8h28vMXgnf}LawZul zLa7r5DzKah16818paRO7WS|J;^@M>6EN8+%6(|{~fN~}oC_Az;Y%GRDqI#3Mglifg+STVW0xbnJ`cVN(L&RoJj_XQ0jz%3M^;BKouw% zsDN@N87M-j69y``0?L_Wpa`W-7^uK< zCJa=8l7R{+XOe*;lsaLc0?U~&Pz6c`DxjQ628vMXgnf}LawZulLa7r5 zDzKah16818paRO7WS|J8P8g`bawZH^fs%m=C})y^B9uB|paRR8Fi-_b1}dPONd}5g z>V$zJQVbN4YM=;J14XD9sKSJSDoip^g-HggFkzqy69%d<$v_n*8K}a9fhtTGsKO)z zRhVR;3KIsZFkzqylMGa0l7T8r7$_onbzz{0aK-pwl7S+`Wso5;<=DbN5y`QIfg+M) zO9qNijx8A|Lab9P_hF%IWDohD)qVOy`sED$RNTeZ2LAt#=03D`ci6r)w{PX#7h4-% zcMi7OEf?mk+@~{ajxQzLV)v-c%Hq2ff4E~UFgik_ZaLgrn}yF;W&mG=)R?9~KYN7oO{IL3 zmv4@hZyr*gM7qP(0u@M?g^T`W%OZSD+zXkk9w zZFYKXhBxnr-{%;Xt{sXOFW1)nQm5`H%4zgpxD-S;K<5+i!Hlb<9`1PODrlzs#IVuZb=; zt*bAj<$8OkTMJ}wEzA+G#pc=zp_?`*&EE(;B>vvx6gX!4fT zFut+Bu?_nc)L~l3n*BGnWrufuNI`{_yiRT1@LKDE;dR@W4XnJE>8ozAwCA;btnL>H znf8L(S_yE!(ko%vy0zXiV@8d5_|9MD8w2Q&=wza1wM^X*8z5P?;PvXiN{y`H4*S@H z)a!0@2HOUex$x<$FJx4qB!Jfa$D2_sX3=PQIDUd8#MT1V`zOwJ2>x=(_9m9nsYhv+3bLrR>VJ-H0w-t+Y-lg_qP8R6toJZ+LX=a{vIOo}J&wJdP9O{ts i^3*YlnPHw~26bm4s8^G5PqP)~*z^eEU7?1}@c#ikX|rko literal 0 HcmV?d1 -- MST
[PULL 21/73] vdpa: disable RAM block discard only for the first device
From: Eugenio Pérez Although it does not make a big difference, its more correct and simplifies the cleanup path in subsequent patches. Move ram_block_discard_disable(false) call to the top of vhost_vdpa_cleanup because: * We cannot use vhost_vdpa_first_dev after dev->opaque = NULL assignment. * Improve the stack order in cleanup: since it is the last action taken in init, it should be the first at cleanup. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-10-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 25 ++--- 1 file changed, 14 insertions(+), 11 deletions(-) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index c9a82ce5e0..49afa59261 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -431,16 +431,6 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp) trace_vhost_vdpa_init(dev, opaque); int ret; -/* - * Similar to VFIO, we end up pinning all guest memory and have to - * disable discarding of RAM. - */ -ret = ram_block_discard_disable(true); -if (ret) { -error_report("Cannot set discarding of RAM broken"); -return ret; -} - v = opaque; v->dev = dev; dev->opaque = opaque ; @@ -452,6 +442,16 @@ static int vhost_vdpa_init(struct vhost_dev *dev, void *opaque, Error **errp) return 0; } +/* + * Similar to VFIO, we end up pinning all guest memory and have to + * disable discarding of RAM. + */ +ret = ram_block_discard_disable(true); +if (ret) { +error_report("Cannot set discarding of RAM broken"); +return ret; +} + vhost_vdpa_add_status(dev, VIRTIO_CONFIG_S_ACKNOWLEDGE | VIRTIO_CONFIG_S_DRIVER); @@ -577,12 +577,15 @@ static int vhost_vdpa_cleanup(struct vhost_dev *dev) assert(dev->vhost_ops->backend_type == VHOST_BACKEND_TYPE_VDPA); v = dev->opaque; trace_vhost_vdpa_cleanup(dev, v); +if (vhost_vdpa_first_dev(dev)) { +ram_block_discard_disable(false); +} + vhost_vdpa_host_notifiers_uninit(dev, dev->nvqs); memory_listener_unregister(&v->listener); vhost_vdpa_svq_cleanup(dev); dev->opaque = NULL; -ram_block_discard_disable(false); return 0; } -- MST
[PULL 39/73] tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-14-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 35 + 1 file changed, 35 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..7e7745db39 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,36 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT", +"tests/data/acpi/pc/DSDT.acpierst", +"tests/data/acpi/pc/DSDT.acpihmat", +"tests/data/acpi/pc/DSDT.bridge", +"tests/data/acpi/pc/DSDT.cphp", +"tests/data/acpi/pc/DSDT.dimmpxm", +"tests/data/acpi/pc/DSDT.hpbridge", +"tests/data/acpi/pc/DSDT.ipmikcs", +"tests/data/acpi/pc/DSDT.memhp", +"tests/data/acpi/pc/DSDT.nohpet", +"tests/data/acpi/pc/DSDT.numamem", +"tests/data/acpi/pc/DSDT.roothp", +"tests/data/acpi/q35/DSDT", +"tests/data/acpi/q35/DSDT.acpierst", +"tests/data/acpi/q35/DSDT.acpihmat", +"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", +"tests/data/acpi/q35/DSDT.applesmc", +"tests/data/acpi/q35/DSDT.bridge", +"tests/data/acpi/q35/DSDT.core-count2", +"tests/data/acpi/q35/DSDT.cphp", +"tests/data/acpi/q35/DSDT.cxl", +"tests/data/acpi/q35/DSDT.dimmpxm", +"tests/data/acpi/q35/DSDT.ipmibt", +"tests/data/acpi/q35/DSDT.ipmismbus", +"tests/data/acpi/q35/DSDT.ivrs", +"tests/data/acpi/q35/DSDT.memhp", +"tests/data/acpi/q35/DSDT.mmio64", +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.nohpet", +"tests/data/acpi/q35/DSDT.numamem", +"tests/data/acpi/q35/DSDT.pvpanic-isa", +"tests/data/acpi/q35/DSDT.tis.tpm12", +"tests/data/acpi/q35/DSDT.tis.tpm2", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/DSDT.xapic", -- MST
[PULL 42/73] tests: acpi: whitelist DSDT before adding EDSM method
From: Igor Mammedov Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-17-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- tests/qtest/bios-tables-test-allowed-diff.h | 37 + 1 file changed, 37 insertions(+) diff --git a/tests/qtest/bios-tables-test-allowed-diff.h b/tests/qtest/bios-tables-test-allowed-diff.h index dfb8523c8b..8911b10650 100644 --- a/tests/qtest/bios-tables-test-allowed-diff.h +++ b/tests/qtest/bios-tables-test-allowed-diff.h @@ -1 +1,38 @@ /* List of comma-separated changed AML files to ignore */ +"tests/data/acpi/pc/DSDT", +"tests/data/acpi/pc/DSDT.acpierst", +"tests/data/acpi/pc/DSDT.acpihmat", +"tests/data/acpi/pc/DSDT.bridge", +"tests/data/acpi/pc/DSDT.cphp", +"tests/data/acpi/pc/DSDT.dimmpxm", +"tests/data/acpi/pc/DSDT.hpbridge", +"tests/data/acpi/pc/DSDT.hpbrroot", +"tests/data/acpi/pc/DSDT.ipmikcs", +"tests/data/acpi/pc/DSDT.memhp", +"tests/data/acpi/pc/DSDT.nohpet", +"tests/data/acpi/pc/DSDT.numamem", +"tests/data/acpi/pc/DSDT.roothp", +"tests/data/acpi/q35/DSDT", +"tests/data/acpi/q35/DSDT.acpierst", +"tests/data/acpi/q35/DSDT.acpihmat", +"tests/data/acpi/q35/DSDT.acpihmat-noinitiator", +"tests/data/acpi/q35/DSDT.applesmc", +"tests/data/acpi/q35/DSDT.bridge", +"tests/data/acpi/q35/DSDT.core-count2", +"tests/data/acpi/q35/DSDT.cphp", +"tests/data/acpi/q35/DSDT.cxl", +"tests/data/acpi/q35/DSDT.dimmpxm", +"tests/data/acpi/q35/DSDT.ipmibt", +"tests/data/acpi/q35/DSDT.ipmismbus", +"tests/data/acpi/q35/DSDT.ivrs", +"tests/data/acpi/q35/DSDT.memhp", +"tests/data/acpi/q35/DSDT.mmio64", +"tests/data/acpi/q35/DSDT.multi-bridge", +"tests/data/acpi/q35/DSDT.noacpihp", +"tests/data/acpi/q35/DSDT.nohpet", +"tests/data/acpi/q35/DSDT.numamem", +"tests/data/acpi/q35/DSDT.pvpanic-isa", +"tests/data/acpi/q35/DSDT.tis.tpm12", +"tests/data/acpi/q35/DSDT.tis.tpm2", +"tests/data/acpi/q35/DSDT.viot", +"tests/data/acpi/q35/DSDT.xapic", -- MST
[PULL 14/73] vdpa: Remember last call fd set
From: Eugenio Pérez As SVQ can be enabled dynamically at any time, it needs to store call fd always. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-3-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 12 ++-- 1 file changed, 6 insertions(+), 6 deletions(-) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index df3a1e92ac..108cd63289 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -1227,16 +1227,16 @@ static int vhost_vdpa_set_vring_call(struct vhost_dev *dev, struct vhost_vring_file *file) { struct vhost_vdpa *v = dev->opaque; +int vdpa_idx = file->index - dev->vq_index; +VhostShadowVirtqueue *svq = g_ptr_array_index(v->shadow_vqs, vdpa_idx); +/* Remember last call fd because we can switch to SVQ anytime. */ +vhost_svq_set_svq_call_fd(svq, file->fd); if (v->shadow_vqs_enabled) { -int vdpa_idx = file->index - dev->vq_index; -VhostShadowVirtqueue *svq = g_ptr_array_index(v->shadow_vqs, vdpa_idx); - -vhost_svq_set_svq_call_fd(svq, file->fd); return 0; -} else { -return vhost_vdpa_set_vring_dev_call(dev, file); } + +return vhost_vdpa_set_vring_dev_call(dev, file); } static int vhost_vdpa_get_features(struct vhost_dev *dev, -- MST
[PULL 02/73] cryptodev: Remove 'name' & 'model' fields
From: zhenwei pi We have already used qapi to generate crypto device types, this allows to convert type to a string 'model', so the 'model' field is not needed. And the 'name' field is not used by any backend driver, drop it. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-3-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/sysemu/cryptodev.h | 12 +++- backends/cryptodev-builtin.c| 3 +-- backends/cryptodev-lkcf.c | 2 +- backends/cryptodev-vhost-user.c | 3 +-- backends/cryptodev.c| 11 +-- 5 files changed, 7 insertions(+), 24 deletions(-) diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index 8d2adda974..af152d09db 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -218,8 +218,6 @@ struct CryptoDevBackendClass { struct CryptoDevBackendClient { QCryptodevBackendType type; -char *model; -char *name; char *info_str; unsigned int queue_index; int vring_enable; @@ -264,11 +262,8 @@ struct CryptoDevBackend { /** * cryptodev_backend_new_client: - * @model: the cryptodev backend model - * @name: the cryptodev backend name, can be NULL * - * Creates a new cryptodev backend client object - * with the @name in the model @model. + * Creates a new cryptodev backend client object. * * The returned object must be released with * cryptodev_backend_free_client() when no @@ -276,9 +271,8 @@ struct CryptoDevBackend { * * Returns: a new cryptodev backend client object */ -CryptoDevBackendClient * -cryptodev_backend_new_client(const char *model, -const char *name); +CryptoDevBackendClient *cryptodev_backend_new_client(void); + /** * cryptodev_backend_free_client: * @cc: the cryptodev backend client object diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index 8c7c10847d..08895271eb 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -72,8 +72,7 @@ static void cryptodev_builtin_init( return; } -cc = cryptodev_backend_new_client( - "cryptodev-builtin", NULL); +cc = cryptodev_backend_new_client(); cc->info_str = g_strdup_printf("cryptodev-builtin0"); cc->queue_index = 0; cc->type = QCRYPTODEV_BACKEND_TYPE_BUILTIN; diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c index 91e02c0df9..de3d1867c5 100644 --- a/backends/cryptodev-lkcf.c +++ b/backends/cryptodev-lkcf.c @@ -223,7 +223,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp) return; } -cc = cryptodev_backend_new_client("cryptodev-lkcf", NULL); +cc = cryptodev_backend_new_client(); cc->info_str = g_strdup_printf("cryptodev-lkcf0"); cc->queue_index = 0; cc->type = QCRYPTODEV_BACKEND_TYPE_LKCF; diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index c165a1b1d6..580bd1abb0 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -198,8 +198,7 @@ static void cryptodev_vhost_user_init( s->opened = true; for (i = 0; i < queues; i++) { -cc = cryptodev_backend_new_client( - "cryptodev-vhost-user", NULL); +cc = cryptodev_backend_new_client(); cc->info_str = g_strdup_printf("cryptodev-vhost-user%zu to %s ", i, chr->label); cc->queue_index = i; diff --git a/backends/cryptodev.c b/backends/cryptodev.c index 54ee8c81f5..81941af816 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -34,18 +34,11 @@ static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients; -CryptoDevBackendClient * -cryptodev_backend_new_client(const char *model, -const char *name) +CryptoDevBackendClient *cryptodev_backend_new_client(void) { CryptoDevBackendClient *cc; cc = g_new0(CryptoDevBackendClient, 1); -cc->model = g_strdup(model); -if (name) { -cc->name = g_strdup(name); -} - QTAILQ_INSERT_TAIL(&crypto_clients, cc, next); return cc; @@ -55,8 +48,6 @@ void cryptodev_backend_free_client( CryptoDevBackendClient *cc) { QTAILQ_REMOVE(&crypto_clients, cc, next); -g_free(cc->name); -g_free(cc->model); g_free(cc->info_str); g_free(cc); } -- MST
[PULL 00/73] virtio,pc,pci: features, fixes
The following changes since commit 9832009d9dd2386664c15cc70f6e6bfe062be8bd: Merge tag 'pull-riscv-to-apply-20230306' of https://gitlab.com/palmer-dabbelt/qemu into staging (2023-03-07 12:53:00 +) are available in the Git repository at: https://git.kernel.org/pub/scm/virt/kvm/mst/qemu.git tags/for_upstream for you to fetch changes up to 52062b213c13bd7fff966d36b554c04609c925d6: virtio: refresh vring region cache after updating a virtqueue size (2023-03-07 19:51:07 -0500) virtio,pc,pci: features, fixes Several features that landed at the last possible moment: Passthrough HDM decoder emulation Refactor cryptodev RAS error emulation and injection acpi-index support on non-hotpluggable slots Dynamically switch to vhost shadow virtqueues at vdpa net migration Plus a couple of bugfixes that look important to have in the release. Signed-off-by: Michael S. Tsirkin Albert Esteve (1): hw/virtio/vhost-user: avoid using unitialized errp Carlos López (2): virtio: fix reachable assertion due to stale value of cached region size virtio: refresh vring region cache after updating a virtqueue size Eugenio Pérez (14): vdpa net: move iova tree creation from init to start vdpa: Remember last call fd set vdpa: Negotiate _F_SUSPEND feature vdpa: rewind at get_base, not set_base vdpa: add vhost_vdpa->suspended parameter vdpa: add vhost_vdpa_suspend vdpa: move vhost reset after get vring base vdpa: add vdpa net migration state notifier vdpa: disable RAM block discard only for the first device vdpa net: block migration if the device has CVQ vdpa: block migration if device has unsupported features vdpa: block migration if SVQ does not admit a feature vdpa net: allow VHOST_F_LOG_ALL vdpa: return VHOST_F_LOG_ALL in vhost-vdpa devices Igor Mammedov (34): Revert "tests/qtest: Check for devices in bios-tables-test" tests: acpi: whitelist new q35.noacpihp test and pc.hpbrroot tests: acpi: add test_acpi_q35_tcg_no_acpi_hotplug test and extend test_acpi_piix4_no_acpi_pci_hotplug tests: acpi: update expected blobs tests: acpi: whitelist q35/DSDT.multi-bridge before extending testcase tests: acpi: extend multi-bridge case with case 'root-port,id=HOHP,hotplug=off root-port,bus=NOHP' x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set tests: acpi: whitelist pc/DSDT.hpbrroot and pc/DSDT.hpbridge tests x86: pcihp: fix missing bridge AML when intermediate root-port has 'hotplug=off' set tests: acpi: update expected blobs pcihp: piix4: do not redirect hotplug controller to piix4 when ACPI hotplug is disabled pci: fix 'hotplugglable' property behavior tests: acpi: whitelist DSDT blobs before isolating PCI _DSM func 0 prolog pcihp: move PCI _DSM function 0 prolog into separate function tests: acpi: update expected blobs tests: acpi: whitelist DSDT before adding EDSM method acpi: pci: add EDSM method to DSDT tests: acpi: update expected blobs tests: acpi: whitelist DSDT before adding device with acpi-index to testcases tests: acpi: add device with acpi-index on non-hotpluggble bus acpi: pci: support acpi-index for non-hotpluggable devices tests: acpi: update expected blobs tests: acpi: whitelist DSDT before exposing non zero functions acpi: pci: describe all functions on populated slots tests: acpi: update expected blobs tests: acpi: whitelist DSDT before adding non-0 function device with acpi-index to testcases tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus tests: acpi: update expected blobs pci: move acpi-index uniqueness check to generic PCI device code acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable acpi: pci: move BSEL into build_append_pcihp_slots() acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices() pcihp: move fields enabling hotplug into AcpiPciHpState pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback Jonathan Cameron (10): hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register hw/pci/aer: Add missing routing for AER errors hw/pci-bridge/cxl_root_port: Wire up AER hw/pci-bridge/cxl_root_port: Wire up MSI hw/mem/cxl-type3: Add AER extended capability hw/cxl: Fix endian issues in CXL RAS capability defaults / masks hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use. hw/mem/cxl_type3: Add CXL RAS Error Injection Support. hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers hw/pxb-cxl: Support passthrough HDM Dec
[PULL 33/73] x86: pcihp: fix missing PCNT callchain when intermediate root-port has 'hotplug=off' set
From: Igor Mammedov Beside BSEL numbers change (due to 2 extra root-ports in q35/miltibridge test), following change is expected: Scope (\_SB.PCI0) { ... +Scope (S50) +{ +Scope (S00) +{ +Method (PCNT, 0, NotSerialized) +{ +BNUM = Zero +DVNT (PCIU, One) +DVNT (PCID, 0x03) +} +} + +Method (PCNT, 0, NotSerialized) +{ +^S00.PCNT +} +} ... Method (PCNT, 0, NotSerialized) { +^S50.PCNT () ^S13.PCNT () ^S12.PCNT () ^S11.PCNT () I practice [1] hasn't broke anything since on hardware side we unset hotplug_handler on such intermediate port => hotplug behind it has not been properly wired and as result not worked. 1) Fixes: ddab4d3fae4e8 ("pcihp: compose PCNT callchain right before its user _GPE._E01") Signed-off-by: Igor Mammedov Message-Id: <20230302161543.286002-8-imamm...@redhat.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/i386/acpi-build.c | 22 +- 1 file changed, 13 insertions(+), 9 deletions(-) diff --git a/hw/i386/acpi-build.c b/hw/i386/acpi-build.c index b19fb4259e..c691104d47 100644 --- a/hw/i386/acpi-build.c +++ b/hw/i386/acpi-build.c @@ -517,16 +517,24 @@ static bool build_append_notfication_callback(Aml *parent_scope, PCIBus *sec; QObject *bsel; int nr_notifiers = 0; +GQueue *pcnt_bus_list = g_queue_new(); QLIST_FOREACH(sec, &bus->child, sibling) { Aml *br_scope = aml_scope("S%.02X", sec->parent_dev->devfn); -if (pci_bus_is_root(sec) || -!object_property_find(OBJECT(sec), ACPI_PCIHP_PROP_BSEL)) { +if (pci_bus_is_root(sec)) { continue; } nr_notifiers = nr_notifiers + build_append_notfication_callback(br_scope, sec); -aml_append(parent_scope, br_scope); +/* + * add new child scope to parent + * and keep track of bus that have PCNT, + * bus list is used later to call children PCNTs from this level PCNT + */ +if (nr_notifiers) { +g_queue_push_tail(pcnt_bus_list, sec); +aml_append(parent_scope, br_scope); +} } /* @@ -550,17 +558,13 @@ static bool build_append_notfication_callback(Aml *parent_scope, } /* Notify about child bus events in any case */ -QLIST_FOREACH(sec, &bus->child, sibling) { -if (pci_bus_is_root(sec) || -!object_property_find(OBJECT(sec), ACPI_PCIHP_PROP_BSEL)) { -continue; -} - +while ((sec = g_queue_pop_head(pcnt_bus_list))) { aml_append(method, aml_name("^S%.02X.PCNT", sec->parent_dev->devfn)); } aml_append(parent_scope, method); qobject_unref(bsel); +g_queue_free(pcnt_bus_list); return !!nr_notifiers; } -- MST
[PULL 05/73] cryptodev: Introduce 'query-cryptodev' QMP command
From: zhenwei pi Now we have a QMP command to query crypto devices: virsh qemu-monitor-command vm '{"execute": "query-cryptodev"}' | jq { "return": [ { "service": [ "akcipher", "mac", "hash", "cipher" ], "id": "cryptodev1", "client": [ { "queue": 0, "type": "builtin" } ] }, { "service": [ "akcipher" ], "id": "cryptodev0", "client": [ { "queue": 0, "type": "lkcf" } ] } ], "id": "libvirt-417" } Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-6-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/cryptodev.json | 44 +++ backends/cryptodev.c | 45 2 files changed, 89 insertions(+) diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json index 8732a30524..f33f96a692 100644 --- a/qapi/cryptodev.json +++ b/qapi/cryptodev.json @@ -43,3 +43,47 @@ { 'enum': 'QCryptodevBackendType', 'prefix': 'QCRYPTODEV_BACKEND_TYPE', 'data': ['builtin', 'vhost-user', 'lkcf']} + +## +# @QCryptodevBackendClient: +# +# Information about a queue of crypto device. +# +# @queue: the queue index of the crypto device +# +# @type: the type of the crypto device +# +# Since: 8.0 +## +{ 'struct': 'QCryptodevBackendClient', + 'data': { 'queue': 'uint32', +'type': 'QCryptodevBackendType' } } + +## +# @QCryptodevInfo: +# +# Information about a crypto device. +# +# @id: the id of the crypto device +# +# @service: supported service types of a crypto device +# +# @client: the additional infomation of the crypto device +# +# Since: 8.0 +## +{ 'struct': 'QCryptodevInfo', + 'data': { 'id': 'str', +'service': ['QCryptodevBackendServiceType'], +'client': ['QCryptodevBackendClient'] } } + +## +# @query-cryptodev: +# +# Returns information about current crypto devices. +# +# Returns: a list of @QCryptodevInfo +# +# Since: 8.0 +## +{ 'command': 'query-cryptodev', 'returns': ['QCryptodevInfo']} diff --git a/backends/cryptodev.c b/backends/cryptodev.c index c2a053db0e..3a45d19823 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -24,6 +24,7 @@ #include "qemu/osdep.h" #include "sysemu/cryptodev.h" #include "qapi/error.h" +#include "qapi/qapi-commands-cryptodev.h" #include "qapi/visitor.h" #include "qemu/config-file.h" #include "qemu/error-report.h" @@ -33,6 +34,50 @@ static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients; +static int qmp_query_cryptodev_foreach(Object *obj, void *data) +{ +CryptoDevBackend *backend; +QCryptodevInfoList **infolist = data; +uint32_t services, i; + +if (!object_dynamic_cast(obj, TYPE_CRYPTODEV_BACKEND)) { +return 0; +} + +QCryptodevInfo *info = g_new0(QCryptodevInfo, 1); +info->id = g_strdup(object_get_canonical_path_component(obj)); + +backend = CRYPTODEV_BACKEND(obj); +services = backend->conf.crypto_services; +for (i = 0; i < QCRYPTODEV_BACKEND_SERVICE__MAX; i++) { +if (services & (1 << i)) { +QAPI_LIST_PREPEND(info->service, i); +} +} + +for (i = 0; i < backend->conf.peers.queues; i++) { +CryptoDevBackendClient *cc = backend->conf.peers.ccs[i]; +QCryptodevBackendClient *client = g_new0(QCryptodevBackendClient, 1); + +client->queue = cc->queue_index; +client->type = cc->type; +QAPI_LIST_PREPEND(info->client, client); +} + +QAPI_LIST_PREPEND(*infolist, info); + +return 0; +} + +QCryptodevInfoList *qmp_query_cryptodev(Error **errp) +{ +QCryptodevInfoList *list = NULL; +Object *objs = container_get(object_get_root(), "/objects"); + +object_child_foreach(objs, qmp_query_cryptodev_foreach, &list); + +return list; +} CryptoDevBackendClient *cryptodev_backend_new_client(void) { -- MST
[PULL 18/73] vdpa: add vhost_vdpa_suspend
From: Eugenio Pérez The function vhost.c:vhost_dev_stop fetches the vring base so the vq state can be migrated to other devices. However, this is unreliable in vdpa, since we didn't signal the device to suspend the queues, making the value fetched useless. Suspend the device if possible before fetching first and subsequent vring bases. Moreover, vdpa totally reset and wipes the device at the last device before fetch its vrings base, making that operation useless in the last device. This will be fixed in later patches of this series. Signed-off-by: Eugenio Pérez Message-Id: <20230303172445.1089785-7-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 26 ++ hw/virtio/trace-events | 1 + 2 files changed, 27 insertions(+) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 517e3cdc8d..aecc01c6a7 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -692,11 +692,13 @@ static int vhost_vdpa_get_device_id(struct vhost_dev *dev, static int vhost_vdpa_reset_device(struct vhost_dev *dev) { +struct vhost_vdpa *v = dev->opaque; int ret; uint8_t status = 0; ret = vhost_vdpa_call(dev, VHOST_VDPA_SET_STATUS, &status); trace_vhost_vdpa_reset_device(dev, status); +v->suspended = false; return ret; } @@ -1095,6 +1097,29 @@ static void vhost_vdpa_svqs_stop(struct vhost_dev *dev) } } +static void vhost_vdpa_suspend(struct vhost_dev *dev) +{ +struct vhost_vdpa *v = dev->opaque; +int r; + +if (!vhost_vdpa_first_dev(dev)) { +return; +} + +if (dev->backend_cap & BIT_ULL(VHOST_BACKEND_F_SUSPEND)) { +trace_vhost_vdpa_suspend(dev); +r = ioctl(v->device_fd, VHOST_VDPA_SUSPEND); +if (unlikely(r)) { +error_report("Cannot suspend: %s(%d)", g_strerror(errno), errno); +} else { +v->suspended = true; +return; +} +} + +vhost_vdpa_reset_device(dev); +} + static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started) { struct vhost_vdpa *v = dev->opaque; @@ -1109,6 +1134,7 @@ static int vhost_vdpa_dev_start(struct vhost_dev *dev, bool started) } vhost_vdpa_set_vring_ready(dev); } else { +vhost_vdpa_suspend(dev); vhost_vdpa_svqs_stop(dev); vhost_vdpa_host_notifiers_uninit(dev, dev->nvqs); } diff --git a/hw/virtio/trace-events b/hw/virtio/trace-events index a87c5f39a2..8f8d05cf9b 100644 --- a/hw/virtio/trace-events +++ b/hw/virtio/trace-events @@ -50,6 +50,7 @@ vhost_vdpa_set_vring_ready(void *dev) "dev: %p" vhost_vdpa_dump_config(void *dev, const char *line) "dev: %p %s" vhost_vdpa_set_config(void *dev, uint32_t offset, uint32_t size, uint32_t flags) "dev: %p offset: %"PRIu32" size: %"PRIu32" flags: 0x%"PRIx32 vhost_vdpa_get_config(void *dev, void *config, uint32_t config_len) "dev: %p config: %p config_len: %"PRIu32 +vhost_vdpa_suspend(void *dev) "dev: %p" vhost_vdpa_dev_start(void *dev, bool started) "dev: %p started: %d" vhost_vdpa_set_log_base(void *dev, uint64_t base, unsigned long long size, int refcnt, int fd, void *log) "dev: %p base: 0x%"PRIx64" size: %llu refcnt: %d fd: %d log: %p" vhost_vdpa_set_vring_addr(void *dev, unsigned int index, unsigned int flags, uint64_t desc_user_addr, uint64_t used_user_addr, uint64_t avail_user_addr, uint64_t log_guest_addr) "dev: %p index: %u flags: 0x%x desc_user_addr: 0x%"PRIx64" used_user_addr: 0x%"PRIx64" avail_user_addr: 0x%"PRIx64" log_guest_addr: 0x%"PRIx64 -- MST
[PULL 07/73] hmp: add cryptodev info command
From: zhenwei pi Example of this command: # virsh qemu-monitor-command vm --hmp info cryptodev cryptodev1: service=[akcipher|mac|hash|cipher] queue 0: type=builtin cryptodev0: service=[akcipher] queue 0: type=lkcf Acked-by: Dr. David Alan Gilbert Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-8-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- include/monitor/hmp.h | 1 + backends/cryptodev-hmp-cmds.c | 54 +++ backends/meson.build | 1 + hmp-commands-info.hx | 14 + 4 files changed, 70 insertions(+) create mode 100644 backends/cryptodev-hmp-cmds.c diff --git a/include/monitor/hmp.h b/include/monitor/hmp.h index efae6b06bc..fdb69b7f9c 100644 --- a/include/monitor/hmp.h +++ b/include/monitor/hmp.h @@ -180,5 +180,6 @@ void hmp_ioport_read(Monitor *mon, const QDict *qdict); void hmp_ioport_write(Monitor *mon, const QDict *qdict); void hmp_boot_set(Monitor *mon, const QDict *qdict); void hmp_info_mtree(Monitor *mon, const QDict *qdict); +void hmp_info_cryptodev(Monitor *mon, const QDict *qdict); #endif diff --git a/backends/cryptodev-hmp-cmds.c b/backends/cryptodev-hmp-cmds.c new file mode 100644 index 00..4f7220bb13 --- /dev/null +++ b/backends/cryptodev-hmp-cmds.c @@ -0,0 +1,54 @@ +/* + * HMP commands related to cryptodev + * + * Copyright (c) 2023 Bytedance.Inc + * + * Authors: + *zhenwei pi + * + * This work is licensed under the terms of the GNU GPL, version 2 or + * (at your option) any later version. + */ + +#include "qemu/osdep.h" +#include "monitor/hmp.h" +#include "monitor/monitor.h" +#include "qapi/qapi-commands-cryptodev.h" +#include "qapi/qmp/qdict.h" + + +void hmp_info_cryptodev(Monitor *mon, const QDict *qdict) +{ +QCryptodevInfoList *il; +QCryptodevBackendServiceTypeList *sl; +QCryptodevBackendClientList *cl; + +for (il = qmp_query_cryptodev(NULL); il; il = il->next) { +g_autofree char *services = NULL; +QCryptodevInfo *info = il->value; +char *tmp_services; + +/* build a string like 'service=[akcipher|mac|hash|cipher]' */ +for (sl = info->service; sl; sl = sl->next) { +const char *service = QCryptodevBackendServiceType_str(sl->value); + +if (!services) { +services = g_strdup(service); +} else { +tmp_services = g_strjoin("|", services, service, NULL); +g_free(services); +services = tmp_services; +} +} +monitor_printf(mon, "%s: service=[%s]\n", info->id, services); + +for (cl = info->client; cl; cl = cl->next) { +QCryptodevBackendClient *client = cl->value; +monitor_printf(mon, "queue %" PRIu32 ": type=%s\n", + client->queue, + QCryptodevBackendType_str(client->type)); +} +} + +qapi_free_QCryptodevInfoList(il); +} diff --git a/backends/meson.build b/backends/meson.build index 954e658b25..b369e0a9d0 100644 --- a/backends/meson.build +++ b/backends/meson.build @@ -1,5 +1,6 @@ softmmu_ss.add([files( 'cryptodev-builtin.c', + 'cryptodev-hmp-cmds.c', 'cryptodev.c', 'hostmem-ram.c', 'hostmem.c', diff --git a/hmp-commands-info.hx b/hmp-commands-info.hx index 754b1e8408..47d63d26db 100644 --- a/hmp-commands-info.hx +++ b/hmp-commands-info.hx @@ -993,3 +993,17 @@ SRST ``info virtio-queue-element`` *path* *queue* [*index*] Display element of a given virtio queue ERST + +{ +.name = "cryptodev", +.args_type = "", +.params = "", +.help = "show the crypto devices", +.cmd= hmp_info_cryptodev, +.flags = "p", +}, + +SRST + ``info cryptodev`` +Show the crypto devices. +ERST -- MST
[PULL 15/73] vdpa: Negotiate _F_SUSPEND feature
From: Eugenio Pérez This is needed for qemu to know it can suspend the device to retrieve its status and enable SVQ with it, so all the process is transparent to the guest. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230303172445.1089785-4-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- hw/virtio/vhost-vdpa.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/hw/virtio/vhost-vdpa.c b/hw/virtio/vhost-vdpa.c index 108cd63289..5cfa9d5d27 100644 --- a/hw/virtio/vhost-vdpa.c +++ b/hw/virtio/vhost-vdpa.c @@ -659,7 +659,8 @@ static int vhost_vdpa_set_backend_cap(struct vhost_dev *dev) uint64_t features; uint64_t f = 0x1ULL << VHOST_BACKEND_F_IOTLB_MSG_V2 | 0x1ULL << VHOST_BACKEND_F_IOTLB_BATCH | -0x1ULL << VHOST_BACKEND_F_IOTLB_ASID; +0x1ULL << VHOST_BACKEND_F_IOTLB_ASID | +0x1ULL << VHOST_BACKEND_F_SUSPEND; int r; if (vhost_vdpa_call(dev, VHOST_GET_BACKEND_FEATURES, &features)) { -- MST
[PULL 06/73] cryptodev-builtin: Detect akcipher capability
From: zhenwei pi Rather than exposing akcipher service/RSA algorithm to virtio crypto device unconditionally, detect akcipher capability from akcipher crypto framework. This avoids unsuccessful requests. Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-7-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- backends/cryptodev-builtin.c | 18 +++--- 1 file changed, 15 insertions(+), 3 deletions(-) diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index c0fbb650d7..c45b5906c5 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -59,6 +59,19 @@ struct CryptoDevBackendBuiltin { CryptoDevBackendBuiltinSession *sessions[MAX_NUM_SESSIONS]; }; +static void cryptodev_builtin_init_akcipher(CryptoDevBackend *backend) +{ +QCryptoAkCipherOptions opts; + +opts.alg = QCRYPTO_AKCIPHER_ALG_RSA; +opts.u.rsa.padding_alg = QCRYPTO_RSA_PADDING_ALG_RAW; +if (qcrypto_akcipher_supports(&opts)) { +backend->conf.crypto_services |= + (1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER); +backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA; +} +} + static void cryptodev_builtin_init( CryptoDevBackend *backend, Error **errp) { @@ -81,11 +94,9 @@ static void cryptodev_builtin_init( backend->conf.crypto_services = 1u << QCRYPTODEV_BACKEND_SERVICE_CIPHER | 1u << QCRYPTODEV_BACKEND_SERVICE_HASH | - 1u << QCRYPTODEV_BACKEND_SERVICE_MAC | - 1u << QCRYPTODEV_BACKEND_SERVICE_AKCIPHER; + 1u << QCRYPTODEV_BACKEND_SERVICE_MAC; backend->conf.cipher_algo_l = 1u << VIRTIO_CRYPTO_CIPHER_AES_CBC; backend->conf.hash_algo = 1u << VIRTIO_CRYPTO_HASH_SHA1; -backend->conf.akcipher_algo = 1u << VIRTIO_CRYPTO_AKCIPHER_RSA; /* * Set the Maximum length of crypto request. * Why this value? Just avoid to overflow when @@ -94,6 +105,7 @@ static void cryptodev_builtin_init( backend->conf.max_size = LONG_MAX - sizeof(CryptoDevBackendOpInfo); backend->conf.max_cipher_key_len = CRYPTODEV_BUITLIN_MAX_CIPHER_KEY_LEN; backend->conf.max_auth_key_len = CRYPTODEV_BUITLIN_MAX_AUTH_KEY_LEN; +cryptodev_builtin_init_akcipher(backend); cryptodev_backend_set_ready(backend, true); } -- MST
[PULL 11/73] cryptodev: Support query-stats QMP command
From: zhenwei pi Now we can use "query-stats" QMP command to query statistics of crypto devices. (Originally this was designed to show statistics by '{"execute": "query-cryptodev"}'. Daniel Berrangé suggested that querying configuration info by "query-cryptodev", and querying runtime performance info by "query-stats". This makes sense!) Example: ~# virsh qemu-monitor-command vm '{"execute": "query-stats", \ "arguments": {"target": "cryptodev"} }' | jq { "return": [ { "provider": "cryptodev", "stats": [ { "name": "asym-verify-bytes", "value": 7680 }, ... { "name": "asym-decrypt-ops", "value": 32 }, { "name": "asym-encrypt-ops", "value": 48 } ], "qom-path": "/objects/cryptodev0" # support asym only }, { "provider": "cryptodev", "stats": [ { "name": "asym-verify-bytes", "value": 0 }, ... { "name": "sym-decrypt-bytes", "value": 5376 }, ... ], "qom-path": "/objects/cryptodev1" # support asym/sym } ], "id": "libvirt-422" } Suggested-by: Daniel P. Berrangé Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-12-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/stats.json| 10 ++- backends/cryptodev.c | 155 + stats/stats-hmp-cmds.c | 5 ++ stats/stats-qmp-cmds.c | 2 + 4 files changed, 170 insertions(+), 2 deletions(-) diff --git a/qapi/stats.json b/qapi/stats.json index 57db5b1c74..1f5d3c59ab 100644 --- a/qapi/stats.json +++ b/qapi/stats.json @@ -50,10 +50,14 @@ # # Enumeration of statistics providers. # +# @kvm: since 7.1 +# +# @cryptodev: since 8.0 +# # Since: 7.1 ## { 'enum': 'StatsProvider', - 'data': [ 'kvm' ] } + 'data': [ 'kvm', 'cryptodev' ] } ## # @StatsTarget: @@ -65,10 +69,12 @@ # # @vcpu: statistics that apply to a single virtual CPU. # +# @cryptodev: statistics that apply to a crypto device. since 8.0 +# # Since: 7.1 ## { 'enum': 'StatsTarget', - 'data': [ 'vm', 'vcpu' ] } + 'data': [ 'vm', 'vcpu', 'cryptodev' ] } ## # @StatsRequest: diff --git a/backends/cryptodev.c b/backends/cryptodev.c index 7c10a2e1cb..94ca393cee 100644 --- a/backends/cryptodev.c +++ b/backends/cryptodev.c @@ -23,8 +23,10 @@ #include "qemu/osdep.h" #include "sysemu/cryptodev.h" +#include "sysemu/stats.h" #include "qapi/error.h" #include "qapi/qapi-commands-cryptodev.h" +#include "qapi/qapi-types-stats.h" #include "qapi/visitor.h" #include "qemu/config-file.h" #include "qemu/error-report.h" @@ -32,6 +34,28 @@ #include "qom/object_interfaces.h" #include "hw/virtio/virtio-crypto.h" +#define SYM_ENCRYPT_OPS_STR "sym-encrypt-ops" +#define SYM_DECRYPT_OPS_STR "sym-decrypt-ops" +#define SYM_ENCRYPT_BYTES_STR "sym-encrypt-bytes" +#define SYM_DECRYPT_BYTES_STR "sym-decrypt-bytes" + +#define ASYM_ENCRYPT_OPS_STR "asym-encrypt-ops" +#define ASYM_DECRYPT_OPS_STR "asym-decrypt-ops" +#define ASYM_SIGN_OPS_STR "asym-sign-ops" +#define ASYM_VERIFY_OPS_STR "asym-verify-ops" +#define ASYM_ENCRYPT_BYTES_STR "asym-encrypt-bytes" +#define ASYM_DECRYPT_BYTES_STR "asym-decrypt-bytes" +#define ASYM_SIGN_BYTES_STR "asym-sign-bytes" +#define ASYM_VERIFY_BYTES_STR "asym-verify-bytes" + +typedef struct StatsArgs { +union StatsResultsType { +StatsResultList **stats; +StatsSchemaList **schema; +} result; +strList *names; +Error **errp; +} StatsArgs; static QTAILQ_HEAD(, CryptoDevBackendClient) crypto_clients; @@ -435,6 +459,134 @@ static void cryptodev_backend_finalize(Object *obj) } } +static StatsList *cryptodev_backend_stats_add(const char *name, int64_t *val, + StatsList *stats_list) +{ +Stats *stats = g_new0(Stats, 1); + +stats->name = g_strdup(name); +stats->value = g_new0(StatsValue, 1); +stats->value->type = QTYPE_QNUM; +stats->value->u.scalar = *val; + +QAPI_LIST_PREPEND(stats_list, stats); +return stats_list; +} + +static int cryptodev_backend_stats_query(Object *obj, void *data) +{ +StatsArgs *stats_args = data; +StatsResultList **stats_results = stats_args->result.stats; +StatsList *stats_list = NULL; +StatsResult *entry; +CryptoDevBackend *backend; +CryptodevBackendSymStat *sym_stat; +CryptodevBackendAsymStat *asym_stat; + +if (!object_dynamic_cast(obj, TYPE_CRYPTODEV_BACKEND)) { +return 0; +} + +backend = CRYPTODEV_BACKEND(obj); +sym_stat = backend->sym_stat; +if (sym_stat) { +stats_list = cryptodev_backend_stats_add(SYM_ENCRYPT_OPS_STR, + &sym_stat->encrypt_ops, stats_list); +stats_list = cryptodev_backend_stats_add(SYM_DECRYPT_OPS_STR, + &sym_stat
[PULL 13/73] vdpa net: move iova tree creation from init to start
From: Eugenio Pérez Only create iova_tree if and when it is needed. The cleanup keeps being responsible for the last VQ but this change allows it to merge both cleanup functions. Signed-off-by: Eugenio Pérez Acked-by: Jason Wang Message-Id: <20230303172445.1089785-2-epere...@redhat.com> Tested-by: Lei Yang Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- net/vhost-vdpa.c | 113 ++- 1 file changed, 83 insertions(+), 30 deletions(-) diff --git a/net/vhost-vdpa.c b/net/vhost-vdpa.c index de5ed8ff22..d195f48776 100644 --- a/net/vhost-vdpa.c +++ b/net/vhost-vdpa.c @@ -178,13 +178,9 @@ err_init: static void vhost_vdpa_cleanup(NetClientState *nc) { VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc); -struct vhost_dev *dev = &s->vhost_net->dev; qemu_vfree(s->cvq_cmd_out_buffer); qemu_vfree(s->status); -if (dev->vq_index + dev->nvqs == dev->vq_index_end) { -g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete); -} if (s->vhost_net) { vhost_net_cleanup(s->vhost_net); g_free(s->vhost_net); @@ -234,10 +230,64 @@ static ssize_t vhost_vdpa_receive(NetClientState *nc, const uint8_t *buf, return size; } +/** From any vdpa net client, get the netclient of the first queue pair */ +static VhostVDPAState *vhost_vdpa_net_first_nc_vdpa(VhostVDPAState *s) +{ +NICState *nic = qemu_get_nic(s->nc.peer); +NetClientState *nc0 = qemu_get_peer(nic->ncs, 0); + +return DO_UPCAST(VhostVDPAState, nc, nc0); +} + +static void vhost_vdpa_net_data_start_first(VhostVDPAState *s) +{ +struct vhost_vdpa *v = &s->vhost_vdpa; + +if (v->shadow_vqs_enabled) { +v->iova_tree = vhost_iova_tree_new(v->iova_range.first, + v->iova_range.last); +} +} + +static int vhost_vdpa_net_data_start(NetClientState *nc) +{ +VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc); +struct vhost_vdpa *v = &s->vhost_vdpa; + +assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA); + +if (v->index == 0) { +vhost_vdpa_net_data_start_first(s); +return 0; +} + +if (v->shadow_vqs_enabled) { +VhostVDPAState *s0 = vhost_vdpa_net_first_nc_vdpa(s); +v->iova_tree = s0->vhost_vdpa.iova_tree; +} + +return 0; +} + +static void vhost_vdpa_net_client_stop(NetClientState *nc) +{ +VhostVDPAState *s = DO_UPCAST(VhostVDPAState, nc, nc); +struct vhost_dev *dev; + +assert(nc->info->type == NET_CLIENT_DRIVER_VHOST_VDPA); + +dev = s->vhost_vdpa.dev; +if (dev->vq_index + dev->nvqs == dev->vq_index_end) { +g_clear_pointer(&s->vhost_vdpa.iova_tree, vhost_iova_tree_delete); +} +} + static NetClientInfo net_vhost_vdpa_info = { .type = NET_CLIENT_DRIVER_VHOST_VDPA, .size = sizeof(VhostVDPAState), .receive = vhost_vdpa_receive, +.start = vhost_vdpa_net_data_start, +.stop = vhost_vdpa_net_client_stop, .cleanup = vhost_vdpa_cleanup, .has_vnet_hdr = vhost_vdpa_has_vnet_hdr, .has_ufo = vhost_vdpa_has_ufo, @@ -351,7 +401,7 @@ dma_map_err: static int vhost_vdpa_net_cvq_start(NetClientState *nc) { -VhostVDPAState *s; +VhostVDPAState *s, *s0; struct vhost_vdpa *v; uint64_t backend_features; int64_t cvq_group; @@ -415,8 +465,6 @@ static int vhost_vdpa_net_cvq_start(NetClientState *nc) return r; } -v->iova_tree = vhost_iova_tree_new(v->iova_range.first, - v->iova_range.last); v->shadow_vqs_enabled = true; s->vhost_vdpa.address_space_id = VHOST_VDPA_NET_CVQ_ASID; @@ -425,6 +473,27 @@ out: return 0; } +s0 = vhost_vdpa_net_first_nc_vdpa(s); +if (s0->vhost_vdpa.iova_tree) { +/* + * SVQ is already configured for all virtqueues. Reuse IOVA tree for + * simplicity, whether CVQ shares ASID with guest or not, because: + * - Memory listener need access to guest's memory addresses allocated + * in the IOVA tree. + * - There should be plenty of IOVA address space for both ASID not to + * worry about collisions between them. Guest's translations are + * still validated with virtio virtqueue_pop so there is no risk for + * the guest to access memory that it shouldn't. + * + * To allocate a iova tree per ASID is doable but it complicates the + * code and it is not worth it for the moment. + */ +v->iova_tree = s0->vhost_vdpa.iova_tree; +} else { +v->iova_tree = vhost_iova_tree_new(v->iova_range.first, + v->iova_range.last); +} + r = vhost_vdpa_cvq_map_buf(&s->vhost_vdpa, s->cvq_cmd_out_buffer, vhost_vdpa_net_cvq_cmd_page_len(), false); if (unlikely(r < 0)) { @@ -449,15 +518,9 @@ static void vhost_v
[PULL 01/73] cryptodev: Introduce cryptodev.json
From: zhenwei pi Introduce QCryptodevBackendType in cryptodev.json, also apply this to related codes. Then we can drop 'enum CryptoDevBackendOptionsType'. Note that `CRYPTODEV_BACKEND_TYPE_NONE` is *NOT* used by anywhere, so drop it(no 'none' enum in QCryptodevBackendType). Reviewed-by: Daniel P. Berrangé Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-2-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- qapi/cryptodev.json | 20 qapi/qapi-schema.json | 1 + include/sysemu/cryptodev.h | 11 ++- backends/cryptodev-builtin.c| 2 +- backends/cryptodev-lkcf.c | 2 +- backends/cryptodev-vhost-user.c | 4 ++-- backends/cryptodev-vhost.c | 4 ++-- MAINTAINERS | 1 + qapi/meson.build| 1 + 9 files changed, 31 insertions(+), 15 deletions(-) create mode 100644 qapi/cryptodev.json diff --git a/qapi/cryptodev.json b/qapi/cryptodev.json new file mode 100644 index 00..b65edbe183 --- /dev/null +++ b/qapi/cryptodev.json @@ -0,0 +1,20 @@ +# -*- Mode: Python -*- +# vim: filetype=python +# +# This work is licensed under the terms of the GNU GPL, version 2 or later. +# See the COPYING file in the top-level directory. + +## +# @QCryptodevBackendType: +# +# The crypto device backend type +# +# @builtin: the QEMU builtin support +# @vhost-user: vhost-user +# @lkcf: Linux kernel cryptographic framework +# +# Since: 8.0 +## +{ 'enum': 'QCryptodevBackendType', + 'prefix': 'QCRYPTODEV_BACKEND_TYPE', + 'data': ['builtin', 'vhost-user', 'lkcf']} diff --git a/qapi/qapi-schema.json b/qapi/qapi-schema.json index f000b90744..1e923945db 100644 --- a/qapi/qapi-schema.json +++ b/qapi/qapi-schema.json @@ -95,3 +95,4 @@ { 'include': 'pci.json' } { 'include': 'stats.json' } { 'include': 'virtio.json' } +{ 'include': 'cryptodev.json' } diff --git a/include/sysemu/cryptodev.h b/include/sysemu/cryptodev.h index cf9b3f07fe..8d2adda974 100644 --- a/include/sysemu/cryptodev.h +++ b/include/sysemu/cryptodev.h @@ -25,6 +25,7 @@ #include "qemu/queue.h" #include "qom/object.h" +#include "qapi/qapi-types-cryptodev.h" /** * CryptoDevBackend: @@ -215,16 +216,8 @@ struct CryptoDevBackendClass { void *opaque); }; -typedef enum CryptoDevBackendOptionsType { -CRYPTODEV_BACKEND_TYPE_NONE = 0, -CRYPTODEV_BACKEND_TYPE_BUILTIN = 1, -CRYPTODEV_BACKEND_TYPE_VHOST_USER = 2, -CRYPTODEV_BACKEND_TYPE_LKCF = 3, -CRYPTODEV_BACKEND_TYPE__MAX, -} CryptoDevBackendOptionsType; - struct CryptoDevBackendClient { -CryptoDevBackendOptionsType type; +QCryptodevBackendType type; char *model; char *name; char *info_str; diff --git a/backends/cryptodev-builtin.c b/backends/cryptodev-builtin.c index cda6ca3b71..8c7c10847d 100644 --- a/backends/cryptodev-builtin.c +++ b/backends/cryptodev-builtin.c @@ -76,7 +76,7 @@ static void cryptodev_builtin_init( "cryptodev-builtin", NULL); cc->info_str = g_strdup_printf("cryptodev-builtin0"); cc->queue_index = 0; -cc->type = CRYPTODEV_BACKEND_TYPE_BUILTIN; +cc->type = QCRYPTODEV_BACKEND_TYPE_BUILTIN; backend->conf.peers.ccs[0] = cc; backend->conf.crypto_services = diff --git a/backends/cryptodev-lkcf.c b/backends/cryptodev-lkcf.c index 133bd706a4..91e02c0df9 100644 --- a/backends/cryptodev-lkcf.c +++ b/backends/cryptodev-lkcf.c @@ -226,7 +226,7 @@ static void cryptodev_lkcf_init(CryptoDevBackend *backend, Error **errp) cc = cryptodev_backend_new_client("cryptodev-lkcf", NULL); cc->info_str = g_strdup_printf("cryptodev-lkcf0"); cc->queue_index = 0; -cc->type = CRYPTODEV_BACKEND_TYPE_LKCF; +cc->type = QCRYPTODEV_BACKEND_TYPE_LKCF; backend->conf.peers.ccs[0] = cc; backend->conf.crypto_services = diff --git a/backends/cryptodev-vhost-user.c b/backends/cryptodev-vhost-user.c index ab3028e045..c165a1b1d6 100644 --- a/backends/cryptodev-vhost-user.c +++ b/backends/cryptodev-vhost-user.c @@ -67,7 +67,7 @@ cryptodev_vhost_user_get_vhost( { CryptoDevBackendVhostUser *s = CRYPTODEV_BACKEND_VHOST_USER(b); -assert(cc->type == CRYPTODEV_BACKEND_TYPE_VHOST_USER); +assert(cc->type == QCRYPTODEV_BACKEND_TYPE_VHOST_USER); assert(queue < MAX_CRYPTO_QUEUE_NUM); return s->vhost_crypto[queue]; @@ -203,7 +203,7 @@ static void cryptodev_vhost_user_init( cc->info_str = g_strdup_printf("cryptodev-vhost-user%zu to %s ", i, chr->label); cc->queue_index = i; -cc->type = CRYPTODEV_BACKEND_TYPE_VHOST_USER; +cc->type = QCRYPTODEV_BACKEND_TYPE_VHOST_USER; backend->conf.peers.ccs[i] = cc; diff --git a/backends/cryptodev-vhost.c b/backends/cryptodev-vhost.c index 74ea0ad63d..93523732f3 100644 --- a/backends/cryptodev-vhost.c +++ b/backends/cryptodev-vhost.c @@ -127,7 +127,7 @@ cryptodev_get_vhost(CryptoDe
[PULL 12/73] MAINTAINERS: add myself as the maintainer for cryptodev
From: zhenwei pi I developed the akcipher service, QoS setting, QMP/HMP commands and statistics accounting for crypto device. Making myself as the maintainer for QEMU's cryptodev. Cc: Gonglei Signed-off-by: zhenwei pi Message-Id: <20230301105847.253084-13-pizhen...@bytedance.com> Reviewed-by: Michael S. Tsirkin Signed-off-by: Michael S. Tsirkin --- MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index cbb05de8eb..72ac2ac4b6 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -2876,6 +2876,7 @@ T: git https://gitlab.com/ehabkost/qemu.git machine-next Cryptodev Backends M: Gonglei +M: zhenwei pi S: Maintained F: include/sysemu/cryptodev*.h F: backends/cryptodev*.c -- MST
Re: [PATCH V2 3/5] memory: introduce memory_region_unmap_iommu_notifier_range()
On Thu, Feb 23, 2023 at 02:59:22PM +0800, Jason Wang wrote: > This patch introduces a new helper to unmap the range of a specific > IOMMU notifier. > > Signed-off-by: Jason Wang > --- > include/exec/memory.h | 10 ++ > softmmu/memory.c | 13 + > 2 files changed, 23 insertions(+) > > diff --git a/include/exec/memory.h b/include/exec/memory.h > index 2e602a2fad..6fa0b071f0 100644 > --- a/include/exec/memory.h > +++ b/include/exec/memory.h > @@ -1731,6 +1731,16 @@ void memory_region_notify_iommu(IOMMUMemoryRegion > *iommu_mr, > void memory_region_notify_iommu_one(IOMMUNotifier *notifier, > IOMMUTLBEvent *event); > > +/** > + * memory_region_unmap_iommu_notifier_range: notify a unmap for an IOMMU > + * translation that covers the > + * range of a notifier > + * > + * @notifier: the notifier to be notified > + */ > +void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *n); > + > + > /** > * memory_region_register_iommu_notifier: register a notifier for changes to > * IOMMU translation entries. This causes doc warnings: /scm/qemu/docs/../include/exec/memory.h:1741: warning: Function parameter or member 'n' not described in 'memory_region_unmap_iommu_notifier_range' /scm/qemu/docs/../include/exec/memory.h:1741: warning: Excess function parameter 'notifier' description in 'memory_region_unmap_iommu_notifier_range' please fix. > diff --git a/softmmu/memory.c b/softmmu/memory.c > index 9d64efca26..ba43b4474e 100644 > --- a/softmmu/memory.c > +++ b/softmmu/memory.c > @@ -1996,6 +1996,19 @@ void memory_region_notify_iommu_one(IOMMUNotifier > *notifier, > } > } > > +void memory_region_unmap_iommu_notifier_range(IOMMUNotifier *n) > +{ > +IOMMUTLBEvent event; > + > +event.type = IOMMU_NOTIFIER_UNMAP; > +event.entry.target_as = &address_space_memory; > +event.entry.iova = n->start; > +event.entry.perm = IOMMU_NONE; > +event.entry.addr_mask = n->end - n->start; > + > +memory_region_notify_iommu_one(n, &event); > +} > + > void memory_region_notify_iommu(IOMMUMemoryRegion *iommu_mr, > int iommu_idx, > IOMMUTLBEvent event) > -- > 2.25.1
Re: [PATCH v4 2/2] hw/cxl: Multi-Region CXL Type-3 Devices (Volatile and Persistent)
On Mon, Feb 27, 2023 at 04:31:57PM +, Jonathan Cameron wrote: > From: Gregory Price > > This commit enables each CXL Type-3 device to contain one volatile > memory region and one persistent region. > > Two new properties have been added to cxl-type3 device initialization: > [volatile-memdev] and [persistent-memdev] > > The existing [memdev] property has been deprecated and will default the > memory region to a persistent memory region (although a user may assign > the region to a ram or file backed region). It cannot be used in > combination with the new [persistent-memdev] property. > > Partitioning volatile memory from persistent memory is not yet supported. > > Volatile memory is mapped at DPA(0x0), while Persistent memory is mapped > at DPA(vmem->size), per CXL Spec 8.2.9.8.2.0 - Get Partition Info. > > Signed-off-by: Gregory Price > Reviewed-by: Davidlohr Bueso > Reviewed-by: Fan Ni > Tested-by: Fan Ni > Signed-off-by: Jonathan Cameron > > --- > v4: > - In the code that is being touched, add the missing little endian > conversions. > Note that only little endian architectures are supported so far, so there is > no need to fix these urgently. However, it seems sensible to clean up > whilst > we are here > - Add entry to docs/about/deprecated.rst (Philippe) > --- > docs/about/deprecated.rst | 8 + > docs/system/devices/cxl.rst| 49 -- > hw/cxl/cxl-mailbox-utils.c | 32 ++-- > hw/mem/cxl_type3.c | 294 + > include/hw/cxl/cxl_device.h| 11 +- > tests/qtest/bios-tables-test.c | 8 +- > tests/qtest/cxl-test.c | 76 +++-- > 7 files changed, 364 insertions(+), 114 deletions(-) > > diff --git a/docs/about/deprecated.rst b/docs/about/deprecated.rst > index 15084f7bea..366d479498 100644 > --- a/docs/about/deprecated.rst > +++ b/docs/about/deprecated.rst > @@ -273,6 +273,14 @@ from Intel that was not properly allocated. Since > version 5.2, the controller > has used a properly allocated identifier. Deprecate the ``use-intel-id`` > machine compatibility parameter. > > +``-device cxl-type3,memdev=`` (since 8.0) > +^ > + > +The ``cxl-type3`` device initially only used a single memory backend. With > +the addition of volatile memory support, it is now necessary to distinguish > +between persistent and volatile memory backends. As such, memdev is > deprecated > +in favor of persistent-memdev. > + > > Block device options > > diff --git a/docs/system/devices/cxl.rst b/docs/system/devices/cxl.rst > index f25783a4ec..89a41cff73 100644 > --- a/docs/system/devices/cxl.rst > +++ b/docs/system/devices/cxl.rst > @@ -300,7 +300,7 @@ Example topology involving a switch:: > > Example command lines > - > -A very simple setup with just one directly attached CXL Type 3 device:: > +A very simple setup with just one directly attached CXL Type 3 Persistent > Memory device:: > >qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 > -cpu max \ >... > @@ -308,7 +308,28 @@ A very simple setup with just one directly attached CXL > Type 3 device:: >-object > memory-backend-file,id=cxl-lsa1,share=on,mem-path=/tmp/lsa.raw,size=256M \ >-device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \ >-device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \ > - -device > cxl-type3,bus=root_port13,memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem0 \ > + -device > cxl-type3,bus=root_port13,persistent-memdev=cxl-mem1,lsa=cxl-lsa1,id=cxl-pmem0 > \ > + -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G > + > +A very simple setup with just one directly attached CXL Type 3 Volatile > Memory device:: > + > + qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 > -cpu max \ > + ... > + -object memory-backend-ram,id=vmem0,share=on,size=256M \ > + -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \ > + -device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \ > + -device cxl-type3,bus=root_port13,volatile-memdev=vmem0,id=cxl-vmem0 \ > + -M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G > + > +The same volatile setup may optionally include an LSA region:: > + > + qemu-system-aarch64 -M virt,gic-version=3,cxl=on -m 4g,maxmem=8G,slots=8 > -cpu max \ > + ... > + -object memory-backend-ram,id=vmem0,share=on,size=256M \ > + -object > memory-backend-file,id=cxl-lsa0,share=on,mem-path=/tmp/lsa.raw,size=256M \ > + -device pxb-cxl,bus_nr=12,bus=pcie.0,id=cxl.1 \ > + -device cxl-rp,port=0,bus=cxl.1,id=root_port13,chassis=0,slot=2 \ > + -device > cxl-type3,bus=root_port13,volatile-memdev=vmem0,lsa=cxl-lsa0,id=cxl-vmem0 \ >-M cxl-fmw.0.targets.0=cxl.1,cxl-fmw.0.size=4G > > A setup suitable for 4 way interleave. Only one fixed window provided, to > enable 2 way > @@ -328,13 +349,13 @@ the CXL Type3 device directly attached (no switches).:: >-device pxb-cxl,bus_nr=12,bus
Re: [PATCH v2] virtio-balloon: optimize the virtio-balloon on the ARM platform
On Wed, Mar 01, 2023 at 06:38:13AM +, Yangming wrote: > Optimize the virtio-balloon feature on the ARM platform by adding > a variable to keep track of the current hot-plugged pc-dimm size, > instead of traversing the virtual machine's memory modules to count > the current RAM size during the balloon inflation or deflation > process. This variable can be updated only when plugging or unplugging > the device, which will result in an increase of approximately 60% > efficiency of balloon process on the ARM platform. > > We tested the total amount of time required for the balloon inflation process > on ARM: > inflate the balloon to 64GB of a 128GB guest under stress. > Before: 102 seconds > After: 42 seconds > > Signed-off-by: Qi Xi > Signed-off-by: Ming Yang yangmin...@huawei.com > --- > Refactor the code by adding comments and removing unnecessary code. > > hw/mem/pc-dimm.c | 7 +++ > hw/virtio/virtio-balloon.c | 33 + > include/hw/boards.h| 2 ++ > 3 files changed, 14 insertions(+), 28 deletions(-) > > diff --git a/hw/mem/pc-dimm.c b/hw/mem/pc-dimm.c > index 50ef83215c..3f2734a267 100644 > --- a/hw/mem/pc-dimm.c > +++ b/hw/mem/pc-dimm.c > @@ -81,6 +81,10 @@ void pc_dimm_plug(PCDIMMDevice *dimm, MachineState > *machine) > > memory_device_plug(MEMORY_DEVICE(dimm), machine); > vmstate_register_ram(vmstate_mr, DEVICE(dimm)); > +/* count only "real" DIMMs, not NVDIMMs */ > +if (!object_dynamic_cast(OBJECT(dimm), TYPE_NVDIMM)) { > +machine->device_memory->dimm_size += vmstate_mr->size; > +} > } > > void pc_dimm_unplug(PCDIMMDevice *dimm, MachineState *machine) vmstate_mr->size is Int128 you are not supposed to do math on it. And generally poking at this struct is a bad idea. I think memory_region_size will do what you want but not 100% sure. Maybe you need to look at the flatview ... David? > @@ -90,6 +94,9 @@ void pc_dimm_unplug(PCDIMMDevice *dimm, MachineState > *machine) > > memory_device_unplug(MEMORY_DEVICE(dimm), machine); > vmstate_unregister_ram(vmstate_mr, DEVICE(dimm)); > +if (!object_dynamic_cast(OBJECT(dimm), TYPE_NVDIMM)) { > +machine->device_memory->dimm_size -= vmstate_mr->size; > +} > } > > static int pc_dimm_slot2bitmap(Object *obj, void *opaque) > diff --git a/hw/virtio/virtio-balloon.c b/hw/virtio/virtio-balloon.c > index 746f07c4d2..2814a47cb1 100644 > --- a/hw/virtio/virtio-balloon.c > +++ b/hw/virtio/virtio-balloon.c > @@ -729,37 +729,14 @@ static void virtio_balloon_get_config(VirtIODevice > *vdev, uint8_t *config_data) > memcpy(config_data, &config, virtio_balloon_config_size(dev)); > } > > -static int build_dimm_list(Object *obj, void *opaque) > -{ > -GSList **list = opaque; > - > -if (object_dynamic_cast(obj, TYPE_PC_DIMM)) { > -DeviceState *dev = DEVICE(obj); > -if (dev->realized) { /* only realized DIMMs matter */ > -*list = g_slist_prepend(*list, dev); > -} > -} > - > -object_child_foreach(obj, build_dimm_list, opaque); > -return 0; > -} > - > static ram_addr_t get_current_ram_size(void) > { > -GSList *list = NULL, *item; > -ram_addr_t size = current_machine->ram_size; > - > -build_dimm_list(qdev_get_machine(), &list); > -for (item = list; item; item = g_slist_next(item)) { > -Object *obj = OBJECT(item->data); > -if (!strcmp(object_get_typename(obj), TYPE_PC_DIMM)) { > -size += object_property_get_int(obj, PC_DIMM_SIZE_PROP, > -&error_abort); > -} > +MachineState *machine = MACHINE(qdev_get_machine()); > +if (machine->device_memory) { > +return machine->ram_size + machine->device_memory->dimm_size; > +} else { > +return machine->ram_size; > } > -g_slist_free(list); > - > -return size; > } > > static bool virtio_balloon_page_poison_support(void *opaque) > diff --git a/include/hw/boards.h b/include/hw/boards.h > index 6fbbfd56c8..397ec10468 100644 > --- a/include/hw/boards.h > +++ b/include/hw/boards.h > @@ -292,10 +292,12 @@ struct MachineClass { > * @base: address in guest physical address space where the memory > * address space for memory devices starts > * @mr: address space container for memory devices > + * @dimm_size: the sum of plugged DIMMs' sizes > */ > typedef struct DeviceMemoryState { > hwaddr base; > MemoryRegion mr; > +ram_addr_t dimm_size; > } DeviceMemoryState; > > /** > -- > 2.33.0
Re: [PATCH v10 9/9] KVM: Enable and expose KVM_MEM_PRIVATE
Chao Peng writes: On Sat, Jan 14, 2023 at 12:01:01AM +, Sean Christopherson wrote: On Fri, Dec 02, 2022, Chao Peng wrote: ... Strongly prefer to use similar logic to existing code that detects wraps: mem->restricted_offset + mem->memory_size < mem->restricted_offset This is also where I'd like to add the "gfn is aligned to offset" check, though my brain is too fried to figure that out right now. Used count_trailing_zeros() for this TODO, unsure we have other better approach. diff --git a/virt/kvm/kvm_main.c b/virt/kvm/kvm_main.c index afc8c26fa652..fd34c5f7cd2f 100644 --- a/virt/kvm/kvm_main.c +++ b/virt/kvm/kvm_main.c @@ -56,6 +56,7 @@ #include #include #include +#include #include "coalesced_mmio.h" #include "async_pf.h" @@ -2087,6 +2088,19 @@ static bool kvm_check_memslot_overlap(struct kvm_memslots *slots, int id, return false; } +/* + * Return true when ALIGNMENT(offset) >= ALIGNMENT(gpa). + */ +static bool kvm_check_rmem_offset_alignment(u64 offset, u64 gpa) +{ + if (!offset) + return true; + if (!gpa) + return false; + + return !!(count_trailing_zeros(offset) >= count_trailing_zeros(gpa)); Perhaps we could do something like #define lowest_set_bit(val) (val & -val) and use return lowest_set_bit(offset) >= lowest_set_bit(gpa); Please help me to understand: why must ALIGNMENT(offset) >= ALIGNMENT(gpa)? Why is it not sufficient to have both gpa and offset be aligned to PAGE_SIZE? +} + /* * Allocate some memory and give it an address in the guest physical address * space. @@ -2128,7 +2142,8 @@ int __kvm_set_memory_region(struct kvm *kvm, if (mem->flags & KVM_MEM_PRIVATE && (mem->restrictedmem_offset & (PAGE_SIZE - 1) || mem->restrictedmem_offset + mem->memory_size < mem->restrictedmem_offset || -0 /* TODO: require gfn be aligned with restricted offset */)) +!kvm_check_rmem_offset_alignment(mem->restrictedmem_offset, + mem->guest_phys_addr))) return -EINVAL; if (as_id >= kvm_arch_nr_memslot_as_ids(kvm) || id >= KVM_MEM_SLOTS_NUM) return -EINVAL;
[PATCH v3 2/4] configs/targets: Have all MIPS targets select FDT
With the introduction of the MIPS virt machine in a pair of commits, all MIPS targets will require libfdt. Define TARGET_NEED_FDT in all mips*-softmmu.mak files. Signed-off-by: Philippe Mathieu-Daudé --- configs/targets/mips-softmmu.mak | 1 + configs/targets/mips64-softmmu.mak | 1 + configs/targets/mipsel-softmmu.mak | 1 + 3 files changed, 3 insertions(+) diff --git a/configs/targets/mips-softmmu.mak b/configs/targets/mips-softmmu.mak index 7787a4d94c..a5c1db82c9 100644 --- a/configs/targets/mips-softmmu.mak +++ b/configs/targets/mips-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_BIG_ENDIAN=y TARGET_SUPPORTS_MTTCG=y +TARGET_NEED_FDT=y diff --git a/configs/targets/mips64-softmmu.mak b/configs/targets/mips64-softmmu.mak index 568d66650c..398e0fc244 100644 --- a/configs/targets/mips64-softmmu.mak +++ b/configs/targets/mips64-softmmu.mak @@ -2,3 +2,4 @@ TARGET_ARCH=mips64 TARGET_BASE_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_BIG_ENDIAN=y +TARGET_NEED_FDT=y diff --git a/configs/targets/mipsel-softmmu.mak b/configs/targets/mipsel-softmmu.mak index c7c41f4fb7..3ddebca575 100644 --- a/configs/targets/mipsel-softmmu.mak +++ b/configs/targets/mipsel-softmmu.mak @@ -1,3 +1,4 @@ TARGET_ARCH=mips TARGET_ALIGNED_ONLY=y TARGET_SUPPORTS_MTTCG=y +TARGET_NEED_FDT=y -- 2.38.1
[PATCH v3 0/4] MIPS Virt machine
Since v2: - Remove mips64 from gitlab's build-without-defaults job - Require libfdt for all MIPS targets - Various changes described in each trickbox/virt patches v2 cover from Jiaxun Yang: This patchset is to add a new machine type for MIPS architecture, which is purely a VirtIO machine. It is design to utilize existing VirtIO infrastures but also compatible with MIPS's existing internal simulation tools. It should be able to cooperate with any MIPS core and boot Generic MIPS kernel. Kernel patch available at: https://lore.kernel.org/linux-mips/20230304221524.47160-1-jiaxun.y...@flygoat.com/ Jiaxun Yang (2): hw/misc: Add MIPS Trickbox device hw/mips: Add MIPS virt board Philippe Mathieu-Daudé (2): gitlab-ci: Remove mips64-softmmu from build-without-defaults job configs/targets: Have all MIPS targets select FDT .gitlab-ci.d/buildtest.yml | 4 +- MAINTAINERS | 7 + configs/devices/mips-softmmu/common.mak | 1 + configs/targets/mips-softmmu.mak| 1 + configs/targets/mips64-softmmu.mak | 1 + configs/targets/mipsel-softmmu.mak | 1 + docs/system/target-mips.rst | 22 + hw/mips/Kconfig | 16 + hw/mips/meson.build | 1 + hw/mips/virt.c | 913 hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + hw/misc/mips_trickbox.c | 97 +++ hw/misc/trace-events| 4 + include/hw/misc/mips_trickbox.h | 39 + 15 files changed, 1109 insertions(+), 2 deletions(-) create mode 100644 hw/mips/virt.c create mode 100644 hw/misc/mips_trickbox.c create mode 100644 include/hw/misc/mips_trickbox.h -- 2.38.1
[PATCH v3 3/4] hw/misc: Add MIPS Trickbox device
From: Jiaxun Yang MIPS Trickbox is a emulated device present in MIPS's IASIM simulator for decades. It's capable of managing simulator status, signaling interrupts, doing DMA and EJTAG signal stimulations. For now we just use definition of this device and implement power management related functions. Signed-off-by: Jiaxun Yang Message-Id: <20230304223803.55764-2-jiaxun.y...@flygoat.com> [PMD: Remove pointless mask in mips_trickbox_write(), declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE()] Signed-off-by: Philippe Mathieu-Daudé --- hw/misc/Kconfig | 3 + hw/misc/meson.build | 1 + hw/misc/mips_trickbox.c | 97 + hw/misc/trace-events| 4 ++ include/hw/misc/mips_trickbox.h | 39 + 5 files changed, 144 insertions(+) create mode 100644 hw/misc/mips_trickbox.c create mode 100644 include/hw/misc/mips_trickbox.h diff --git a/hw/misc/Kconfig b/hw/misc/Kconfig index 2ef5781ef8..9f09da23c1 100644 --- a/hw/misc/Kconfig +++ b/hw/misc/Kconfig @@ -85,6 +85,9 @@ config STM32F4XX_EXTI config MIPS_ITU bool +config MIPS_TRICKBOX +bool + config MPS2_FPGAIO bool select LED diff --git a/hw/misc/meson.build b/hw/misc/meson.build index a40245ad44..4b6c50832c 100644 --- a/hw/misc/meson.build +++ b/hw/misc/meson.build @@ -136,6 +136,7 @@ specific_ss.add(when: 'CONFIG_MAC_VIA', if_true: files('mac_via.c')) specific_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('mips_cmgcr.c', 'mips_cpc.c')) specific_ss.add(when: 'CONFIG_MIPS_ITU', if_true: files('mips_itu.c')) +specific_ss.add(when: 'CONFIG_MIPS_TRICKBOX', if_true: files('mips_trickbox.c')) softmmu_ss.add(when: 'CONFIG_SBSA_REF', if_true: files('sbsa_ec.c')) diff --git a/hw/misc/mips_trickbox.c b/hw/misc/mips_trickbox.c new file mode 100644 index 00..86b00a8c0d --- /dev/null +++ b/hw/misc/mips_trickbox.c @@ -0,0 +1,97 @@ +/* + * SPDX-License-Identifier: LGPL-2.0-or-later + * + * MIPS Trickbox + */ + +#include "qemu/osdep.h" +#include "hw/sysbus.h" +#include "qapi/error.h" +#include "qemu/log.h" +#include "qemu/module.h" +#include "trace.h" +#include "sysemu/runstate.h" +#include "hw/misc/mips_trickbox.h" + +static uint64_t mips_trickbox_read(void *opaque, hwaddr addr, unsigned int size) +{ +uint64_t value = 0; + +qemu_log_mask(LOG_UNIMP, +"%s: unimplemented register read 0x%02"HWADDR_PRIx"\n", +__func__, addr); +trace_mips_trickbox_read(size, value); + +return 0; +} + +static void mips_trickbox_write(void *opaque, hwaddr addr, + uint64_t val64, unsigned int size) +{ +trace_mips_trickbox_write(size, val64); + +switch (addr) { +case REG_SIM_CMD: +switch (val64) { +case TRICK_PANIC: +qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_PANIC); +break; +case TRICK_HALT: +qemu_system_shutdown_request(SHUTDOWN_CAUSE_GUEST_SHUTDOWN); +break; +case TRICK_SUSPEND: +qemu_system_suspend_request(); +break; +case TRICK_RESET: +qemu_system_reset_request(SHUTDOWN_CAUSE_GUEST_RESET); +break; +case TRICK_PASS_MIPS: +case TRICK_PASS_NANOMIPS: +exit(EXIT_SUCCESS); +break; +case TRICK_FAIL_MIPS: +case TRICK_FAIL_NANOMIPS: +exit(EXIT_FAILURE); +break; +} +break; +default: +qemu_log_mask(LOG_UNIMP, + "%s: unimplemented register write 0x%02"HWADDR_PRIx"\n", + __func__, addr); +break; +} +} + +static const MemoryRegionOps mips_trickbox_ops = { +.read = mips_trickbox_read, +.write = mips_trickbox_write, +.endianness = DEVICE_NATIVE_ENDIAN, +.valid = { +.min_access_size = 2, +.max_access_size = 4 +} +}; + +static void mips_trickbox_init(Object *obj) +{ +MIPSTrickboxState *s = MIPS_TRICKBOX(obj); + +memory_region_init_io(&s->mmio, obj, &mips_trickbox_ops, s, + TYPE_MIPS_TRICKBOX, 0x100); +sysbus_init_mmio(SYS_BUS_DEVICE(obj), &s->mmio); +} + +static const TypeInfo mips_trickbox_info = { +.name = TYPE_MIPS_TRICKBOX, +.parent= TYPE_SYS_BUS_DEVICE, +.instance_size = sizeof(MIPSTrickboxState), +.instance_init = mips_trickbox_init, +}; + +static void mips_trickbox_register_types(void) +{ +type_register_static(&mips_trickbox_info); +} + +type_init(mips_trickbox_register_types) diff --git a/hw/misc/trace-events b/hw/misc/trace-events index c47876a902..8603cf0d5a 100644 --- a/hw/misc/trace-events +++ b/hw/misc/trace-events @@ -279,3 +279,7 @@ virt_ctrl_instance_init(void *dev) "ctrl: %p" lasi_chip_mem_valid(uint64_t addr, uint32_t val) "access to addr 0x%"PRIx64" is %d" lasi_chip_read(uint64_t addr, uint32_t val) "addr 0x%"PRIx64" val 0x%08x" lasi_chip_write(uint64_t addr, uint32_t
[PATCH v3 4/4] hw/mips: Add MIPS virt board
From: Jiaxun Yang MIPS virt board is design to utilize existing VirtIO infrastures but also comptitable with MIPS's existing internal simulation tools. It includes virtio-pci, virtio-mmio, pcie gpex, flash rom, fw_cfg, goldfish-rtc and MIPS CPS system. It should be able to cooperate with any MIPS CPU cores. Signed-off-by: Jiaxun Yang Message-Id: <20230304223803.55764-3-jiaxun.y...@flygoat.com> [PMD: Do not select PCI in Kconfig, compile virt.o using fdt flags in meson.build, use HWADDR_PRIx, name MachineState var 'ms', declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE(), declare machine type using DEFINE_TYPES(), fix checkpatch.pl style violations, fix patch conflict in docs/system/target-mips.rst, set CPS 'num-vp' property instead of 'num-core'] Signed-off-by: Philippe Mathieu-Daudé --- MAINTAINERS | 7 + configs/devices/mips-softmmu/common.mak | 1 + docs/system/target-mips.rst | 22 + hw/mips/Kconfig | 16 + hw/mips/meson.build | 1 + hw/mips/virt.c | 913 6 files changed, 960 insertions(+) create mode 100644 hw/mips/virt.c diff --git a/MAINTAINERS b/MAINTAINERS index 5340de0515..8462918d65 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -1295,6 +1295,13 @@ F: hw/mips/boston.c F: hw/pci-host/xilinx-pcie.c F: include/hw/pci-host/xilinx-pcie.h +Virt +M: Jiaxun Yang +S: Maintained +F: hw/mips/virt.c +F: hw/misc/mips_trickbox.c +F: include/hw/misc/mips_trickbox.h + OpenRISC Machines - or1k-sim diff --git a/configs/devices/mips-softmmu/common.mak b/configs/devices/mips-softmmu/common.mak index 7da99327a7..eb2c32b7c1 100644 --- a/configs/devices/mips-softmmu/common.mak +++ b/configs/devices/mips-softmmu/common.mak @@ -24,6 +24,7 @@ CONFIG_I8259=y CONFIG_MC146818RTC=y CONFIG_MIPS_CPS=y CONFIG_MIPS_ITU=y +CONFIG_MIPS_VIRT=y CONFIG_MALTA=y CONFIG_PCNET_PCI=y CONFIG_MIPSSIM=y diff --git a/docs/system/target-mips.rst b/docs/system/target-mips.rst index 83239fb9df..8af0adfd08 100644 --- a/docs/system/target-mips.rst +++ b/docs/system/target-mips.rst @@ -8,6 +8,8 @@ endian options, ``qemu-system-mips``, ``qemu-system-mipsel`` ``qemu-system-mips64`` and ``qemu-system-mips64el``. Five different machine types are emulated: +- Generic Virtual Platform \"virt\" + - The MIPS Malta prototype board \"malta\" - An ACER Pica \"pica61\". This machine needs the 64-bit emulator. @@ -17,6 +19,26 @@ machine types are emulated: - A MIPS Magnum R4000 machine \"magnum\". This machine needs the 64-bit emulator. +The virt machine supports the following devices: + +- A range of MIPS CPUs, default is the P5600 (32-bit) or I6400 (64-bit) + +- MIPS CM (Coherence Manager) + +- CFI parallel NOR flash memory + +- 1 NS16550 compatible UART + +- 1 Google Goldfish RTC + +- 1 MIPS Trickbox device + +- 8 virtio-mmio transport devices + +- 1 generic PCIe host bridge + +- The fw_cfg device that allows a guest to obtain data from QEMU + The Malta emulation supports the following devices: - Core board with MIPS 24Kf CPU and Galileo system controller diff --git a/hw/mips/Kconfig b/hw/mips/Kconfig index da3a37e215..c250d5d5d0 100644 --- a/hw/mips/Kconfig +++ b/hw/mips/Kconfig @@ -59,5 +59,21 @@ config MIPS_BOSTON select AHCI_ICH9 select SERIAL +config MIPS_VIRT +bool +imply PCI_DEVICES +imply VIRTIO_VGA +imply TEST_DEVICES +select MIPS_CPS +select MIPS_TRICKBOX +select SERIAL +select FW_CFG_MIPS +select GOLDFISH_RTC +select PCI_EXPRESS_GENERIC_BRIDGE +select PFLASH_CFI01 +select VIRTIO_MMIO +select FW_CFG_DMA +select PLATFORM_BUS + config FW_CFG_MIPS bool diff --git a/hw/mips/meson.build b/hw/mips/meson.build index 900613fc08..a5a6c64a06 100644 --- a/hw/mips/meson.build +++ b/hw/mips/meson.build @@ -1,6 +1,7 @@ mips_ss = ss.source_set() mips_ss.add(files('bootloader.c', 'mips_int.c')) mips_ss.add(when: 'CONFIG_FW_CFG_MIPS', if_true: files('fw_cfg.c')) +mips_ss.add(when: 'CONFIG_MIPS_VIRT', if_true: [files('virt.c'), fdt]) mips_ss.add(when: 'CONFIG_LOONGSON3V', if_true: files('loongson3_bootp.c', 'loongson3_virt.c')) mips_ss.add(when: 'CONFIG_MALTA', if_true: files('malta.c')) mips_ss.add(when: 'CONFIG_MIPS_CPS', if_true: files('cps.c')) diff --git a/hw/mips/virt.c b/hw/mips/virt.c new file mode 100644 index 00..164387ca64 --- /dev/null +++ b/hw/mips/virt.c @@ -0,0 +1,913 @@ +/* + * QEMU MIPS Virt Board + * + * Copyright (C) 2022 Jiaxun Yang + * + * SPDX-License-Identifier: LGPL-2.1-or-later + */ + +#include "qemu/osdep.h" +#include "qemu/units.h" +#include "qemu/datadir.h" + +#include "chardev/char.h" +#include "hw/block/flash.h" +#include "hw/boards.h" +#include "hw/char/serial.h" +#include "hw/core/sysbus-fdt.h" +#include "hw/display/ramfb.h" +#include "hw/intc/goldfish_pic.h" +#include "hw/loader-fit.h" +#include "hw/loader.h" +#
[PATCH v3 1/4] gitlab-ci: Remove mips64-softmmu from build-without-defaults job
With the introduction of the MIPS virt machine in a pair of commits, all MIPS targets will require libfdt. Since the 'build-without-defaults' job is configured with '--disable-fdt', it won't be able to build any MIPS target. In particular this job triggers: ../meson.build:2809:2: ERROR: Problem encountered: fdt not available but required by targets mips64-softmmu Remove 'mips64-softmmu' from the job TARGETS. To still cover a big-endian target in qtests, replace it by the s390x target. Signed-off-by: Philippe Mathieu-Daudé --- .gitlab-ci.d/buildtest.yml | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/.gitlab-ci.d/buildtest.yml b/.gitlab-ci.d/buildtest.yml index 44b8275299..4897229f1a 100644 --- a/.gitlab-ci.d/buildtest.yml +++ b/.gitlab-ci.d/buildtest.yml @@ -526,9 +526,9 @@ build-without-defaults: --disable-pie --disable-qom-cast-debug --disable-strip -TARGETS: avr-softmmu mips64-softmmu s390x-softmmu sh4-softmmu +TARGETS: avr-softmmu s390x-softmmu sh4-softmmu sparc64-softmmu hexagon-linux-user i386-linux-user s390x-linux-user -MAKE_CHECK_ARGS: check-unit check-qtest-avr check-qtest-mips64 +MAKE_CHECK_ARGS: check-unit check-qtest-avr check-qtest-s390x build-libvhost-user: extends: .base_job_template -- 2.38.1
Re: sh4-linux-user compile failure
On 07/03/2023 23:52, Philippe Mathieu-Daudé wrote: On 8/3/23 00:46, Mark Cave-Ayland wrote: Hi Richard/Anton, It looks as if a compile failure has crept into sh4-linux-user, most likely related to the recent TARGET_TB_PCREL/CF_PCREL changes: In file included from ../accel/tcg/tb-hash.h:26, from ../accel/tcg/tb-maint.c:28: ../accel/tcg/tb-jmp-cache.h:24:5: error: "TARGET_TB_PCREL" is not defined, evaluates to 0 [-Werror=undef] 24 | #if TARGET_TB_PCREL | ^~~ Your tree seems desync / out of date: $ git grep TARGET_TB_PCREL a2b5f8b8ab $ Hmmm I just did a standard "git pull" and rebuild as normal, although this time I did a full build for all targets for testing. Maybe there's something old left in the build/ directory that's causing a problem? I'll throw everything away and see if that fixes it. ATB, Mark.
[PULL 1/1] roms/openbios: update OpenBIOS images to af97fd7a built from submodule
Signed-off-by: Mark Cave-Ayland --- pc-bios/openbios-ppc | Bin 677196 -> 677196 bytes pc-bios/openbios-sparc32 | Bin 382080 -> 382080 bytes pc-bios/openbios-sparc64 | Bin 1593408 -> 1593408 bytes roms/openbios| 2 +- 4 files changed, 1 insertion(+), 1 deletion(-) diff --git a/pc-bios/openbios-ppc b/pc-bios/openbios-ppc index d8203a507418c43e88648787a39b0f70405f67ec..4af60026b40a98c5a2016a313d4d985dc683596e 100644 GIT binary patch delta 35996 zcmch=4_sWu)i(~CI|(5qA(14QU_ufS34w$}jHonHixw4?M5&exSY6_Je_0m&9-0 ze8uKX2h#S;_}!7kfkJ1I$5HLMuPzw4H9ssYObhCP!UNH_X|IRd-qQG3zP8o&YSe** zuWJ{u@V*1-cWK4f+g_+Y(AuHxpBGtP>8bu9lKv*=K%$MYaBtu@ogfkpVgbZ<1p~Q0 zSCPBgky2Uas3pt;-3neG4BXNf3~bkef!k^&?)GS;qxjxXIwbo+7^NFh>BjIqOmKIV zXVWF$BUn$Agl$XYO$Ri$ttXLdJ=!W;Pcl!$``Vs%z-QnIbGaR^6nlAzN6_r?Pm3>e zxE&(?c}>P|@+IDJ-L-eFBjG$Bcc7_9TN`eBK9%=8uPwJdpT>uu*M8;wElCXpzAYgb z_-z3(c1K?JH8?XX@}hKkV~9%#&I)|1fe7*F7qnHI6$40e-A&ir*&q|O$V>?@uQM2U zHcLvKB>#K_x4)pRz1GP1nK%@{!WiKT#^NPol<~7=NQZD9YN<6!(v&!S5Iih>Vcb$k z-yNIoyjL>c+svbSwWXVTm4@uCMSS#)Meg{^;y0&mR(eSSyxZZfF0ZPjLPKc1{XD-H zwb?t#_u{?%#W+d-dwIdYPf@0AcwPiQxxVu1l=9-5QkCw-Oo>MoL(hvSx5T--$X#Ak z>~u5=`Y)F8iC%5_Vv|O#C#AHevV^qt#U`HcqIRwAMIU#*s9kM47{$9@)Yi^Cm`k*I z^!r*2pLkJQXggTT3trNa_=ba;({`|(w;t3E+Fr__$e%BKX-aakEm2DTrA!{%r(JLB z>)`f2ZM*G|#(Vm-4You1e7p~w974sRAqEb0t7i=F7ao500=5|+Z{Xw7RD7HO7QG4j z8NRK5h<|yGC4$1s9)9-XZ7RXbH&}r5NeDYEameZADit=;cr9@Hq%=Q%_}OKQKAt;p zD8Qy>^5|EzgTRZXR*Nyz*aAHj)+f|ojrc2>*!cx8+i zzM}og_UdyFKf8oTzxrpD$EzQym_N)>nU%e!&0F;<(IH|HiGtdub&ww_@AX*3p=G|( z&s$#8mPfvxYKHq>(^f^ku38h|ei5!W;jyo4Ya?IpGQ-&-JZgq(Df~vX8SW6_Ofx); zu=fp@48NWxOYLhP@0-+e6#h^<;(d6=P!bJK0-h{9c0Bc}<+y69%kD=SD(yJlLgCSm`e19E5cv=_ z0BODHJ&nuM6iWR7r9GS=(#{g5@^B&_coTix;X+>cb#1ZjRgG(hVS*1g^2Ed1md%Iz zLm3IhvSgC$ldUkNyt3T0PB!Vc!g$kR?cbIjZXz8}@XD$xmjO@Zxo>Gp7r!+Dx-1xY zB%AQQ{T=G_hNF1hTiTX+uZ*j{QRKyaMw}>UJqq8+BZjr*0?&-|^R!`Y)mBPd3MWGd zL($nDhe8jiel$kH4nwfFmmzKte4uM1e8{4CSW8-XI8nlKeczIN#q&Yrm-JSe#2b#5 z{83j!>0Z^QhhG`zv47F-whbrnroW&oflPlCsIG2v#!-Wb2!~uJmewz zeY}UGdHsKC*Cw5>Y&$XuFBm*SW%i|P{VwGA7Z(rwC!C|Vn|ayWsLPQE-YDM5yz6b$ z^++xs6mJ)w5bq`)JwowaJXO30dG3g|_=*v#BPeJq`5$3h?Uftg;5jNi)LkBlu)s8e zm6Vk`?ZT-#lEB+Ww57HqnY@?i9Vy@=;=Pwojewsctvvn+#rN?{@gC)c^gbHK>%=>r zw;e(LM>8#Xgl%=Xt6Uo@iz*zH|538&25*{#71`}>0rT*QBgp?~6OTGdbUS(SQ3?<6 z?4#OR+tG3EqWELcyh*%Mc^AQtq0E}uf4 z-cgrKBjcpL3Oq7pgokwGpNem#&-6`njd;q({6@a!H~0|Ws?08rTj;@PugtT;7n}hm zdF!ZFY&({=@3^)&@_4F*9Z%!&2(LZfBg4c8IZsqB!>Ad&p)3W*wWX2AhgI4UUUyu( zdfq#+MmQKaKEel&qsM>8F5})Q<5R%d`cAVIhw$XH4ef2)Bp$qXg_-rXng#;zj2db9 z-gi)Mpxui1+IM4QJjq|QQP_`nTJTM_1hRVv?e|y*AALu=cHz4P5_b>EL*)XE^mpO- zQT|`+LOnso+o-PnB8~H1?b^lfDw|6<@08&|9e`f{yV`FTj^#;uQm+EY|n;t-};DCb`j_}G~C%oTsFmjuXo(X+2082Bp~%k@#yvZr{eb~!3l zFY{iS#C>-F8Tt6YU$y18OI$~-$KkFla!Pbk?)M5qxFMRwiC3;ehA>L+QR9Hpl2Y+j z2n$cHuQ>4vf>U}Q&w3BW;k_|l_8vUs_ak`AduXihr}Mt|w9PZ$7xekaqgrxwabjt? z!)aH}-}}vkv5MdNzLsoze~8z=uO->W6L{DA+UC;nT$QbFr^6$;6}mZ&T#23Iy|P}u zj(4uFdOA+4#M#yXJX5sAiB9x(H0B%clkj)OcwD`fz@6h--ourTtl@d)bk7s^>Ci4NQ7g&B5UG)drU6CJ5 zn&JKrwA*bT7V?A-A+ZmAJm*6+`49aD97Svh28u_e#Me8iJBCR?5l%!+$0>=BIQFV_ z-xF}vOy4b3H1Z|U0!ce7D2M#3eH+QHe{6svYadaU=rGJo<#T zbk&J2g#%qD0#&7ofdPX-o&&td6JuuBg|N+!zU_pz#pX}uz7yK5Hou+6`7zM)_i~qC zyTW!dns@qvcQS|fBR=wEnM{AAj`sz$CH%^h+8o=_TAqE9I)(!7Itkr7*~{DTzWxaG zk_@S6*vT+R(ZRsUKB+LG;cF634O@gEy`u#xE?dRLA+DCkp3<(^a4J(~E@&8Vq@_HF z#?fZ=J&x}#UUy2{Y-KVrw3rF%4tPHsQ#0MWo{PO8(Bu;*3Fko*B21YzQ@gr?> z(nm_mZp%QNqH}7J1Z{VS4i1w$)Ny_^#p^%97}(#(2R?$qn@HffI-J6hJl;Ej@R3BG zFrjT&Olghs((DiAHIc~6CLr*M#&gn)OlV2d)1Z=7nz)bASU=9<*&l0%Z6A;G_)oMg zOF!w8a++vT6D9$KVXKgb>l4_Bi6-9siMI9XPgD!IwHxw?2?iXHwIA}KaIVi$Dauyu zahF%_6gKd*N75y{ioKME=bqLU^Q6;S?7Y+MA)o}TwVfX0wWl!=5m3$cbS;9kM zkTF#V!2%#`SaVpD;u=g-RC?T7OI$UAfj|cGfY%%7UDHy`an#r7%%!JCA4bWj#rC{95z;6faIlafm9hUZhjM+2z1lQH{r zZRwVyV3EiWd4nXO3mrl{WrV_zHwC^v(^{4C9&tN367hDZa~;Kl7Qc=^m3wo%Np-kD%@m{O>pwMk-U z7y3vWPyGyf@mUYg`Al22>PVYx&{SbZeDeD?F#ZhUMLqj?6Yy-G`FZze7`Yhu)F=rD z^d>&jwp>1$C-b8UKAI)odW{H1^vA704oCbcB*XYJC@8v%8Z z0@Xw*Xev>JiCb&fC&L6gnjmquY1G3!wLDjLF0<#PW&&=XJQ^SCJ}_*5g$ zoI=Bx8s!C3+O6}ZrlbTv4*q?zskVsmk!H!bSyM5lbf?vpls$BB0CdGMwuZ zV`X7h&ZO}H(2g`XIjEp6LpyBdOk* z0Pj7cB_#!w+4>wc986d0XeVWqmMBQ7h%xK(SRNhJ7H4F+iutmEx@0t?1Y~ z1xyd0gdUG8NzEjj@=7Xpu#vlFuq7$|k_1^$VH;+tVgY3WPi34ceHy}vyn6;)Yx}g7 zkIZ1pZ6GlI_wc8O^*_V>`aqER|GE*6A~#tTecXsnBN_urU!Q!@Y*GxvE?SW!b;$Gscl) zIHlvsjNRt7Ca+cGtYm#4TaS1nOH`cH;~n<$qMa$#yURT#Wn%tD*IGduZQ+pts+2@D z?p?GXsIzPt&uS^YPLz-pA`XhdZ8O;-uSW(*hi_>?0y`n@CIZyRbw;8DvVgZ6aAyeK zWr24Y@I)7e;*xlP*LqDsiv6#eb%VRQJ>W>m9!FysXBHuPFV0*;6h2s@~RnT5tcJw71iG* zT5>?5&zh17uDT)-=I=$Ym6vCU%mUk5r~oz94tGjXah01!UwTBHgc(zZZuqveIEvX7 zJ))Io&PGvscmchJcV;m;#&{PXZ-Oio%b|SGsNJ4aQsvnyfAV%{ zij6w!51_SUFd_oxWQdca@tM zip=MMNOpy7G@Yl;VarxJ4HTLSDsu0vmOMoIWc=r0+&PCOtqQ`9nEeZyB~>Urewg?qRYDr#<8dK}@>^w7?tq-?z zXEfV9k9uFKG`Ok+>WpSrEocv=Qqfbbnv_d?6M2((~+ag6s>;V zzJOi4&P=2%N)!nTLy^ye0e3dC?pNsTJg|V>0Io6@vaRzLXp$;W^#z#TTF5R-k#I6C3)oe2GeU$HW)k6e-f#h1;-$)kq19|{;kM$js;F4L{{W~njS}lD5rh_+JW*Hg~LmgbAjT4YDLI5D;QWz zqXE<5?iRyR{en!M7Q?=}fQo@;EO6WL*7#r@TgHDD!5#r+G~vADDlE!-nxigwxB*#t>g#8b)E2F zu5iZ^Hp?qSohD^#9lQ#MoT`Cfk{MwP$gm0K6XdApY$G6G5Q30Fhv
[PULL 0/1] qemu-openbios queue 20230307
The following changes since commit 9832009d9dd2386664c15cc70f6e6bfe062be8bd: Merge tag 'pull-riscv-to-apply-20230306' of https://gitlab.com/palmer-dabbelt/qemu into staging (2023-03-07 12:53:00 +) are available in the Git repository at: https://github.com/mcayland/qemu.git tags/qemu-openbios-20230307 for you to fetch changes up to fff1aaf4451231ac680aa278e9fafc4f8b69ff57: roms/openbios: update OpenBIOS images to af97fd7a built from submodule (2023-03-07 22:30:06 +) qemu-openbios queue Mark Cave-Ayland (1): roms/openbios: update OpenBIOS images to af97fd7a built from submodule pc-bios/openbios-ppc | Bin 677196 -> 677196 bytes pc-bios/openbios-sparc32 | Bin 382080 -> 382080 bytes pc-bios/openbios-sparc64 | Bin 1593408 -> 1593408 bytes roms/openbios| 2 +- 4 files changed, 1 insertion(+), 1 deletion(-)
Re: sh4-linux-user compile failure
On 8/3/23 00:46, Mark Cave-Ayland wrote: Hi Richard/Anton, It looks as if a compile failure has crept into sh4-linux-user, most likely related to the recent TARGET_TB_PCREL/CF_PCREL changes: In file included from ../accel/tcg/tb-hash.h:26, from ../accel/tcg/tb-maint.c:28: ../accel/tcg/tb-jmp-cache.h:24:5: error: "TARGET_TB_PCREL" is not defined, evaluates to 0 [-Werror=undef] 24 | #if TARGET_TB_PCREL | ^~~ Your tree seems desync / out of date: $ git grep TARGET_TB_PCREL a2b5f8b8ab $
[PULL 17/20] hw/usb/ohci: Implement resume on connection status change
From: BALATON Zoltan If certain bit is set remote wake up should change state from suspended to resume and generate interrupt. There was a todo comment for this, implement that by moving existing resume logic to a function and call that. Signed-off-by: BALATON Zoltan Acked-by: Gerd Hoffmann Message-Id: <35c4d4ccf2f73e6a87cdbd28fb6a1b33de72ed74.1676916640.git.bala...@eik.bme.hu> [PMD: Have ohci_resume() return a boolean] Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/hcd-ohci.c | 23 +-- 1 file changed, 17 insertions(+), 6 deletions(-) diff --git a/hw/usb/hcd-ohci.c b/hw/usb/hcd-ohci.c index 6f8b543243..88d2b4b13c 100644 --- a/hw/usb/hcd-ohci.c +++ b/hw/usb/hcd-ohci.c @@ -1410,6 +1410,18 @@ static void ohci_set_hub_status(OHCIState *ohci, uint32_t val) } } +/* This is the one state transition the controller can do by itself */ +static bool ohci_resume(OHCIState *s) +{ +if ((s->ctl & OHCI_CTL_HCFS) == OHCI_USB_SUSPEND) { +trace_usb_ohci_remote_wakeup(s->name); +s->ctl &= ~OHCI_CTL_HCFS; +s->ctl |= OHCI_USB_RESUME; +return true; +} +return false; +} + /* * Sets a flag in a port status reg but only set it if the port is connected. * If not set ConnectStatusChange flag. If flag is enabled return 1. @@ -1426,7 +1438,10 @@ static int ohci_port_set_if_connected(OHCIState *ohci, int i, uint32_t val) if (!(ohci->rhport[i].ctrl & OHCI_PORT_CCS)) { ohci->rhport[i].ctrl |= OHCI_PORT_CSC; if (ohci->rhstatus & OHCI_RHS_DRWE) { -/* TODO: CSC is a wakeup event */ +/* CSC is a wakeup event */ +if (ohci_resume(ohci)) { +ohci_set_interrupt(ohci, OHCI_INTR_RD); +} } return 0; } @@ -1828,11 +1843,7 @@ static void ohci_wakeup(USBPort *port1) intr = OHCI_INTR_RHSC; } /* Note that the controller can be suspended even if this port is not */ -if ((s->ctl & OHCI_CTL_HCFS) == OHCI_USB_SUSPEND) { -trace_usb_ohci_remote_wakeup(s->name); -/* This is the one state transition the controller can do by itself */ -s->ctl &= ~OHCI_CTL_HCFS; -s->ctl |= OHCI_USB_RESUME; +if (ohci_resume(s)) { /* * In suspend mode only ResumeDetected is possible, not RHSC: * see the OHCI spec 5.1.2.3. -- 2.38.1
[PULL 15/20] hw/usb/vt82c686-uhci-pci: Use PCI IRQ routing
From: Bernhard Beschow According to the PCI specification, PCI_INTERRUPT_LINE shall have no effect on hardware operations. Now that the VIA south bridges implement the internal PCI interrupt router let's be more conformant to the PCI specification. Signed-off-by: Bernhard Beschow Reviewed-by: Mark Cave-Ayland Tested-by: Rene Engel Signed-off-by: BALATON Zoltan Message-Id: <9fb86a74d16db65e3aafbb154238d55e123053eb.1678188711.git.bala...@eik.bme.hu> Signed-off-by: Philippe Mathieu-Daudé --- hw/usb/vt82c686-uhci-pci.c | 12 1 file changed, 12 deletions(-) diff --git a/hw/usb/vt82c686-uhci-pci.c b/hw/usb/vt82c686-uhci-pci.c index 46a901f56f..b4884c9011 100644 --- a/hw/usb/vt82c686-uhci-pci.c +++ b/hw/usb/vt82c686-uhci-pci.c @@ -1,17 +1,7 @@ #include "qemu/osdep.h" -#include "hw/irq.h" #include "hw/isa/vt82c686.h" #include "hcd-uhci.h" -static void uhci_isa_set_irq(void *opaque, int irq_num, int level) -{ -UHCIState *s = opaque; -uint8_t irq = pci_get_byte(s->dev.config + PCI_INTERRUPT_LINE); -if (irq > 0 && irq < 15) { -via_isa_set_irq(pci_get_function_0(&s->dev), irq, level); -} -} - static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) { UHCIState *s = UHCI(dev); @@ -25,8 +15,6 @@ static void usb_uhci_vt82c686b_realize(PCIDevice *dev, Error **errp) pci_set_long(pci_conf + 0xc0, 0x2000); usb_uhci_common_realize(dev, errp); -object_unref(s->irq); -s->irq = qemu_allocate_irq(uhci_isa_set_irq, s, 0); } static UHCIInfo uhci_info[] = { -- 2.38.1