Re: [Qemu-devel] [PATCH v2 0/3] Second try at fixing sparc register allocation

2016-06-22 Thread Mark Cave-Ayland 

On 22/06/16 07:52, Richard Henderson wrote:


Attempting to fix the problem reported by Mark re i686 vs sparc64.

Unsurprisingly, the problems tend to revolve around the 6 operand
opcodes like sub2 or qemu_st64, where we use all, or all but one
register.


r~


Richard Henderson (3):
  tcg: Fix name for high-half register
  tcg: Optimize spills of constants
  tcg: Rearrange register allocation

 tcg/aarch64/tcg-target.inc.c |  10 ++
 tcg/arm/tcg-target.inc.c |   6 +
 tcg/i386/tcg-target.inc.c|  21 ++-
 tcg/ia64/tcg-target.inc.c|  10 ++
 tcg/mips/tcg-target.inc.c|  10 ++
 tcg/ppc/tcg-target.inc.c |   6 +
 tcg/s390/tcg-target.inc.c|   6 +
 tcg/sparc/tcg-target.inc.c   |  10 ++
 tcg/tcg.c| 409 +--
 tcg/tci/tcg-target.inc.c |   6 +
 10 files changed, 351 insertions(+), 143 deletions(-)


Hi Richard,

This version is much improved, although I was still able to detect a 
regression booting my OpenBSD 5.5/sparc64 (install55.iso) test image in 
an i386 VM:



./qemu-system-sparc64 -cdrom install55.iso -boot d -nographic
OpenBIOS for Sparc64
Configuration device id QEMU version 1 machine id 0
kernel cmdline
CPUs: 1 x SUNW,UltraSPARC-IIi
UUID: ----
Welcome to OpenBIOS v1.1 built on Apr 18 2016 08:20
  Type 'help' for detailed information
Trying cdrom:f...
Not a bootable ELF image
Not a bootable a.out image

Loading FCode image...
Loaded 4829 bytes
entry point is 0x4000
OpenBSD IEEE 1275 Bootblock 1.3
..
Jumping to entry point 0010 for type 0001...
switching to new context: entry point 0x10 stack 0xffe84a09
>> OpenBSD BOOT 1.6
Trying bsd...
open /pci@1fe,0/pci-ata@5/ide1@8200/cdrom@0:f/etc/random.seed: No such 
file or directory

Booting /pci@1fe,0/pci-ata@5/ide1@8200/cdrom@0:f/bsd
3901336@0x100+6248@0x13b8798+3261984@0x180+932320@0x1b1c620
symbols @ 0xffc5a300 119 start=0x100

Unexpected client interface exception: -1
console is /pci@1fe,0/ebus@3/su
Copyright (c) 1982, 1986, 1989, 1991, 1993
The Regents of the University of California.  All rights reserved.
Copyright (c) 1995-2014 OpenBSD. All rights reserved. 
http://www.OpenBSD.org


OpenBSD 5.5 (RAMDISK) #153: Tue Mar  4 15:12:10 MST 2014
dera...@sparc64.openbsd.org:/usr/src/sys/arch/sparc64/compile/RAMDISK
real mem = 134217728 (128MB)
avail mem = 122011648 (116MB)
mainbus0 at root: OpenBiosTeam,OpenBIOS
cpu0 at mainbus0: SUNW,UltraSPARC-IIi (rev 9.1) @ 100 MHz
cpu0: physical 256K instruction (64 b/l), 16K data (32 b/l), 256K 
external (64 b/l)

psycho0 at mainbus0: SUNW,sabre, impl 0, version 0, ign 7c0
psycho0: bus range 0-2, PCI bus 0
psycho0: dvma map c000-dfff
pci0 at psycho0
ppb0 at pci0 dev 1 function 0 "Sun Simba" rev 0x11
pci1 at ppb0 bus 1
ppb1 at pci0 dev 1 function 1 "Sun Simba" rev 0x11
pci2 at ppb1 bus 2
unknown vendor 0x1234 product 0x (class display subclass VGA, rev 
0x02) at pci0 dev 2 function 0 not configured

ebus0 at pci0 dev 3 function 0 "Sun PCIO EBus2" rev 0x01
clock1 at ebus0 addr 2000-3fff: mk48t59
"fdthree" at ebus0 addr 0- not configured
com0 at ebus0 addr 3f8-3ff ivec 0x2b: ns16550a, 16 byte fifo
com0: console
"kb_ps2" at ebus0 addr 60-67 not configured
"Realtek 8029" rev 0x00 at pci0 dev 4 function 0 not configured
pciide0 at pci0 dev 5 function 0 "CMD Technology PCI0646" rev 0x07: DMA, 
channel 0 configured to native-PCI, channel 1 configured to native-PCI

pciide0: using ivec 0x7d4 for native-PCI interrupt
pciide0: channel 0 disabled (no drives)
atapiscsi0 at pciide0 channel 1 drive 0
scsibus0 at atapiscsi0: 2 targets
cd0 at scsibus0 targ 0 lun 0:  ATAPI 5/cdrom 
removable

cd0(pciide0:1:0): using PIO mode 4, Ultra-DMA mode 2
panic: kernel data fault: pc=1011d9c addr=0
syncing disks... panic: kernel data fault: pc=1011d9c addr=0
Frame pointer is at 0x1c088d1
Call traceback:
1298a34(1b08938, 5, 0, 0, 1c092d8, 0, 1c08991) fp = 1c08991
1107ef8(104, 1c093a8, 1b08000, 1c093a8, 0, 82d, 1c08a51) fp = 1c08a51
12a0b80(13a7b48, 1011d9c, 1b75000, 3, 104, 7fd8, 1c08b21) fp = 1c08b21
1010790(0, 30, 1011d9c, 0, 0, 82d, 1c08be1) fp = 1c08be1
1107bbc(1b08938, 5, 0, 0, 1c09718, 0, 1c08dc1) fp = 1c08dc1
11242c8(11, 5, 1b08000, 0, 13, 0, 1c08e91) fp = 1c08e91
12989b4(1b08938, 5, 0, 0, 1c09898, 0, 1c08f51) fp = 1c08f51
1107ef8(100, 1c09968, 1b08000, 1c09968, ffd0cc58, 1801010, 1c09011) fp = 
1c09011

12a0b80(13a7b48, 1011d9c, 1b75000, 3, 100, 0, 1c090e1) fp = 1c090e1
1010790(0, 30, 1011d9c, 0, 0, 82d, 1c091a1) fp = 1c091a1
1137080(0, 400026ac000, fff8, 0, 41df100, 1b6b478, 
1c09381) fp = 1c09381
1137140(1b09000, 41df100, 0, 18e0, 30, 41df150, 1c09441) fp = 
1c09441
113af10(41dd800, 41df100, 41dd800, 0, 502, 0, 1c09501) fp = 
1c09501

113af4c(0, 0, 1101574, 502, 0, 28, 1c095c1) fp = 1c095c1
10ebc3c(1b098b0, 42c6e48, 0, e000, 1, 1, 1c09681) fp = 
1c09681

1012310(0, 10eb760,

[Qemu-devel] [PATCH v2 0/3] Second try at fixing sparc register allocation

2016-06-22 Thread Richard Henderson 
Attempting to fix the problem reported by Mark re i686 vs sparc64.

Unsurprisingly, the problems tend to revolve around the 6 operand
opcodes like sub2 or qemu_st64, where we use all, or all but one
register.


r~


Richard Henderson (3):
  tcg: Fix name for high-half register
  tcg: Optimize spills of constants
  tcg: Rearrange register allocation

 tcg/aarch64/tcg-target.inc.c |  10 ++
 tcg/arm/tcg-target.inc.c |   6 +
 tcg/i386/tcg-target.inc.c|  21 ++-
 tcg/ia64/tcg-target.inc.c|  10 ++
 tcg/mips/tcg-target.inc.c|  10 ++
 tcg/ppc/tcg-target.inc.c |   6 +
 tcg/s390/tcg-target.inc.c|   6 +
 tcg/sparc/tcg-target.inc.c   |  10 ++
 tcg/tcg.c| 409 +--
 tcg/tci/tcg-target.inc.c |   6 +
 10 files changed, 351 insertions(+), 143 deletions(-)

-- 
2.5.5