This bus driver supports the QUP SPI hardware controller in the Qualcomm
MSM SOCs. The Qualcomm Universal Peripheral Engine (QUP) is a general
purpose data path engine with input/output FIFOs and an embedded SPI
mini-core. The driver currently supports only FIFO mode.
Signed-off-by: Harini Jayaraman hari...@codeaurora.org
---
drivers/spi/Kconfig | 10 +
drivers/spi/Makefile |1 +
drivers/spi/msm_spi_qsd.h | 436 +
drivers/spi/spi-qsd.c | 1144 +
include/linux/platform_data/msm_spi.h | 19 +
5 files changed, 1610 insertions(+), 0 deletions(-)
create mode 100644 drivers/spi/msm_spi_qsd.h
create mode 100644 drivers/spi/spi-qsd.c
create mode 100644 include/linux/platform_data/msm_spi.h
diff --git a/drivers/spi/Kconfig b/drivers/spi/Kconfig
index 52e2900..af55a0a 100644
--- a/drivers/spi/Kconfig
+++ b/drivers/spi/Kconfig
@@ -280,6 +280,16 @@ config SPI_PXA2XX
config SPI_PXA2XX_PCI
def_bool SPI_PXA2XX X86_32 PCI
+config SPI_QUP
+ tristate Qualcomm MSM SPI QUPe Support
+ depends on ARCH_MSM
+ help
+ Support for Serial Peripheral Interface for Qualcomm Universal
+ Peripheral.
+
+ This driver can also be built as a module. If so, the module
+ will be called spi-qsd.
+
config SPI_S3C24XX
tristate Samsung S3C24XX series SPI
depends on ARCH_S3C2410 EXPERIMENTAL
diff --git a/drivers/spi/Makefile b/drivers/spi/Makefile
index 61c3261..f426c89 100644
--- a/drivers/spi/Makefile
+++ b/drivers/spi/Makefile
@@ -44,6 +44,7 @@ obj-$(CONFIG_SPI_PL022) += spi-pl022.o
obj-$(CONFIG_SPI_PPC4xx) += spi-ppc4xx.o
obj-$(CONFIG_SPI_PXA2XX) += spi-pxa2xx.o
obj-$(CONFIG_SPI_PXA2XX_PCI) += spi-pxa2xx-pci.o
+obj-$(CONFIG_SPI_QUP) += spi-qsd.o
obj-$(CONFIG_SPI_S3C24XX) += spi-s3c24xx-hw.o
spi-s3c24xx-hw-y := spi-s3c24xx.o
spi-s3c24xx-hw-$(CONFIG_SPI_S3C24XX_FIQ) += spi-s3c24xx-fiq.o
diff --git a/drivers/spi/msm_spi_qsd.h b/drivers/spi/msm_spi_qsd.h
new file mode 100644
index 000..d141d08
--- /dev/null
+++ b/drivers/spi/msm_spi_qsd.h
@@ -0,0 +1,436 @@
+/* Copyright (c) 2011, Code Aurora Forum. All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 and
+ * only version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _MSM_SPI_QSD_H
+#define _MSM_SPI_QSD_H
+
+#define SPI_DRV_NAME spi_qsd
+
+#define QUP_CONFIG0x /* N NO_INPUT/NO_OUPUT bits */
+#define QUP_ERROR_FLAGS 0x0308
+#define QUP_ERROR_FLAGS_EN0x030C
+#define QUP_ERR_MASK 0x3
+#define SPI_OUTPUT_FIFO_WORD_CNT 0x010C
+#define SPI_INPUT_FIFO_WORD_CNT 0x0214
+#define QUP_MX_WRITE_COUNT0x0150
+#define QUP_MX_WRITE_CNT_CURRENT 0x0154
+
+#define QUP_CONFIG_SPI_MODE 0x0100
+
+#define GSBI_CTRL_REG 0x0
+#define GSBI_SPI_CONFIG 0x30
+
+#define SPI_CONFIG0x0300
+#define SPI_IO_CONTROL0x0304
+#define SPI_IO_MODES 0x0008
+#define SPI_SW_RESET 0x000C
+#define SPI_TIME_OUT 0x0010
+#define SPI_TIME_OUT_CURRENT 0x0014
+#define SPI_MX_OUTPUT_COUNT 0x0100
+#define SPI_MX_OUTPUT_CNT_CURRENT 0x0104
+#define SPI_MX_INPUT_COUNT0x0200
+#define SPI_MX_INPUT_CNT_CURRENT 0x0204
+#define SPI_MX_READ_COUNT 0x0208
+#define SPI_MX_READ_CNT_CURRENT 0x020C
+#define SPI_OPERATIONAL 0x0018
+#define SPI_ERROR_FLAGS 0x001C
+#define SPI_ERROR_FLAGS_EN0x0020
+#define SPI_DEASSERT_WAIT 0x0310
+#define SPI_OUTPUT_DEBUG 0x0108
+#define SPI_INPUT_DEBUG 0x0210
+#define SPI_TEST_CTRL 0x0024
+#define SPI_OUTPUT_FIFO 0x0110
+#define SPI_INPUT_FIFO0x0218
+#define SPI_STATE 0x0004
+
+/* SPI_CONFIG fields */
+#define SPI_CFG_INPUT_FIRST 0x0200
+#define SPI_NO_INPUT 0x0080
+#define SPI_NO_OUTPUT 0x0040
+#define SPI_CFG_LOOPBACK 0x0100
+#define SPI_CFG_N 0x001F
+
+/* SPI_IO_CONTROL fields */
+#define SPI_IO_C_CLK_IDLE_HIGH0x0400
+#define SPI_IO_C_MX_CS_MODE 0x0100
+#define SPI_IO_C_CS_N_POLARITY0x00F0
+#define SPI_IO_C_CS_N_POLARITY_0 0x0010
+#define SPI_IO_C_CS_SELECT
