Re: [U-Boot] [PATCH] part 2. Embedded PlanetBoards

[kadamsagar123]

Hello,

   I have downloaded following 3 patches from this mailing list for EP852
and EP866 boards but am unable to patch it to U-boot 1.1.0 nor to U-Boot
1.1.6 since no readme file is available with the patch.

ep852ep866ep85xxA.patch.gz
ep852ep866ep85xxB.patch.gz
ep852.diff.gz
   
  To patch i give the following command

   cd u-boot1.1.0  
>> Enter into parent directory
   cat  ../ep852ep866ep85xxA.patch | patch -p1 --dry run  --verbose
   
 patch file is kept outside the parent directory. on
executing this  command it gives me following error
 
   Hmm...patch unexpectedly ends in middle of line
   I can't seem to find a patch in there anywhere.
 patch:  Only garbage was found in the patch input.
   
And also when i try to read the patch files after extracting it 
 "could not parse diff output "

  Same is the true with ep852ep866ep85xxB.patch.gz

Can you please help me out in this case

BR,
Sagar Kadam










Jeffrey Mann wrote:
> 
> *CHANGELOG Added Support for Embedded Planet Boards EP852 EP866 and
> EP85xxm. See respective board config file for original author
> information. Merged from internal company port and QUICCstart kit into
> the most recent u-boot git by J. Mann, Embedded Planet, 2006-JUL-27.
> 
> (this is part 2 of 2 split in half for size reasons.)
> 
> (the first attempt to send this e-mail resulted in a message too big
> error. Sorry if you get two on acident)
> 
> 
>  
> -
> Take Surveys. Earn Cash. Influence the Future of IT
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Re: [U-Boot] [PATCH] ne2000: take MAC address from config if available

[Ben Warren]

Hi Daniel,

On Fri, Nov 28, 2008 at 8:16 AM, Daniel Mack <[EMAIL PROTECTED]> wrote:

> Hi,
>
> the board I'm currently working on has an ASIX AX88796 NE2000 clone but
> no EEPROM attached to it. Hence, the get_prom() routine returns zeros
> only so the system won't work.
>
> This patch takes the MAC address given by CONFIG_ETHADDR and translates
> it to numeric values. This could probably go to some other, more generic
> place, but I didn't find any.
>

CONFIG_ETHADDR is bad and shouldn't be used unless you only ever plan on
building one board.  No new board ports will be accepted that define it.
What would be better here, although it's still not very good, would be to
have something like CONFIG_NE2000_NOPROM, and if defined, make a
'getenv("ethaddr")' call and program the hardware with the return value
(with proper error checking, of course).

regards,
Ben
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Re: [U-Boot] [PATCH] Add AT2440 (S3C2440) board support

[sdandella]

Is this patch for any u-boot version?
Thanks!
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Re: [U-Boot] gd_t/bd_t on ARM

[Daniel Mack]

Hi Remy,

On Fri, Nov 28, 2008 at 10:39:49PM +0100, Remy Bohmer wrote:
> > I'm hunting weird behaviours with the gd_t global data pointer on my
> > PXA300 board board. The pointer gets set up fine in lib_arm/boot.c and
> > gd->bd is filled in my board specific code. However, after the tftp
> > download is finished, the content of these structures have been
> > destroyed and overwritten with garbage.
> >
> > I suspect a stack corruption to be the culprit, an overflow or overlap,
> > as it seems to happen randomly, after a while and some function calls.
> > Any hints about that?
> 
> Hook up a JTAG (or preferable an ETM) debugger and start tracing?

I did that for a couple of hours now and got somehow stuck with it.
However, I believe it's not related to my board specific code, so I
wanted to ask whether anyone else had similar trouble with the cutting
edge source tree.

> > Also, I wonder why the pointer to this struct is not placed *after*
> > U-Boot's own code as shown in the patch below. This works fine for me
> > now. Any oppinion on that?
> 
> Aren't you just hiding the symptoms here?
> It seems that there is something really wrong and by moving the global
> structures probably a different memory area is overwritten, but the
> problem should still be there...

Of course. That wasn't meant to be the fix for the other problem, I was
just curious as this other location makes more sense to me and also does
not require CONFIG_SYS_GBL_DATA_SIZE anymore. If I got that right, this
variable has to be set to something at least sizeof(gd_t)+sizeof(bd_t).
Right?

Best regards,
Daniel
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[U-Boot] [PATCH] PXA3xx: fix CKEN[AB]

[Daniel Mack]

Hi,

there are some bits in PXA3xx' CKENA/CKENB registers which need to be
set always, according to the documentation. They are actually different
for the three families, but as there is no way to keep track of them yet
in U-Boot, I'd rather apply this patch and enable some clocks on some
processors which are not neccessarily needed.

Best regards,
Daniel


diff --git a/cpu/pxa/start.S b/cpu/pxa/start.S
index 63ab0c5..9d74d6c 100644
--- a/cpu/pxa/start.S
+++ b/cpu/pxa/start.S
@@ -235,10 +235,10 @@ cpu_init_crit:
 
/* turn off all clocks but the ones we will definitly require */
ldr r1, =CKENA
-   ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | 
CKENA_8_DMC)
+   ldr r2, =(CKENA_22_FFUART | CKENA_10_SRAM | CKENA_9_SMC | 
CKENA_8_DMC | CKENA_SETALWAYS)
str r2, [r1]
ldr r1, =CKENB
-   ldr r2, =(CKENB_6_IRQ)
+   ldr r2, =(CKENB_6_IRQ | CKENB_SETALWAYS)
str r2, [r1]
 #endif /* !CONFIG_CPU_MONAHANS */
 
diff --git a/include/asm-arm/arch-pxa/pxa-regs.h 
b/include/asm-arm/arch-pxa/pxa-regs.h
index e014568..25d640b 100644
--- a/include/asm-arm/arch-pxa/pxa-regs.h
+++ b/include/asm-arm/arch-pxa/pxa-regs.h
@@ -1757,6 +1757,7 @@ typedef void  (*ExcpHndlr) (void) ;
 #define CKENA_3_CAMERA (1 << 3)/* Camera Interface Clock Enable */
 #define CKENA_2_USBHOST(1 << 2)/* USB Host Unit Clock Enable */
 #define CKENA_1_LCD(1 << 1)/* LCD Unit Clock Enable */
+#define CKENA_SETALWAYS(0x80a1)/* bits marked 'SETALWAYS' */
 
 #define CKENB_8_1WIRE  ((1 << 8) + 32) /* One Wire Interface Unit Clock Enable 
*/
 #define CKENB_7_GPIO   ((1 << 7) + 32) /* GPIO Clock Enable */
@@ -1764,6 +1765,7 @@ typedef void  (*ExcpHndlr) (void) ;
 #define CKENB_4_I2C((1 << 4) + 32) /* I2C Unit Clock Enable */
 #define CKENB_1_PWM1   ((1 << 1) + 32) /* PWM2 & PWM3 Clock Enable */
 #define CKENB_0_PWM0   ((1 << 0) + 32) /* PWM0 & PWM1 Clock Enable */
+#define CKENB_SETALWAYS(0xfffcfc4c)/* bits marked 'SETALWAYS' */
 
 #else /* if defined CONFIG_CPU_MONAHANS */

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Re: [U-Boot] [PATCH] fix lib_arm/bootm.c

[Jean-Christophe PLAGNIOL-VILLARD]

On 16:37 Fri 28 Nov , Jerry Van Baren wrote:
> Daniel Mack wrote:
> > Hi,
> > 
> > while digging thru the sources to find out why U-Boot won't start my
> > Linux kernel, I stumbled over lib_arm/bootm.c and its check for the falg
> > variable. I wonder how this ever worked as the condition is really heavy
> > to match unless BOOTM_STATE_OS_GO is 0 which it isn't.
> 
> Hi Daniel,
> 
> FYI, Peter Pearse found this independently.  The patch apparently hasn't 
> been applied to the mainline yet.  :-(
already in mainline
first found by Ilko Iliev commit 263b749e2e25

Best Regards,
J.
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Re: [U-Boot] gd_t/bd_t on ARM

[Remy Bohmer]

Hello Daniel,

> I'm hunting weird behaviours with the gd_t global data pointer on my
> PXA300 board board. The pointer gets set up fine in lib_arm/boot.c and
> gd->bd is filled in my board specific code. However, after the tftp
> download is finished, the content of these structures have been
> destroyed and overwritten with garbage.
>
> I suspect a stack corruption to be the culprit, an overflow or overlap,
> as it seems to happen randomly, after a while and some function calls.
> Any hints about that?

Hook up a JTAG (or preferable an ETM) debugger and start tracing?

> Also, I wonder why the pointer to this struct is not placed *after*
> U-Boot's own code as shown in the patch below. This works fine for me
> now. Any oppinion on that?

Aren't you just hiding the symptoms here?
It seems that there is something really wrong and by moving the global
structures probably a different memory area is overwritten, but the
problem should still be there...

Kind Regards,

Remy


>
> Thanks and best regards,
> Daniel
>
>
> diff --git a/lib_arm/board.c b/lib_arm/board.c
> index 4ba1f5e..90ad5f7 100644
> --- a/lib_arm/board.c
> +++ b/lib_arm/board.c
> @@ -282,12 +282,12 @@ void start_armboot (void)
>  #endif
>
>/* Pointer is writable since we allocated a register for it */
> -   gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t));
> +   gd = (gd_t*) _bss_end;
>/* compiler optimization barrier needed for GCC >= 3.4 */
>__asm__ __volatile__("": : :"memory");
>
>memset ((void*)gd, 0, sizeof (gd_t));
> -   gd->bd = (bd_t*)((char*)gd - sizeof(bd_t));
> +   gd->bd = (bd_t*)((char*)gd + sizeof(gd_t));
>memset (gd->bd, 0, sizeof (bd_t));
>
>gd->flags |= GD_FLG_RELOC;
>
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Re: [U-Boot] [PATCH] fix lib_arm/bootm.c

[Jerry Van Baren]

Daniel Mack wrote:
> Hi,
> 
> while digging thru the sources to find out why U-Boot won't start my
> Linux kernel, I stumbled over lib_arm/bootm.c and its check for the falg
> variable. I wonder how this ever worked as the condition is really heavy
> to match unless BOOTM_STATE_OS_GO is 0 which it isn't.

Hi Daniel,

FYI, Peter Pearse found this independently.  The patch apparently hasn't 
been applied to the mainline yet.  :-(



[snip]

Best regards,
gvb

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Re: [U-Boot] [PATCH] fix lib_arm/bootm.c

[Jean-Christophe PLAGNIOL-VILLARD]

On 20:36 Fri 28 Nov , Daniel Mack wrote:
> Hi,
> 
> while digging thru the sources to find out why U-Boot won't start my
> Linux kernel, I stumbled over lib_arm/bootm.c and its check for the falg
> variable. I wonder how this ever worked as the condition is really heavy
> to match unless BOOTM_STATE_OS_GO is 0 which it isn't.
> 
> So I guess the patch below is mandatory or you could write an unlikely()
> around that check ;)
> 
> Best regards,
> Daniel
> 
please update your local tree

Best Regards,
J.
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[U-Boot] gd_t/bd_t on ARM

[Daniel Mack]

Hi,

I'm hunting weird behaviours with the gd_t global data pointer on my
PXA300 board board. The pointer gets set up fine in lib_arm/boot.c and
gd->bd is filled in my board specific code. However, after the tftp
download is finished, the content of these structures have been
destroyed and overwritten with garbage.

I suspect a stack corruption to be the culprit, an overflow or overlap,
as it seems to happen randomly, after a while and some function calls.
Any hints about that?

Also, I wonder why the pointer to this struct is not placed *after*
U-Boot's own code as shown in the patch below. This works fine for me
now. Any oppinion on that?

Thanks and best regards,
Daniel


diff --git a/lib_arm/board.c b/lib_arm/board.c
index 4ba1f5e..90ad5f7 100644
--- a/lib_arm/board.c
+++ b/lib_arm/board.c
@@ -282,12 +282,12 @@ void start_armboot (void)
 #endif
 
/* Pointer is writable since we allocated a register for it */
-   gd = (gd_t*)(_armboot_start - CONFIG_SYS_MALLOC_LEN - sizeof(gd_t));
+   gd = (gd_t*) _bss_end;
/* compiler optimization barrier needed for GCC >= 3.4 */
__asm__ __volatile__("": : :"memory");
 
memset ((void*)gd, 0, sizeof (gd_t));
-   gd->bd = (bd_t*)((char*)gd - sizeof(bd_t));
+   gd->bd = (bd_t*)((char*)gd + sizeof(gd_t));
memset (gd->bd, 0, sizeof (bd_t));
 
gd->flags |= GD_FLG_RELOC;

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[U-Boot] [PATCH] fix lib_arm/bootm.c

[Daniel Mack]

Hi,

while digging thru the sources to find out why U-Boot won't start my
Linux kernel, I stumbled over lib_arm/bootm.c and its check for the falg
variable. I wonder how this ever worked as the condition is really heavy
to match unless BOOTM_STATE_OS_GO is 0 which it isn't.

So I guess the patch below is mandatory or you could write an unlikely()
around that check ;)

Best regards,
Daniel


diff --git a/lib_arm/bootm.c b/lib_arm/bootm.c
index 8e264ce..58a101f 100644
--- a/lib_arm/bootm.c
+++ b/lib_arm/bootm.c
@@ -67,7 +67,7 @@ int do_bootm_linux(int flag, int argc, char *argv[], 
bootm_headers_t *images)
char *commandline = getenv ("bootargs");
 #endif
 
-   if ((flag != 0) || (flag != BOOTM_STATE_OS_GO))
+   if ((flag != 0) && (flag != BOOTM_STATE_OS_GO))
return 1;
 
theKernel = (void (*)(int, int, uint))images->ep;

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[U-Boot] [PATCH] ne2000: take MAC address from config if available

[Daniel Mack]

Hi,

the board I'm currently working on has an ASIX AX88796 NE2000 clone but
no EEPROM attached to it. Hence, the get_prom() routine returns zeros
only so the system won't work.

This patch takes the MAC address given by CONFIG_ETHADDR and translates
it to numeric values. This could probably go to some other, more generic
place, but I didn't find any.

Best regards,
Daniel


diff --git a/drivers/net/ne2000_base.c b/drivers/net/ne2000_base.c
index f93f932..f8480a3 100644
--- a/drivers/net/ne2000_base.c
+++ b/drivers/net/ne2000_base.c
@@ -693,6 +693,7 @@ int eth_init(bd_t *bd) {
 
nic.base = (u8 *) CONFIG_DRIVER_NE2000_BASE;
 
+#ifndef CONFIG_ETHADDR
r = get_prom(dev_addr, nic.base);
if (!r)
return -1;
@@ -703,6 +704,20 @@ int eth_init(bd_t *bd) {
 dev_addr[4], dev_addr[5]) ;
PRINTK("Set environment from HW MAC addr = \"%s\"\n", ethaddr);
setenv ("ethaddr", ethaddr);
+#else /* CONFIG_ETHADDR */
+#define STR(X) #X
+#define XSTR(X) STR(X)
+   strncpy(ethaddr, XSTR(CONFIG_ETHADDR), sizeof(ethaddr));
+
+   /* replace all colons by NULL characters */
+   for (r = 0; r < strlen(ethaddr); r++)
+   if (ethaddr[r] == ':')
+   ethaddr[r] = '\0';
+   
+   /* convert the string notation */
+   for (r = 0; r < 6; r++)
+   dev_addr[r] = simple_strtol(ethaddr + (r * 3), NULL, 16);
+#endif
 
nic.data = nic.base + DP_DATA;
nic.tx_buf1 = START_PG;
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[U-Boot] [PATCH] net/net.c: correct timeout function

[Daniel Mack]

Hi,

the net/net.c implemenation of timeouts assumes that get_timer() returns
values in milliseconds. As this is true for most platforms, it does not
apply to PXA3x where the OSCR register increments with more than 3MHz.

The following patch fixes the problem by calculation with the
CONFIG_SYS_HZ variable.

Best regards,
Daniel


diff --git a/net/net.c b/net/net.c
index 77e83b5..b9326de 100644
--- a/net/net.c
+++ b/net/net.c
@@ -206,6 +206,11 @@ uchar  NetArpWaitPacketBuf[PKTSIZE_ALIGN + 
PKTALIGN];
 ulong  NetArpWaitTimerStart;
 intNetArpWaitTry;
 
+static long net_get_timer(long base)
+{
+   return get_timer(base) / (CONFIG_SYS_HZ / 1000);
+}
+
 void ArpRequest (void)
 {
int i;
@@ -256,7 +261,7 @@ void ArpTimeoutCheck(void)
if (!NetArpWaitPacketIP)
return;
 
-   t = get_timer(0);
+   t = net_get_timer(0);
 
/* check for arp timeout */
if ((t - NetArpWaitTimerStart) > ARP_TIMEOUT) {
@@ -517,7 +522,7 @@ restart:
 *  Check for a timeout, and run the timeout handler
 *  if we have one.
 */
-   if (timeHandler && ((get_timer(0) - timeStart) > timeDelta)) {
+   if (timeHandler && ((net_get_timer(0) - timeStart) > 
timeDelta)) {
thand_f *x;
 
 #if defined(CONFIG_MII) || defined(CONFIG_CMD_MII)
@@ -639,7 +644,7 @@ NetSetTimeout(ulong iv, thand_f * f)
timeHandler = (thand_f *)0;
} else {
timeHandler = f;
-   timeStart = get_timer(0);
+   timeStart = net_get_timer(0);
timeDelta = iv;
}
 }
@@ -684,7 +689,7 @@ NetSendUDPPacket(uchar *ether, IPaddr_t dest, int dport, 
int sport, int len)
 
/* and do the ARP request */
NetArpWaitTry = 1;
-   NetArpWaitTimerStart = get_timer(0);
+   NetArpWaitTimerStart = net_get_timer(0);
ArpRequest();
return 1;   /* waiting */
}
@@ -755,7 +760,7 @@ int PingSend(void)
 
/* and do the ARP request */
NetArpWaitTry = 1;
-   NetArpWaitTimerStart = get_timer(0);
+   NetArpWaitTimerStart = net_get_timer(0);
ArpRequest();
return 1;   /* waiting */
 }
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[U-Boot] ppc4xx: u-boot sees PCIe endpoint, linux does not.

[Leon Woestenberg]

Hello,

AMCC PPC460EX canyonlands board with an FPGA PCIe end point:

u-boot sees the end point, but Linux does not:

U-Boot 1.3.3-00249-ga524e11 (Jun 30 2008 - 16:05:51)
CPU:   AMCC PowerPC 460EX Rev. A at 800 MHz (PLB=200, OPB=100, EBC=100 MHz)
<...>
Board: Canyonlands - AMCC PPC460EX Evaluation Board, 2*PCIe, Rev. 16
<...>
PCIE1: successfully set as root-complex
02  00  2071  2071  00ff  00


Now, if I re-program the end-point FPGA during the u-boot boot
time-out, Linux will recognize the end-point.

Any takers on what I should start looking for?

Regards,
-- 
Leon
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[U-Boot] [PATCH] 85xx: fix the wrong DDR settings for MPC8572DS

[Dave Liu]

The default DDR freq is 400MHz or 800M data rate,
the old settings is pure wrong for the default case.

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 include/configs/MPC8572DS.h |   26 +-
 1 files changed, 13 insertions(+), 13 deletions(-)

diff --git a/include/configs/MPC8572DS.h b/include/configs/MPC8572DS.h
index c3693b8..c719c35 100644
--- a/include/configs/MPC8572DS.h
+++ b/include/configs/MPC8572DS.h
@@ -114,22 +114,22 @@ extern unsigned long get_board_ddr_clk(unsigned long 
dummy);
 #define SPD_EEPROM_ADDRESS20x52/* CTLR 1 DIMM 0 */
 
 /* These are used when DDR doesn't use SPD.  */
-#define CONFIG_SYS_SDRAM_SIZE  256 /* DDR is 256MB */
-#define CONFIG_SYS_DDR_CS0_BNDS0x001F
-#define CONFIG_SYS_DDR_CS0_CONFIG  0x80010102  /* Enable, no 
interleaving */
-#define CONFIG_SYS_DDR_TIMING_30x
-#define CONFIG_SYS_DDR_TIMING_00x00260802
-#define CONFIG_SYS_DDR_TIMING_10x3935d322
-#define CONFIG_SYS_DDR_TIMING_20x14904cc8
-#define CONFIG_SYS_DDR_MODE_1  0x00480432
+#define CONFIG_SYS_SDRAM_SIZE  512 /* DDR is 512MB */
+#define CONFIG_SYS_DDR_CS0_BNDS0x001F
+#define CONFIG_SYS_DDR_CS0_CONFIG  0x80010202  /* Enable, no 
interleaving */
+#define CONFIG_SYS_DDR_TIMING_30x0002
+#define CONFIG_SYS_DDR_TIMING_00x00260802
+#define CONFIG_SYS_DDR_TIMING_10x626b2634
+#define CONFIG_SYS_DDR_TIMING_20x062874cf
+#define CONFIG_SYS_DDR_MODE_1  0x00440462
 #define CONFIG_SYS_DDR_MODE_2  0x
-#define CONFIG_SYS_DDR_INTERVAL0x06180100
+#define CONFIG_SYS_DDR_INTERVAL0x0c300100
 #define CONFIG_SYS_DDR_DATA_INIT   0xdeadbeef
-#define CONFIG_SYS_DDR_CLK_CTRL0x0380
-#define CONFIG_SYS_DDR_OCD_CTRL0x
+#define CONFIG_SYS_DDR_CLK_CTRL0x0080
+#define CONFIG_SYS_DDR_OCD_CTRL0x
 #define CONFIG_SYS_DDR_OCD_STATUS  0x
-#define CONFIG_SYS_DDR_CONTROL 0xC3008000  /* Type = DDR2 */
-#define CONFIG_SYS_DDR_CONTROL20x04400010
+#define CONFIG_SYS_DDR_CONTROL 0xc308  /* Type = DDR2 */
+#define CONFIG_SYS_DDR_CONTROL20x2440
 
 #define CONFIG_SYS_DDR_ERR_INT_EN  0x000d
 #define CONFIG_SYS_DDR_ERR_DIS 0x
-- 
1.5.4

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[U-Boot] [PATCH v2] nand: Fix cache and memory inconsistent issue

[Dave Liu]

we load the secondary stage u-boot image from NAND to
system memory by nand_load, we have not flush data cache
to memory, not invalidate instruction cache before we
jump to RAM. when the system is cache enable and the
TLB/page attribute of system memory is cacheable, it will
cause issue.

- 83xx family is using the dcache lock, so all of dcache
  access is cache-inhibited. so you can't see the issue.
- 85xx family is using dcache, icache enable, partial
  cache lock. you will see the issue.

The patch fix the cache issue.

Signed-off-by: Dave Liu <[EMAIL PROTECTED]>
---
 nand_spl/nand_boot_fsl_elbc.c |   35 +++
 1 files changed, 35 insertions(+), 0 deletions(-)

diff --git a/nand_spl/nand_boot_fsl_elbc.c b/nand_spl/nand_boot_fsl_elbc.c
index 4a961ea..b0ab734 100644
--- a/nand_spl/nand_boot_fsl_elbc.c
+++ b/nand_spl/nand_boot_fsl_elbc.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 
 #define WINDOW_SIZE 8192
@@ -125,6 +126,33 @@ static void nand_load(unsigned int offs, int uboot_size, 
uchar *dst)
 }
 
 /*
+ * clean the dcache, invalidate the icache
+ * for powerpc architecture
+ */
+static void __flush_cache(ulong start, ulong size)
+{
+   ulong addr, end;
+   ulong cache_line = CONFIG_SYS_CACHELINE_SIZE;
+
+   end = start + size;
+
+   /* clean the dcache, make sure all of data to memory */
+   for (addr = start; addr < end; addr += cache_line)
+   asm ("dcbst 0,%0": :"r" (addr));
+
+   /* wait for all dcbst to complete on bus */
+   asm ("sync");
+
+   /* invalidate icache */
+   for (addr = start; addr < end; addr += cache_line)
+   asm ("icbi 0,%0": :"r" (addr));
+
+   asm ("sync");
+   /* flush prefetch queue in any case */
+   asm ("isync");
+}
+
+/*
  * The main entry for NAND booting. It's necessary that SDRAM is already
  * configured and available since this code loads the main U-Boot image
  * from NAND into SDRAM and starts it from there.
@@ -143,6 +171,13 @@ void nand_boot(void)
 * Jump to U-Boot image
 */
puts("transfering control\n");
+   /*
+* We need clean dcache and invalidate
+* to sync between icache and dcache
+* before jump to RAM. make sure all of
+* NAND data write to memory.
+*/
+   __flush_cache(CONFIG_SYS_NAND_U_BOOT_DST, CONFIG_SYS_NAND_U_BOOT_SIZE);
uboot = (void *)CONFIG_SYS_NAND_U_BOOT_START;
uboot();
 }
-- 
1.5.4

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[U-Boot] [RFC PATCH V2 3/3] USB ehci freescale support

[Michael Trimarchi]

Add USB ehci freescale support

Signed-off-by: Michael Trimarchi <[EMAIL PROTECTED]>

---
 drivers/usb/Makefile   |1 +
 drivers/usb/usb_ehci_fsl.c |   99 
 drivers/usb/usb_ehci_fsl.h |   86 ++
 3 files changed, 186 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/usb_ehci_fsl.c
 create mode 100644 drivers/usb/usb_ehci_fsl.h

diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index fbc6521..6ba154b 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -34,6 +34,7 @@ COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o
 COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
 COBJS-$(CONFIG_USB_R8A66597_HCD) += r8a66597-hcd.o
 COBJS-$(CONFIG_USB_SL811HS) += sl811_usb.o
+COBJS-$(CONFIG_USB_EHCI_FSL) += usb_ehci_fsl.o
 
 # device
 ifdef CONFIG_USB_DEVICE
diff --git a/drivers/usb/usb_ehci_fsl.c b/drivers/usb/usb_ehci_fsl.c
new file mode 100644
index 000..9ca6c56
--- /dev/null
+++ b/drivers/usb/usb_ehci_fsl.c
@@ -0,0 +1,99 @@
+/*
+ * (C) Copyright 2008, Excito Elektronik i Sk=E5ne AB
+ *
+ * Author: Tor Krill [EMAIL PROTECTED]
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+#include "usb_ehci.h"
+#include "usb_ehci_fsl.h"
+#include "usb_ehci_core.h"
+
+/*
+ * Create the appropriate control structures to manage
+ * a new EHCI host controller.
+ *
+ * Excerpts from linux ehci fsl driver.
+ */
+int ehci_hcd_init(void)
+{
+   volatile immap_t *im = (immap_t *)CONFIG_SYS_IMMR;
+   uint32_t addr, temp;
+
+   addr = (uint32_t)&(im->usb[0]);
+   hccr = (struct ehci_hccr *)(addr + FSL_SKIP_PCI);
+   hcor = (struct ehci_hcor *)((uint32_t) hccr + hccr->cr_caplength);
+
+   /* Configure clock */
+   clrsetbits_be32(&(im->clk.sccr), MPC83XX_SCCR_USB_MASK,
+   MPC83XX_SCCR_USB_DRCM_11);
+
+   /* Confgure interface. */
+   temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL));
+   out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp
+| REFSEL_16MHZ | UTMI_PHY_EN);
+
+   /* Wait for clock to stabilize */
+   do {
+   temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL));
+   udelay(1000);
+   } while (!(temp & PHY_CLK_VALID));
+
+   /* Set to Host mode */
+   temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE));
+   out_le32((void *)(addr + FSL_SOC_USB_USBMODE), temp | CM_HOST);
+
+   out_be32((void *)(addr + FSL_SOC_USB_SNOOP1), SNOOP_SIZE_2GB);
+   out_be32((void *)(addr + FSL_SOC_USB_SNOOP2),
+0x8000 | SNOOP_SIZE_2GB);
+
+   /* Init phy */
+   /* TODO: handle different phys? */
+   out_le32(&(hcor->or_portsc[0]), PORT_PTS_UTMI);
+
+   /* Enable interface. */
+   temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL));
+   out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN);
+
+   out_be32((void *)(addr + FSL_SOC_USB_PRICTRL), 0x000c);
+   out_be32((void *)(addr + FSL_SOC_USB_AGECNTTHRSH), 0x0040);
+   out_be32((void *)(addr + FSL_SOC_USB_SICTRL), 0x0001);
+
+   /* Enable interface. */
+   temp = in_be32((void *)(addr + FSL_SOC_USB_CTRL));
+   out_be32((void *)(addr + FSL_SOC_USB_CTRL), temp | USB_EN);
+
+   temp = in_le32((void *)(addr + FSL_SOC_USB_USBMODE));
+
+   return 0;
+}
+
+/*
+ * Destroy the appropriate control structures corresponding
+ * the the EHCI host controller.
+ */
+int ehci_hcd_stop(void)
+{
+   return 0;
+}
diff --git a/drivers/usb/usb_ehci_fsl.h b/drivers/usb/usb_ehci_fsl.h
new file mode 100644
index 000..c429af1
--- /dev/null
+++ b/drivers/usb/usb_ehci_fsl.h
@@ -0,0 +1,86 @@
+/*
+ * Copyright (c) 2005 freescale semiconductor
+ * Copyright (c) 2005 MontaVista Software
+ * Copyright (c) 2008 Excito Elektronik i Sk=E5ne AB
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS F

[U-Boot] [RFC PATCH V2 2/3] USB ehci core support

[Michael Trimarchi]

Add USB ehci core support

Signed-off-by: Michael Trimarchi <[EMAIL PROTECTED]>

---
 drivers/usb/Makefile|1 +
 drivers/usb/usb_ehci.h  |  121 
 drivers/usb/usb_ehci_core.c |  634 +++
 drivers/usb/usb_ehci_core.h |   29 ++
 4 files changed, 785 insertions(+), 0 deletions(-)
 create mode 100644 drivers/usb/usb_ehci.h
 create mode 100644 drivers/usb/usb_ehci_core.c
 create mode 100644 drivers/usb/usb_ehci_core.h

diff --git a/drivers/usb/Makefile b/drivers/usb/Makefile
index 856f51a..fbc6521 100644
--- a/drivers/usb/Makefile
+++ b/drivers/usb/Makefile
@@ -28,6 +28,7 @@ LIB   := $(obj)libusb.a
 # core
 COBJS-y += usbdcore.o
 COBJS-$(CONFIG_USB_OHCI_NEW) += usb_ohci.o
+COBJS-$(CONFIG_USB_EHCI) += usb_ehci_core.o
 
 # host
 COBJS-$(CONFIG_USB_ISP116X_HCD) += isp116x-hcd.o
diff --git a/drivers/usb/usb_ehci.h b/drivers/usb/usb_ehci.h
new file mode 100644
index 000..ebffb44
--- /dev/null
+++ b/drivers/usb/usb_ehci.h
@@ -0,0 +1,121 @@
+/*-
+ * Copyright (c) 2007-2008, Juniper Networks, Inc.
+ * All rights reserved.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation version 2 of
+ * the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef USB_EHCI_H
+#define USB_EHCI_H
+
+/* (shifted) direction/type/recipient from the USB 2.0 spec, table 9.2 */
+#define DeviceRequest \
+   ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+#define DeviceOutRequest \
+   ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE) << 8)
+
+#define InterfaceRequest \
+   ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+#define EndpointRequest \
+   ((USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+#define EndpointOutRequest \
+   ((USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_INTERFACE) << 8)
+
+/*
+ * Register Space.
+ */
+struct ehci_hccr {
+   uint8_t cr_caplength;
+   uint16_t cr_hciversion;
+   uint32_t cr_hcsparams;
+   uint32_t cr_hccparams;
+   uint8_t cr_hcsp_portrt[8];
+};
+
+struct ehci_hcor {
+   uint32_t or_usbcmd;
+   uint32_t or_usbsts;
+   uint32_t or_usbintr;
+   uint32_t or_frindex;
+   uint32_t or_ctrldssegment;
+   uint32_t or_periodiclistbase;
+   uint32_t or_asynclistaddr;
+   uint32_t _reserved_[9];
+   uint32_t or_configflag;
+   uint32_t or_portsc[2];
+   uint32_t or_systune;
+};
+
+#define EHCI_PS_WKOC_E 0x0040  /* RW wake on over current */
+#define EHCI_PS_WKDSCNNT_E 0x0020  /* RW wake on disconnect */
+#define EHCI_PS_WKCNNT_E   0x0010  /* RW wake on connect */
+#define EHCI_PS_PTC0x000f  /* RW port test control */
+#define EHCI_PS_PIC0xc000  /* RW port indicator control */
+#define EHCI_PS_PO 0x2000  /* RW port owner */
+#define EHCI_PS_PP 0x1000  /* RW,RO port power */
+#define EHCI_PS_LS 0x0c00  /* RO line status */
+#define EHCI_PS_PR 0x0100  /* RW port reset */
+#define EHCI_PS_SUSP   0x0080  /* RW suspend */
+#define EHCI_PS_FPR0x0040  /* RW force port resume */
+#define EHCI_PS_OCC0x0020  /* RWC over current change */
+#define EHCI_PS_OCA0x0010  /* RO over current active */
+#define EHCI_PS_PEC0x0008  /* RWC port enable change */
+#define EHCI_PS_PE 0x0004  /* RW port enable */
+#define EHCI_PS_CSC0x0002  /* RWC connect status change */
+#define EHCI_PS_CS 0x0001  /* RO connect status */
+#define EHCI_PS_CLEAR  (EHCI_PS_OCC | EHCI_PS_PEC | EHCI_PS_CSC)
+
+#define EHCI_PS_IS_LOWSPEED(x) (((x) & EHCI_PS_LS) == 0x0400)
+
+/*
+ * Schedule Interface Space.
+ *
+ * IMPORTANT: Software must ensure that no interface data structure
+ * reachable by the EHCI host controller spans a 4K page boundary!
+ *
+ * Periodic transfers (i.e. isochronous and interrupt transfers) are
+ * not supported.
+ */
+
+/* Queue Element Transfer Descriptor (qTD). */
+struct qTD {
+   uint32_t qt_next;
+#defineQT_NEXT_TERMINATE   1
+   uint32_t qt_altnext;
+   uint32_t qt_token;
+   uint32_t qt_buffer[5];
+};
+
+/* Queue Head (QH). */
+struct QH {
+   uint32_t qh_link;
+#defineQH_LINK_TERMINATE   1
+#defineQH_LINK_T

[U-Boot] [RFC PATCH V2 1/3] Prepare USB layer for ehci

[Michael Trimarchi]

Prepare USB layer for ehci support

Signed-off-by: Michael Trimarchi <[EMAIL PROTECTED]>

---
 common/cmd_usb.c   |2 +-
 common/usb.c   |2 +-
 include/usb.h  |   19 +++
 include/usb_defs.h |   10 ++
 4 files changed, 23 insertions(+), 10 deletions(-)

diff --git a/common/cmd_usb.c b/common/cmd_usb.c
index 8b19240..9e55c7c 100644
--- a/common/cmd_usb.c
+++ b/common/cmd_usb.c
@@ -310,7 +310,7 @@ void usb_show_tree_graph(struct usb_device *dev, char *pre)
pre[index] = 0;
printf(" %s (%s, %dmA)\n", usb_get_class_desc(
dev->config.if_desc[0].bInterfaceClass),
-   dev->slow ? "1.5MBit/s" : "12MBit/s",
+   dev->speed ? "1.5MBit/s" : "12MBit/s",
dev->config.MaxPower * 2);
if (strlen(dev->mf) || strlen(dev->prod) || strlen(dev->serial))
printf(" %s  %s %s %s\n", pre, dev->mf, dev->prod, dev->serial);
diff --git a/common/usb.c b/common/usb.c
index ee18152..3138452 100644
--- a/common/usb.c
+++ b/common/usb.c
@@ -1136,7 +1136,7 @@ void usb_hub_port_connect_change(struct usb_device *dev, 
int port)
 
/* Allocate a new device struct for it */
usb = usb_alloc_new_device();
-   usb->slow = (portstatus & USB_PORT_STAT_LOW_SPEED) ? 1 : 0;
+   usb->speed = (portstatus & USB_PORT_STAT_LOW_SPEED) ? 1 : 0;
 
dev->children[port] = usb;
usb->parent = dev;
diff --git a/include/usb.h b/include/usb.h
index 84a77b2..377c542 100644
--- a/include/usb.h
+++ b/include/usb.h
@@ -138,7 +138,7 @@ enum {
 
 struct usb_device {
int devnum; /* Device number on USB bus */
-   int slow;   /* Slow device? */
+   int speed;  /* full/low/high */
charmf[32]; /* manufacturer */
charprod[32];   /* product */
charserial[32]; /* serial number */
@@ -171,6 +171,7 @@ struct usb_device {
unsigned long status;
int act_len;/* transfered bytes */
int maxchild;   /* Number of ports if hub */
+   int portnr;
struct usb_device *parent;
struct usb_device *children[USB_MAXCHILDREN];
 };
@@ -180,8 +181,9 @@ struct usb_device {
  */
 
 #if defined(CONFIG_USB_UHCI) || defined(CONFIG_USB_OHCI) || \
-   defined(CONFIG_USB_OHCI_NEW) || defined(CONFIG_USB_SL811HS) || \
-   defined(CONFIG_USB_ISP116X_HCD) || defined(CONFIG_USB_R8A66597_HCD)
+   defined(CONFI_USB_EHCI) || defined(CONFIG_USB_OHCI_NEW) || \
+   defined(CONFIG_USB_SL811HS) || defined(CONFIG_USB_ISP116X_HCD) || \
+   defined(CONFIG_USB_R8A66597_HCD)
 
 int usb_lowlevel_init(void);
 int usb_lowlevel_stop(void);
@@ -279,7 +281,7 @@ int usb_set_interface(struct usb_device *dev, int 
interface, int alternate);
  *  - endpoint number (4 bits)
  *  - current Data0/1 state (1 bit)
  *  - direction (1 bit)
- *  - speed (1 bit)
+ *  - speed (2 bits)
  *  - max packet size (2 bits: 8, 16, 32 or 64)
  *  - pipe type (2 bits: control, interrupt, bulk, isochronous)
  *
@@ -296,7 +298,7 @@ int usb_set_interface(struct usb_device *dev, int 
interface, int alternate);
  *  - device:  bits 8-14
  *  - endpoint:bits 15-18
  *  - Data0/1: bit 19
- *  - speed:   bit 26  (0 = Full, 1 = Low Speed)
+ *  - speed:   bit 26  (0 = Full, 1 = Low Speed, 2 = High)
  *  - pipe type:   bits 30-31  (00 = isochronous, 01 = interrupt,
  *  10 = control, 11 = bulk)
  *
@@ -308,8 +310,8 @@ int usb_set_interface(struct usb_device *dev, int 
interface, int alternate);
 /* Create various pipes... */
 #define create_pipe(dev,endpoint) \
(((dev)->devnum << 8) | (endpoint << 15) | \
-   ((dev)->slow << 26) | (dev)->maxpacketsize)
-#define default_pipe(dev) ((dev)->slow << 26)
+   ((dev)->speed << 26) | (dev)->maxpacketsize)
+#define default_pipe(dev) ((dev)->speed << 26)
 
 #define usb_sndctrlpipe(dev, endpoint) ((PIPE_CONTROL << 30) | \
 create_pipe(dev, endpoint))
@@ -359,7 +361,8 @@ int usb_set_interface(struct usb_device *dev, int 
interface, int alternate);
 #define usb_pipe_endpdev(pipe) (((pipe) >> 8) & 0x7ff)
 #define usb_pipeendpoint(pipe) (((pipe) >> 15) & 0xf)
 #define usb_pipedata(pipe) (((pipe) >> 19) & 1)
-#define usb_pipeslow(pipe) (((pipe) >> 26) & 1)
+#define usb_pipespeed(pipe)(((pipe) >> 26) & 3)
+#define usb_pipeslow(pipe) (usb_pipespeed(pipe) == USB_SPEED_LOW)
 #define usb_pipetype(pipe) (((pipe) >> 30) & 3)
 #define usb_pipeisoc(pipe) (usb_pipetype((pipe)) == PIPE_ISOCHRONOUS)
 #define usb_pipeint(pipe)  (usb_pipetype((pipe)) == PIPE_INTERRUPT)
diff --git a/include/usb_defs.h b/include/usb_defs.h
index 3

[U-Boot] [RFC PATCH V2 0/3] USB ehci

[Michael Trimarchi]

This is a series of patches based on the work of Tor Krill and
other people. I have done a cleanup of the code. The original code
was tested, but not this clean up version. I'm waiting for an
avalaible board to test the patch set.

The patch set contains:
- usb patch for prepare the usb layer to accept the ehci
- the ehci patch core
- the ehci freescale support

I try to post later the ehci_pci

Regards Michael
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Re: [U-Boot] [PATCH] Added support for the Guntermann & Drunck PowerPC 440 EP/GR ETX module.

[Wolfgang Denk]

Dear Dirk,

In message <[EMAIL PROTECTED]> you wrote:
> 
> Thanks for the review. I'm busys cleaning up the code, but at one point
> I need some help: 
...
> You are right, there is no RAM test necessary here. I want to use
> auto-sizing with memsize(), but I did not find any refererences to that
> in u-boot sources. Probaly I am missing something obvious. Can you show
> me an example, where auto-sizing is used?

Sure. Many, actually:

$ grep -Rl get_ram_size board/
board/LEOX/elpt860/elpt860.c
board/RPXClassic/RPXClassic.c
board/RPXlite/RPXlite.c
board/RPXlite_dw/RPXlite_dw.c
board/RRvision/RRvision.c
board/a3000/a3000.c
board/adder/adder.c
board/atc/atc.c
board/atmel/atngw100/atngw100.c
board/atmel/atstk1000/atstk1000.c
board/barco/barco.c
board/bc3450/bc3450.c
board/c2mon/c2mon.c
board/canmb/canmb.c
board/cm5200/cm5200.c
board/cpu86/cpu86.c
board/cpu87/cpu87.c
board/cu824/cu824.c
board/earthlcd/favr-32-ezkit/favr-32-ezkit.c
board/ep88x/ep88x.c
board/esd/cpci5200/cpci5200.c
board/esd/mecp5200/mecp5200.c
board/esd/pf5200/pf5200.c
board/esteem192e/esteem192e.c
board/etin/kvme080/kvme080.c
board/etx094/etx094.c
board/fads/fads.c
board/genietv/genietv.c
board/hermes/hermes.c
board/hidden_dragon/hidden_dragon.c
board/hmi1001/hmi1001.c
board/icecube/icecube.c
board/icu862/icu862.c
board/ids8247/ids8247.c
board/incaip/incaip.c
board/inka4x0/inka4x0.c
board/ip860/ip860.c
board/iphase4539/iphase4539.c
board/ispan/ispan.c
board/ivm/ivm.c
board/jupiter/jupiter.c
board/lantec/lantec.c
board/linkstation/linkstation.c
board/lwmon/lwmon.c
board/matrix_vision/mvbc_p/mvbc_p.c
board/mcc200/mcc200.c
board/keymile/mgcoge/mgcoge.c
board/keymile/mgsuvd/mgsuvd.c
board/mimc/mimc200/mimc200.c
board/miromico/hammerhead/hammerhead.c
board/motionpro/motionpro.c
board/muas3001/muas3001.c
board/mucmc52/mucmc52.c
board/munices/munices.c
board/musenki/musenki.c
board/mvblue/mvblue.c
board/nc650/nc650.c
board/netphone/netphone.c
board/netta/netta.c
board/netta2/netta2.c
board/nx823/nx823.c
board/o2dnt/o2dnt.c
board/oxc/oxc.c
board/pm520/pm520.c
board/pm826/pm826.c
board/pn62/pn62.c
board/r360mpi/r360mpi.c
board/rbc823/rbc823.c
board/rmu/rmu.c
board/sandpoint/sandpoint.c
board/sbc8240/sbc8240.c
board/siemens/CCM/ccm.c
board/siemens/IAD210/IAD210.c
board/siemens/SCM/scm.c
board/siemens/pcu_e/pcu_e.c
board/sl8245/sl8245.c
board/snmc/qs850/qs850.c
board/snmc/qs860t/qs860t.c
board/socrates/sdram.c
board/sorcery/sorcery.c
board/spc1920/spc1920.c
board/spd8xx/spd8xx.c
board/stxxtc/stxxtc.c
board/tb0229/tb0229.c
board/total5200/sdram.c
board/tqc/tqm5200/tqm5200.c
board/tqc/tqm8260/tqm8260.c
board/tqc/tqm8272/tqm8272.c
board/tqc/tqm834x/tqm834x.c
board/tqc/tqm85xx/sdram.c
board/tqc/tqm8xx/tqm8xx.c
board/uc101/uc101.c
board/utx8245/utx8245.c
board/v38b/v38b.c
board/xilinx/ppc440-generic/xilinx_ppc440_generic.c
board/xilinx/ppc405-generic/xilinx_ppc405_generic.c

Best regards,

Wolfgang Denk

-- 
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Re: [U-Boot] [patch 2/2] Cleanup patch Fat on non standard sector sizedevices

[Igor Luri]

Dear Remy,

I have checked patches and I think there are OK.

Also, I have aplied [patch 1/2] and [patch 2/2] on git u-boot version.
Then I have copied patched files (fat.h and fat.c) on our customized
u-boot-1.1.6 version. Finally I have built and installed u-boot on our
custom board.

I have executed fatls and fatload commands with our 2048 bytes sector
USB pendrive and IT WORKS 


Thanks a lot for your help.


El jue, 27-11-2008 a las 22:30 +0100, Remy Bohmer escribió:
> documento de texto sencillo adjunto
> (fat-on-non-standard-sector-size-devices.patch)
> The patch below is a patch originally posted by Igor Luri.
> However, the patch posted on the mailinglist was not readable (base64)
> and thus not mergable or testable. Also tabs/spaces were malformed.
> 
> So, I merged the whole patch by hand and posted it again.
> 
> Igor can you please check if I did this cleanup properly.
> 
> Notice that the code that is being modified here does not match _any_
> coding rule standard and is actually a big mess. So, I did not focus
> on the Coding Rules too much for this patch.
> I will post a seperate patch to fix this for the complete files also.
> 
> There are USB devices with sector size different than 512 bytes. In
> fact, I have one with 2048 bytes per sector:
> 
> scsi0 : SCSI emulation for USB Mass Storage devices
>  Vendor: ChipsBnk  Model: Flash DiskRev: 4.00
>  Type:   Direct-Access  ANSI SCSI revision: 02
> Attached scsi removable disk sda at scsi0, channel 0, id 0, lun 0
> SCSI device sda: 129124 2048-byte hdwr sectors (264 MB)
> sda: Write Protect is off
> Partition check:
>  sda: sda1 sda2 sda3 sda4
> 
> U-boot FAT filesystem code supposes that sector size is always 512
> bytes, consecuently fatload and fatls commands ends up with a
> segmentation fault.
> 
> Attached patches adds FAT support on devices with sector size up to 8192
> bytes.
> 
> Signed-off-by: Igor Luri <[EMAIL PROTECTED]>
> Signed-off-by: Remy Bohmer <[EMAIL PROTECTED]>
> ---
>  fs/fat/fat.c  |   89 
> --
>  include/fat.h |   18 +++
>  2 files changed, 68 insertions(+), 39 deletions(-)
> 
> Index: u-boot-usb.new/fs/fat/fat.c
> ===
> --- u-boot-usb.new.orig/fs/fat/fat.c  2008-11-27 21:40:25.0 +0100
> +++ u-boot-usb.new/fs/fat/fat.c   2008-11-27 22:10:40.0 +0100
> @@ -30,6 +30,7 @@
>  #include 
>  #include 
>  #include 
> +#include 
>  
>  /*
>   * Convert a string to lowercase.
> @@ -67,12 +68,17 @@ int disk_read (__u32 startblock, __u32 g
>  int
>  fat_register_device(block_dev_desc_t *dev_desc, int part_no)
>  {
> - unsigned char buffer[SECTOR_SIZE];
> + unsigned char *buffer;
>   disk_partition_t info;
>  
>   if (!dev_desc->block_read)
>   return -1;
>   cur_dev = dev_desc;
> +
> + buffer = malloc(cur_dev->blksz);
> + if (!buffer)
> + return -1;
> +
>   /* check if we have a MBR (on floppies we have only a PBR) */
>   if (dev_desc->block_read (dev_desc->dev, 0, 1, (ulong *) buffer) != 1) {
>   printf ("** Can't read from device %d **\n", dev_desc->dev);
> @@ -118,6 +124,7 @@ fat_register_device(block_dev_desc_t *de
>   cur_part = 1;
>   }
>  #endif
> + free(buffer);
>   return 0;
>  }
>  
> @@ -220,12 +227,12 @@ get_fatent(fsdata *mydata, __u32 entry)
>  
>   /* Read a new block of FAT entries into the cache. */
>   if (bufnum != mydata->fatbufnum) {
> - int getsize = FATBUFSIZE/FS_BLOCK_SIZE;
> + int getsize = FATBUFSIZE / mydata->sector_size;
>   __u8 *bufptr = mydata->fatbuf;
>   __u32 fatlength = mydata->fatlength;
>   __u32 startblock = bufnum * FATBUFBLOCKS;
>  
> - fatlength *= SECTOR_SIZE;   /* We want it in bytes now */
> + fatlength *= mydata->sector_size; /* We want it in bytes now */
>   startblock += mydata->fat_sect; /* Offset from start of disk */
>  
>   if (getsize > fatlength) getsize = fatlength;
> @@ -300,20 +307,25 @@ get_cluster(fsdata *mydata, __u32 clustn
>   }
>  
>   FAT_DPRINT("gc - clustnum: %d, startsect: %d\n", clustnum, startsect);
> - if (disk_read(startsect, size/FS_BLOCK_SIZE , buffer) < 0) {
> + if (disk_read(startsect, size / mydata->sector_size, buffer) < 0) {
>   FAT_DPRINT("Error reading data\n");
>   return -1;
>   }
> - if(size % FS_BLOCK_SIZE) {
> - __u8 tmpbuf[FS_BLOCK_SIZE];
> - idx= size/FS_BLOCK_SIZE;
> + if (size % mydata->sector_size) {
> + __u8 *tmpbuf;
> +
> + tmpbuf = (__u8 *) malloc(mydata->sector_size);
> + if (!tmpbuf)
> + return -1;
> + idx = size / mydata->sector_size;
>   if (disk_read(startsect + idx, 1, tmpbuf) < 

Re: [U-Boot] [PATCH] Added support for the Guntermann & Drunck PowerPC 440 EP/GR ETX module.

[Eibach, Dirk]

Hello Wolfgang,

Thanks for the review. I'm busys cleaning up the code, but at one point
I need some help: 

> > 
> +/
> > +*
> > + *  initdram -- doesn't use serial presence detect.
> > + *
> > + *  Assumes:256 MB, ECC, non-registered
> 
> Do not hard-code sizes. Use aut-sizing, please.
> 
> > +void sdram_tr1_set(int ram_address, int* tr1_value) {
> > +   int i;
> > +   int j, k;
> > +   volatile unsigned int* ram_pointer =  (unsigned 
> int*)ram_address;
> > +   int first_good = -1, last_bad = 0x1ff;
> > +
> > +   unsigned long test[NUM_TRIES] = {
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0x, 0x, 0x, 0x,
> > +   0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
> > +   0xA5A5A5A5, 0xA5A5A5A5, 0x5A5A5A5A, 0x5A5A5A5A,
> > +   0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
> > +   0x5A5A5A5A, 0x5A5A5A5A, 0xA5A5A5A5, 0xA5A5A5A5,
> > +   0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
> > +   0xAA55AA55, 0xAA55AA55, 0x55AA55AA, 0x55AA55AA,
> > +   0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55,
> > +   0x55AA55AA, 0x55AA55AA, 0xAA55AA55, 0xAA55AA55 };
> > +
> > +   /* go through all possible SDRAM0_TR1[RDCT] values */
> > +   for (i=0; i<=0x1ff; i++) {
> > +   /* set the current value for TR1 */
> > +   mtsdram(mem_tr1, (0x80800800 | i));
> > +
> > +   /* write values */
> > +   for (j=0; j > +   ram_pointer[j] = test[j];
> > +
> > +   /* clear any cache at ram location */
> > +   __asm__("dcbf 0,%0": :"r" (&ram_pointer[j]));
> > +   }
> > +
> > +   /* read values back */
> > +   for (j=0; j > +   for (k=0; k > +   /* clear any cache at ram location */
> > +   __asm__("dcbf 0,%0": :"r" 
> (&ram_pointer[j]));
> > +
> > +   if (ram_pointer[j] != test[j])
> > +   break;
> > +   }
> > +
> > +   /* read error */
> > +   if (k != NUM_READS) {
> > +   break;
> > +   }
> > +   }
> 
> Please do not implement yet another RAM test in U-Boot. We 
> already have enough of them. If you really want to test your 
> RAM, that is. For auto-sizing, you should use memsize() instead.

You are right, there is no RAM test necessary here. I want to use
auto-sizing with memsize(), but I did not find any refererences to that
in u-boot sources. Probaly I am missing something obvious. Can you show
me an example, where auto-sizing is used?

Cheers
Dirk

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