Re: [U-Boot] Clock frequency on a mx31 board
Hi 2009/5/20 alfred steele alfred.jaq...@gmail.com: Hi, The processor clock on the board i am using is to 532Mhz. I want to default it to 400(399) Mhz. I tried tweaking values in include/configs/boardname.h file but with little success. How do i change the frequency to 399 through the uboot code? You have to edit the PLL settings in your lowlevel_init.S (or equivalent). /Magnus ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 2/2] nand_spl: read environment early, when booting from NAND using nand_spl
On Tue, 19 May 2009, Scott Wood wrote: On Mon, May 18, 2009 at 04:07:22PM +0200, Guennadi Liakhovetski wrote: int env_init(void) { -#if defined(ENV_IS_EMBEDDED) +#if defined(ENV_IS_EMBEDDED) || defined(CONFIG_NAND_ENV_DST) int crc1_ok = 0, crc2_ok = 0; - env_t *tmp_env1, *tmp_env2; + env_t *tmp_env1; + +#ifdef CONFIG_ENV_OFFSET_REDUND + env_t *tmp_env2; - tmp_env1 = env_ptr; tmp_env2 = (env_t *)((ulong)env_ptr + CONFIG_ENV_SIZE); + crc2_ok = (crc32(0, tmp_env2-data, ENV_SIZE) == tmp_env2-crc); +#endif Are there any existing boards that use a redundant embedded environment without defining CONFIG_ENV_OFFSET_REDUND, since it seems it was done unconditionally before? Hm, interesting question. On the one hand, env_init() indeed just looks at (ulong)env_ptr + CONFIG_ENV_SIZE for a copy of the redundant environment, without even using CONFIG_ENV_OFFSET_REDUND. On the other hand, the saveenv() function on NAND exists in two versions depending on whether CONFIG_ENV_OFFSET_REDUND is defined or not, and only one of them really handles the redundant environment, and there it uses CONFIG_ENV_OFFSET_REDUND, and not (ulong)env_ptr + CONFIG_ENV_SIZE. Ok, here's the ultimate answer: to use redundant environment you need the flags member in env_t, and that one is only present, if CONFIG_SYS_REDUNDAND_ENVIRONMENT is defined. And on NAND that one is only defined if CONFIG_ENV_OFFSET_REDUND is defined. So, no, you cannot use redundant environment without CONFIG_ENV_OFFSET_REDUND in NAND, and we better use CONFIG_ENV_OFFSET_REDUND in env_init() too... + tmp_env1 = env_ptr; crc1_ok = (crc32(0, tmp_env1-data, ENV_SIZE) == tmp_env1-crc); - crc2_ok = (crc32(0, tmp_env2-data, ENV_SIZE) == tmp_env2-crc); - if (!crc1_ok !crc2_ok) + if (!crc1_ok !crc2_ok) { + gd-env_addr = 0; gd-env_valid = 0; - else if(crc1_ok !crc2_ok) + + return 0; + } else if (crc1_ok !crc2_ok) { No need for else after return. Right, but, I think, it just looks more uniform for handling the four [!]crc1_ok [!]crc2_ok cases. Can remove it if you prefer, sure. diff --git a/include/configs/smdk6400.h b/include/configs/smdk6400.h index cac58cf..018f576 100644 --- a/include/configs/smdk6400.h +++ b/include/configs/smdk6400.h @@ -209,6 +209,9 @@ /* total memory available to uboot */ #define CONFIG_SYS_UBOOT_SIZE (1024 * 1024) +/* Put environment copies after the end of U-Boot owned RAM */ +#define CONFIG_NAND_ENV_DST(CONFIG_SYS_UBOOT_BASE + CONFIG_SYS_UBOOT_SIZE) + This is the only board where I see CONFIG_SYS_UBOOT_SIZE defined. What would other boards supply here? How would they make sure that u-boot doesn't clobber the RAM environment (the u-boot image itself relocates, avoiding this problem)? Perhaps we should move the environment when relocating. It is moved into a malloc()'ed buffer, I haven't changed env_relocate_spec(). As for other boards, they have to find a suitable location for CONFIG_NAND_ENV_DST themselves too, of course. diff --git a/nand_spl/nand_boot.c b/nand_spl/nand_boot.c index c7eadad..be2e69c 100644 --- a/nand_spl/nand_boot.c +++ b/nand_spl/nand_boot.c @@ -246,6 +246,16 @@ void nand_boot(void) ret = nand_load(nand_info, CONFIG_SYS_NAND_U_BOOT_OFFS, CONFIG_SYS_NAND_U_BOOT_SIZE, (uchar *)CONFIG_SYS_NAND_U_BOOT_DST); +#ifdef CONFIG_NAND_ENV_DST + nand_load(nand_info, CONFIG_ENV_OFFSET, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST); + +#ifdef CONFIG_ENV_OFFSET_REDUND + nand_load(nand_info, CONFIG_ENV_OFFSET_REDUND, CONFIG_ENV_SIZE, + (uchar *)CONFIG_NAND_ENV_DST + CONFIG_ENV_SIZE); +#endif +#endif Don't forget the other NAND boot drivers... perhaps we should factor out the nand_load calls into something common. Hm, I cannot test any other NAND boot drivers, so, I would prefer to leave them to someone who actually can do that. Thanks Guennadi --- Guennadi Liakhovetski, Ph.D. DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v3] Add support for Linux-like kallsysms
The kernel stores address-symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger vap...@gentoo.org --- this one is still against next branch v3 - fix typo in new Blackfin code (spurious semicolon) Makefile | 17 +++--- common/Makefile |1 + common/kallsyms.c | 44 + common/system_map.c |8 ++ cpu/blackfin/system_map.S | 18 --- cpu/blackfin/traps.c | 35 - include/common.h |3 ++ include/configs/bfin_adi_common.h |2 +- 8 files changed, 75 insertions(+), 53 deletions(-) create mode 100644 common/kallsyms.c create mode 100644 common/system_map.c delete mode 100644 cpu/blackfin/system_map.S diff --git a/Makefile b/Makefile index 81a5cd0..87f70ff 100644 --- a/Makefile +++ b/Makefile @@ -344,12 +344,19 @@ $(obj)u-boot.sha1:$(obj)u-boot.bin $(obj)u-boot.dis: $(obj)u-boot $(OBJDUMP) -d $ $@ -$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) +GEN_UBOOT = \ UNDEF_SYM=`$(OBJDUMP) -x $(LIBBOARD) $(LIBS) | \ sed -n -e 's/.*\($(SYM_PREFIX)__u_boot_cmd_.*\)/-u\1/p'|sort|uniq`;\ cd $(LNDIR) $(LD) $(LDFLAGS) $$UNDEF_SYM $(__OBJS) \ --start-group $(__LIBS) --end-group $(PLATFORM_LIBS) \ -Map u-boot.map -o u-boot +$(obj)u-boot: depend $(SUBDIRS) $(OBJS) $(LIBBOARD) $(LIBS) $(LDSCRIPT) + $(GEN_UBOOT) +ifeq ($(CONFIG_KALLSYMS),y) + smap=`$(call SYSTEM_MAP,u-boot) | awk '$$2 ~ /[tTwW]/ {printf $$1 $$3 \\0}'` ; \ + $(CC) $(CFLAGS) -DSYSTEM_MAP=\$${smap}\ -c common/system_map.c -o $(obj)common/system_map.o + $(GEN_UBOOT) $(obj)common/system_map.o +endif $(OBJS): depend $(MAKE) -C cpu/$(CPU) $(if $(REMOTE_BUILD),$@,$(notdir $@)) @@ -448,10 +455,12 @@ cscope: cscope.files cscope -b -q -k -$(obj)System.map: $(obj)u-boot - @$(NM) $ | \ +SYSTEM_MAP = \ + $(NM) $1 | \ grep -v '\(compiled\)\|\(\.o$$\)\|\( [aUw] \)\|\(\.\.ng$$\)\|\(LASH[RL]DI\)' | \ - sort $(obj)System.map + LC_ALL=C sort +$(obj)System.map: $(obj)u-boot + @$(call SYSTEM_MAP,$) $(obj)System.map # # Auto-generate the autoconf.mk file (which is included by all makefiles) diff --git a/common/Makefile b/common/Makefile index b9f4ca7..3c5ddc3 100644 --- a/common/Makefile +++ b/common/Makefile @@ -153,6 +153,7 @@ COBJS-$(CONFIG_CMD_DOC) += docecc.o COBJS-$(CONFIG_CONSOLE_MUX) += iomux.o COBJS-y += flash.o COBJS-$(CONFIG_CMD_KGDB) += kgdb.o +COBJS-$(CONFIG_KALLSYMS) += kallsyms.o COBJS-$(CONFIG_LCD) += lcd.o COBJS-$(CONFIG_LYNXKDI) += lynxkdi.o COBJS-$(CONFIG_UPDATE_TFTP) += update.o diff --git a/common/kallsyms.c b/common/kallsyms.c new file mode 100644 index 000..ce42a93 --- /dev/null +++ b/common/kallsyms.c @@ -0,0 +1,44 @@ +/* + * Helper functions for working with the builtin symbol table + * + * Copyright (c) 2008-2009 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +#include common.h + +/* We need the weak marking as this symbol is provided specially */ +extern const char system_map[] __attribute__((weak)); + +/* Given an address, return a pointer to the symbol name and store + * the base address in caddr. So if the symbol map had an entry: + * 03fb9b7c_spi_cs_deactivate + * Then the following call: + * unsigned long base; + * const char *sym = symbol_lookup(0x03fb9b80, base); + * Would end up setting the variables like so: + * base = 0x03fb9b7c; + * sym = _spi_cs_deactivate; + */ +const char *symbol_lookup(unsigned long addr, unsigned long *caddr) +{ + const char *sym, *csym; + char *esym; + unsigned long sym_addr; + + sym = system_map; + csym = NULL; + *caddr = 0; + + while (*sym) { + sym_addr = simple_strtoul(sym, esym, 16); + sym = esym; + if (sym_addr addr) + break; + *caddr = sym_addr; + csym = sym; + sym += strlen(sym) + 1; + } + + return csym; +} diff --git a/common/system_map.c b/common/system_map.c new file mode 100644 index 000..8307293 --- /dev/null +++ b/common/system_map.c @@ -0,0 +1,8 @@ +/* + * The builtin symbol table for use with kallsyms + * + * Copyright (c) 2008-2009 Analog Devices Inc. + * Licensed under the GPL-2 or later. + */ + +const char const system_map[] = SYSTEM_MAP; diff --git a/cpu/blackfin/system_map.S b/cpu/blackfin/system_map.S deleted
[U-Boot] AMCC 405ex memory size issue
Hi all, we are using u-boot 2009.01, linux-2.6.25-rc2, 1GB DDR2 memory(2Gbit * 4, 1 rank), AMCC powerpc 405ex, both 1G and 512MB memory works fine under u-boot, but linux boot fails in 1G memory, if we limit mem=512M, linux could boot. Could anyone pls help us how to find the root cause? thanks -- View this message in context: http://www.nabble.com/AMCC-405ex--memory-size-issue-tp23631519p23631519.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
Dear Wolfgand Denk Thanks for your review comments -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Wednesday, May 20, 2009 3:29 AM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Ronen Shitrit Subject: Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support Dear Prafulla Wadaskar, In message 1242763678-13724-1-git-send-email-prafu...@marvell.com you wrote: Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131 cpu core. ... +/* + * Window Size + * Used with the Base register to set the address window size and location. + * Must be programmed from LSB to MSB as sequence of 1’s followed +by + * sequence of 0’s. The number of 1’s specifies the size of the +window in + * 64 KByte granularity (e.g., a value of 0x00FF specifies 256 = 16 MByte). + * NOTE: A value of 0x0 specifies 64-KByte size. + */ You have a number of strange special characters here. Please try and restrict yourself to plain ASCII text in normal C comments. I checked the patch that I send across and associated source code too. I didn’t find the above special chars in it I am using git-send-email to send the patches and vim as my editor I wonder how these special characters appeared in the patch I will check this issue with my system admin + for (i = 0; i (sizeval / 0x1); i++) { + j |= (1 i); + } No curly braces for single line statements, please. Sorry missed this one, corrected.. + struct kwwin_registers *winregs = (struct kwwin_registers +*)KW_CPU_WIN_BASE; Line too long. +/* + * kw_config_gpio - GPIO configuration */ void kw_config_gpio(u32 +gpp0_oe_val, u32 gpp1_oe_val, u32 gpp0_oe, u32 gpp1_oe) { + struct kwgpio_registers *gpio0reg = (struct kwgpio_registers *)KW_GPIO0_BASE; + struct kwgpio_registers *gpio1reg = (struct kwgpio_registers +*)KW_GPIO1_BASE; More too long lines. Pleasse check everywhere. Generally I execute Lindent, I missed it this time, I will do it + writel(gpp0_oe, (u32)gpio0reg-oe); + writel(gpp1_oe, (u32)gpio1reg-oe); Why are you using these casts here? The whole purpose of using a C struct to access device registers is to enable type checking by the C compiler, but you sabotage this with these casts. Please don't do that. This comment applies to the whole patch. This was done to remove build warnings in some context I will remove them ... + cntmrctrl = readl(CNTMR_CTRL_REG); + cntmrctrl |= CTCR_ARM_TIMER_EN(UBOOT_CNTR); /* enable cnt\timer */ Are you sure you want to have a TAB character in this comment? What's cnt imer ? :-) Not really :-) it was for counter/timer, slash was a confusion. Removed diff --git a/drivers/serial/serial.c b/drivers/serial/serial.c index 966df9a..dd5f332 100644 --- a/drivers/serial/serial.c +++ b/drivers/serial/serial.c @@ -27,6 +27,9 @@ #ifdef CONFIG_NS87308 #include ns87308.h #endif +#ifdef CONFIG_KIRKWOOD +#include asm/arch/kirkwood.h +#endif What exactly is this needed for? CONFIG_SYS_NS16550_CLK is defined as CONFIG_SYS_TCLK which defined in the soc specific header file In my earlier versions I had included arch specific header file in board_config header file But in the review comments it has asked to remove Hence above include is done + writel(0x0002, KW_REG_SPI_CTRL); + /* program spi clock prescaller using max_hz */ + data = ((CONFIG_SYS_TCLK / 2) / max_hz) 0x000f; + debug(data = 0x%08x \n, data); + writel(0x0210 | data, KW_REG_SPI_CONFIG); + writel(0x0001, KW_REG_SPI_IRQ_CAUSE); + writel(0x, KW_REG_SPI_IRQ_MASK); What does these magic constants mean? + /* program mpp registers to select SPI_CSn */ + if (cs) + writel((readl((u32)mppreg[0]) 0x0fff) | + 0x2000, (u32)mppreg[0]); + else + writel((readl((u32)mppreg[0]) 0xfff0) | + 0x0002, (u32)mppreg[0]); Ot these? I will provide definitions for magic numbers +int spi_xfer(struct spi_slave *slave, unsigned int bitlen, const void *dout, +void *din, unsigned long flags) ... + for (tm = 0, isread = 0; tm KW_SPI_TIMEOUT; ++tm) { + if (readl(KW_REG_SPI_IRQ_CAUSE)) { + isread = 1; + tmpdin = readl(KW_REG_SPI_DATA_IN); + debug + (*** spi_xfer: din %08X ... %08x read\n, +din, tmpdin); Indentation by TABs only, please. Indentation is done by Lindent. Do you mean to do it manually? +#define INTREG_BASE0xd000 +#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x) +#define KW_OFFSET_REG (INTREG_BASE
[U-Boot] [PATCH 1/3] ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
This patch moves the definition for the PPC4xx NAND FLASH controller (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the upcoming fix for the ECC byte ordering of the NDFC driver. Signed-off-by: Stefan Roese s...@denx.de Cc: Scott Wood scottw...@freescale.com --- Scott, please review this patchset. It fixes a problem with the 4xx NDFC and it's compatibility with the Linux driver. I would really like to get this into this 2009-06 release. Since this patchset also touches a file in drivers/mtd/nand, how should we handle those patches? Should I push those patches (after your ACK) via my ppc4xx repository? BTW: My plan is to move this 4xx NAND driver to drivers/mtd/nand after the next release. Thanks, Stefan cpu/ppc4xx/ndfc.c |9 +++-- include/ppc4xx.h |7 +++ 2 files changed, 10 insertions(+), 6 deletions(-) diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index 3a5af12..ba481ad 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -1,9 +1,9 @@ /* * Overview: * Platform independend driver for NDFC (NanD Flash Controller) - * integrated into EP440 cores + * integrated into IBM/AMCC PPC4xx cores * - * (C) Copyright 2006-2007 + * (C) Copyright 2006-2009 * Stefan Roese, DENX Software Engineering, s...@denx.de. * * Based on original work by @@ -32,10 +32,7 @@ #include common.h #if defined(CONFIG_CMD_NAND) !defined(CONFIG_NAND_LEGACY) \ - (defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ -defined(CONFIG_440EPX) || defined(CONFIG_440GRX) || \ -defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \ -defined(CONFIG_460EX) || defined(CONFIG_460GT)) +defined(CONFIG_NAND_NDFC) #include nand.h #include linux/mtd/ndfc.h diff --git a/include/ppc4xx.h b/include/ppc4xx.h index f147885..55ff323 100644 --- a/include/ppc4xx.h +++ b/include/ppc4xx.h @@ -46,6 +46,13 @@ #define CONFIG_SDRAM_PPC4xx_IBM_DDR2 /* IBM DDR(2) controller */ #endif +#if defined(CONFIG_440EP) || defined(CONFIG_440GR) || \ +defined(CONFIG_440EPX) || defined(CONFIG_440GRX) ||\ +defined(CONFIG_405EZ) || defined(CONFIG_405EX) || \ +defined(CONFIG_460EX) || defined(CONFIG_460GT) +#define CONFIG_NAND_NDFC +#endif + /* PLB4 CrossBar Arbiter Core supported across PPC4xx families */ #if defined(CONFIG_405EX) || \ defined(CONFIG_440EP) || defined(CONFIG_440EPX) || \ -- 1.6.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 2/3] ppc4xx: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch now uses the correct ECC byte order (Smart Media - SMC) to be used on the 4xx NAND FLASH driver. Without this patch we have incompatible ECC byte ordering to the Linux kernel NDFC driver. Please note that we also have to enable CONFIG_MTD_NAND_ECC_SMC in drivers/mtd/nand/nand_ecc.c for correct operation. This is done with a seperate patch. Signed-off-by: Stefan Roese s...@denx.de Cc: Scott Wood scottw...@freescale.com --- cpu/ppc4xx/ndfc.c |4 ++-- 1 files changed, 2 insertions(+), 2 deletions(-) diff --git a/cpu/ppc4xx/ndfc.c b/cpu/ppc4xx/ndfc.c index ba481ad..971e2ae 100644 --- a/cpu/ppc4xx/ndfc.c +++ b/cpu/ppc4xx/ndfc.c @@ -93,8 +93,8 @@ static int ndfc_calculate_ecc(struct mtd_info *mtdinfo, /* The NDFC uses Smart Media (SMC) bytes order */ - ecc_code[0] = p[1]; - ecc_code[1] = p[2]; + ecc_code[0] = p[2]; + ecc_code[1] = p[1]; ecc_code[2] = p[3]; return 0; -- 1.6.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/3] nand: Fix problem with ECC ordering for PPC4xx NDFC platforms
This patch enables Smart Media (SMC) ECC byte ordering which is used on the PPC4xx NAND FLASH controller (NDFC). Without this patch we have incompatible ECC byte ordering to the Linux kernel NDFC driver. Signed-off-by: Stefan Roese s...@denx.de Cc: Scott Wood scottw...@freescale.com --- drivers/mtd/nand/nand_ecc.c |5 + 1 files changed, 5 insertions(+), 0 deletions(-) diff --git a/drivers/mtd/nand/nand_ecc.c b/drivers/mtd/nand/nand_ecc.c index 94923b9..463f9cb 100644 --- a/drivers/mtd/nand/nand_ecc.c +++ b/drivers/mtd/nand/nand_ecc.c @@ -48,6 +48,11 @@ #include asm/errno.h #include linux/mtd/mtd.h +/* The PPC4xx NDFC uses Smart Media (SMC) bytes order */ +#ifdef CONFIG_NAND_NDFC +#define CONFIG_MTD_NAND_ECC_SMC +#endif + /* * NAND-SPL has no sofware ECC for now, so don't include nand_calculate_ecc(), * only nand_correct_data() is needed -- 1.6.2.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support
Dear Prafulla Wadaskar, In message 1242763432-13693-1-git-send-email-prafu...@marvell.com you wrote: This is Marvell's 88F6281_A0 based custom board developed for wireless access point product ... +/* + * Environment variables configurations + */ +#ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SIZE 0x1 /* spi flash block (64k) */ +#define CONFIG_ENV_SECT_SIZE 0x1 /* _64K */ +#else +#define CONFIG_ENV_IS_NOWHERE1 /* if env in SDRAM */ +#define CONFIG_ENV_SIZE 0x2 /* default 128k */ Just a question... Do you really NEED 64 kB or even 128 kB environement size? In my experience, 16 kB is almost always more than sufficient. Keep in mind that the environment size can be smaller than the sector size which stores the environment, and that a big enviroment size adds to the boot delay, as the whole environment size needs to be CRC32 checked. + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND ${x_bootcmd_kernel}; setenv bootargs \ + ${x_bootargs} ${x_bootargs_root}; bootm 0x640; + +#define CONFIG_MTDPARTS spi0.0:512k(uboot),5...@512k(psm),\ + 2...@1m(kernel),1...@3m(rootfs)\0 Lines too long. +#define CONFIG_EXTRA_ENV_SETTINGSx_bootargs=console=ttyS0,115200 \ + mtdparts=CONFIG_MTDPARTS \ + x_bootcmd_kernel=cp.b 0xf810 0x640 0x20\0 \ + x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN0x0040 /* 4M */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations + */ +#define CONFIG_CONSOLE_INFO_QUIET/* some code reduction */ Hm... you reserve 4 MB malloc space, but then suppress useful information to save a few bytes? To me this seems inconsistent. I recommend to check if this really makes sense. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de C makes it easy for you to shoot yourself in the foot. C++ makes that harder, but when you do, it blows away your whole leg. -- Bjarne Stroustrup ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] jffs2/mtdparts: Fix problem with usage from JFFS2 and MTDPARTS together
Hi Wolfgang, On Sunday 17 May 2009 19:25:07 Wolfgang Denk wrote: on NOR fals systems with just a single bank of memory it seems to work: snip = ls -rwxr-xr-x14296 Tue Apr 01 22:51:21 2008 false -rwxr-xr-x83624 Tue Apr 01 22:52:22 2008 fgrep -rwx-- 294912 Sun May 17 15:32:14 2009 gawk -rwxr-xr-x 5672 Fri Nov 21 12:32:02 2008 dmesg -rwxr-xr-x10272 Tue Apr 01 22:57:28 2008 dnsdomainname -rwxr-xr-x 3596 Tue Apr 01 23:20:22 2008 doexec -rwxr-xr-x10272 Tue Apr 01 22:57:28 2008 domainname -rwxr-xr-x56972 Wed Apr 02 00:27:30 2008 dumpkeys ... OK. So we have: - problems on NAND flash - problems on systems with more than one bank NOR - other storage media not tested yet I just tested on an PPC4xx platform (405EX Kilauea) and enabled JFFS2 and MTDPARTS support there. After fixing some problems with the NAND ECC byte ordering (see patches already posted) I was able to mount JFFS2 filesystems on NOR and NAND: = mtdparts device nor0 nor, # parts = 5 #: namesizeoffset mask_flags 0: kernel 0x0020 0x 0 1: root0x0020 0x0020 0 2: user0x03b6 0x0040 0 3: env 0x0004 0x03f6 0 4: u-boot 0x0006 0x03fa 0 device nand0 nand, # parts = 3 #: namesizeoffset mask_flags 0: part1 0x0100 0x 0 1: part2 0x0100 0x0100 0 2: part3 0x0200 0x0200 0 active partition: nand0,1 - (part2) 0x0100 @ 0x0100 defaults: mtdids : nor0=nor mtdparts: mtdparts=nor:2m(kernel),2m(root),60800k(user),256k(env),-(u-boot) = chpart nor0,1 partition changed to nor0,1 = ls rescan: First time in use Scanning JFFS2 FS: . done. -rwxr-xr-x14296 Wed Feb 20 17:47:23 2008 false -rwxr-xr-x83624 Wed Feb 20 17:55:07 2008 fgrep -rwx-- 225280 Thu Jan 01 00:02:33 1970 gawk -rwxr-xr-x15392 Wed Feb 20 17:47:23 2008 env -rwxr-xr-x 673648 Wed Feb 20 18:37:41 2008 ex snip = chpart nand0,1 partition changed to nand0,1 = ls rescan: First time in use Scanning JFFS2 FS: . done. -rwxr-xr-x 62 Wed Feb 20 18:43:55 2008 zcat -rw-r--r--6 Thu Jan 01 00:01:22 1970 test.txt -rwxr-xr-x10148 Wed Feb 20 18:04:36 2008 ypdomainname -rwxr-xr-x 673648 Wed Feb 20 18:37:41 2008 view -rwxr-xr-x 673648 Wed Feb 20 18:37:41 2008 vi -rwxr-xr-x32796 Wed Feb 20 18:44:14 2008 usleep -rwxr-xr-x16884 Wed Feb 20 17:47:23 2008 uname ... Seems that I only had problems generating and/or flashing the JFFS2 images. I now mounted the mtd partitions in Linux and generated the JFFS2 fs via mount and copied the files to it. This worked in both cases, NOR and NAND. So it seems that the common JFFS2/MTDPARTS framework is working correctly. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [RFC/PATCH] jffs2/mtdparts: Fix problem with usage from JFFS2 and MTDPARTS together
Hi Wolfgang, On Sunday 17 May 2009 15:54:28 Wolfgang Denk wrote: My tests are not succesful wither. I tested on TQM8548; when booting Linux I see this: ... NAND device: Manufacturer ID: 0x2c, Chip ID: 0xdc (Micron NAND 512MiB 3,3V 8-bit) Scanning device for bad blocks Bad eraseblock 628 at 0x04e8 Bad eraseblock 995 at 0x07c6 Bad eraseblock 2051 at 0x1006 Bad eraseblock 3608 at 0x1c30 Bad eraseblock 3992 at 0x1f30 snip = fsinfo ### filesystem type is JFFS2 Scanning JFFS2 FS: read_nand_cached: error reading nand off 0xabfe00 size 8192 bytes read_nand_cached: error reading nand off 0xadfe00 size 8192 bytes read_nand_cached: error reading nand off 0xac size 8192 bytes read_nand_cached: error reading nand off 0xaffe00 size 8192 bytes snip The addresses where the read errors occur don't seem to be related to the bad blocks reported by Linux. No. What does a normal nand read return when reading this complete partition into RAM? On PPC4xx it returned -117 here. I fixed it with the already posted patches for the 4xx NDFC ECC byte ordering. Perhaps the TQM8548 has similar incompatibility issues with the Linux kernel here too? Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ppc4xx
Hi Wolfgang, please pull a fix for UBI: The following changes since commit c06326c73bf90e48a8e1cf8893ad31c575423f50: Shinya Kuribayashi (1): MIPS: lib_mips/board.c: Remove unused variables are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Andreas Huber (1): UBI: fix return code in ubi_volume_read common/cmd_ubi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Please pull u-boot-ubi - was Re: Please pull u-boot-ppc4xx
Ups. Sorry about the subject. It should have read: Please pull u-boot-ubi Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support
Dear Wolfgang Denk Thanks for your comments.. -Original Message- From: Wolfgang Denk [mailto:w...@denx.de] Sent: Wednesday, May 20, 2009 2:51 PM To: Prafulla Wadaskar Cc: u-boot@lists.denx.de; Ashish Karkare; Prabhanjan Sarnaik; Ronen Shitrit Subject: Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support Dear Prafulla Wadaskar, In message 1242763432-13693-1-git-send-email-prafu...@marvell.com you wrote: This is Marvell's 88F6281_A0 based custom board developed for wireless access point product ... +/* + * Environment variables configurations */ #ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SIZE0x1 /* spi flash block (64k) */ +#define CONFIG_ENV_SECT_SIZE 0x1 /* _64K */ +#else +#define CONFIG_ENV_IS_NOWHERE 1 /* if env in SDRAM */ +#define CONFIG_ENV_SIZE0x2 /* default 128k */ Just a question... Do you really NEED 64 kB or even 128 kB environement size? In my experience, 16 kB is almost always more than sufficient. Keep in mind that the environment size can be smaller than the sector size which stores the environment, and that a big enviroment size adds to the boot delay, as the whole environment size needs to be CRC32 checked. I agree, even 4kb is sufficient for me but if I keep it less than a sector size it gives me bad CRC warning at boot up even though I do saveenv Hence I kept it equal to sector size This may be a bug...?? + * Default environment variables + */ +#define CONFIG_BOOTCOMMAND ${x_bootcmd_kernel}; setenv bootargs \ + ${x_bootargs} ${x_bootargs_root}; bootm 0x640; + +#define CONFIG_MTDPARTS spi0.0:512k(uboot),5...@512k(psm), \ + 2...@1m(kernel),1...@3m(rootfs)\0 Lines too long. Corrected +#define CONFIG_EXTRA_ENV_SETTINGS x_bootargs=console=ttyS0,115200 \ + mtdparts=CONFIG_MTDPARTS \ + x_bootcmd_kernel=cp.b 0xf810 0x640 0x20\0 \ + x_bootargs_root=root=/dev/mtdblock3 ro rootfstype=squashfs\0 + +/* + * Size of malloc() pool + */ +#define CONFIG_SYS_MALLOC_LEN 0x0040 /* 4M */ +/* size in bytes reserved for initial data */ +#define CONFIG_SYS_GBL_DATA_SIZE 128 + +/* + * Other required minimal configurations */ +#define CONFIG_CONSOLE_INFO_QUIET /* some code reduction */ Hm... you reserve 4 MB malloc space, but then suppress useful information to save a few bytes? To me this seems inconsistent. I recommend to check if this really makes sense. I changed it to 128KB refering some other similar boards.. Regards.. Prafulla .. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
Hi Prafulla, On Tuesday 19 May 2009 22:07:58 Prafulla Wadaskar wrote: Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131 cpu core. I would like to give your Kirkwood support a try and start compiling the latest version before trying to port a custom board. Now I'm failing to compile the latest version posted on the list. Most likely I missed some patches or applied them to the wrong git repository. I tried it on u-boot/next and on u-boot-arm/next. Both failed. I applied those patches: [PATCH v8] Marvell Kirkwood family SOC support [PATCH v9] Marvell MV88F6281GTW_GE Board support [PATCH v3] Gbe Controller driver support for kirkwood SOCs It would be great if you could tell me what I am missing here (additional patches or wrong repository?). Here the error messages from building with those 3 patches on top of u-boot- arm/next: [ste...@stefan-desktop u-boot-arm (kirkwood)]$ ./MAKEALL mv88f6281gtw_ge Configuring for mv88f6281gtw_ge board... mpp.c: In function 'kirkwood_mpp_conf': mpp.c:53: warning: unused variable 'gpio_mode' kirkwood_egiga.c: In function 'smi_reg_read': kirkwood_egiga.c:66: warning: implicit declaration of function 'readl' kirkwood_egiga.c:98: warning: implicit declaration of function 'writel' kirkwood_egiga.c: In function 'set_dram_access': kirkwood_egiga.c:451: warning: implicit declaration of function 'kw_sdram_bar' kirkwood_egiga.c:452: warning: implicit declaration of function 'kw_sdram_bs' kirkwood_egiga.c: In function 'kirkwood_egiga_initialize': kirkwood_egiga.c:1593: error: 'KW_EGIGA0_BASE' undeclared (first use in this function) kirkwood_egiga.c:1593: error: (Each undeclared identifier is reported only once kirkwood_egiga.c:1593: error: for each function it appears in.) kirkwood_egiga.c:1597: error: 'KW_EGIGA1_BASE' undeclared (first use in this function) kirkwood_egiga.c:1610: warning: implicit declaration of function 'get_random_hex' Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
On Friday 15 May 2009 11:32:26 Kazuaki Ichinohe wrote: This patch adds a SATA harddisk driver for the canyonlands. This patch is kernel driver's porting. This pach corresponded to not cmd_scsi but cmd_sata. Looks good now. Thanks for all your effort here. So: Acked-by: Stefan Roese s...@denx.de Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 1/1] FAT replace compare_sign with strncmp.
The static function compare_sign is only used to compare the fs_type string and does not do anything more than what strncmp does. The addition of the trailing '\0' to fs_type, while legal, is not needed because the it is never printed out and strncmp does not depend on NULL terminated strings. Signed-off-by: Tom Rix tom@windriver.com --- fs/fat/fat.c | 36 +++- 1 files changed, 3 insertions(+), 33 deletions(-) diff --git a/fs/fat/fat.c b/fs/fat/fat.c index 602edae..2445f1e 100644 --- a/fs/fat/fat.c +++ b/fs/fat/fat.c @@ -140,28 +140,6 @@ dirdelim(char *str) return -1; } - -/* - * Match volume_info fs_type strings. - * Return 0 on match, -1 otherwise. - */ -static int -compare_sign(char *str1, char *str2) -{ - char *end = str1+SIGNLEN; - - while (str1 != end) { - if (*str1 != *str2) { - return -1; - } - str1++; - str2++; - } - - return 0; -} - - /* * Extract zero terminated short name from a directory entry. */ @@ -673,7 +651,6 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) { __u8 block[FS_BLOCK_SIZE]; volume_info *vistart; - char *fstype; if (disk_read(0, 1, block) 0) { FAT_DPRINT(Error: reading block\n); @@ -706,23 +683,16 @@ read_bootsectandvi(boot_sector *bs, volume_info *volinfo, int *fatsize) } memcpy(volinfo, vistart, sizeof(volume_info)); - /* -* Terminate fs_type string. Writing past the end of vistart -* is ok - it's just the buffer. -*/ - fstype = vistart-fs_type; - fstype[8] = '\0'; - if (*fatsize == 32) { - if (compare_sign(FAT32_SIGN, vistart-fs_type) == 0) { + if (strncmp(FAT32_SIGN, vistart-fs_type, SIGNLEN) == 0) { return 0; } } else { - if (compare_sign(FAT12_SIGN, vistart-fs_type) == 0) { + if (strncmp(FAT12_SIGN, vistart-fs_type, SIGNLEN) == 0) { *fatsize = 12; return 0; } - if (compare_sign(FAT16_SIGN, vistart-fs_type) == 0) { + if (strncmp(FAT16_SIGN, vistart-fs_type, SIGNLEN) == 0) { *fatsize = 16; return 0; } -- 1.6.0.5 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Ethernet not working on OMAP3 board with
Pillai, Manikandan wrote: Hi , Tried the hints but they don't work. I still don't have a fix. Still investigating. On my omap3 evm, I see perpetual ARP requests sent from my board looking for my tftp server during a tftpboot comamnd. The server responds, but the evm doesn't appear to take note. The behavior of the ping command is similar - one ARP from the evm, an ARP response from the destination and then the ping fails. Does that ring any bells? - Josh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
-Original Message- From: Stefan Roese [mailto:s...@denx.de] Sent: Wednesday, May 20, 2009 5:40 PM To: u-boot@lists.denx.de Cc: Prafulla Wadaskar; Ashish Karkare; Prabhanjan Sarnaik; Ronen Shitrit Subject: Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support Hi Prafulla, On Tuesday 19 May 2009 22:07:58 Prafulla Wadaskar wrote: Kirkwood family controllers are highly integrated SOCs based on Feroceon-88FR131/Sheeva-88SV131 cpu core. I would like to give your Kirkwood support a try and start compiling the latest version before trying to port a custom board. Now I'm failing to compile the latest version posted on the list. Most likely I missed some patches or applied them to the wrong git repository. Thanks Stefan, your efforts will help me a lot I tried it on u-boot/next and on u-boot-arm/next. Both I have used u-boot-arm/next pls use the same. failed. I applied those patches: [PATCH v8] Marvell Kirkwood family SOC support [PATCH v9] Marvell MV88F6281GTW_GE Board support [PATCH v3] Gbe Controller driver support for kirkwood SOCs It would be great if you could tell me what I am missing here (additional patches or wrong repository?). You will need additional two patches as mentioned below http://git.denx.de/?p=u-boot/u-boot-blackfin.git;a=commit;h=12cedeb9589ef1203e3308e80b11e5ee73261ced http://lists.denx.de/pipermail/u-boot/2009-May/052905.html Apart from this pls add below line to drivers/net/kirkwood_egiga.c remove below mentioned errors #include asm/arch/kirkwood.h I hope build will be through... Best of Luck Regards.. Prafulla . . Here the error messages from building with those 3 patches on top of u-boot- arm/next: [ste...@stefan-desktop u-boot-arm (kirkwood)]$ ./MAKEALL mv88f6281gtw_ge Configuring for mv88f6281gtw_ge board... mpp.c: In function 'kirkwood_mpp_conf': mpp.c:53: warning: unused variable 'gpio_mode' kirkwood_egiga.c: In function 'smi_reg_read': kirkwood_egiga.c:66: warning: implicit declaration of function 'readl' kirkwood_egiga.c:98: warning: implicit declaration of function 'writel' kirkwood_egiga.c: In function 'set_dram_access': kirkwood_egiga.c:451: warning: implicit declaration of function 'kw_sdram_bar' kirkwood_egiga.c:452: warning: implicit declaration of function 'kw_sdram_bs' kirkwood_egiga.c: In function 'kirkwood_egiga_initialize': kirkwood_egiga.c:1593: error: 'KW_EGIGA0_BASE' undeclared (first use in this function) kirkwood_egiga.c:1593: error: (Each undeclared identifier is reported only once kirkwood_egiga.c:1593: error: for each function it appears in.) kirkwood_egiga.c:1597: error: 'KW_EGIGA1_BASE' undeclared (first use in this function) kirkwood_egiga.c:1610: warning: implicit declaration of function 'get_random_hex' Thanks. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Cross-compiling U-Boot on Mac OS X -- can't find crc32.c?
On Wed, May 20, 2009 at 12:31 AM, Wolfgang Denk w...@denx.de wrote: It's you who has OS X, and who has a problem. Only when Ah itchez, Ah scratchez. Just so I'm clear on this, you're saying that you're not really concerned about how well U-Boot works for other people? -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Cross-compiling U-Boot on Mac OS X -- can't find crc32.c?
Timur Tabi wrote: On Wed, May 20, 2009 at 12:31 AM, Wolfgang Denk w...@denx.de wrote: It's you who has OS X, and who has a problem. Only when Ah itchez, Ah scratchez. Just so I'm clear on this, you're saying that you're not really concerned about how well U-Boot works for other people? No, people that aren't running OS X cannot debug problems that happen when running on OS X. You wrote: Well, I tried to fix it, but I can't figure it out. I just don't understand why it's so broken. The errors I get are so confusing, and I can't figure out what the Makefile is doing when it fails. So I give up. followed by: Wolfgang, I think you seriously need to revamp your build process. The kernel is orders of magnitude more complex than U-Boot, and yet I can build it just fine on OS X. That sounds like you want Wolfgang to fix a problem he doesn't have and cannot reproduce, since he isn't running OS X (to the best of my knowledge). http://xkcd.com/583/ gvb ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] File For Your Claim
You have just been awarded,the sum of £1,532,720.00 in the ELECTRONICS Award 2009, Anniversary Bonanza. held in May. Names:. Address:.. Country: Age:.. Regard ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support
+ * Environment variables configurations */ #ifdef CONFIG_SPI_FLASH +#define CONFIG_ENV_IS_IN_SPI_FLASH 1 +#define CONFIG_ENV_SIZE 0x1 /* spi flash block (64k) */ +#define CONFIG_ENV_SECT_SIZE 0x1 /* _64K */ +#else +#define CONFIG_ENV_IS_NOWHERE1 /* if env in SDRAM */ +#define CONFIG_ENV_SIZE 0x2 /* default 128k */ Just a question... Do you really NEED 64 kB or even 128 kB environement size? In my experience, 16 kB is almost always more than sufficient. Keep in mind that the environment size can be smaller than the sector size which stores the environment, and that a big enviroment size adds to the boot delay, as the whole environment size needs to be CRC32 checked. I agree, even 4kb is sufficient for me but if I keep it less than a sector size it gives me bad CRC warning at boot up even though I do saveenv Hence I kept it equal to sector size This may be a bug...?? Hi Wolfgang This was really a bug in my spi driver, I fixed it, now it's working for any size (even 4k) Thanks for pointing this issue, I am using CONFIG_ENV_SIZE = 4k now Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Cross-compiling U-Boot on Mac OS X -- can't find crc32.c?
Jerry Van Baren wrote: That sounds like you want Wolfgang to fix a problem he doesn't have and cannot reproduce, since he isn't running OS X (to the best of my knowledge). No, what I really want is the build process to be simpler so that other people can fix problems with it. I don't even understand how it works when it *does* work. A functioning build process on OS X will allow me to do more work on U-Boot, adding more features and fixing more bugs, than I normally would be able to do. But I can't fix every problem myself. -- Timur Tabi Linux kernel developer at Freescale ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
On Wednesday 20 May 2009 15:40:00 Prafulla Wadaskar wrote: I would like to give your Kirkwood support a try and start compiling the latest version before trying to port a custom board. Now I'm failing to compile the latest version posted on the list. Most likely I missed some patches or applied them to the wrong git repository. Thanks Stefan, your efforts will help me a lot Sure. I'll try to help out if possible. But I'm only starting into this project right now. So please don't expect any real output soon. But I definitely can give some feedback... I tried it on u-boot/next and on u-boot-arm/next. Both I have used u-boot-arm/next pls use the same. OK, understood. failed. I applied those patches: [PATCH v8] Marvell Kirkwood family SOC support [PATCH v9] Marvell MV88F6281GTW_GE Board support [PATCH v3] Gbe Controller driver support for kirkwood SOCs It would be great if you could tell me what I am missing here (additional patches or wrong repository?). You will need additional two patches as mentioned below http://git.denx.de/?p=u-boot/u-boot-blackfin.git;a=commit;h=12cedeb9589ef12 03e3308e80b11e5ee73261ced http://lists.denx.de/pipermail/u-boot/2009-May/052905.html Apart from this pls add below line to drivers/net/kirkwood_egiga.c remove below mentioned errors #include asm/arch/kirkwood.h I hope build will be through... Best of Luck Yes, this works. Thanks a lot. Best regards, Stefan = DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-0 Fax: +49-8142-66989-80 Email: off...@denx.de = ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
+#define INTREG_BASE 0xd000 +#define KW_REGISTER(x) (KW_REGS_PHY_BASE + x) +#define KW_OFFSET_REG(INTREG_BASE + 0x20080) + +/* undocumented registers */ +#define KW_REG_UNDOC_0x1470 (KW_REGISTER(0x1470)) +#define KW_REG_UNDOC_0x1478 (KW_REGISTER(0x1478)) + +#define KW_UART0_BASE(KW_REGISTER(0x12000)) +#define KW_UART1_BASE(KW_REGISTER(0x13000)) +#define KW_MPP_BASE (KW_REGISTER(0x1)) +#define KW_GPIO0_BASE(KW_REGISTER(0x10100)) +#define KW_GPIO1_BASE(KW_REGISTER(0x10140)) +#define KW_CPU_WIN_BASE (KW_REGISTER(0x2)) +#define KW_CPU_REG_BASE (KW_REGISTER(0x20100)) +#define KW_TIMER_BASE(KW_REGISTER(0x20300)) +#define KW_REG_PCIE_BASE (KW_REGISTER(0x4)) +#define KW_EGIGA0_BASE (KW_REGISTER(0x72000)) +#define KW_EGIGA1_BASE (KW_REGISTER(0x76000)) Use a C struct? These are the Base address referred by register structures. Generally this type of declaration used for other cpu/socs. May you point any reference for this? Hi Wolfgang Denk I have almost done with other changes except this one Do this really need to be converted C struct? I will have to put some efforts to get it done :-(. Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 08/15] MPC85xx: Add UEC3 and UEC4 support for MPC8569MDS
Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/mpc8569mds/bcsr.c |4 board/freescale/mpc8569mds/mpc8569mds.c | 30 ++ include/configs/MPC8569MDS.h| 23 +++ 3 files changed, 57 insertions(+), 0 deletions(-) diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c index 5adffc2..f133732 100644 --- a/board/freescale/mpc8569mds/bcsr.c +++ b/board/freescale/mpc8569mds/bcsr.c @@ -41,6 +41,10 @@ void enable_8569mds_qe_mdio() BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); + setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), + BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); + setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), + BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); } void disable_8569mds_brd_eeprom_write_protect() diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 7e6cfb7..387ecad 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -77,6 +77,36 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {2, 3, 2, 0, 1}, /* ENET2_GRXCLK */ {2, 2, 1, 0, 2}, /* ENET2_GTXCLK */ + /* UCC_3_RGMII */ + {2, 11, 2, 0, 1}, /* CLK12 */ + {0, 29, 1, 0, 2}, /* ENET3_TXD0_SER3_TXD0 */ + {0, 30, 1, 0, 3}, /* ENET3_TXD1_SER3_TXD1 */ + {0, 31, 1, 0, 2}, /* ENET3_TXD2_SER3_TXD2 */ + {1, 0, 1, 0, 3}, /* ENET3_TXD3_SER3_TXD3 */ + {1, 3, 2, 0, 3}, /* ENET3_RXD0_SER3_RXD0 */ + {1, 4, 2, 0, 1}, /* ENET3_RXD1_SER3_RXD1 */ + {1, 5, 2, 0, 2}, /* ENET3_RXD2_SER3_RXD2 */ + {1, 6, 2, 0, 3}, /* ENET3_RXD3_SER3_RXD3 */ + {1, 1, 1, 0, 1}, /* ENET3_TX_EN_SER3_RTS_B*/ + {1, 9, 2, 0, 3}, /* ENET3_RX_DV_SER3_CTS_B*/ + {2, 9, 2, 0, 2}, /* ENET3_GRXCLK */ + {2, 25, 1, 0, 2}, /* ENET3_GTXCLK */ + + /* UCC_4_RGMII */ + {2, 16, 2, 0, 3}, /* CLK17 */ + {1, 12, 1, 0, 2}, /* ENET4_TXD0_SER4_TXD0 */ + {1, 13, 1, 0, 2}, /* ENET4_TXD1_SER4_TXD1 */ + {1, 14, 1, 0, 1}, /* ENET4_TXD2_SER4_TXD2 */ + {1, 15, 1, 0, 2}, /* ENET4_TXD3_SER4_TXD3 */ + {1, 18, 2, 0, 2}, /* ENET4_RXD0_SER4_RXD0 */ + {1, 19, 2, 0, 1}, /* ENET4_RXD1_SER4_RXD1 */ + {1, 20, 2, 0, 1}, /* ENET4_RXD2_SER4_RXD2 */ + {1, 21, 2, 0, 2}, /* ENET4_RXD3_SER4_RXD3 */ + {1, 16, 1, 0, 2}, /* ENET4_TX_EN_SER4_RTS_B*/ + {1, 24, 2, 0, 3}, /* ENET4_RX_DV_SER4_CTS_B*/ + {2, 17, 2, 0, 2}, /* ENET4_GRXCLK */ + {2, 24, 1, 0, 2}, /* ENET4_GTXCLK */ + /* UART1 is muxed with QE PortF bit [9-12].*/ {5, 12, 2, 0, 3}, /* UART1_SIN */ {5, 9, 1, 0, 3}, /* UART1_SOUT */ diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index c87e51d..7208c78 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -313,6 +313,29 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_UEC2_INTERFACE_MODE ENET_1000_RGMII_ID #endif +#define CONFIG_UEC_ETH3 /* GETH3 */ +#define CONFIG_HAS_ETH2 + +#ifdef CONFIG_UEC_ETH3 +#define CONFIG_SYS_UEC3_UCC_NUM2 /* UCC3 */ +#define CONFIG_SYS_UEC3_RX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC3_TX_CLK QE_CLK12 +#define CONFIG_SYS_UEC3_ETH_TYPE GIGA_ETH +#define CONFIG_SYS_UEC3_PHY_ADDR 2 +#define CONFIG_SYS_UEC3_INTERFACE_MODE ENET_1000_RGMII_ID +#endif + +#define CONFIG_UEC_ETH4 /* GETH4 */ +#define CONFIG_HAS_ETH3 + +#ifdef CONFIG_UEC_ETH4 +#define CONFIG_SYS_UEC4_UCC_NUM3 /* UCC4 */ +#define CONFIG_SYS_UEC4_RX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC4_TX_CLK QE_CLK17 +#define CONFIG_SYS_UEC4_ETH_TYPE GIGA_ETH +#define CONFIG_SYS_UEC4_PHY_ADDR 3 +#define CONFIG_SYS_UEC4_INTERFACE_MODE ENET_1000_RGMII_ID +#endif #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH] 85xx: Added MPC8535/E identifiers
Signed-off-by: Kumar Gala ga...@kernel.crashing.org --- cpu/mpc85xx/cpu.c |2 ++ include/asm-ppc/processor.h |2 ++ 2 files changed, 4 insertions(+), 0 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index ef976a4..1c3eddf 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -40,6 +40,8 @@ DECLARE_GLOBAL_DATA_PTR; struct cpu_type cpu_type_list [] = { CPU_TYPE_ENTRY(8533, 8533), CPU_TYPE_ENTRY(8533, 8533_E), + CPU_TYPE_ENTRY(8535, 8535), + CPU_TYPE_ENTRY(8535, 8535_E), CPU_TYPE_ENTRY(8536, 8536), CPU_TYPE_ENTRY(8536, 8536_E), CPU_TYPE_ENTRY(8540, 8540), diff --git a/include/asm-ppc/processor.h b/include/asm-ppc/processor.h index 83e3581..87568b4 100644 --- a/include/asm-ppc/processor.h +++ b/include/asm-ppc/processor.h @@ -934,6 +934,8 @@ #define SVR_8533 0x803400 #define SVR_8533_E 0x803C00 +#define SVR_8535 0x803701 +#define SVR_8535_E 0x803F01 #define SVR_8536 0x803700 #define SVR_8536_E 0x803F00 #define SVR_8540 0x803000 -- 1.6.0.6 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] Add support for Linux-like kallsysms
On Wednesday 20 May 2009 12:39:33 Jean-Christophe PLAGNIOL-VILLARD wrote: On 04:35 Wed 20 May , Mike Frysinger wrote: The kernel stores address-symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger vap...@gentoo.org --- this one is still against next branch v3 - fix typo in new Blackfin code (spurious semicolon) could you do this in two patch? i could, but the existing patch is mostly a rename. the symbol_lookup() function which makes up most of the kallsysm.c file already existed in the Blackfin directory as is. -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v3] Add support for Linux-like kallsysms
On 04:35 Wed 20 May , Mike Frysinger wrote: The kernel stores address-symbol names in it so things can be decoded at runtime. Do it in U-Boot, and we get nice symbol decoding when crashing. Signed-off-by: Mike Frysinger vap...@gentoo.org --- this one is still against next branch v3 - fix typo in new Blackfin code (spurious semicolon) could you do this in two patch? Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 15/15] 85xx: Fix the wrong BCSR address of MPC8569MDS
From: Dave Liu dave...@freescale.com The BCSR17[7] = 1 will unlock the write protect of FLASH. The WP# pin only controls the write protect of top/bottom sector, That is why we can save env, but we can't write the first sector before the patch. Signed-off-by: Dave Liu dave...@freescale.com Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/mpc8569mds/bcsr.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c index b895b4e..a936edb 100644 --- a/board/freescale/mpc8569mds/bcsr.c +++ b/board/freescale/mpc8569mds/bcsr.c @@ -27,7 +27,7 @@ void enable_8569mds_flash_write() { - setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 11), BCSR17_FLASH_nWP); + setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); } void disable_8569mds_flash_write() -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] Support in u-boot for PCI-Express NIC
Hi, Is there support under u-boot for newer pcie network cards? Under drivers/net, I notice that there is the e1000 and sk98 network drivers. Unfortunately, these seem a bit dated and the pcie x1 nic/s I am trying to use are not supported (checked the device ids). Pointers on any other supported pcie nic will be helpful. Thanks, ~Sri ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 02/15] MPC85xx: Fix MURAM size for MPC8569
MPC8569 has 128K bytes MURAM. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- include/asm-ppc/immap_qe.h |9 +++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index 66a4735..55667ca 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -582,9 +582,12 @@ typedef struct qe_immap { u8 res14[0x300]; u8 res15[0x3A00]; u8 res16[0x8000]; /* 0x108000 - 0x11 */ -#if defined(CONFIG_MPC8568)||defined(CONFIG_MPC8569) +#if defined(CONFIG_MPC8568) u8 muram[0x1]; /* 0x1_ - 0x2_ Multi-user RAM */ u8 res17[0x2]; /* 0x2_ - 0x4_ */ +#elif defined(CONFIG_MPC8569) + u8 muram[0x2]; /* 0x1_ - 0x3_ Multi-user RAM */ + u8 res17[0x1]; /* 0x3_ - 0x4_ */ #else u8 muram[0xC000]; /* 0x11 - 0x11C000 Multi-user RAM */ u8 res17[0x24000]; /* 0x11C000 - 0x14 */ @@ -594,8 +597,10 @@ typedef struct qe_immap { extern qe_map_t *qe_immr; -#if defined(CONFIG_MPC8568) || defined(CONFIG_MPC8569) +#if defined(CONFIG_MPC8568) #define QE_MURAM_SIZE 0x1UL +#elif defined(CONFIG_MPC8569) +#define QE_MURAM_SIZE 0x2UL #elif defined(CONFIG_MPC8360) #define QE_MURAM_SIZE 0xc000UL #elif defined(CONFIG_MPC832X) -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 03/15] MPC85xx: Fix some settings for MPC8569MDS board
- Change the CONFIG_SYS_CLK_FREQ and CONFIG_DDR_CLK_FREQ to since the on-board oscillator's freq is 66.666MHz. - Increase the size of malloc to 512KB because MPC8569MDS needs more memory for malloc to support up to eight Ethernet interfaces. - Move Environment address out of uboot thus the saved environment variables will not be erased after u-boot is re-programmed. Signed-off-by: Haiying Wang haiying.w...@freescale.com Signed-off-by: Dave Liu dave...@freescale.com --- include/configs/MPC8569MDS.h | 10 +- 1 files changed, 5 insertions(+), 5 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index b0af5dc..ea996ff 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -55,8 +55,8 @@ extern unsigned long get_clock_freq(void); #endif /* Replace a call to get_clock_freq (after it is implemented)*/ -#define CONFIG_SYS_CLK_FREQ6600 -#define CONFIG_DDR_CLK_FREQ6600 +#define CONFIG_SYS_CLK_FREQ +#define CONFIG_DDR_CLK_FREQCONFIG_SYS_CLK_FREQ /* * These can be toggled for performance analysis, otherwise use default. @@ -194,7 +194,7 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_INIT_SP_OFFSET CONFIG_SYS_GBL_DATA_OFFSET #define CONFIG_SYS_MONITOR_LEN (256 * 1024)/* Reserve 256 kB for Mon */ -#define CONFIG_SYS_MALLOC_LEN (128 * 1024)/* Reserved for malloc */ +#define CONFIG_SYS_MALLOC_LEN (512 * 1024)/* Reserved for malloc */ /* Serial Port */ #define CONFIG_CONS_INDEX 1 @@ -327,9 +327,9 @@ extern unsigned long get_clock_freq(void); * Environment */ #define CONFIG_ENV_IS_IN_FLASH 1 -#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_BASE + 0x4) +#define CONFIG_ENV_ADDR(CONFIG_SYS_MONITOR_BASE - CONFIG_ENV_SECT_SIZE) #define CONFIG_ENV_SECT_SIZE 0x2 /* 256K(one sector) for env */ -#define CONFIG_ENV_SIZE0x2000 +#define CONFIG_ENV_SIZECONFIG_ENV_SECT_SIZE #define CONFIG_LOADS_ECHO 1 /* echo on for serial download */ #define CONFIG_SYS_LOADS_BAUD_CHANGE 1 /* allow baudrate change */ -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 07/15] drivers/qe: Add more SNUM number for QE
Some QE chips like 8569 need more SNUM numbers for supporting 4 UECs in RGMII- 1000 mode. Signed-off-by: Haiying Wang haiying.w...@freescale.com Acked-by: Timur Tabi ti...@freescale.com --- drivers/qe/qe.c| 15 --- drivers/qe/qe.h|1 - include/asm-ppc/immap_qe.h |5 - 3 files changed, 16 insertions(+), 5 deletions(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index 30fe726..beeb189 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. * * Dave Liu dave...@freescale.com * based on source code of Shlomi Gridish @@ -108,14 +108,23 @@ static void qe_sdma_init(void) out_be32(p-sdmr, QE_SDMR_GLB_1_MSK | (0x3 QE_SDMR_CEN_SHIFT)); } -static u8 thread_snum[QE_NUM_OF_SNUM] = { +/* This table is a list of the serial numbers of the Threads, taken from the + * SNUM Table chart in the QE Reference Manual. The order is not important, + * we just need to know what the SNUMs are for the threads. + */ +static u8 thread_snum[] = { 0x04, 0x05, 0x0c, 0x0d, 0x14, 0x15, 0x1c, 0x1d, 0x24, 0x25, 0x2c, 0x2d, 0x34, 0x35, 0x88, 0x89, 0x98, 0x99, 0xa8, 0xa9, 0xb8, 0xb9, 0xc8, 0xc9, - 0xd8, 0xd9, 0xe8, 0xe9 + 0xd8, 0xd9, 0xe8, 0xe9, + 0x08, 0x09, 0x18, 0x19, + 0x28, 0x29, 0x38, 0x39, + 0x48, 0x49, 0x58, 0x59, + 0x68, 0x69, 0x78, 0x79, + 0x80, 0x81 }; static void qe_snums_init(void) diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index 2128f56..faad43c 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -25,7 +25,6 @@ #include common.h -#define QE_NUM_OF_SNUM 28 #define QE_NUM_OF_BRGS 16 #define UCC_MAX_NUM8 diff --git a/include/asm-ppc/immap_qe.h b/include/asm-ppc/immap_qe.h index 7613b5c..6e7f392 100644 --- a/include/asm-ppc/immap_qe.h +++ b/include/asm-ppc/immap_qe.h @@ -3,7 +3,7 @@ * The Internal Memory Map for devices with QE on them. This * is the superset of all QE devices (8360, etc.). * - * Copyright (c) 2006 Freescale Semiconductor, Inc. + * Copyright (c) 2006-2009 Freescale Semiconductor, Inc. * Author: Shlomi Gridih grid...@freescale.com * * This program is free software; you can redistribute it and/or modify it @@ -609,10 +609,13 @@ extern qe_map_t *qe_immr; #if defined(CONFIG_MPC8323) #define MAX_QE_RISC 1 +#define QE_NUM_OF_SNUM 28 #elif defined(CONFIG_MPC8569) #define MAX_QE_RISC 4 +#define QE_NUM_OF_SNUM 46 #else #define MAX_QE_RISC2 +#define QE_NUM_OF_SNUM 28 #endif #endif /* __IMMAP_QE_H__ */ -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 05/10] Rename ads5121 board into mpc5121ads
Dear Arno Fischer, In message mpg.247e51b45d39ae3e989...@news.gmane.org you wrote: In article 1242463666-28583-6-git-send-email...@denx.de, w...@denx.de says... We rename the board so we use a consistent name in U-Boot and in Linux. Also, we use this opportunity to move the board into the Freecale vendor directory. Maybe a stupid question - but the manufacturer called it ADS512101 - should not that name be the right one for linux and u-boot ? It's not a stupid question. There is indeed confusion around the board name. Situation is as follows: the manufacturer called the board Hellrosa; see http://www.silicontkx.com/hellrosa.htm Freescale decided to distributre the board under the product name ADS5121 (or ADS512101). The Linux kernel has been using the name mpc5121ads for the related board configuration from the beginning. U-Boot used ads5121 as board config name. I don't care at all about the name of the product, i. e. the part number you have to use when ordering the board. Also, the board configuration name is not somthing I would fight for - it's just a name after all. It does not have to be identical to the product name (which is even impossible here, as we would have to use either hellrosa or ads5121, and neither of them makes everybody happy; also it's not 100% clear to me whether board/freescale/ or board/stx/ is more correct - technically or politically). But I think it is important to use the *same* configuration name in Linux and in U-Boot - we received a lot of avoidable support calls in the past because users got confused when they had to use ads5121 in U-Boot and mpc5121ads in Linux. The purpose of the patch is to get a unique configuration name. mpc5121 fits well with the other config names used for Freescale boards, and is identical to Linux. If anybody wants a different board name, I don't object. But he should please care to get the config name in Linux changed first, U-Boot will then follow. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de I don't want to be young again, I just don't want to get any older. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 05/15] MPC85xx: Add UART1 support for MPC8569MDS
MPC8569 UART1 signals are muxed with PortF bit[9-12], we need to define those pins before using UART1. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/mpc8569mds/mpc8569mds.c |6 ++ 1 files changed, 6 insertions(+), 0 deletions(-) diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 129c58c..7e6cfb7 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -77,6 +77,12 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {2, 3, 2, 0, 1}, /* ENET2_GRXCLK */ {2, 2, 1, 0, 2}, /* ENET2_GTXCLK */ + /* UART1 is muxed with QE PortF bit [9-12].*/ + {5, 12, 2, 0, 3}, /* UART1_SIN */ + {5, 9, 1, 0, 3}, /* UART1_SOUT */ + {5, 10, 2, 0, 3}, /* UART1_CTS_B */ + {5, 11, 1, 0, 2}, /* UART1_RTS_B */ + {0, 0, 0, 0, QE_IOP_TAB_END} /* END of table */ }; -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Which U-Boot releases have Device Tree support
Hi, I am new to Linux uboot. I have also purchased a MPC8360E-RDK. There is no uboot source code on the CodeWarrior CD either. The LTIB (ltib-mpc8360-com-express-20080709) I downloaded from www.logicpd.com does not have source code for uboot either. It comes with a uboot image though. I can build kernel image (uImage) and jfss2 file system. I will very appreciate if you can show me where to get the uboot source code and how to build it for my MPC8360E-RDK board. Thank you very much! Jew-Dong wd wrote: Dear Peter Barada, In message 1239250418.4414.72.ca...@blackhole you wrote: On Wed, 2009-04-08 at 22:40 -0400, cmfai...@rockwellcollins.com wrote: We bought a MPC8360E-RDK development kit to develop applications under MontaVista CGE5.0. We were toldby the consultant whose doing our board LSP that the U-Boot version that came with the development kit did not have device tree support. The consultant upgraded the U-Boot to a version that has device tree support, but he says he doesn't have the source code for the U-Boot version. I need the source to make certain updates. Which U-Boot version can I download that has device tree support? If you've registered your MPC8360E-RDK with Logic, you should be able to login to the Logic website and download the entire LTIB source that includes a version of u-boot with full source/patches that fully support dealing with device tree binary (dtb) files, and also includes a kernel for the MPC8360E-RDK, and the build process generates an appropriate device tree binary for the board... On the other hand there is zero reason to stick with such an out-of-tree port when the board is supported in mainline. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Conquest is easy. Control is not. -- Kirk, Mirror, Mirror, stardate unknown ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- View this message in context: http://www.nabble.com/-U-Boot--Which-U-Boot-releases-have-Device-Tree-support-tp22963537p23641282.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/10] imx27lite: add support for imx27lite board from LogicPD
Hello Paul, I was trying to test out this patch, and I'm having some trouble. I did a git pull on the u-boot tree, and then I saved this patch to a text file. I was able to apply the patch just fine. The first thing that happend was make didn't like the Makefile, but I think it was just a space problem because after I edited the Makefile to match the entries around imx27lite_config it worked OK. Now when I run make it gives the error: make[1]: Leaving directory `/home/raid5/imx27env/u-boot/cpu/arm926ejs' make -C cpu/arm926ejs/mx27/ make: *** cpu/arm926ejs/mx27/: No such file or directory. Stop. make: *** [cpu/arm926ejs/mx27/libmx27.a] Error 2 How do I know what git version to use the patch against? If I were using git-am instead of just saving it to a file would that be different? Is there another patch I need? You need to apply other patches too (at least generic imx27 support and patch for serial console driver). Regards, Ilya. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 06/15] drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs
Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang haiying.w...@freescale.com Acked-by: Timur Tabi ti...@freescale.com --- drivers/qe/qe.c|3 --- drivers/qe/qe.h| 17 +++-- drivers/qe/uec.c | 32 +++- drivers/qe/uec.h |4 ++-- include/asm-ppc/immap_qe.h |8 5 files changed, 52 insertions(+), 12 deletions(-) diff --git a/drivers/qe/qe.c b/drivers/qe/qe.c index f114fe0..30fe726 100644 --- a/drivers/qe/qe.c +++ b/drivers/qe/qe.c @@ -258,9 +258,6 @@ int qe_set_mii_clk_src(int ucc_num) return 0; } -/* The maximum number of RISCs we support */ -#define MAX_QE_RISC 2 - /* Firmware information stored here for qe_get_firmware_info() */ static struct qe_firmware_info qe_firmware_info; diff --git a/drivers/qe/qe.h b/drivers/qe/qe.h index d78edba..2128f56 100644 --- a/drivers/qe/qe.h +++ b/drivers/qe/qe.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. * * Dave Liu dave...@freescale.com * based on source code of Shlomi Gridish @@ -46,11 +46,16 @@ typedef struct qe_snum { /* QE RISC allocation */ -typedef enum qe_risc_allocation { - QE_RISC_ALLOCATION_RISC1= 1, /* RISC 1 */ - QE_RISC_ALLOCATION_RISC2= 2, /* RISC 2 */ - QE_RISC_ALLOCATION_RISC1_AND_RISC2 = 3 /* RISC 1 or RISC 2 */ -} qe_risc_allocation_e; +#defineQE_RISC_ALLOCATION_RISC10x1 /* RISC 1 */ +#defineQE_RISC_ALLOCATION_RISC20x2 /* RISC 2 */ +#defineQE_RISC_ALLOCATION_RISC30x4 /* RISC 3 */ +#defineQE_RISC_ALLOCATION_RISC40x8 /* RISC 4 */ +#defineQE_RISC_ALLOCATION_RISC1_AND_RISC2 (QE_RISC_ALLOCATION_RISC1 | \ +QE_RISC_ALLOCATION_RISC2) +#defineQE_RISC_ALLOCATION_FOUR_RISCS (QE_RISC_ALLOCATION_RISC1 | \ +QE_RISC_ALLOCATION_RISC2 | \ +QE_RISC_ALLOCATION_RISC3 | \ +QE_RISC_ALLOCATION_RISC4) /* QE CECR commands for UCC fast. */ diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index bba3ef2..eadcc2c 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. * * Dave Liu dave...@freescale.com * @@ -46,8 +46,13 @@ static uec_info_t eth1_uec_info = { .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, #endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, .phy_address= CONFIG_SYS_UEC1_PHY_ADDR, @@ -69,8 +74,13 @@ static uec_info_t eth2_uec_info = { .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, #endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, .phy_address= CONFIG_SYS_UEC2_PHY_ADDR, @@ -92,8 +102,13 @@ static uec_info_t eth3_uec_info = { .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, #endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif .tx_bd_ring_len = 16, .rx_bd_ring_len = 16, .phy_address= CONFIG_SYS_UEC3_PHY_ADDR, @@ -115,8 +130,13 @@ static uec_info_t eth4_uec_info = { .num_threads_tx = UEC_NUM_OF_THREADS_4, .num_threads_rx = UEC_NUM_OF_THREADS_4, #endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif
[U-Boot] [PATCH 12/15] drivers/qe: add sgmii support in for UEC driver
Signed-off-by: Haiying Wang haiying.w...@freescale.com --- drivers/qe/uec.c | 17 + drivers/qe/uec.h | 31 +-- 2 files changed, 46 insertions(+), 2 deletions(-) diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index deeb947..7649f9f 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -577,6 +577,10 @@ static int uec_set_mac_if_mode(uec_private_t *uec, enet_interface_e if_mode) maccfg2 |= MACCFG2_INTERFACE_MODE_NIBBLE; upsmr |= (UPSMR_R10M | UPSMR_RMM); break; + case ENET_1000_SGMII: + maccfg2 |= MACCFG2_INTERFACE_MODE_BYTE; + upsmr |= UPSMR_SGMM; + break; default: return -EINVAL; break; @@ -1276,6 +1280,18 @@ static int uec_startup(uec_private_t *uec) out_be32(uec_regs-utbipar, utbipar); + /* Configure the TBI for SGMII operation */ + if (uec-uec_info-enet_interface == ENET_1000_SGMII) { + uec_write_phy_reg(uec-dev, uec_regs-utbipar, + ENET_TBI_MII_ANA, TBIANA_SETTINGS); + + uec_write_phy_reg(uec-dev, uec_regs-utbipar, + ENET_TBI_MII_TBICON, TBICON_CLK_SELECT); + + uec_write_phy_reg(uec-dev, uec_regs-utbipar, + ENET_TBI_MII_CR, TBICR_SETTINGS); + } + /* Allocate Tx BDs */ length = ((uec_info-tx_bd_ring_len * SIZEOFBD) / UEC_TX_BD_RING_SIZE_MEMORY_ALIGNMENT) * @@ -1565,6 +1581,7 @@ int uec_initialize(int index) devlist[index] = dev; uec-uec_info = uec_info; + uec-dev = dev; sprintf(dev-name, FSL UEC%d, index); dev-iobase = 0; diff --git a/drivers/qe/uec.h b/drivers/qe/uec.h index 411f0d2..5497b06 100644 --- a/drivers/qe/uec.h +++ b/drivers/qe/uec.h @@ -1,5 +1,5 @@ /* - * Copyright (C) 2006 Freescale Semiconductor, Inc. + * Copyright (C) 2006-2009 Freescale Semiconductor, Inc. * * Dave Liu dave...@freescale.com * based on source code of Shlomi Gridish @@ -47,6 +47,7 @@ #define UPSMR_CAM 0x0400 /* CAM Address Matching */ #define UPSMR_BRO 0x0200 /* Broadcast Address */ #define UPSMR_RES1 0x2000 /* Reserved feild - must be 1*/ +#define UPSMR_SGMM 0x0020 /* SGMII mode*/ #define UPSMR_INIT_VALUE (UPSMR_HSE | UPSMR_RES1) @@ -621,6 +622,31 @@ typedef enum enet_tbi_mii_reg { ENET_TBI_MII_TBICON= 0x11 } enet_tbi_mii_reg_e; +/* TBI MDIO register bit fields*/ +#define TBICON_CLK_SELECT 0x0020 +#define TBIANA_ASYMMETRIC_PAUSE0x0100 +#define TBIANA_SYMMETRIC_PAUSE 0x0080 +#define TBIANA_HALF_DUPLEX 0x0040 +#define TBIANA_FULL_DUPLEX 0x0020 +#define TBICR_PHY_RESET0x8000 +#define TBICR_ANEG_ENABLE 0x1000 +#define TBICR_RESTART_ANEG 0x0200 +#define TBICR_FULL_DUPLEX 0x0100 +#define TBICR_SPEED1_SET 0x0040 + +#define TBIANA_SETTINGS ( \ + TBIANA_ASYMMETRIC_PAUSE \ + | TBIANA_SYMMETRIC_PAUSE \ + | TBIANA_FULL_DUPLEX \ + ) + +#define TBICR_SETTINGS ( \ + TBICR_PHY_RESET \ + | TBICR_ANEG_ENABLE \ + | TBICR_FULL_DUPLEX \ + | TBICR_SPEED1_SET \ + ) + /* UEC number of threads */ typedef enum uec_num_of_threads { @@ -645,7 +671,8 @@ typedef enum enet_interface { ENET_1000_RGMII_ID, ENET_1000_RGMII_RXID, ENET_1000_TBI, - ENET_1000_RTBI + ENET_1000_RTBI, + ENET_1000_SGMII } enet_interface_e; /* UEC initialization info struct -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] ppc4xx: Move definition for PPC4xx NAND FLASH controller to header
Stefan Roese wrote: This patch moves the definition for the PPC4xx NAND FLASH controller (NDFC) CONFIG_NAND_NDFC into include/ppc4xx.h. This is needed for the upcoming fix for the ECC byte ordering of the NDFC driver. Signed-off-by: Stefan Roese s...@denx.de Cc: Scott Wood scottw...@freescale.com --- Scott, please review this patchset. It fixes a problem with the 4xx NDFC and it's compatibility with the Linux driver. I would really like to get this into this 2009-06 release. Since this patchset also touches a file in drivers/mtd/nand, how should we handle those patches? Should I push those patches (after your ACK) via my ppc4xx repository? ACK 1-3 Though once we get kconfig, we should pull the ifdef out of the NAND code and have MTD_NAND_ECC_SMC be selected by NAND_NDFC. -Scott ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 00/15] patchset for QE UEC and MPC8569MDS
Here is the patchset for adding new features for QE UEC and MPC8569MDS board. Please review this patchset and ignore the one(9 patches) I sent out some weeks ago, since there are some update in the new patches. Thanks. Haiying ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Which U-Boot releases have Device Tree support
Dear JEW-DONG, In message 23641282.p...@talk.nabble.com you wrote: I am new to Linux uboot. I have also purchased a MPC8360E-RDK. There is no uboot source code on the CodeWarrior CD either. The LTIB (ltib-mpc8360-com-express-20080709) I downloaded from www.logicpd.com does not have source code for uboot either. It comes with a uboot image though. If logicpd is not violating the GPL, there must be a written notice in the package (written, i. e. printed on some paper included in the package) which explains where you can get their source code from. I can build kernel image (uImage) and jfss2 file system. I will very appreciate if you can show me where to get the uboot source code and how to build it for my MPC8360E-RDK board. Just use top of tree. It is supposed to work fine. At leats it works fine here. And please don't top post / full quote. Make sure to read http://www.netmeister.org/news/learn2quote.html Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de : 1. What is the possibility of this being added in the future? In the near future, the probability is close to zero. In the distant future, I'll be dead, and posterity can do whatever they like... :-) - lwall ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] nand_init: use loff_t for offset
On 17:31 Tue 19 May , Scott Wood wrote: On Sat, May 16, 2009 at 02:27:40PM +0200, Jean-Christophe PLAGNIOL-VILLARD wrote: -static inline int nand_erase(nand_info_t *info, off_t off, size_t size) +static inline int nand_erase(nand_info_t *info, loff_t off, size_t size) size should probably be loff_t (or something similarly sized) as well, or erasing an entire large device at once could be awkward. so we need to update the struct erase_info too as it handle a u_int32_t Best Regards, J. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
Dear Prafulla, In message 73173d32e9439e4abb5151606c3e19e201cf9e6...@sc-vexch1.marvell.com you wrote: ... +#define KW_EGIGA0_BASE (KW_REGISTER(0x72000)) +#define KW_EGIGA1_BASE (KW_REGISTER(0x76000)) Use a C struct? These are the Base address referred by register structures. I am aware of this. Generally this type of declaration used for other cpu/socs. Well, generally is a weak argument - you find examples for both. Coming from the PowerPC world, and haveing been using the code these sinde 10 years, I'm more accustomed to see something like a big IMMR sturcture here. I have almost done with other changes except this one Do this really need to be converted C struct? No, you do not *have* to. That's why I asked it as a question. If I had to write the code, I would use a C struct, and I think it would be easier to read. But I don't insist on such a change. You can find arguments for both solutions, so decide what deems best for you. I will have to put some efforts to get it done :-(. Well, changing it would actually be trivial. But as mentioned above: I don't insist. It's largely a matter of taste, I think. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If people are good only because they fear punishment, and hope for reward, then we are a sorry lot indeed.- Albert Einstein ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Support in u-boot for PCI-Express NIC
Dear Srinivasan Srikanth-R9AABP, In message fd7805b55f061e408ef265c9bdfcb64c0329a...@az33exm23.fsl.freescale.net you wrote: Is there support under u-boot for newer pcie network cards? Under drivers/net, I notice that there is the e1000 and sk98 network drivers. Unfortunately, these seem a bit dated and the pcie x1 nic/s I am trying to use are not supported (checked the device ids). Pointers on any other supported pcie nic will be helpful. At least the e1000 has been successfully tested not so long ago. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de When choosing between two evils, I always like to take the one I've never tried before. -- Mae West, Klondike Annie ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 09/15] MPC85xx: Add RMII support for MPC8569MDS
This patch supports UCC working at RMII mode on PIB board, fixup fdt blob to support rmii in kernel. It also changes the name of enable_mpc8569mds_qe_mdio to enalbe_mpc8569mds_qe_uec which is more accurate. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/mpc8569mds/bcsr.c | 15 +- board/freescale/mpc8569mds/bcsr.h |2 +- board/freescale/mpc8569mds/mpc8569mds.c | 96 ++- include/configs/MPC8569MDS.h| 38 +++- 4 files changed, 144 insertions(+), 7 deletions(-) diff --git a/board/freescale/mpc8569mds/bcsr.c b/board/freescale/mpc8569mds/bcsr.c index f133732..b895b4e 100644 --- a/board/freescale/mpc8569mds/bcsr.c +++ b/board/freescale/mpc8569mds/bcsr.c @@ -35,8 +35,9 @@ void disable_8569mds_flash_write() clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 17), BCSR17_FLASH_nWP); } -void enable_8569mds_qe_mdio() +void enable_8569mds_qe_uec() { +#if defined(CONFIG_SYS_UCC_RGMII_MODE) setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), @@ -45,6 +46,18 @@ void enable_8569mds_qe_mdio() BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); +#elif defined(CONFIG_SYS_UCC_RMII_MODE) + /* Set UCC1-4 working at RMII mode */ + clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 7), + BCSR7_UCC1_GETH_EN | BCSR7_UCC1_RGMII_EN); + clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 8), + BCSR8_UCC2_GETH_EN | BCSR8_UCC2_RGMII_EN); + clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), + BCSR9_UCC3_GETH_EN | BCSR9_UCC3_RGMII_EN); + clrbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 10), + BCSR10_UCC4_GETH_EN | BCSR10_UCC4_RGMII_EN); + setbits_8((u8 *)(CONFIG_SYS_BCSR_BASE + 9), BCSR9_UCC3_RMII_EN); +#endif } void disable_8569mds_brd_eeprom_write_protect() diff --git a/board/freescale/mpc8569mds/bcsr.h b/board/freescale/mpc8569mds/bcsr.h index 8efe9bd..e5d63c7 100644 --- a/board/freescale/mpc8569mds/bcsr.h +++ b/board/freescale/mpc8569mds/bcsr.h @@ -76,7 +76,7 @@ void enable_8569mds_flash_write(void); void disable_8569mds_flash_write(void); -void enable_8569mds_qe_mdio(void); +void enable_8569mds_qe_uec(void); void disable_8569mds_brd_eeprom_write_protect(void); #endif /* __BCSR_H_ */ diff --git a/board/freescale/mpc8569mds/mpc8569mds.c b/board/freescale/mpc8569mds/mpc8569mds.c index 387ecad..1e7526a 100644 --- a/board/freescale/mpc8569mds/mpc8569mds.c +++ b/board/freescale/mpc8569mds/mpc8569mds.c @@ -47,6 +47,7 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { /* QE_MUX_MDIO */ {2, 30, 3, 0, 2}, /* QE_MUX_MDIO */ +#if defined(CONFIG_SYS_UCC_RGMII_MODE) /* UCC_1_RGMII */ {2, 11, 2, 0, 1}, /* CLK12 */ {0, 0, 1, 0, 3}, /* ENET1_TXD0_SER1_TXD0 */ @@ -107,6 +108,44 @@ const qe_iop_conf_t qe_iop_conf_tab[] = { {2, 17, 2, 0, 2}, /* ENET4_GRXCLK */ {2, 24, 1, 0, 2}, /* ENET4_GTXCLK */ +#elif defined(CONFIG_SYS_UCC_RMII_MODE) + /* UCC_1_RMII */ + {2, 15, 2, 0, 1}, /* CLK16 */ + {0, 0, 1, 0, 3}, /* ENET1_TXD0_SER1_TXD0 */ + {0, 1, 1, 0, 3}, /* ENET1_TXD1_SER1_TXD1 */ + {0, 6, 2, 0, 3}, /* ENET1_RXD0_SER1_RXD0 */ + {0, 7, 2, 0, 1}, /* ENET1_RXD1_SER1_RXD1 */ + {0, 4, 1, 0, 2}, /* ENET1_TX_EN_SER1_RTS_B*/ + {0, 12, 2, 0, 3}, /* ENET1_RX_DV_SER1_CTS_B*/ + + /* UCC_2_RMII */ + {2, 15, 2, 0, 1}, /* CLK16 */ + {0, 14, 1, 0, 2}, /* ENET2_TXD0_SER2_TXD0 */ + {0, 15, 1, 0, 2}, /* ENET2_TXD1_SER2_TXD1 */ + {0, 20, 2, 0, 2}, /* ENET2_RXD0_SER2_RXD0 */ + {0, 21, 2, 0, 1}, /* ENET2_RXD1_SER2_RXD1 */ + {0, 18, 1, 0, 2}, /* ENET2_TX_EN_SER2_RTS_B*/ + {0, 26, 2, 0, 3}, /* ENET2_RX_DV_SER2_CTS_B*/ + + /* UCC_3_RMII */ + {2, 15, 2, 0, 1}, /* CLK16 */ + {0, 29, 1, 0, 2}, /* ENET3_TXD0_SER3_TXD0 */ + {0, 30, 1, 0, 3}, /* ENET3_TXD1_SER3_TXD1 */ + {1, 3, 2, 0, 3}, /* ENET3_RXD0_SER3_RXD0 */ + {1, 4, 2, 0, 1}, /* ENET3_RXD1_SER3_RXD1 */ + {1, 1, 1, 0, 1}, /* ENET3_TX_EN_SER3_RTS_B*/ + {1, 9, 2, 0, 3}, /* ENET3_RX_DV_SER3_CTS_B*/ + + /* UCC_4_RMII */ + {2, 15, 2, 0, 1}, /* CLK16 */ + {1, 12, 1, 0, 2}, /* ENET4_TXD0_SER4_TXD0 */ + {1, 13, 1, 0, 2}, /* ENET4_TXD1_SER4_TXD1 */ + {1, 18, 2, 0, 2}, /* ENET4_RXD0_SER4_RXD0 */ + {1, 19, 2, 0, 1}, /* ENET4_RXD1_SER4_RXD1 */ + {1, 16, 1, 0, 2}, /* ENET4_TX_EN_SER4_RTS_B*/ + {1, 24, 2, 0, 3}, /* ENET4_RX_DV_SER4_CTS_B*/ +#endif + /* UART1 is muxed with QE
[U-Boot] [PATCH 11/15] MPC85xx: update uec to support up to 8 UECs in QE
Signed-off-by: Haiying Wang haiying.w...@freescale.com --- cpu/mpc85xx/cpu.c |6 + cpu/mpc85xx/fdt.c |4 ++- drivers/qe/uec.c | 66 - 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index b812d88..eb2aeec 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -399,6 +399,12 @@ int cpu_eth_init(bd_t *bis) #if defined(CONFIG_UEC_ETH6) uec_initialize(5); #endif +#if defined(CONFIG_UEC_ETH7) + uec_initialize(6); +#endif +#if defined(CONFIG_UEC_ETH8) + uec_initialize(7); +#endif #if defined(CONFIG_TSEC_ENET) || defined(CONFIG_MPC85XX_FEC) tsec_standard_init(bis); #endif diff --git a/cpu/mpc85xx/fdt.c b/cpu/mpc85xx/fdt.c index 26a8f48..720c645 100644 --- a/cpu/mpc85xx/fdt.c +++ b/cpu/mpc85xx/fdt.c @@ -279,7 +279,9 @@ void ft_cpu_setup(void *blob, bd_t *bd) fdt_fixup_crypto_node(blob, 0); #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ -defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) +defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\ +defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5) ||\ +defined(CONFIG_HAS_ETH6) || defined(CONFIG_HAS_ETH7) fdt_fixup_ethernet(blob); fdt_add_enet_stashing(blob); diff --git a/drivers/qe/uec.c b/drivers/qe/uec.c index eadcc2c..deeb947 100644 --- a/drivers/qe/uec.c +++ b/drivers/qe/uec.c @@ -199,8 +199,64 @@ static uec_info_t eth6_uec_info = { .enet_interface = CONFIG_SYS_UEC6_INTERFACE_MODE, }; #endif +#ifdef CONFIG_UEC_ETH7 +static uec_info_t eth7_uec_info = { + .uf_info= { + .ucc_num= CONFIG_SYS_UEC7_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC7_RX_CLK, + .tx_clock = CONFIG_SYS_UEC7_TX_CLK, + .eth_type = CONFIG_SYS_UEC7_ETH_TYPE, + }, +#if (CONFIG_SYS_UEC7_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else + .num_threads_tx = UEC_NUM_OF_THREADS_4, + .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else + .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, + .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif + .tx_bd_ring_len = 16, + .rx_bd_ring_len = 16, + .phy_address= CONFIG_SYS_UEC7_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC7_INTERFACE_MODE, +}; +#endif +#ifdef CONFIG_UEC_ETH8 +static uec_info_t eth8_uec_info = { + .uf_info= { + .ucc_num= CONFIG_SYS_UEC8_UCC_NUM, + .rx_clock = CONFIG_SYS_UEC8_RX_CLK, + .tx_clock = CONFIG_SYS_UEC8_TX_CLK, + .eth_type = CONFIG_SYS_UEC8_ETH_TYPE, + }, +#if (CONFIG_SYS_UEC8_ETH_TYPE == FAST_ETH) + .num_threads_tx = UEC_NUM_OF_THREADS_1, + .num_threads_rx = UEC_NUM_OF_THREADS_1, +#else + .num_threads_tx = UEC_NUM_OF_THREADS_4, + .num_threads_rx = UEC_NUM_OF_THREADS_4, +#endif +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else + .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, + .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif + .tx_bd_ring_len = 16, + .rx_bd_ring_len = 16, + .phy_address= CONFIG_SYS_UEC8_PHY_ADDR, + .enet_interface = CONFIG_SYS_UEC8_INTERFACE_MODE, +}; +#endif -#define MAXCONTROLLERS (6) +#define MAXCONTROLLERS (8) static struct eth_device *devlist[MAXCONTROLLERS]; @@ -1493,6 +1549,14 @@ int uec_initialize(int index) #ifdef CONFIG_UEC_ETH6 uec_info = eth6_uec_info; #endif + } else if (index == 6) { +#ifdef CONFIG_UEC_ETH7 + uec_info = eth7_uec_info; +#endif + } else if (index == 7) { +#ifdef CONFIG_UEC_ETH8 + uec_info = eth8_uec_info; +#endif } else { printf(%s: index is illegal.\n, __FUNCTION__); return -EINVAL; -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 04/15] MPC85xx: Add PIB support at CS4/CS5 for MPC8569MDS
Signed-off-by: Haiying Wang haiying.w...@freescale.com Signed-off-by: Yu Liu yu@freescale.com --- include/configs/MPC8569MDS.h | 10 +- 1 files changed, 9 insertions(+), 1 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index ea996ff..c87e51d 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -156,10 +156,18 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_BR0_PRELIM 0xfe000801 #defineCONFIG_SYS_OR0_PRELIM 0xfe000ff7 -/*Chip slelect 1 - BCSR*/ +/*Chip select 1 - BCSR*/ #define CONFIG_SYS_BR1_PRELIM 0xf8000801 #defineCONFIG_SYS_OR1_PRELIM 0xe9f7 +/*Chip select 4 - PIB*/ +#define CONFIG_SYS_BR4_PRELIM 0xf8008801 +#define CONFIG_SYS_OR4_PRELIM 0xe9f7 + +/*Chip select 5 - PIB*/ +#define CONFIG_SYS_BR5_PRELIM 0xf8010801 +#define CONFIG_SYS_OR5_PRELIM 0xe9f7 + #define CONFIG_SYS_MAX_FLASH_BANKS 1 /* number of banks */ #define CONFIG_SYS_MAX_FLASH_SECT 512 /* sectors per device */ #undef CONFIG_SYS_FLASH_CHECKSUM -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 01/15] MPC85xx: Add QE clk support
Signed-off-by: Haiying Wang haiying.w...@freescale.com Acked-by: Timur Tabi ti...@freescale.com --- cpu/mpc85xx/cpu.c|4 cpu/mpc85xx/speed.c | 15 ++- include/asm-ppc/immap_85xx.h |2 ++ include/e500.h |1 + 4 files changed, 21 insertions(+), 1 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index ef976a4..b812d88 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -184,6 +184,10 @@ int checkcpu (void) printf(CPM: %s MHz\n, strmhz(buf1, sysinfo.freqSystemBus)); #endif +#ifdef CONFIG_QE + printf( QE:%-4s MHz\n, strmhz(buf1, sysinfo.freqQE)); +#endif + puts(L1:D-cache 32 kB enabled\n I-cache 32 kB enabled\n); return 0; diff --git a/cpu/mpc85xx/speed.c b/cpu/mpc85xx/speed.c index b0f47e0..286b6b2 100644 --- a/cpu/mpc85xx/speed.c +++ b/cpu/mpc85xx/speed.c @@ -1,5 +1,5 @@ /* - * Copyright 2004 Freescale Semiconductor. + * Copyright 2004, 2007-2009 Freescale Semiconductor Inc. * (C) Copyright 2003 Motorola Inc. * Xianghua Xiao, (x.x...@motorola.com) * @@ -40,6 +40,9 @@ void get_sys_info (sys_info_t * sysInfo) uint plat_ratio,e500_ratio,half_freqSystemBus; uint lcrr_div; int i; +#ifdef CONFIG_QE + u32 qe_ratio; +#endif plat_ratio = (gur-porpllsr) 0x003e; plat_ratio = 1; @@ -65,6 +68,12 @@ void get_sys_info (sys_info_t * sysInfo) } #endif +#ifdef CONFIG_QE + qe_ratio = ((gur-porpllsr) MPC85xx_PORPLLSR_QE_RATIO) +MPC85xx_PORPLLSR_QE_RATIO_SHIFT; + sysInfo-freqQE = qe_ratio * CONFIG_SYS_CLK_FREQ; +#endif + #if defined(CONFIG_SYS_LBC_LCRR) /* We will program LCRR to this value later */ lcrr_div = CONFIG_SYS_LBC_LCRR LCRR_CLKDIV; @@ -112,6 +121,10 @@ int get_clocks (void) gd-mem_clk = sys_info.freqDDRBus; gd-lbc_clk = sys_info.freqLocalBus; +#ifdef CONFIG_QE + gd-qe_clk = sys_info.freqQE; + gd-brg_clk = gd-qe_clk / 2; +#endif /* * The base clock for I2C depends on the actual SOC. Unfortunately, * there is no pattern that can be used to determine the frequency, so diff --git a/include/asm-ppc/immap_85xx.h b/include/asm-ppc/immap_85xx.h index 0810b8e..a4d25cd 100644 --- a/include/asm-ppc/immap_85xx.h +++ b/include/asm-ppc/immap_85xx.h @@ -1581,6 +1581,8 @@ typedef struct ccsr_gur { #define MPC85xx_PORPLLSR_DDR_RATIO 0x3e00 #define MPC85xx_PORPLLSR_DDR_RATIO_SHIFT 9 #endif +#define MPC85xx_PORPLLSR_QE_RATIO 0x3e00 +#define MPC85xx_PORPLLSR_QE_RATIO_SHIFT25 uintporbmsr;/* 0xe0004 - POR boot mode status register */ #define MPC85xx_PORBMSR_HA 0x0007 uintporimpscr; /* 0xe0008 - POR I/O impedance status and control register */ diff --git a/include/e500.h b/include/e500.h index 4c5eeb7..84b580d 100644 --- a/include/e500.h +++ b/include/e500.h @@ -18,6 +18,7 @@ typedef struct unsigned long freqSystemBus; unsigned long freqDDRBus; unsigned long freqLocalBus; + unsigned long freqQE; } MPC85xx_SYS_INFO; #endif /* _ASMLANGUAGE */ -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v2 05/10] Rename ads5121 board into mpc5121ads
In article 1242463666-28583-6-git-send-email...@denx.de, w...@denx.de says... We rename the board so we use a consistent name in U-Boot and in Linux. Also, we use this opportunity to move the board into the Freecale vendor directory. Hello Mr. Denk! Maybe a stupid question - but the manufacturer called it ADS512101 - should not that name be the right one for linux and u-boot ? Best regards, Arno Fischer ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 13/15] MPC85xx: Add UEC6 and UEC8 at SGMII mode for MPC8569MDS
On MPC8569MDS board, UCC6 and UCC8 can be configured to work at SGMII mode via UEM on PB board. Since MPC8569 supports up to 4 Gigabit Ethernet ports, we disable UEC6 and UEC8 by default. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- include/configs/MPC8569MDS.h | 25 + 1 files changed, 25 insertions(+), 0 deletions(-) diff --git a/include/configs/MPC8569MDS.h b/include/configs/MPC8569MDS.h index 81df4c8..62507fe 100644 --- a/include/configs/MPC8569MDS.h +++ b/include/configs/MPC8569MDS.h @@ -366,6 +366,31 @@ extern unsigned long get_clock_freq(void); #define CONFIG_SYS_UEC4_INTERFACE_MODE ENET_100_RMII #endif /* CONFIG_SYS_UCC_RGMII_MODE */ #endif /* CONFIG_UEC_ETH4 */ + +#undef CONFIG_UEC_ETH6 /* GETH6 */ +#define CONFIG_HAS_ETH5 + +#ifdef CONFIG_UEC_ETH6 +#define CONFIG_SYS_UEC6_UCC_NUM5 /* UCC6 */ +#define CONFIG_SYS_UEC6_RX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC6_TX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC6_ETH_TYPE GIGA_ETH +#define CONFIG_SYS_UEC6_PHY_ADDR 4 +#define CONFIG_SYS_UEC6_INTERFACE_MODE ENET_1000_SGMII +#endif /* CONFIG_UEC_ETH6 */ + +#undef CONFIG_UEC_ETH8 /* GETH8 */ +#define CONFIG_HAS_ETH7 + +#ifdef CONFIG_UEC_ETH8 +#define CONFIG_SYS_UEC8_UCC_NUM7 /* UCC8 */ +#define CONFIG_SYS_UEC8_RX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC8_TX_CLK QE_CLK_NONE +#define CONFIG_SYS_UEC8_ETH_TYPE GIGA_ETH +#define CONFIG_SYS_UEC8_PHY_ADDR 6 +#define CONFIG_SYS_UEC8_INTERFACE_MODE ENET_1000_SGMII +#endif /* CONFIG_UEC_ETH8 */ + #endif /* CONFIG_QE */ #if defined(CONFIG_PCI) -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 14/15] MPC85xx: Add README for MPC8569MDS
Signed-off-by: Haiying Wang haiying.w...@freescale.com --- doc/README.mpc8569mds | 78 + 1 files changed, 78 insertions(+), 0 deletions(-) create mode 100644 doc/README.mpc8569mds diff --git a/doc/README.mpc8569mds b/doc/README.mpc8569mds new file mode 100644 index 000..d9112b6 --- /dev/null +++ b/doc/README.mpc8569mds @@ -0,0 +1,78 @@ +Overview + +MPC8569MDS is composed of two boards - PB (Processor Board) and PIB (Platform +I/O Board). The mpc8569 PowerTM processor is mounted on PB board. + +Building U-boot +--- + make MPC8569MDS_config + make + +Memory Map +-- +0x_ 0x7fff_ DDR 2G +0xa000_ 0xbfff_ PCIe MEM512MB +0xe000_ 0xe00f_ CCSRBAR 1M +0xe280_ 0xe2ff_ PCIe I/O8M +0xc000_ 0xdfff_ SRIO512MB +0xf000_ 0xf3ff_ SDRAM 64MB +0xf800_ 0xf800_7fff BCSR32KB +0xf800_8000 0xf800_ PIB (CS4) 32KB +0xf801_ 0xf801_7fff PIB (CS5) 32KB +0xfe00_ 0x_ Flash 32MB + + +Flashing u-boot Images +--- + +Use the following commands to program u-boot image into flash: + + = tftp 100 u-boot.bin + = protect off all + = erase fff8 + = cp.b 100 fff8 8 + + +Setting the correct MAC addresses +--- +The command - mac, is introduced to set on-board system EEPROM in the format +defined in board/freescale/common/sys_eeprom.c. we must set all 8 MAC +addresses for the MPC8569MDS's 8 Ethernet ports and save it by mac save when +we first get the board. The commands are as follows: + = mac i NXID /* Set NXID to this EEPROM */ + = mac e 01 /* Set Errata, this value is not defined by hardware + designer, we can set whatever we want */ + = mac n a0 /* Set Serial Number. This is not defined by hardware + designer, we can set whatever we want */ + = mac date 09051208 /* Set the date in YYMMDDhhmmss format */ + + = mac p 8 /* Set the number of mac ports, it should be 8 */ + = mac 0 xx:xx:xx:xx:xx:xx /* xx:xx:xx:xx:xx:xx should be the real mac + address, you can refer to the value on + the sticker of the rear side of the board +*/ + . + = mac 7 xx:xx:xx:xx:xx:xx + = mac read + = mac save + +After resetting the board, the ethxaddrs will be filled with the mac addresses +if such environment variables are blank(never been set before). If the ethxaddr +has been set but we want to update it, we can use the following commands: + = setenv ethxaddr /* x = none,1,2,3,4,5,6,7 */ + = save + = reset + + +Programming the ucode to flash +- +MPC8569 doesn't have ROM in QE, so we must upload the microcode(ucode) to QE's +IRAM so that the QE can work. The ucode binary can be downloaded from +http://opensource.freescale.com/firmware/, and it must be programmed to +the address 0xfff in the flash. Otherwise, the QE can't work and uboot +hangs at Net: + + +Please note the above two steps(setting mac addresses and programming ucode) are +very important to get the board booting up and working properly. + -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
... +#define KW_EGIGA0_BASE (KW_REGISTER(0x72000)) +#define KW_EGIGA1_BASE (KW_REGISTER(0x76000)) Use a C struct? These are the Base address referred by register structures. I am aware of this. Generally this type of declaration used for other cpu/socs. Well, generally is a weak argument - you find examples for both. Coming from the PowerPC world, and haveing been using the code these sinde 10 years, I'm more accustomed to see something like a big IMMR sturcture here. I have almost done with other changes except this one Do this really need to be converted C struct? No, you do not *have* to. That's why I asked it as a question. If I had to write the code, I would use a C struct, and I think it would be easier to read. But I don't insist on such a change. You can find arguments for both solutions, so decide what deems best for you. Hi Wolfgang There is always scope for improvements and one should do it. Just to sync current kirkwood code with other arm architectures, I will keep the registers offset definitions as it is. I appreciate your suggestions, I will take care for future coding Thanks and regards... Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 10/15] Update the number of ethxaddr in reading system eeprom
We support up to 8 mac addresses in system eeprom, so we'd limit the mac_count to 8, and update the number of ethxaddr if there is more than 4 ethernet ports. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/common/sys_eeprom.c | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 988cb94..d71a5e4 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -1,5 +1,5 @@ /* - * Copyright 2006, 2008 Freescale Semiconductor + * Copyright 2006, 2008-2009 Freescale Semiconductor * York Sun (york...@freescale.com) * Haiying Wang (haiying.w...@freescale.com) * Timur Tabi (ti...@freescale.com) @@ -404,7 +404,14 @@ int mac_read_from_eeprom(void) } } - for (i = 0; i min(4, e.mac_count); i++) { + /* Check the number of MAC address which is limited to 8 */ + if (e.mac_count 8) { + printf(Warning: The number of MAC address is greater +than 8, force it to 8.\n); + e.mac_count = 8; + } + + for (i = 0; i e.mac_count; i++) { if (memcmp(e.mac[i], \0\0\0\0\0\0, 6) memcmp(e.mac[i], \xFF\xFF\xFF\xFF\xFF\xFF, 6)) { char ethaddr[18]; -- 1.6.0.2 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support
Dear Prafulla Wadaskar, In message 73173d32e9439e4abb5151606c3e19e201cf9e6...@sc-vexch1.marvell.com you wrote: Just a question... Do you really NEED 64 kB or even =20 128 kB environement size? In my experience, 16 kB is almost=20 always more than sufficient. Keep in mind that the=20 environment size can be smaller than the sector size which=20 stores the environment, and that a big enviroment size=20 adds to the boot delay, as the whole environment size needs=20 to be CRC32 checked. I agree, even 4kb is sufficient for me but if I keep it less than a sector size it gives me bad CRC warning at boo= t up even though I do saveenv Hence I kept it equal to sector size This may be a bug...?? This is indeed a bug, then. To give you an example - in include/configs/TQM5200.h we have: #define CONFIG_ENV_SIZE 0x4000 /* 16 k - keep small for fast booting */ ... #define CONFIG_ENV_SECT_SIZE0x4 This works fine - CRC computation covers only the 16 k as set in CONFIG_ENV_SIZE. It seems you really have a bug there, which should be fixed. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de COMPONENT EQUIVALENCY NOTICE: The Subatomic Particles (Electrons, Protons, etc.) Comprising This Product Are Exactly the Same in Every Measurable Respect as Those Used in the Products of Other Manufactu- rers, and No Claim to the Contrary May Legitimately Be Expressed or Implied. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v9] Marvell MV88F6281GTW_GE Board support
Just a question... Do you really NEED 64 kB or even =20 128 kB environement size? In my experience, 16 kB is almost=20 always more than sufficient. Keep in mind that the=20 environment size can be smaller than the sector size which=20 stores the environment, and that a big enviroment size=20 adds to the boot delay, as the whole environment size needs=20 to be CRC32 checked. I agree, even 4kb is sufficient for me but if I keep it less than a sector size it gives me bad CRC warning at boo= t up even though I do saveenv Hence I kept it equal to sector size This may be a bug...?? This is indeed a bug, then. To give you an example - in Yes, I have resolved it in v9 and posted :-) Thanks and regards... Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
Dear Prafulla Wadaskar, In message 73173d32e9439e4abb5151606c3e19e201cf9e6...@sc-vexch1.marvell.com you wrote: + tmpdin = readl(KW_REG_SPI_DATA_IN); + debug + (*** spi_xfer: din %08X ... %08x read\n, + din, tmpdin); Indentation by TABs only, please. Indentation is done by Lindent. Do you mean to do it manually? Yes, please, if Lindent does it wrong ... Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Our business is run on trust. We trust you will pay in advance. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH v8] Marvell Kirkwood family SOC support
Indentation by TABs only, please. Indentation is done by Lindent. Do you mean to do it manually? Yes, please, if Lindent does it wrong ... Done in V9 :-) Regards.. Prafulla . . ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH v10] Marvell MV88F6281GTW_GE Board support
From: prafulla_wadaskar prafu...@marvell.com This is Marvell's 88F6281_A0 based custom board developed for wireless access point product This patch is tested for- 1. Boot from DRAM/SPI flash/NFS 2. File transfer using tftp and loadb 3. SPI flash read/write/erase 4. Booting Linux kernel and RFS from SPI flash Reviewed-by: Ronen Shitrit rshit...@marvell.com Signed-off-by: Prafulla Wadaskar prafu...@marvell.com --- Change log v2: updated as per first review comments debug_prints updated to debug v3: updaed as per review comments for v2 added mv88f6281gtw_ge.h file removed BITxx macros v4: updated as per review comments for v3 arch_misc_init support is added and used from kirkwood v5: updated as per review comments for v4 CONFIG_MACH_MV88F6281GTW_GE added more comments added and serial configuration removed from mv88f6281gtw_ge.c V6: clean switch configuration using netdev.h v7: Marvell copyright removed from u-boot.lds Maintainer added for this board v8: u-boot.lds removed finetuned for cosmetic and switch related changes v9: new mpp configuration used CONFIG_ARCH_LOWLEVEL_INIT defination removed v10: CONFIG_ENV_SIZE set to 4kb CONFIG_SYS_MALLOC_LEN set to 128kb MAKEALL |1 + Makefile|3 + board/Marvell/mv88f6281gtw_ge/Makefile | 51 ++ board/Marvell/mv88f6281gtw_ge/config.mk | 25 +++ board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c | 141 + board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h | 36 + include/configs/mv88f6281gtw_ge.h | 187 +++ 7 files changed, 444 insertions(+), 0 deletions(-) create mode 100644 board/Marvell/mv88f6281gtw_ge/Makefile create mode 100644 board/Marvell/mv88f6281gtw_ge/config.mk create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.c create mode 100644 board/Marvell/mv88f6281gtw_ge/mv88f6281gtw_ge.h create mode 100644 include/configs/mv88f6281gtw_ge.h diff --git a/MAKEALL b/MAKEALL index c98d03a..6719d7b 100755 --- a/MAKEALL +++ b/MAKEALL @@ -505,6 +505,7 @@ LIST_ARM9= \ cp946es \ cp966 \ lpd7a400\ + mv88f6281gtw_ge \ mx1ads \ mx1fs2 \ netstar \ diff --git a/Makefile b/Makefile index 81a5cd0..8144ecd 100644 --- a/Makefile +++ b/Makefile @@ -2808,6 +2808,9 @@ lpd7a400_config \ lpd7a404_config: unconfig @$(MKCONFIG) $(@:_config=) arm lh7a40x lpd7a40x +mv88f6281gtw_ge_config: unconfig + @$(MKCONFIG) $(@:_config=) arm arm926ejs $(@:_config=) Marvell kirkwood + mx1ads_config : unconfig @$(MKCONFIG) $(@:_config=) arm arm920t mx1ads NULL imx diff --git a/board/Marvell/mv88f6281gtw_ge/Makefile b/board/Marvell/mv88f6281gtw_ge/Makefile new file mode 100644 index 000..8c49a3e --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/Makefile @@ -0,0 +1,51 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this +# project. +# +# This program is free software; you can redistribute it and/or +# modify it under the terms of the GNU General Public License as +# published by the Free Software Foundation; either version 2 of +# the License, or (at your option) any later version. +# +# This program is distributed in the hope that it will be useful, +# but WITHOUT ANY WARRANTY; without even the implied warranty of +# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the +# GNU General Public License for more details. +# +# You should have received a copy of the GNU General Public License +# along with this program; if not, write to the Free Software +# Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, +# MA 02110-1301 USA +# + +include $(TOPDIR)/config.mk + +LIB= $(obj)lib$(BOARD).a + +COBJS := mv88f6281gtw_ge.o + +SRCS := $(SOBJS:.o=.S) $(COBJS:.o=.c) +OBJS := $(addprefix $(obj),$(COBJS)) +SOBJS := $(addprefix $(obj),$(SOBJS)) + +$(LIB):$(obj).depend $(OBJS) $(SOBJS) + $(AR) $(ARFLAGS) $@ $(OBJS) $(SOBJS) + +clean: + rm -f $(SOBJS) $(OBJS) + +distclean: clean + rm -f $(LIB) core *.bak .depend + +# + +# defines $(obj).depend target +include $(SRCTREE)/rules.mk + +sinclude $(obj).depend + +# diff --git a/board/Marvell/mv88f6281gtw_ge/config.mk b/board/Marvell/mv88f6281gtw_ge/config.mk new file mode 100644 index 000..fb29a1b --- /dev/null +++ b/board/Marvell/mv88f6281gtw_ge/config.mk @@ -0,0 +1,25 @@ +# +# (C) Copyright 2009 +# Marvell Semiconductor www.marvell.com +# Prafulla Wadaskar prafu...@marvell.com +# +# See file CREDITS for list of people who contributed to this
Re: [U-Boot] [PATCH 06/15] drivers/qe: Change QE RISC ALLOCATION to support 4 RISCs
Dear Haiying Wang, In message 1242837043-8243-6-git-send-email-haiying.w...@freescale.com you wrote: Also define the QE_RISC_ALLOCATION_RISCs to MACROs instead of using enum, and define MAX_QE_RISC for QE based silicons. Signed-off-by: Haiying Wang haiying.w...@freescale.com Acked-by: Timur Tabi ti...@freescale.com ... +#if (MAX_QE_RISC == 4) + .riscTx = QE_RISC_ALLOCATION_FOUR_RISCS, + .riscRx = QE_RISC_ALLOCATION_FOUR_RISCS, +#else .riscTx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, .riscRx = QE_RISC_ALLOCATION_RISC1_AND_RISC2, +#endif Is there a chance to get rid of these camel-case identifiers? They violate the CodingStyle Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de After a time, you may find that having is not so pleasing a thing, after all, as wanting. It is not logical, but it is often true. -- Spock, Amok Time, stardate 3372.7 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 10/15] Update the number of ethxaddr in reading system eeprom
Dear Haiying Wang, In message 1242837043-8243-10-git-send-email-haiying.w...@freescale.com you wrote: We support up to 8 mac addresses in system eeprom, so we'd limit the mac_count to 8, and update the number of ethxaddr if there is more than 4 ethernet ports. Signed-off-by: Haiying Wang haiying.w...@freescale.com --- board/freescale/common/sys_eeprom.c | 11 +-- 1 files changed, 9 insertions(+), 2 deletions(-) diff --git a/board/freescale/common/sys_eeprom.c b/board/freescale/common/sys_eeprom.c index 988cb94..d71a5e4 100644 --- a/board/freescale/common/sys_eeprom.c +++ b/board/freescale/common/sys_eeprom.c @@ -1,5 +1,5 @@ /* - * Copyright 2006, 2008 Freescale Semiconductor + * Copyright 2006, 2008-2009 Freescale Semiconductor * York Sun (york...@freescale.com) * Haiying Wang (haiying.w...@freescale.com) * Timur Tabi (ti...@freescale.com) @@ -404,7 +404,14 @@ int mac_read_from_eeprom(void) } } - for (i = 0; i min(4, e.mac_count); i++) { + /* Check the number of MAC address which is limited to 8 */ + if (e.mac_count 8) { + printf(Warning: The number of MAC address is greater + than 8, force it to 8.\n); + e.mac_count = 8; + } Instead of repeatedly using the magic number 8 here, this should be a #define in som eheader file. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de If you're not part of the solution, then you're part of the precipi- tate. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 11/15] MPC85xx: update uec to support up to 8 UECs in QE
Dear Haiying Wang, In message 1242837043-8243-11-git-send-email-haiying.w...@freescale.com you wrote: Signed-off-by: Haiying Wang haiying.w...@freescale.com --- cpu/mpc85xx/cpu.c |6 + cpu/mpc85xx/fdt.c |4 ++- drivers/qe/uec.c | 66 - 3 files changed, 74 insertions(+), 2 deletions(-) diff --git a/cpu/mpc85xx/cpu.c b/cpu/mpc85xx/cpu.c index b812d88..eb2aeec 100644 --- a/cpu/mpc85xx/cpu.c +++ b/cpu/mpc85xx/cpu.c @@ -399,6 +399,12 @@ int cpu_eth_init(bd_t *bis) #if defined(CONFIG_UEC_ETH6) uec_initialize(5); #endif +#if defined(CONFIG_UEC_ETH7) + uec_initialize(6); +#endif +#if defined(CONFIG_UEC_ETH8) + uec_initialize(7); +#endif This cries for using a loop instead. There are several places that contain similar code - would it make sense to initialize a variable with a bit files of used interfaces, so we can do this in a simple runtime loop? #if defined(CONFIG_HAS_ETH0) || defined(CONFIG_HAS_ETH1) ||\ -defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) +defined(CONFIG_HAS_ETH2) || defined(CONFIG_HAS_ETH3) ||\ +defined(CONFIG_HAS_ETH4) || defined(CONFIG_HAS_ETH5) ||\ +defined(CONFIG_HAS_ETH6) || defined(CONFIG_HAS_ETH7) fdt_fixup_ethernet(blob); Ditto here. #ifdef CONFIG_UEC_ETH6 uec_info = eth6_uec_info; #endif + } else if (index == 6) { +#ifdef CONFIG_UEC_ETH7 + uec_info = eth7_uec_info; +#endif + } else if (index == 7) { +#ifdef CONFIG_UEC_ETH8 + uec_info = eth8_uec_info; +#endif And here again. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de A morsel of genuine history is a thing so rare as to be always valuable. - Thomas Jefferson ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Pull request u-boot-blackfin.git
Dear Mike Frysinger, In message 1242778781-30745-1-git-send-email-vap...@gentoo.org you wrote: The following changes since commit c06326c73bf90e48a8e1cf8893ad31c575423f50: Shinya Kuribayashi (1): MIPS: lib_mips/board.c: Remove unused variables are available in the git repository at: git://www.denx.de/git/u-boot-blackfin.git master Graf Yang (1): Blackfin: fix timer_init()/timer_reset() cpu/blackfin/interrupts.c |5 +++-- 1 files changed, 3 insertions(+), 2 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de There's no future in time travel. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ppc4xx
Dear Stefan Roese, In message 200905201307.24999...@denx.de you wrote: Hi Wolfgang, please pull a fix for UBI: The following changes since commit c06326c73bf90e48a8e1cf8893ad31c575423f50: Shinya Kuribayashi (1): MIPS: lib_mips/board.c: Remove unused variables are available in the git repository at: git://www.denx.de/git/u-boot-ubi.git master Andreas Huber (1): UBI: fix return code in ubi_volume_read common/cmd_ubi.c |2 +- 1 files changed, 1 insertions(+), 1 deletions(-) Applied, thanks. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de The greatest threat towards future is indifference. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Please pull u-boot-ubi - was Re: Please pull u-boot-ppc4xx
Dear Stefan Roese, In message 200905201314.12151...@denx.de you wrote: Ups. Sorry about the subject. It should have read: Please pull u-boot-ubi No problem. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Lispers are among the best grads of the Sweep-It-Under-Someone- Else's-Carpet School of Simulated Simplicity. [Was that sufficiently incendiary? :-)] - Larry Wall in 1992jan10.201804.11...@netlabs.com ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] LZMA warnings in cmd_bootm
Dear Mike Frysinger, In message 200905190449.30670.vap...@gentoo.org you wrote: the LZMA code that was added to cmd_bootm causes a warning: cmd_bootm.c: In function 'bootm_load_os': cmd_bootm.c:394: warning: passing argument 2 of 'lzmaBuffToBuffDecompress' from incompatible pointer type this is because the code passes in a pointer to unc_len which is an unsigne d int, but the decompress routine expects a pointer to a size_t. could you t ake a look ? For which board configuration / tool chain do you see such a warning? Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Our business is run on trust. We trust you will pay in advance. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Ethernet not working on OMAP3 board with
Dirk Behme wrote: Pillai, Manikandan wrote: Hi , Tried the hints but they don't work. I still don't have a fix. Still investigating. Just two infos, maybe they help somehow: - We recently cleaned up OMAP3's clock code. But this was to _improve_ network. If I remember correctly, Mani tested all clock changes and they were fine. See git history of cpu/arm_cortexa8/omap3/interrupts.c for details. - Steve has still no luck with lan9221 from SMSC on Overo (U-Boot's smc991x driver). See thread http://lists.denx.de/pipermail/u-boot/2009-April/051238.html http://lists.denx.de/pipermail/u-boot/2009-April/051247.html http://lists.denx.de/pipermail/u-boot/2009-April/051259.html http://lists.denx.de/pipermail/u-boot/2009-April/050687.html did the trick - it was referenced in the above threads. I had thought that it was applied to the branch I was on, and missed it that it wasn't. Thanks for jogging me into looking for it again. I'm not sure which network chip is used on EVM, though. The evm's using a 9115, and was already properly set up. Thanks again, - Josh ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Canyonlands SATA harddisk driver
Stefan Roese wrote: On Friday 15 May 2009 11:32:26 Kazuaki Ichinohe wrote: This patch adds a SATA harddisk driver for the canyonlands. This patch is kernel driver's porting. This pach corresponded to not cmd_scsi but cmd_sata. Looks good now. Thanks for all your effort here. So: Acked-by: Stefan Roese s...@denx.de I'm fine with this patch applied or not, but this driver is too big. It has a lot of unused struct members, I'm not sure they'll be used in the future, though. Shinya ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] LZMA warnings in cmd_bootm
On Wednesday 20 May 2009 16:45:13 Wolfgang Denk wrote: In message Mike Frysinger wrote: the LZMA code that was added to cmd_bootm causes a warning: cmd_bootm.c: In function 'bootm_load_os': cmd_bootm.c:394: warning: passing argument 2 of 'lzmaBuffToBuffDecompress' from incompatible pointer type this is because the code passes in a pointer to unc_len which is an unsigned int, but the decompress routine expects a pointer to a size_t. could you take a look ? For which board configuration / tool chain do you see such a warning? every Blackfin board -mike ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] FLASH write bug on NGW100
reconstructing thread and cc'ing u-boot list; please don't top-post :-) when using the latest u-boot version from git://www.denx.de/git/u-boot-avr32.git, it is not possible for me to write (I have tried saveenv and protect) to NOR FLASH anymore. U-Boot gives the following error: start or end address not on sector boundary Is this a known problem? Gerhard Post the exact commands you are using. Probably you are using wrong addresses The exact command: U-Boot saveenv Saving Environment to Flash... Error: start and/or end address not on sector boundary Seriously, it's that easy. The addresses are the default ones found in include/configs/atngw100.h since the dawn of time :-) --Ben. On Wed, 2009-05-20 at 13:08 +0200, Eirik Aanonsen wrote: I dont have tha board. What result do you get if you run: Flinfo ( post it back here ) On Wed, 2009-05-20 at 15:54 +0200, Gerhard Berghofer wrote: Hi Eirik, flinfo with u-boot version = 2009.03 gives the following output: ## Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x1F, Device ID: 0x1D6 Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 4 bytes Sector Start Addresses: A000A0002000A0004000A0006000 A0008000 A000A000A000C000A000E000A001 A002 A003A004A005A006 A007 ... flinfo with u-boot version 2008.10 gives the following output: ## Bank # 1: CFI conformant FLASH (16 x 16) Size: 8 MB in 135 Sectors AMD Standard command set, Manufacturer ID: 0x1F, Device ID: 0x1D6 Erase timeout: 8192 ms, write timeout: 1 ms Buffer write timeout: 1 ms, buffer size: 4 bytes Sector Start Addresses: RO 2000 RO 4000 RO 6000 RO 8000 RO A000 RO C000 RO E000 RO 0001 RO 0002 00030004000500060007 ... the FLASH seems to be attached to a wrong address range ... Well on the AVR32 both addresses are correct - the first accessed the flash through the uncached, untranslatable segment, now it's both cached and translated but that should only be a win. I guess though that the environment address (which in the config is set to 007F) is still somehow somewhere being translated to A07F then breaking all the flash range checking. But I'm kinda guessing here, I hope someone on the u-boot list can tell us it's known and fixed and we should be have scoured their archives harder ;-) --Ben. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH] Marvell 88EXXXX Switch/PHY init support
Hi, Any updates with this switches support in uboot? 2009/4/3 Prafulla Wadaskar prafu...@marvell.com: From: prafulla_wadaskar prafu...@marvell.com Chips supprted:- 1. 88E61XX 6 port gbe swtich with 5 integrated PHYs 2. 88E6061 6 port fe swtich with 5 integrated PHYs 3. 88E1116 gbe transceiver Contributors: Yotam Admon yo...@marvell.com Michael Blostein michae...@marvell.com Signed-off-by: prafulla_wadaskar prafu...@marvell.com Reviewed by: Ronen Shitrit rshit...@marvell.com --- -- Best Regards, Sergey Nikulov ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Which U-Boot releases have Device Tree support
Hi Wolfgang, Thanks for the information. This is the first time I am searching for the u-boot source code for MPC8360E-RDK. Three more questions here: Is the following URL the right place to get the files? If not, can you show me the right link? http://git.denx.de/cgi-bin/gitweb.cgi?p=u-boot.git;a=tree;h=a7b2196b15b925caa171bd2fa22fb65165b81c36;hb=f700e7df7fecf2d3765ae568ce77ce788cde4f3e Secondly, how do I use GIT to download the source code? Lastly, how do I tell make to build the u-boot for MPC8360E-RDK board? Thank you very much! Jew-Dong JEW-DONG wrote: Hi, I am new to Linux uboot. I have also purchased a MPC8360E-RDK. There is no uboot source code on the CodeWarrior CD either. The LTIB (ltib-mpc8360-com-express-20080709) I downloaded from www.logicpd.com does not have source code for uboot either. It comes with a uboot image though. I can build kernel image (uImage) and jfss2 file system. I will very appreciate if you can show me where to get the uboot source code and how to build it for my MPC8360E-RDK board. Thank you very much! Jew-Dong wd wrote: Dear Peter Barada, In message 1239250418.4414.72.ca...@blackhole you wrote: On Wed, 2009-04-08 at 22:40 -0400, cmfai...@rockwellcollins.com wrote: We bought a MPC8360E-RDK development kit to develop applications under MontaVista CGE5.0. We were toldby the consultant whose doing our board LSP that the U-Boot version that came with the development kit did not have device tree support. The consultant upgraded the U-Boot to a version that has device tree support, but he says he doesn't have the source code for the U-Boot version. I need the source to make certain updates. Which U-Boot version can I download that has device tree support? If you've registered your MPC8360E-RDK with Logic, you should be able to login to the Logic website and download the entire LTIB source that includes a version of u-boot with full source/patches that fully support dealing with device tree binary (dtb) files, and also includes a kernel for the MPC8360E-RDK, and the build process generates an appropriate device tree binary for the board... On the other hand there is zero reason to stick with such an out-of-tree port when the board is supported in mainline. Best regards, Wolfgang Denk -- DENX Software Engineering GmbH, MD: Wolfgang Denk Detlev Zundel HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de Conquest is easy. Control is not. -- Kirk, Mirror, Mirror, stardate unknown ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot -- View this message in context: http://www.nabble.com/-U-Boot--Which-U-Boot-releases-have-Device-Tree-support-tp22963537p23644965.html Sent from the Uboot - Users mailing list archive at Nabble.com. ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 1/3] smc911x: write back the manually set MAC address
Ben Warren wrote: Daniel Mack wrote: If the MAX address is given by the environment, write it back to the hardware. Signed-off-by: Daniel Mack dan...@caiaq.de Cc: Sascha Hauer s.ha...@pengutronix.de --- drivers/net/smc911x.c |9 +++-- 1 files changed, 7 insertions(+), 2 deletions(-) diff --git a/drivers/net/smc911x.c b/drivers/net/smc911x.c index 30f2dc2..8c9a2a8 100644 --- a/drivers/net/smc911x.c +++ b/drivers/net/smc911x.c @@ -41,8 +41,13 @@ static int smx911x_handle_mac_address(bd_t *bd) unsigned long addrh, addrl; uchar m[6]; -/* if the environment has a valid mac address then use it */ -if (!eth_getenv_enetaddr(ethaddr, m)) { +if (eth_getenv_enetaddr(ethaddr, m)) { +/* if the environment has a valid mac address then use it */ +addrl = m[0] | (m[1] 8) | (m[2] 16) | (m[3] 24); +addrh = m[4] | (m[5] 8); +smc911x_set_mac_csr(ADDRL, addrl); +smc911x_set_mac_csr(ADDRH, addrh); +} else { /* if not, try to get one from the eeprom */ addrh = smc911x_get_mac_csr(ADDRH); addrl = smc911x_get_mac_csr(ADDRL); Applied to net/next branch. Could we get this asap into mainline? Sounds like an urgent bugfix to me: http://lists.denx.de/pipermail/u-boot/2009-May/053079.html Many thanks Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] Ethernet not working on OMAP3 board with
Josh Karabin wrote: Dirk Behme wrote: Pillai, Manikandan wrote: Hi , Tried the hints but they don't work. I still don't have a fix. Still investigating. Just two infos, maybe they help somehow: - We recently cleaned up OMAP3's clock code. But this was to _improve_ network. If I remember correctly, Mani tested all clock changes and they were fine. See git history of cpu/arm_cortexa8/omap3/interrupts.c for details. - Steve has still no luck with lan9221 from SMSC on Overo (U-Boot's smc991x driver). See thread http://lists.denx.de/pipermail/u-boot/2009-April/051238.html http://lists.denx.de/pipermail/u-boot/2009-April/051247.html http://lists.denx.de/pipermail/u-boot/2009-April/051259.html http://lists.denx.de/pipermail/u-boot/2009-April/050687.html did the trick - it was referenced in the above threads. Thanks for testing! Mani: Can you confirm this? Many thanks Dirk ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [Patch] bss section initialization on s3c44b0
Clear the .BSS section for S3C44B0 to get a zero-filled .BSS section. Signed-off-by : Ming-Dien Chang mingdien.ch...@gmail.com diff --git a/cpu/s3c44b0/start.S b/cpu/s3c44b0/start.S index f5a3d3a..a6d27aa 100644 --- a/cpu/s3c44b0/start.S +++ b/cpu/s3c44b0/start.S @@ -154,6 +154,25 @@ vector_copy_loop: ble vector_copy_loop #endif /* CONFIG_SKIP_RELOCATE_UBOOT */ + /* +* Initialize .bss section. +*/ + mov r2, #0 + mov r3, #0 + mov r4, #0 + mov r5, #0 + mov r6, #0 + mov r7, #0 + mov r8, #0 + mov r9, #0 + mov r10, #0 + ldr r0, _bss_start + ldr r1, _bss_end +zerolize: + stmia r0!, {r2-r10} + cmp r0, r1 + blt zerolize + /* Set up the stack */ stack_setup: ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */ ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot