Re: [U-Boot] [PATCH v2 0/4] DaVinci DA8xx: tidy up clock IDs

2012-07-31 Thread Prabhakar Lad

Hi Laurence,

On Tuesday 31 July 2012 03:00 PM, Laurence Withers wrote:

This small series of patches tidies up the clock IDs that are used to interact
with the PLL controllers on the DaVinci DA8xx processors.

It more clearly defines the structure and meaning of the IDs and untangles some
model-specific code that can't be shared among the family. This tidying allows
three bugs to be identified and resolved:
  - on the DA850, UART2's clock may come from ASYNC3, unlike the DA830;
  - the DA830 doesn't have a DDR2/mDDR PHY, or a PLL controller for it;
  - the DSP speed reported by bdinfo was not being initialised on the DA8xx
family.

I have tested  the entire patchset on da850, da830, dm355, dm6446
and  dm365 evm's.

Tested-by: Prabhakar Lad 

Thx,
--Prabhakar Lad

Laurence Withers (4):
   DaVinci DA8xx: tidy up clock ID definition
   DaVinci DA850: UART2 clock ID comes from ASYNC3
   DaVinci DA8xx: replace magic number for DDR speed
   DaVinci DA8xx: fix set_cpu_clk_info()

  arch/arm/cpu/arm926ejs/davinci/cpu.c |   22 ++
  arch/arm/include/asm/arch-davinci/hardware.h |   57 +++--
  2 files changed, 57 insertions(+), 22 deletions(-)



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[U-Boot] sh4 sti7109 for mb442 motherboards

2012-07-31 Thread Андрей Борисович
Hello
Help make a u-boot for sti7109 for mb442 motherboards and Linux to boot in
32bit mode. (now loaded in 29bit mode"Board: STb7100-Reference (MB442)
[29-bit mode]")
Thanks in advance.
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Re: [U-Boot] [PATCH v3 1/2] gpio: bcm2835: Add GPIO driver

2012-07-31 Thread Stephen Warren
On 07/31/2012 08:31 PM, Vikram Narayanan wrote:
> On 7/31/2012 11:18 PM, Vikram Narayanan wrote:
>> Driver for BCM2835 SoC. This gives the basic functionality of
>> setting/clearing the output.

>> diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h

>> +#define BCM2835_GPIO_COUNT53
> 
> GPIO count should be 54 to make the gpio_is_valid work correctly when
> the gpio is 53.
> Will fix in v4.

Oh dear. I posted an updated version of your patches which fix a bunch
of errors. I guess I'll wait and see if there are any other comments on
other patches in that series, and re-post that series, or just that
patch, with that fixed later.

P.S. There's no need to quote the entire patch just to comment on one line.
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Re: [U-Boot] [PATCH v3 0/2] Add GPIO driver for BCM2835 SoC

2012-07-31 Thread Stephen Warren
On 07/31/2012 11:48 AM, Vikram Narayanan wrote:
> Also, add the driver to the raspberrypi default config

Hmm. I tested this on real HW, and there are quite a few issues. I just
re-posted my base Raspberry Pi series and rolled these two patches onto
the end, including the fixes I found needed during actual compilation
and testing.
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[U-Boot] [PATCH V2 13/13] rbpi: Add BCM2835 GPIO driver for raspberry pi

2012-07-31 Thread Stephen Warren
From: Vikram Narayanan 

Add the driver to the default config

swarren: Enable CONFIG_CMD_GPIO, so you can actually use the driver.

Signed-off-by: Vikram Narayanan 
Signed-off-by: Stephen Warren 
---
v2: New patch
---
 include/configs/rpi_b.h |4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 33169d3..5c91e7d 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -55,7 +55,8 @@
 #define CONFIG_SYS_NO_FLASH
 
 /* Devices */
-/* None yet */
+/* GPIO */
+#define CONFIG_BCM2835_GPIO
 
 /* Console UART */
 #define CONFIG_PL011_SERIAL
@@ -88,6 +89,7 @@
 /* Commands */
 #include 
 #define CONFIG_CMD_BOOTZ
+#define CONFIG_CMD_GPIO
 /* Some things don't make sense on this HW or yet */
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_NET
-- 
1.7.9.5

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[U-Boot] [PATCH V2 12/13] gpio: bcm2835: Add GPIO driver

2012-07-31 Thread Stephen Warren
From: Vikram Narayanan 

Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.

swarren:
* Fix BCM2835_GPIO_BASE; 0x7e20 is the address on the "VC" CPU,
  not the ARM CPU.
* Fix BCM2835_GPIO_ALT* values to match datasheet.
* Invert gpio_request return value.
* Add missing & to writel() address parameters in gpio_direction_input(),
  gpio_direction_output(), and gpio_set_value().
* Fix gpio_direction_input() and gpio_direction_output() to return
  something, to avoid compiler warnings.
* Fix gpio_direction_output() to always call gpio_set_value(), not just
  when the requested value is 1.
* s/bcm_gpio_regs/bcm2835_gpio_regs/g since this driver is specific to
  BCM2835, and most likely not all Broadcom chips.
* Remove FSF address from (c) notices, so we don't have to maintain it.
* Fix some indentation errors.

Signed-off-by: Vikram Narayanan 
Signed-off-by: Stephen Warren 
---
v2: New patch
---
 arch/arm/include/asm/arch-bcm2835/gpio.h |   66 ++
 drivers/gpio/Makefile|1 +
 drivers/gpio/bcm2835_gpio.c  |   90 ++
 3 files changed, 157 insertions(+)
 create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
 create mode 100644 drivers/gpio/bcm2835_gpio.c

diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h 
b/arch/arm/include/asm/arch-bcm2835/gpio.h
new file mode 100644
index 000..c0178cb
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
@@ -0,0 +1,66 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _BCM2835_GPIO_H_
+#define _BCM2835_GPIO_H_
+
+#define BCM2835_GPIO_BASE  0x2020
+#define BCM2835_GPIO_COUNT 53
+
+#define BCM2835_GPIO_FSEL_MASK 0x7
+#define BCM2835_GPIO_INPUT 0x0
+#define BCM2835_GPIO_OUTPUT0x1
+#define BCM2835_GPIO_ALT0  0x4
+#define BCM2835_GPIO_ALT1  0x5
+#define BCM2835_GPIO_ALT2  0x6
+#define BCM2835_GPIO_ALT3  0x7
+#define BCM2835_GPIO_ALT4  0x3
+#define BCM2835_GPIO_ALT5  0x2
+
+#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1)
+#define BCM2835_GPIO_COMMON_SHIFT(gpio)(gpio & 0x1f)
+
+#define BCM2835_GPIO_FSEL_BANK(gpio)   (gpio / 10)
+#define BCM2835_GPIO_FSEL_SHIFT(gpio)  ((gpio % 10) * 3)
+
+struct bcm2835_gpio_regs {
+   u32 gpfsel[6];
+   u32 reserved1;
+   u32 gpset[2];
+   u32 reserved2;
+   u32 gpclr[2];
+   u32 reserved3;
+   u32 gplev[2];
+   u32 reserved4;
+   u32 gpeds[2];
+   u32 reserved5;
+   u32 gpren[2];
+   u32 reserved6;
+   u32 gpfen[2];
+   u32 reserved7;
+   u32 gphen[2];
+   u32 reserved8;
+   u32 gplen[2];
+   u32 reserved9;
+   u32 gparen[2];
+   u32 reserved10;
+   u32 gppud;
+   u32 gppudclk[2];
+};
+
+#endif /* _BCM2835_GPIO_H_ */
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 32a2474..8d2f2b2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_TEGRA_GPIO)+= tegra_gpio.o
 COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
 COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
 COBJS-$(CONFIG_MPC83XX_GPIO)   += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO)   += bcm2835_gpio.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
new file mode 100644
index 000..6ab2df3
--- /dev/null
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -0,0 +1,90 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+#include 
+
+inline int gpio_is_valid(unsigned gpio)
+{
+   return (gpio < BCM2835_GPIO_COUNT);
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+   re

[U-Boot] [PATCH V2 11/13] ARM: bcm2835: implement reset using watchdog

2012-07-31 Thread Stephen Warren
Signed-off-by: Stephen Warren 
---
 arch/arm/cpu/arm1176/bcm2835/reset.c |   18 +++
 arch/arm/include/asm/arch-bcm2835/wdog.h |   37 ++
 2 files changed, 50 insertions(+), 5 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-bcm2835/wdog.h

diff --git a/arch/arm/cpu/arm1176/bcm2835/reset.c 
b/arch/arm/cpu/arm1176/bcm2835/reset.c
index 69c9577..8c37ad9 100644
--- a/arch/arm/cpu/arm1176/bcm2835/reset.c
+++ b/arch/arm/cpu/arm1176/bcm2835/reset.c
@@ -16,12 +16,20 @@
 
 #include 
 #include 
+#include 
+
+#define RESET_TIMEOUT 10
 
 void reset_cpu(ulong addr)
 {
-   /*
-* We should probably use the WDT module here, but an unaligned
-* access will do the trick for now.
-*/
-   readl(1);
+   struct bcm2835_wdog_regs *regs =
+   (struct bcm2835_wdog_regs *)BCM2835_WDOG_PHYSADDR;
+   uint32_t rstc;
+
+   rstc = readl(®s->rstc);
+   rstc &= ~BCM2835_WDOG_RSTC_WRCFG_MASK;
+   rstc |= BCM2835_WDOG_RSTC_WRCFG_FULL_RESET;
+
+   writel(BCM2835_WDOG_PASSWORD | RESET_TIMEOUT, ®s->wdog);
+   writel(BCM2835_WDOG_PASSWORD | rstc, ®s->rstc);
 }
diff --git a/arch/arm/include/asm/arch-bcm2835/wdog.h 
b/arch/arm/include/asm/arch-bcm2835/wdog.h
new file mode 100644
index 000..d750a62
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/wdog.h
@@ -0,0 +1,37 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _BCM2835_TIMER_H
+#define _BCM2835_TIMER_H
+
+#define BCM2835_WDOG_PHYSADDR  0x2010
+
+struct bcm2835_wdog_regs {
+   u32 unknown0[7];
+   u32 rstc;
+   u32 unknown1;
+   u32 wdog;
+};
+
+#define BCM2835_WDOG_PASSWORD  0x5a00
+
+#define BCM2835_WDOG_RSTC_WRCFG_MASK   0x0030
+#define BCM2835_WDOG_RSTC_WRCFG_FULL_RESET 0x0020
+
+#define BCM2835_WDOG_WDOG_TIMEOUT_MASK 0x
+
+#endif
+
-- 
1.7.9.5

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[U-Boot] [PATCH V2 10/13] ARM: rpi_b: move stack to top of RAM

2012-07-31 Thread Stephen Warren
Move the top-of-stack from 32k to near the top of RAM. This leaves the
bottom of RAM free for ATAGs, or U-Boot scripts to use as they see fit.

Extracted from work by Oleksandr Tymoshenko .

Signed-off-by: Stephen Warren 
---
 include/configs/rpi_b.h |3 +--
 1 file changed, 1 insertion(+), 2 deletions(-)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 73482d9..33169d3 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -44,9 +44,8 @@
  * the VC uses.
  */
 #define CONFIG_SYS_SDRAM_SIZE  SZ_128M
-#define CONFIG_SYS_INIT_RAM_SIZE   SZ_4K
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + \
-CONFIG_SYS_INIT_RAM_SIZE - \
+CONFIG_SYS_SDRAM_SIZE - \
 GENERATED_GBL_DATA_SIZE)
 #define CONFIG_SYS_MALLOC_LEN  SZ_4M
 #define CONFIG_SYS_MEMTEST_START   0x0010
-- 
1.7.9.5

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[U-Boot] [PATCH V2 09/13] ARM: rpi_b: drop RAM size to 128M

2012-07-31 Thread Stephen Warren
The board really has 256M. However, the VC (VideoCore co-processor) shares
the RAM, and uses a configurable portion at the top. We tell U-Boot that a
smaller amount of RAM is present in order to avoid stomping on the area
the VC uses.

Extracted from work by Oleksandr Tymoshenko .

Signed-off-by: Stephen Warren 
---
v2: Modified location new define was inserted, in order to drop a later
cleanup patch.
---
 board/raspberrypi/rpi_b/rpi_b.c |2 +-
 include/configs/rpi_b.h |7 +++
 2 files changed, 8 insertions(+), 1 deletion(-)

diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index 26df74b..688b0aa 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -21,7 +21,7 @@ DECLARE_GLOBAL_DATA_PTR;
 
 int dram_init(void)
 {
-   gd->ram_size = SZ_256M;
+   gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
 
return 0;
 }
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 9c96d0e..73482d9 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -37,6 +37,13 @@
 #define CONFIG_SYS_SDRAM_BASE  0x
 #define CONFIG_SYS_TEXT_BASE   0x8000
 #define CONFIG_SYS_UBOOT_BASE  CONFIG_SYS_TEXT_BASE
+/*
+ * The board really has 256M. However, the VC (VideoCore co-processor) shares
+ * the RAM, and uses a configurable portion at the top. We tell U-Boot that a
+ * smaller amount of RAM is present in order to avoid stomping on the area
+ * the VC uses.
+ */
+#define CONFIG_SYS_SDRAM_SIZE  SZ_128M
 #define CONFIG_SYS_INIT_RAM_SIZE   SZ_4K
 #define CONFIG_SYS_INIT_SP_ADDR(CONFIG_SYS_SDRAM_BASE + \
 CONFIG_SYS_INIT_RAM_SIZE - \
-- 
1.7.9.5

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[U-Boot] [PATCH V2 08/13] ARM: rpi_b: enable booting the Linux kernel

2012-07-31 Thread Stephen Warren
CONFIG_OF_LIBFDT allows bootm/bootz to pass a device tree to the kernel.

Set bi_boot_params to define where ATAGs will be written
(extracted from work by Oleksandr Tymoshenko ).

Add ATAG support for bootm/bootz. Newer kernels use device tree, so this
isn't that useful. However, old kernels all use board files, so this
might still see some use.

Enable bootz command to allow booting a zImage directly.

Signed-off-by: Stephen Warren 
---
v2: Squashed the following commits into one:
  ARM: rpi_b: add ATAG support for bootm/bootz
  ARM: rpi_b: set bi_boot_params
  ARM: rpi_b: enable CONFIG_OF_LIBFDT
  ARM: rpi_b: enabled bootz command
---
 board/raspberrypi/rpi_b/rpi_b.c |2 ++
 include/configs/rpi_b.h |8 
 2 files changed, 10 insertions(+)

diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
index f39440f..26df74b 100644
--- a/board/raspberrypi/rpi_b/rpi_b.c
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -28,5 +28,7 @@ int dram_init(void)
 
 int board_init(void)
 {
+   gd->bd->bi_boot_params = 0x100;
+
return 0;
 }
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index f34cc03..9c96d0e 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -81,10 +81,18 @@
 
 /* Commands */
 #include 
+#define CONFIG_CMD_BOOTZ
 /* Some things don't make sense on this HW or yet */
 #undef CONFIG_CMD_FPGA
 #undef CONFIG_CMD_NET
 #undef CONFIG_CMD_NFS
 #undef CONFIG_CMD_SAVEENV
 
+/* Device tree support for bootm/bootz */
+#define CONFIG_OF_LIBFDT
+/* ATAGs support for bootm/bootz */
+#define CONFIG_SETUP_MEMORY_TAGS
+#define CONFIG_CMDLINE_TAG
+#define CONFIG_INITRD_TAG
+
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH V2 07/13] ARM: rpi_b: include config_cmd_default.h

2012-07-31 Thread Stephen Warren
This enables a more typical default set of commands. Remove explicit
enables for commands already in the default list.

Signed-off-by: Stephen Warren 
---
v2: Use <> not "" for #include of config_cmd_default.h
---
 include/configs/rpi_b.h |8 ++--
 1 file changed, 6 insertions(+), 2 deletions(-)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 0a3681d..f34cc03 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -80,7 +80,11 @@
 #define CONFIG_AUTO_COMPLETE
 
 /* Commands */
-#define CONFIG_CMD_MEMORY
-#define CONFIG_CMD_MISC
+#include 
+/* Some things don't make sense on this HW or yet */
+#undef CONFIG_CMD_FPGA
+#undef CONFIG_CMD_NET
+#undef CONFIG_CMD_NFS
+#undef CONFIG_CMD_SAVEENV
 
 #endif
-- 
1.7.9.5

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[U-Boot] [PATCH V2 04/13] ARM: arm1176: enable instruction cache in arch_cpu_init()

2012-07-31 Thread Stephen Warren
Note that this affects all users of the ARM1176 CPU that enable
CONFIG_ARCH_CPU_INIT, not just the BCM2835 SoC, potentially such as
tnetv107x.

Cc: Cyril Chemparathy 
Signed-off-by: Stephen Warren 
---
 arch/arm/cpu/arm1176/cpu.c |7 +++
 1 file changed, 7 insertions(+)

diff --git a/arch/arm/cpu/arm1176/cpu.c b/arch/arm/cpu/arm1176/cpu.c
index c0fd114..532a90b 100644
--- a/arch/arm/cpu/arm1176/cpu.c
+++ b/arch/arm/cpu/arm1176/cpu.c
@@ -65,3 +65,10 @@ static void cache_flush (void)
/* mem barrier to sync things */
asm ("mcr p15, 0, %0, c7, c10, 4": :"r" (0));
 }
+
+int arch_cpu_init(void)
+{
+   icache_enable();
+
+   return 0;
+}
-- 
1.7.9.5

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[U-Boot] [PATCH V2 03/13] ARM: bcm2835: add Raspberry Pi model B board

2012-07-31 Thread Stephen Warren
The Raspberry Pi model B uses the BCM2835 SoC, has 256MB of RAM, contains
an SMSC 9512 USB LAN/Hub chip, and various IO connectors. For more details,
see http://www.raspberrypi.org/.

Signed-off-by: Stephen Warren 
---
v2: Re-order defines slightly to drop a later cleanup patch.
---
 MAINTAINERS  |4 ++
 board/raspberrypi/rpi_b/Makefile |   34 
 board/raspberrypi/rpi_b/rpi_b.c  |   32 +++
 boards.cfg   |1 +
 include/configs/rpi_b.h  |   80 ++
 5 files changed, 151 insertions(+)
 create mode 100644 board/raspberrypi/rpi_b/Makefile
 create mode 100644 board/raspberrypi/rpi_b/rpi_b.c
 create mode 100644 include/configs/rpi_b.h

diff --git a/MAINTAINERS b/MAINTAINERS
index fd0c65c..abe621e 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -928,6 +928,10 @@ Stephen Warren 
trimslice   Tegra2 (ARM7 & A9 Dual Core)
whistlerTegra2 (ARM7 & A9 Dual Core)
 
+Stephen Warren 
+
+   rpi_b   BCM2835 (ARM1176)
+
 Thomas Weber 
 
devkit8000  ARM ARMV7 (OMAP3530 SoC)
diff --git a/board/raspberrypi/rpi_b/Makefile b/board/raspberrypi/rpi_b/Makefile
new file mode 100644
index 000..9d0c377
--- /dev/null
+++ b/board/raspberrypi/rpi_b/Makefile
@@ -0,0 +1,34 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# version 2 as published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(BOARD).o
+
+COBJS  := $(BOARD).o
+
+SRCS   := $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(COBJS))
+
+$(LIB):$(obj).depend $(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/board/raspberrypi/rpi_b/rpi_b.c b/board/raspberrypi/rpi_b/rpi_b.c
new file mode 100644
index 000..f39440f
--- /dev/null
+++ b/board/raspberrypi/rpi_b/rpi_b.c
@@ -0,0 +1,32 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#include 
+#include 
+
+DECLARE_GLOBAL_DATA_PTR;
+
+int dram_init(void)
+{
+   gd->ram_size = SZ_256M;
+
+   return 0;
+}
+
+int board_init(void)
+{
+   return 0;
+}
diff --git a/boards.cfg b/boards.cfg
index 2d36d83..7a88eb9 100644
--- a/boards.cfg
+++ b/boards.cfg
@@ -48,6 +48,7 @@ mx35pdk  arm arm1136 -
   freesca
 apollon arm arm1136 apollon
 -  omap24xx
 omap2420h4   arm arm1136 -   ti
 omap24xx
 tnetv107x_evmarm arm1176 tnetv107xevmti
 tnetv107x
+rpi_barm arm1176 rpi_b   
raspberrypibcm2835
 integratorap_cm720t  arm arm720t integrator  
armltd -   integratorap:CM720T
 integratorap_cm920t  arm arm920t integrator  
armltd -   integratorap:CM920T
 integratorcp_cm920t  arm arm920t integrator  
armltd -   integratorcp:CM920T
diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
new file mode 100644
index 000..28e5510
--- /dev/null
+++ b/include/configs/rpi_b.h
@@ -0,0 +1,80 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+#ifnde

[U-Boot] [PATCH V2 02/13] ARM: add basic support for the Broadcom BCM2835 SoC

2012-07-31 Thread Stephen Warren
This SoC is used in the Raspberry Pi, for example.

Initial support is enough to boot to a serial console, and execute a
minimal set of U-Boot commands. No drivers are implemented. For more
details, see http://www.broadcom.com/products/BCM2835 or
http://www.raspberrypi.org/wp-content/uploads/2012/02/BCM2835-ARM-Peripherals.pdf.

Signed-off-by: Stephen Warren 
---
 arch/arm/cpu/arm1176/bcm2835/Makefile|   37 +
 arch/arm/cpu/arm1176/bcm2835/config.mk   |   19 +
 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S |   19 +
 arch/arm/cpu/arm1176/bcm2835/reset.c |   27 +
 arch/arm/cpu/arm1176/bcm2835/timer.c |   55 ++
 arch/arm/include/asm/arch-bcm2835/timer.h|   37 +
 6 files changed, 194 insertions(+)
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/reset.c
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/timer.c
 create mode 100644 arch/arm/include/asm/arch-bcm2835/timer.h

diff --git a/arch/arm/cpu/arm1176/bcm2835/Makefile 
b/arch/arm/cpu/arm1176/bcm2835/Makefile
new file mode 100644
index 000..4ea6d6b
--- /dev/null
+++ b/arch/arm/cpu/arm1176/bcm2835/Makefile
@@ -0,0 +1,37 @@
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# version 2 as published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+#
+
+include $(TOPDIR)/config.mk
+
+LIB= $(obj)lib$(SOC).o
+
+SOBJS  := lowlevel_init.o
+COBJS  := reset.o timer.o
+
+SRCS   := $(SOBJS:.o=.c) $(COBJS:.o=.c)
+OBJS   := $(addprefix $(obj),$(SOBJS) $(COBJS))
+
+all:   $(obj).depend $(LIB)
+
+$(LIB):$(OBJS)
+   $(call cmd_link_o_target, $(OBJS))
+
+#
+
+# defines $(obj).depend target
+include $(SRCTREE)/rules.mk
+
+sinclude $(obj).depend
+
+#
diff --git a/arch/arm/cpu/arm1176/bcm2835/config.mk 
b/arch/arm/cpu/arm1176/bcm2835/config.mk
new file mode 100644
index 000..b87ce24
--- /dev/null
+++ b/arch/arm/cpu/arm1176/bcm2835/config.mk
@@ -0,0 +1,19 @@
+#
+# (C) Copyright 2012 Stephen Warren
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License
+# version 2 as published by the Free Software Foundation.
+#
+# This program is distributed in the hope that it will be useful, but
+# WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+# GNU General Public License for more details.
+
+# Don't attempt to override the target CPU/ABI options;
+# the Raspberry Pi toolchain does the right thing by default.
+PLATFORM_RELFLAGS := $(filter-out -msoft-float,$(PLATFORM_RELFLAGS))
+PLATFORM_CPPFLAGS := $(filter-out -march=armv5t,$(PLATFORM_CPPFLAGS))
diff --git a/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S 
b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S
new file mode 100644
index 000..c7b0843
--- /dev/null
+++ b/arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S
@@ -0,0 +1,19 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ */
+
+.globl lowlevel_init
+lowlevel_init:
+   mov pc, lr
diff --git a/arch/arm/cpu/arm1176/bcm2835/reset.c 
b/arch/arm/cpu/arm1176/bcm2835/reset.c
new file mode 100644
index 000..69c9577
--- /dev/null
+++ b/arch/arm/cpu/arm1176/bcm2835/reset.c
@@ -0,0 +1,27 @@
+/*
+ * (C) Copyright 2012 Stephen Warren
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful, but
+ * WITHOUT ANY WARRANTY; without 

[U-Boot] [PATCH V2 05/13] ARM: rpi_b: enable CONFIG_ARCH_CPU_INIT for icache

2012-07-31 Thread Stephen Warren
This causes arch_cpu_init() to be called, which enables the icache.

Extracted from work by Oleksandr Tymoshenko .

Signed-off-by: Stephen Warren 
---
 include/configs/rpi_b.h |1 +
 1 file changed, 1 insertion(+)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 28e5510..9020d80 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -22,6 +22,7 @@
 /* Architecture, CPU, etc.*/
 #define CONFIG_ARM1176
 #define CONFIG_BCM2835
+#define CONFIG_ARCH_CPU_INIT
 
 /* Timer */
 #define CONFIG_SYS_HZ  100
-- 
1.7.9.5

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[U-Boot] [PATCH V2 06/13] ARM: rpi_b: define CONFIG_MACH_TYPE

2012-07-31 Thread Stephen Warren
Use MACH_TYPE_BCM2708 as the Linux machine type for the Raspberry Pi.

The Raspberry Pi actually uses a BCM2835. However, the 2835 this is
apparently a SKU in a series for which the BCM2708 is the first or perhaps
primary version, such that the 2708 name has historically been used for
this purpose.

Extracted from work by Oleksandr Tymoshenko .

Signed-off-by: Stephen Warren 
---
 include/configs/rpi_b.h |5 +
 1 file changed, 5 insertions(+)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index 9020d80..0a3681d 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -23,6 +23,11 @@
 #define CONFIG_ARM1176
 #define CONFIG_BCM2835
 #define CONFIG_ARCH_CPU_INIT
+/*
+ * 2835 is a SKU in a series for which the 2708 is the first or primary SoC,
+ * so 2708 has historically been used rather than a dedicated 2835 ID.
+ */
+#define CONFIG_MACH_TYPE   MACH_TYPE_BCM2708
 
 /* Timer */
 #define CONFIG_SYS_HZ  100
-- 
1.7.9.5

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[U-Boot] [PATCH V2 00/13] Basic Raspberyr Pi support

2012-07-31 Thread Stephen Warren
This series adds basic support for the Raspberry Pi ARM board.

v2:
* Add README config_cmd_default.h documentation fix.
* Use <> not "" for include of config_cmd_default.h.
* Squash together 3 patches related to enabling booting a Linux kernel.
* Minor rpi_b.h order changes in order to drop later cleanup patch.
* Merged together 2 patch series of mine, and the GPIO series from Vikram.

Stephen Warren (11):
  README: fix references to config_cmd_default.h
  ARM: add basic support for the Broadcom BCM2835 SoC
  ARM: bcm2835: add Raspberry Pi model B board
  ARM: arm1176: enable instruction cache in arch_cpu_init()
  ARM: rpi_b: enable CONFIG_ARCH_CPU_INIT for icache
  ARM: rpi_b: define CONFIG_MACH_TYPE
  ARM: rpi_b: include config_cmd_default.h
  ARM: rpi_b: enable booting the Linux kernel
  ARM: rpi_b: drop RAM size to 128M
  ARM: rpi_b: move stack to top of RAM
  ARM: bcm2835: implement reset using watchdog

Vikram Narayanan (2):
  gpio: bcm2835: Add GPIO driver
  rbpi: Add BCM2835 GPIO driver for raspberry pi

 MAINTAINERS  |4 +
 README   |4 +-
 arch/arm/cpu/arm1176/bcm2835/Makefile|   37 +
 arch/arm/cpu/arm1176/bcm2835/config.mk   |   19 +
 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S |   19 +
 arch/arm/cpu/arm1176/bcm2835/reset.c |   35 +
 arch/arm/cpu/arm1176/bcm2835/timer.c |   55 +
 arch/arm/cpu/arm1176/cpu.c   |7 ++
 arch/arm/include/asm/arch-bcm2835/gpio.h |   66 
 arch/arm/include/asm/arch-bcm2835/timer.h|   37 +
 arch/arm/include/asm/arch-bcm2835/wdog.h |   37 +
 board/raspberrypi/rpi_b/Makefile |   34 +
 board/raspberrypi/rpi_b/rpi_b.c  |   34 +
 boards.cfg   |1 +
 drivers/gpio/Makefile|1 +
 drivers/gpio/bcm2835_gpio.c  |   90 ++
 include/configs/rpi_b.h  |  106 ++
 17 files changed, 584 insertions(+), 2 deletions(-)
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/Makefile
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/config.mk
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/lowlevel_init.S
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/reset.c
 create mode 100644 arch/arm/cpu/arm1176/bcm2835/timer.c
 create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
 create mode 100644 arch/arm/include/asm/arch-bcm2835/timer.h
 create mode 100644 arch/arm/include/asm/arch-bcm2835/wdog.h
 create mode 100644 board/raspberrypi/rpi_b/Makefile
 create mode 100644 board/raspberrypi/rpi_b/rpi_b.c
 create mode 100644 drivers/gpio/bcm2835_gpio.c
 create mode 100644 include/configs/rpi_b.h

-- 
1.7.9.5

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[U-Boot] [PATCH V2 01/13] README: fix references to config_cmd_default.h

2012-07-31 Thread Stephen Warren
All usage of config_cmd_default.h uses <> for the include statement.
Update the README to do the same, rather than using "".

Signed-off-by: Stephen Warren 
---
v2: New patch
---
 README |4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

diff --git a/README b/README
index dac46f3..a7deaf4 100644
--- a/README
+++ b/README
@@ -744,8 +744,8 @@ The following options need to be configured:
 - Monitor Functions:
Monitor commands can be included or excluded
from the build by using the #include files
-   "config_cmd_all.h" and #undef'ing unwanted
-   commands, or using "config_cmd_default.h"
+and #undef'ing unwanted
+   commands, or using 
and augmenting with additional #define's
for wanted commands.
 
-- 
1.7.9.5

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Re: [U-Boot] early_malloc outline

2012-07-31 Thread Graeme Russ
Hi Thomas,

On 08/01/2012 01:30 AM, Tomas Hlavacek wrote:
> Hello all!
> 
> In u-boot-dm mailinglist we had a discussion about implementation of
> early_malloc (not only) for U-Boot Driver Model. The intention is to
> have a simple malloc() function in the early stage of init before
> relocation and before RAM is up and running. There was an experimental
> patch that added the early heap to GD structure.
> 
> In the following discussion Graeme Russ pointed out that there is a
> pre-console buffer which does the similar thing. And we should not
> explode GD by adding the early heap (which is going to be few hundreds
> of bytes long) into it. He suggested to create an independent area
> locked in cache lines for early heap in order to allow split GD and
> early heap into more non-contiguous blocks.

More specifically, we must not assume that we have a single, contiguous
region of memory capable of holding pre-relocations early stack,
pre-relocation global data, pre-console buffer, and early (pre-relocation)
heap.

Forget about 'locked cache lines' - That is only important when considering
when to call enable_caches(). The cover the generic case (which covers all
architectures) we simply need to keep in mind that enable_caches() can only
be called _after_ the early heap has been moved to the final (SDRAM) heap.
Therefore, we must keep in mind that any code which manipulated the early
heap into the final heap is going to be performance-hindered.

> Pavel Hermann said that we would have to copy data twice (first before
> the RAM is up and running and caches are still off and second after
> RAM and dlmalloc is initialized).

I think I understand why now - The idea is to blind-copy the early-heap
into SDRAM, enable caches and then process the early heap into final heap.
This _may_ provide a performance bonus on _some_ (most) cases

> Marek Vasut said (earlier in the discussion) that we do not need to
> care about few hundred of bytes, especially after copying them into
> RAM. And Wolfgang Denk resisted. He also pointed out that there are

And so do I - it sets a very bad precedent and it is simply not how
embedded developer should think. This is not 1980's Wall Street - Greed is
NOT good.

> other possibilities where early memory may be allocated -
> on-chip-memory, external SRAM and others and these should be kept in
> mind including existing size restrictions.
> 
> (I apologize for eventual misinterpretation and I am sorry that we do
> not have a link to the u-boot-dm mailinglist archive nor GMANE. But I
> can eventually Fwd. needed pieces of the discussion.)

OK, lets forget about Driver Model here - it is no longer relevant to the
discussion at hand.

> We would like to hear opinions on the early_malloc idea to find a
> broadly acceptable solution.
> 
> Can/should we use some existing mechanism? Or would it be considered a
> viable option to choose different beginning address for early heap,
> use it (in architecture-specific way) and keep the pointer to the
> beginning in GD. Then copy the early heap to memory before caches are
> flushed and in case of DM copy again data from early heap to new
> destinations that has been obtained through malloc() when it is
> initialized?

OK, I'm going to go out on a long and thin limb here (i.e. look out for
daft ideas) and say that all we need before relocation and final heap
initialisation is an early stack and an early heap (no global data or no
pre-relocation buffer as they are currently implemented). What! I hear you
say :)

Well, why can't we put global data and pre-relocation buffer _on_ the early
heap? Yes, it will be a bit tricky as there is some very early code (in
assembler) that reads/writes to/from GD, but if GD is placed at the top of
the heap, it's members can still be directly referenced.

And now we can have some fun with an early version of brk() / sbrk()
whereby if early malloc fails, a call to early_sbrk() will give us more
early heap which _may be in a memory region which is non-contiguous with
the existing early heap.

E.g.:

+ --+ \
|   | |
|  Early Stack  | |
|   | |
+---+ |
| Early Heap A  | |
| +---+ | |
| | Early Global Data | | |
| +---+ | > Locked Cache Lines
| |Early Data A   | | |
| +---+ | |
| |Early Data B   | | |
| +---+ | |
| |Early Data C   | | |
+ +---+ + |
|   | |
|  Unused Bytes | |
|   | |
+---+ /

+---+ \
| Early Heap B  | |
| +---+ | |
| |Early Data D   | | |
| +---+ | |
| |Early Data E   | | |
| +---+ | |
| |Early Data F   | | > SRAM
| +---+ | |
| |Early Data G   | | |
+ +---+ + |
|   | |
| Free Early Heap Space | |
|

Re: [U-Boot] [PATCH v2 2/5] ehci-hcd: Boost transfer speed

2012-07-31 Thread Marek Vasut
Dear Stefan Herbrechtsmeier,

[...]

> >>> What do you mean by "partial USB transfers"? As seen from EHCI
> >>> users like
> >>> the MSC driver (usb_storage.c), USB transfers either succeed or
> >>> fail, but
> >>> they cannot be "segmented".
> >> 
> >> Segmented -- like multiple transfers being issues with small payload?
> 
> Right.
> 
> >> You can
> >> not put these together at the USB-level, since it's the issuing code
> >> that has to
> >> be fixed.
> 
> If the segmentation comes from the file system handling we can not avoid
> this.

If the FS code is shitty or the device is fragmented, noone can help that.

[...]

> >>> My code assumes that wMaxPacketSize is a power of 2. This is not
> >>> always
> >>> true for interrupt endpoints. Let's talk about these. Their
> >>> handling is
> >>> currently broken in U-Boot since their transfers are made
> >>> asynchronous
> >>> instead of periodic. Devices shouldn't care too much about that, as
> >>> long
> >>> as transfers do not exceed wMaxPacketSize, in which case my code
> >>> still
> >>> works because wMaxPacketSize always fits in a single qTD. Interrupt
> >>> transfers larger than wMaxPacketSize do not seem to be used by
> >>> U-Boot. If
> >>> they were used, the current code in U-Boot would have a timing
> >>> issue
> >>> because the asynchronous scheme would break the interval requested
> >>> by
> >>> devices, which could at worst make them fail in some way. So the
> >>> only
> >>> solution would be that such transfers be split by the caller of
> >>> submit_int_msg, in which case my code still works. What would you
> >>> think
> >>> about failing with an error message in submit_int_msg if length is
> >>> larger
> >>> than wMaxPacketSize? Marek, what do you think?
> >> 
> >> Let's do that ... I think the interrupt endpoint is only used for
> >> keyboard and
> >> if someone needs it for something else, the code will be there, just
> >> needing
> >> improvement. Comment and error message are OK.
> > 
> > OK. I have thought of another solution for this. You'll tell me which one
> > you prefer.
> > 
> > The ehci_submit_async code currently in U-Boot checks through
> > ehci_td_buffer that length fits in the single qTD reserved for data
> > payload only after work has begun, possibly after a SETUP transfer. With
> > my series, this is checked at the very beginning, before the allocation.
> > We could detect that wMaxPacketSize is not a power of 2 (e.g. with
> > __builtin_popcount), in which case the allocation for the data payload
> > would be restricted to 1 qTD like now, and there would be a check at the
> > very beginning to test if length fits in this qTD. In that way, there
> > could be several packets per interrupt transfer as long as it fits in a
> > single qTD, just like now, contrary to the limitation imposed by the
> > error in submit_int_msg. But I'm not sure it's a good idea to allow this
> > behavior.
> 
> I think this is not needed, as there is only one user (keyboard) with
> max size of 8 byte.

I agree, but for a different reason. Let's aim for a simple implementation 
first 
that doesn't change behavior and add this change later _if_ needed.

[...]

> >>> So we could perhaps issue a #error in ehci-hcd or in usb_storage if
> >>> CONFIG_SYS_MALLOC_LEN is not large enough, but I don't think it's a
> >>> good
> >>> 
> >>> idea because:
> >>>   - the threshold value would have to depend on runtime block sizes
> >>>   or
> >>> 
> >>> something, which could lead to a big worst worst case that would
> >>> almost
> >>> never happen in real life, so giving such an unrealistic heap size
> >>> constraint would be cumbersome,
> >> 
> >> #warning then?
> > 
> > With which limit if so?
> 
> I would expect more than 128kB as this is a common worst case (512 B
> block size).

Seems to be reasonable.

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Re: [U-Boot] [PATCH v3 1/2] gpio: bcm2835: Add GPIO driver

2012-07-31 Thread Vikram Narayanan

On 7/31/2012 11:18 PM, Vikram Narayanan wrote:

Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.

Signed-off-by: Vikram Narayanan
---
  arch/arm/include/asm/arch-bcm2835/gpio.h |   71 
  drivers/gpio/Makefile|1 +
  drivers/gpio/bcm2835_gpio.c  |   88 ++
  3 files changed, 160 insertions(+), 0 deletions(-)
  create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
  create mode 100644 drivers/gpio/bcm2835_gpio.c

diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h 
b/arch/arm/include/asm/arch-bcm2835/gpio.h
new file mode 100644
index 000..515456a
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ *
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BCM2835_GPIO_H_
+#define _BCM2835_GPIO_H_
+
+#define BCM2835_GPIO_BASE  0x7E20
+#define BCM2835_GPIO_COUNT 53


GPIO count should be 54 to make the gpio_is_valid work correctly when 
the gpio is 53.

Will fix in v4.

Any other comments?


+
+#define BCM2835_GPIO_FSEL_MASK 0x7
+#define BCM2835_GPIO_INPUT 0x0
+#define BCM2835_GPIO_OUTPUT0x1
+#define BCM2835_GPIO_ALT0  0x2
+#define BCM2835_GPIO_ALT1  0x3
+#define BCM2835_GPIO_ALT2  0x4
+#define BCM2835_GPIO_ALT3  0x5
+#define BCM2835_GPIO_ALT4  0x6
+#define BCM2835_GPIO_ALT5  0x7
+
+#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio<  32) ? 0 : 1)
+#define BCM2835_GPIO_COMMON_SHIFT(gpio)(gpio&  0x1f)
+
+#define BCM2835_GPIO_FSEL_BANK(gpio)   (gpio / 10)
+#define BCM2835_GPIO_FSEL_SHIFT(gpio)  ((gpio % 10) * 3)
+
+struct bcm_gpio_regs {
+   u32 gpfsel[6];
+   u32 reserved1;
+   u32 gpset[2];
+   u32 reserved2;
+   u32 gpclr[2];
+   u32 reserved3;
+   u32 gplev[2];
+   u32 reserved4;
+   u32 gpeds[2];
+   u32 reserved5;
+   u32 gpren[2];
+   u32 reserved6;
+   u32 gpfen[2];
+   u32 reserved7;
+   u32 gphen[2];
+   u32 reserved8;
+   u32 gplen[2];
+   u32 reserved9;
+   u32 gparen[2];
+   u32 reserved10;
+   u32 gppud;
+   u32 gppudclk[2];
+};
+
+#endif /* _BCM2835_GPIO_H_ */
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 32a2474..8d2f2b2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_TEGRA_GPIO)+= tegra_gpio.o
  COBJS-$(CONFIG_DA8XX_GPIO)+= da8xx_gpio.o
  COBJS-$(CONFIG_ALTERA_PIO)+= altera_pio.o
  COBJS-$(CONFIG_MPC83XX_GPIO)  += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO)   += bcm2835_gpio.o

  COBJS := $(COBJS-y)
  SRCS  := $(COBJS:.o=.c)
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
new file mode 100644
index 000..eb02efa
--- /dev/null
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ *
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include
+#include
+#include
+
+inline int gpio_is_valid(unsigned gpio)
+{
+   return (gpio<  BCM2835_GPIO_COUNT);
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+   return gpio_is_valid(gpio);
+}
+
+int gpio_free(unsigned gpio)
+{
+   return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+   struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)B

Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread stefano babic
Am 31/07/2012 22:50, schrieb Wolfgang Denk:
> Dear Stefano,
> 
> In message <501842d4.6060...@denx.de> you wrote:
>>
>>> #ifdef CONFIG_BOARD_LATE_INIT
>>> int board_late_init(void)
>>> {
>>> setenv("stdout", "serial");
>>>
>>> return 0;
>>> }
>>> #endif
>>>
>>> Signed-off-by: Fabio Estevam 
>>> ---
>>
>> Hi Fabio,
>>
>>>  include/configs/mx53loco.h |1 +
>>>  1 files changed, 1 insertions(+), 0 deletions(-)
>>>
>>> diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
>>> index 0a25c7d..bd23387 100644
>>> --- a/include/configs/mx53loco.h
>>> +++ b/include/configs/mx53loco.h
>>> @@ -41,6 +41,7 @@
>>>  #define CONFIG_SYS_MALLOC_LEN  (10 * 1024 * 1024)
>>>  
>>>  #define CONFIG_BOARD_EARLY_INIT_F
>>> +#define CONFIG_BOARD_LATE_INIT
>>
>> I see, commit eae08eb2b53ffb87f3342e45ab422d8625659fcd dropped it.
>>
>> Acked-by: Stefano Babic 
> 
> Please see my previous message - I dislike the first part of the
> patch, the unconditional "setenv stdout serial".

Right - but this is not part of the patch, it is only in the commit
message and regards code that is already mainlined. The patch sets only
CONFIG_BOARD_LATE_INIT. The part you dislike should be fixed by a
separate patch.

Stefano

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Re: [U-Boot] [PATCH] mx28evk: Turn on caches

2012-07-31 Thread stefano babic
Am 31/07/2012 20:10, schrieb Fabio Estevam:
> Turn on data and instruction caches.
> 
> Signed-off-by: Fabio Estevam 
> ---
>  include/configs/mx28evk.h |2 --
>  1 files changed, 0 insertions(+), 2 deletions(-)
> 
> diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
> index 54d21e6..5f145d1 100644
> --- a/include/configs/mx28evk.h
> +++ b/include/configs/mx28evk.h
> @@ -31,8 +31,6 @@
>  #define CONFIG_MACH_TYPE MACH_TYPE_MX28EVK
>  
>  #define CONFIG_SYS_NO_FLASH
> -#define CONFIG_SYS_ICACHE_OFF
> -#define CONFIG_SYS_DCACHE_OFF
>  #define CONFIG_BOARD_EARLY_INIT_F
>  #define CONFIG_ARCH_MISC_INIT
>  
> 

Acked-by : Stefano Babic 

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[U-Boot] [PATCH 5/5] am33xx: Rework pinmux functions

2012-07-31 Thread Tom Rini
- Move definition of the EEPROM contents to 
  - Make some defines a little less generic now.
- Pinmux must be done by done by SPL now.
- Create 3 pinmux functions, uart0, i2c0 and board.
- Add pinmux specific to Starter Kit EVM for MMC now.

Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/am33xx/board.c |   32 +++---
 arch/arm/include/asm/arch-am33xx/common_def.h |   26 ---
 arch/arm/include/asm/arch-am33xx/sys_proto.h  |   28 
 board/ti/am335x/Makefile  |2 +
 board/ti/am335x/mux.c |   58 ++---
 5 files changed, 68 insertions(+), 78 deletions(-)
 delete mode 100644 arch/arm/include/asm/arch-am33xx/common_def.h

diff --git a/arch/arm/cpu/armv7/am33xx/board.c 
b/arch/arm/cpu/armv7/am33xx/board.c
index 0f16021..2ca4ca7 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -25,7 +25,7 @@
 #include 
 #include 
 #include 
-#include 
+#include 
 #include 
 #include 
 #include 
@@ -58,29 +58,16 @@ const struct gpio_bank *const omap_gpio_bank = 
gpio_bank_am33xx;
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
-#define NO_OF_MAC_ADDR  3
-#define ETH_ALEN   6
-#define NAME_LEN   8
-
-struct am335x_baseboard_id {
-   unsigned int  magic;
-   char name[NAME_LEN];
-   char version[4];
-   char serial[12];
-   char config[32];
-   char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
-};
-
 static struct am335x_baseboard_id __attribute__((section (".data"))) header;
 
 static inline int board_is_bone(void)
 {
-   return !strncmp(header.name, "A335BONE", NAME_LEN);
+   return !strncmp(header.name, "A335BONE", HDR_NAME_LEN);
 }
 
 static inline int board_is_evm_sk(void)
 {
-   return !strncmp("A335X_SK", header.name, NAME_LEN);
+   return !strncmp("A335X_SK", header.name, HDR_NAME_LEN);
 }
 
 /*
@@ -207,21 +194,18 @@ void s_init(void)
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
 
+   enable_board_pin_mux(&header);
if (board_is_evm_sk()) {
/*
 * EVM SK 1.2A and later use gpio0_7 to enable DDR3.
 * This is safe enough to do on older revs.
 */
-   enable_gpio0_7_pin_mux();
gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
gpio_direction_output(GPIO_DDR_VTT_EN, 1);
}
 
config_ddr(board_memory_type());
 #endif
-
-   /* Enable MMC0 */
-   enable_mmc0_pin_mux();
 }
 
 #if defined(CONFIG_OMAP_HSMMC) && !defined(CONFIG_SPL_BUILD)
@@ -238,14 +222,10 @@ void setup_clocks_for_console(void)
 }
 
 /*
- * Basic board specific setup
+ * Basic board specific setup.  Pinmux has been handled already.
  */
 int board_init(void)
 {
-   enable_uart0_pin_mux();
-
-   enable_i2c0_pin_mux();
-   enable_i2c1_pin_mux();
i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
if (read_eeprom() < 0)
puts("Could not get board ID.\n");
@@ -318,12 +298,10 @@ int board_eth_init(bd_t *bis)
}
 
if (board_is_bone()) {
-   enable_mii1_pin_mux();
writel(MII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_MII;
} else {
-   enable_rgmii1_pin_mux();
writel(RGMII_MODE_ENABLE, &cdev->miisel);
cpsw_slaves[0].phy_if = cpsw_slaves[1].phy_if =
PHY_INTERFACE_MODE_RGMII;
diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h 
b/arch/arm/include/asm/arch-am33xx/common_def.h
deleted file mode 100644
index 1fe6258..000
--- a/arch/arm/include/asm/arch-am33xx/common_def.h
+++ /dev/null
@@ -1,26 +0,0 @@
-/*
- * common_def.h
- *
- * Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#ifndef __COMMON_DEF_H__
-#define __COMMON_DEF_H__
-
-extern void enable_uart0_pin_mux(void);
-extern void enable_mmc0_pin_mux(void);
-extern void enable_gpio0_7_pin_mux(void);
-extern void enable_i2c0_pin_mux(void);
-extern void enable_mii1_pin_mux(void);
-extern void enable_rgmii1_pin_mux(void);
-
-#endif/*__COMMON_DEF_H__ */
diff --git a/arch/arm/include/asm/arch-am33xx/sys_proto.h 
b/arch/arm/include/asm/arch-am33xx/sys_proto.h
index eef5573..8a4b248 100644
--- a/arch/arm/include/asm/arch-am33xx/sys_proto.h
+++ b/arch/arm/include/asm/arch-am33xx/sys_pro

[U-Boot] [PATCH 3/5] am33xx: Add support for TI AM335x StarterKit EVM

2012-07-31 Thread Tom Rini
- Board requires gpio0 #7 to be set to power DDR3.
- Board uses DDR3, add a way to determine which DDR type to call
  config_ddr with.
- Both of the above require filling in the header structure early, move
  it into the data section.

Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/am33xx/board.c |   41 +++--
 arch/arm/include/asm/arch-am33xx/common_def.h |1 +
 board/ti/am335x/mux.c |   10 ++
 3 files changed, 50 insertions(+), 2 deletions(-)

diff --git a/arch/arm/cpu/armv7/am33xx/board.c 
b/arch/arm/cpu/armv7/am33xx/board.c
index 4634a9a..a1fe104 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -29,6 +29,7 @@
 #include 
 #include 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -52,6 +53,9 @@ const struct gpio_bank *const omap_gpio_bank = 
gpio_bank_am33xx;
 #define MII_MODE_ENABLE0x0
 #define RGMII_MODE_ENABLE  0xA
 
+/* GPIO that controls power to DDR on EVM-SK */
+#define GPIO_DDR_VTT_EN7
+
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
 /*
@@ -72,13 +76,18 @@ struct am335x_baseboard_id {
char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
 };
 
-static struct am335x_baseboard_id header;
+static struct am335x_baseboard_id __attribute__((section (".data"))) header;
 
 static inline int board_is_bone(void)
 {
return !strncmp(header.name, "A335BONE", NAME_LEN);
 }
 
+static inline int board_is_evm_sk(void)
+{
+   return !strncmp("A335X_SK", header.name, NAME_LEN);
+}
+
 /*
  * Read header information from EEPROM into global structure.
  */
@@ -145,6 +154,18 @@ static void init_timer(void)
 #endif
 
 /*
+ * Determine what type of DDR we have.
+ */
+static short inline board_memory_type(void)
+{
+   /* The following boards are known to use DDR3. */
+   if (board_is_evm_sk())
+   return EMIF_REG_SDRAM_TYPE_DDR3;
+
+   return EMIF_REG_SDRAM_TYPE_DDR2;
+}
+
+/*
  * early system init of muxing and clocks.
  */
 void s_init(void)
@@ -185,7 +206,23 @@ void s_init(void)
 
preloader_console_init();
 
-   config_ddr(EMIF_REG_SDRAM_TYPE_DDR2);
+   /* Initalize the board header */
+   enable_i2c0_pin_mux();
+   i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+   if (read_eeprom() < 0)
+   puts("Could not get board ID.\n");
+
+   if (board_is_evm_sk()) {
+   /*
+* EVM SK 1.2A and later use gpio0_7 to enable DDR3.
+* This is safe enough to do on older revs.
+*/
+   enable_gpio0_7_pin_mux();
+   gpio_request(GPIO_DDR_VTT_EN, "ddr_vtt_en");
+   gpio_direction_output(GPIO_DDR_VTT_EN, 1);
+   }
+
+   config_ddr(board_memory_type());
 #endif
 
/* Enable MMC0 */
diff --git a/arch/arm/include/asm/arch-am33xx/common_def.h 
b/arch/arm/include/asm/arch-am33xx/common_def.h
index 5a7b0f3..1fe6258 100644
--- a/arch/arm/include/asm/arch-am33xx/common_def.h
+++ b/arch/arm/include/asm/arch-am33xx/common_def.h
@@ -18,6 +18,7 @@
 
 extern void enable_uart0_pin_mux(void);
 extern void enable_mmc0_pin_mux(void);
+extern void enable_gpio0_7_pin_mux(void);
 extern void enable_i2c0_pin_mux(void);
 extern void enable_mii1_pin_mux(void);
 extern void enable_rgmii1_pin_mux(void);
diff --git a/board/ti/am335x/mux.c b/board/ti/am335x/mux.c
index a1661e6..9907d96 100644
--- a/board/ti/am335x/mux.c
+++ b/board/ti/am335x/mux.c
@@ -288,6 +288,11 @@ static struct module_pin_mux i2c1_pin_mux[] = {
{-1},
 };
 
+static struct module_pin_mux gpio0_7_pin_mux[] = {
+   {OFFSET(ecap0_in_pwm0_out), (MODE(7) | PULLUDEN)},  /* GPIO0_7 */
+   {-1},
+};
+
 static struct module_pin_mux rgmii1_pin_mux[] = {
{OFFSET(mii1_txen), MODE(2)},   /* RGMII1_TCTL */
{OFFSET(mii1_rxdv), MODE(2) | RXACTIVE},/* RGMII1_RCTL */
@@ -370,3 +375,8 @@ void enable_mii1_pin_mux(void)
 {
configure_module_pin_mux(mii1_pin_mux);
 }
+
+void enable_gpio0_7_pin_mux(void)
+{
+   configure_module_pin_mux(gpio0_7_pin_mux);
+}
-- 
1.7.9.5

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[U-Boot] [PATCH 4/5] am33xx evm: Add CONFIG_CMD_EEPROM and related

2012-07-31 Thread Tom Rini
am33xx boards have at least one eeprom and in the case of beaglebones
with capes, more.

Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/am33xx/board.c |   13 -
 include/configs/am335x_evm.h  |4 
 2 files changed, 8 insertions(+), 9 deletions(-)

diff --git a/arch/arm/cpu/armv7/am33xx/board.c 
b/arch/arm/cpu/armv7/am33xx/board.c
index a1fe104..0f16021 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -58,11 +58,6 @@ const struct gpio_bank *const omap_gpio_bank = 
gpio_bank_am33xx;
 
 static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
 
-/*
- * I2C Address of on-board EEPROM
- */
-#define I2C_BASE_BOARD_ADDR0x50
-
 #define NO_OF_MAC_ADDR  3
 #define ETH_ALEN   6
 #define NAME_LEN   8
@@ -94,14 +89,14 @@ static inline int board_is_evm_sk(void)
 static int read_eeprom(void)
 {
/* Check if baseboard eeprom is available */
-   if (i2c_probe(I2C_BASE_BOARD_ADDR)) {
+   if (i2c_probe(CONFIG_SYS_I2C_EEPROM_ADDR)) {
puts("Could not probe the EEPROM; something fundamentally "
"wrong on the I2C bus.\n");
return -ENODEV;
}
 
/* read the eeprom using i2c */
-   if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header,
+   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 2, (uchar *)&header,
sizeof(header))) {
puts("Could not read the EEPROM; something fundamentally"
" wrong on the I2C bus.\n");
@@ -113,8 +108,8 @@ static int read_eeprom(void)
 * read the eeprom using i2c again,
 * but use only a 1 byte address
 */
-   if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header,
-   sizeof(header))) {
+   if (i2c_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0, 1,
+   (uchar *)&header, sizeof(header))) {
puts("Could not read the EEPROM; something "
"fundamentally wrong on the I2C bus.\n");
return -EIO;
diff --git a/include/configs/am335x_evm.h b/include/configs/am335x_evm.h
index 2fdd9a6..e915f56 100644
--- a/include/configs/am335x_evm.h
+++ b/include/configs/am335x_evm.h
@@ -161,6 +161,10 @@
 #define CONFIG_SYS_I2C_SLAVE   1
 #define CONFIG_I2C_MULTI_BUS
 #define CONFIG_DRIVER_OMAP24XX_I2C
+#define CONFIG_CMD_EEPROM
+#define CONFIG_SYS_I2C_EEPROM_ADDR 0x50/* Main EEPROM */
+#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN 2
+#define CONFIG_SYS_I2C_MULTI_EEPROMS
 
 #define CONFIG_BAUDRATE115200
 #define CONFIG_SYS_BAUDRATE_TABLE  { 110, 300, 600, 1200, 2400, \
-- 
1.7.9.5

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[U-Boot] [PATCH 0/5]: Further update am33xx support

2012-07-31 Thread Tom Rini
Hey all,

The following series depends on both Ilya's cpsw work (the parts I've
said I would accept as-is) as well as the previous series I posted.
This series does a few things.  The main part is support for the next TI
EVM (AM335x StarterKit EVM) which features DDR3 and re-works the board.c
files based on the intention to have a single build support all boards,
based on the system EEPROM.  Based on the header we will setup pinmux
and in the case of the StarterKit EVM, enable a GPIO that controls power
to the DDR.  While in here I enabled the EEPROM command as this should
make it easier for people to program the EEPROM on their custom capes on
beaglebones.  And a bugfix to gpio0 support was required for toggling
the GPIO I mentioned on the StarterKit.  While reworking board.c a few
printf's were changed to puts and when we find an invalid EEPROM header,
we print out what we found (useful in seeing how you programmed it
wrong).

-- 
Tom

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[U-Boot] [PATCH 2/5] am33xx: Remove board/ti/am335x/evm.c

2012-07-31 Thread Tom Rini
The intention has always been (and boards are to support) an i2c EEPROM
that will identify what hardware they are, allowing a single binary to
support multiple boards.  As such, remove the 'evm.c' file as there is
nothing EVM centric in it currently, only SoC peripheral configuration.

Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/am33xx/board.c |  173 
 board/ti/am335x/Makefile  |2 +-
 board/ti/am335x/evm.c |  199 -
 3 files changed, 174 insertions(+), 200 deletions(-)
 delete mode 100644 board/ti/am335x/evm.c

diff --git a/arch/arm/cpu/armv7/am33xx/board.c 
b/arch/arm/cpu/armv7/am33xx/board.c
index ec542fd..4634a9a 100644
--- a/arch/arm/cpu/armv7/am33xx/board.c
+++ b/arch/arm/cpu/armv7/am33xx/board.c
@@ -17,6 +17,7 @@
  */
 
 #include 
+#include 
 #include 
 #include 
 #include 
@@ -28,6 +29,9 @@
 #include 
 #include 
 #include 
+#include 
+#include 
+#include 
 
 DECLARE_GLOBAL_DATA_PTR;
 
@@ -44,6 +48,79 @@ static const struct gpio_bank gpio_bank_am33xx[4] = {
 
 const struct gpio_bank *const omap_gpio_bank = gpio_bank_am33xx;
 
+/* MII mode defines */
+#define MII_MODE_ENABLE0x0
+#define RGMII_MODE_ENABLE  0xA
+
+static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
+
+/*
+ * I2C Address of on-board EEPROM
+ */
+#define I2C_BASE_BOARD_ADDR0x50
+
+#define NO_OF_MAC_ADDR  3
+#define ETH_ALEN   6
+#define NAME_LEN   8
+
+struct am335x_baseboard_id {
+   unsigned int  magic;
+   char name[NAME_LEN];
+   char version[4];
+   char serial[12];
+   char config[32];
+   char mac_addr[NO_OF_MAC_ADDR][ETH_ALEN];
+};
+
+static struct am335x_baseboard_id header;
+
+static inline int board_is_bone(void)
+{
+   return !strncmp(header.name, "A335BONE", NAME_LEN);
+}
+
+/*
+ * Read header information from EEPROM into global structure.
+ */
+static int read_eeprom(void)
+{
+   /* Check if baseboard eeprom is available */
+   if (i2c_probe(I2C_BASE_BOARD_ADDR)) {
+   puts("Could not probe the EEPROM; something fundamentally "
+   "wrong on the I2C bus.\n");
+   return -ENODEV;
+   }
+
+   /* read the eeprom using i2c */
+   if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 2, (uchar *)&header,
+   sizeof(header))) {
+   puts("Could not read the EEPROM; something fundamentally"
+   " wrong on the I2C bus.\n");
+   return -EIO;
+   }
+
+   if (header.magic != 0xEE3355AA) {
+   /*
+* read the eeprom using i2c again,
+* but use only a 1 byte address
+*/
+   if (i2c_read(I2C_BASE_BOARD_ADDR, 0, 1, (uchar *)&header,
+   sizeof(header))) {
+   puts("Could not read the EEPROM; something "
+   "fundamentally wrong on the I2C bus.\n");
+   return -EIO;
+   }
+
+   if (header.magic != 0xEE3355AA) {
+   printf("Incorrect magic number (0x%x) in EEPROM\n",
+   header.magic);
+   return -EINVAL;
+   }
+   }
+
+   return 0;
+}
+
 /* UART Defines */
 #ifdef CONFIG_SPL_BUILD
 #define UART_RESET (0x1 << 1)
@@ -127,3 +204,99 @@ void setup_clocks_for_console(void)
/* Not yet implemented */
return;
 }
+
+/*
+ * Basic board specific setup
+ */
+int board_init(void)
+{
+   enable_uart0_pin_mux();
+
+   enable_i2c0_pin_mux();
+   enable_i2c1_pin_mux();
+   i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
+   if (read_eeprom() < 0)
+   puts("Could not get board ID.\n");
+
+   gd->bd->bi_boot_params = PHYS_DRAM_1 + 0x100;
+
+   return 0;
+}
+
+#ifdef CONFIG_DRIVER_TI_CPSW
+static void cpsw_control(int enabled)
+{
+   /* VTP can be added here */
+
+   return;
+}
+
+static struct cpsw_slave_data cpsw_slaves[] = {
+   {
+   .slave_reg_ofs  = 0x208,
+   .sliver_reg_ofs = 0xd80,
+   .phy_id = 0,
+   },
+   {
+   .slave_reg_ofs  = 0x308,
+   .sliver_reg_ofs = 0xdc0,
+   .phy_id = 1,
+   },
+};
+
+static struct cpsw_platform_data cpsw_data = {
+   .mdio_base  = AM335X_CPSW_MDIO_BASE,
+   .cpsw_base  = AM335X_CPSW_BASE,
+   .mdio_div   = 0xff,
+   .channels   = 8,
+   .cpdma_reg_ofs  = 0x800,
+   .slaves = 1,
+   .slave_data = cpsw_slaves,
+   .ale_reg_ofs= 0xd00,
+   .ale_entries= 1024,
+   .host_port_reg_ofs  = 0x108,
+   .hw_stats_reg_ofs   = 0x900,
+   .mac_con

[U-Boot] [PATCH 1/5] am33xx: Enable gpio0 clock

2012-07-31 Thread Tom Rini
Signed-off-by: Tom Rini 
---
 arch/arm/cpu/armv7/am33xx/clock.c |4 
 1 file changed, 4 insertions(+)

diff --git a/arch/arm/cpu/armv7/am33xx/clock.c 
b/arch/arm/cpu/armv7/am33xx/clock.c
index c93a8ab..1071f92 100644
--- a/arch/arm/cpu/armv7/am33xx/clock.c
+++ b/arch/arm/cpu/armv7/am33xx/clock.c
@@ -71,6 +71,10 @@ static void enable_interface_clocks(void)
writel(PRCM_MOD_EN, &cmper->l4hsclkctrl);
while (readl(&cmper->l4hsclkctrl) != PRCM_MOD_EN)
;
+
+   writel(PRCM_MOD_EN, &cmwkup->wkgpio0clkctrl);
+   while (readl(&cmwkup->wkgpio0clkctrl) != PRCM_MOD_EN)
+   ;
 }
 
 /*
-- 
1.7.9.5

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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function

2012-07-31 Thread Tom Rini
On 07/31/2012 08:46 AM, R, Sricharan wrote:
> Correct.
> DRAM_ADDR_SPACE_END should be 0x for OMAP5.

OK, I will just drop this.

> 
> Thanks,
>  Sricharan
> 
> On Tue, Jul 31, 2012 at 9:12 PM, Tom Rini  wrote:
>> On 07/31/2012 08:27 AM, R, Sricharan wrote:
>>> Hi Tom,
>>>
>>> On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini  wrote:
 On 07/31/2012 01:33 AM, R, Sricharan wrote:
> Hi Tom,
> [snip..]
>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
>> b/arch/arm/include/asm/arch-omap5/omap.h
>> index 7f05cb5..c697e0b 100644
>> --- a/arch/arm/include/asm/arch-omap5/omap.h
>> +++ b/arch/arm/include/asm/arch-omap5/omap.h
>> @@ -39,11 +39,6 @@
>>  #define OMAP54XX_L4_WKUP_BASE  0x4Ae0
>>  #define OMAP54XX_L4_PER_BASE   0x4800
>>
>> -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000
>> -#define OMAP54XX_DRAM_ADDR_SPACE_END   0x
>> -#define DRAM_ADDR_SPACE_START  OMAP54XX_DRAM_ADDR_SPACE_START
>> -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END
>> -
>   This is a problem for OMAP5, which has  a trap section at 0xFF00
>   with in the sdram boundary. OMAP5 evm board has 2GB of memory from
>   0x8000 - 0x.  Size of the trap section should not be
> included in the
>  total sdram size.

 But it's not sdram size.  What happens when you're executing at the trap
 section, or rather, where are you executing code from?
>>>
>>>When we execute at trap section address, the system aborts.
>>>EMIF returns a exception. This is to catch the unmapped tiler
>>>entries.
>>> So total size of sdram size calculated should subtract the size
>>>of trap section if that falls with in the sdram boundary,
>>>as in case of omap5.  This is taken care in omap_sdram_size
>>>function.  But with this change the trap section will go un-noticed.
>>
>> So you're saying the problem is that 0xFF... needs to be included in
>> DRAM_ADDR_SPACE on omap5?
>>
>> --
>> Tom

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Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread stefano babic
Am 31/07/2012 21:56, schrieb Wolfgang Denk:
> Dear Fabio Estevam,
> 

Hi Fabio,

> In message 
>  you 
> wrote:
> ...
>>
>> -#ifdef CONFIG_BOARD_LATE_INIT
>>  int board_late_init(void)
>>  {
>> -setenv("stdout", "serial");
>> +setenv("preboot", "setenv stdout serial\0");
> 
> NAK.  Please never, never ever mandatorily overwrite environment
> variables!  The user who sets it to a different value and cannot find
> out why his settings don;t work and always get overwritten would be
> seriously frustrated.

Maybe a better way is to use CONFIG_PREBOOT as you do, but without
hard-coding the variable. You can add "preboot" to the default
environment (CONFIG_EXTRA_ENV_SETTINGS), and the user can still
overwrite the behavior setting the variable in the u-boot shell.

But I see I did not follow the same approach for the mx51evk (blame on
me !).

Stefano


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Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread Wolfgang Denk
Dear Stefano,

In message <501842d4.6060...@denx.de> you wrote:
>
> > #ifdef CONFIG_BOARD_LATE_INIT
> > int board_late_init(void)
> > {
> > setenv("stdout", "serial");
> > 
> > return 0;
> > }
> > #endif
> > 
> > Signed-off-by: Fabio Estevam 
> > ---
> 
> Hi Fabio,
> 
> >  include/configs/mx53loco.h |1 +
> >  1 files changed, 1 insertions(+), 0 deletions(-)
> > 
> > diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
> > index 0a25c7d..bd23387 100644
> > --- a/include/configs/mx53loco.h
> > +++ b/include/configs/mx53loco.h
> > @@ -41,6 +41,7 @@
> >  #define CONFIG_SYS_MALLOC_LEN  (10 * 1024 * 1024)
> >  
> >  #define CONFIG_BOARD_EARLY_INIT_F
> > +#define CONFIG_BOARD_LATE_INIT
> 
> I see, commit eae08eb2b53ffb87f3342e45ab422d8625659fcd dropped it.
> 
> Acked-by: Stefano Babic 

Please see my previous message - I dislike the first part of the
patch, the unconditional "setenv stdout serial".

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread stefano babic
Am 31/07/2012 21:21, schrieb Fabio Estevam:
> Define CONFIG_BOARD_LATE_INIT so that the serial console messages can be 
> redirected to the serial port.
> 
> This is needed because in mx53loco.c we have:
> 
> #ifdef CONFIG_BOARD_LATE_INIT
> int board_late_init(void)
> {
>   setenv("stdout", "serial");
> 
>   return 0;
> }
> #endif
> 
> Signed-off-by: Fabio Estevam 
> ---

Hi Fabio,

>  include/configs/mx53loco.h |1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
> 
> diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
> index 0a25c7d..bd23387 100644
> --- a/include/configs/mx53loco.h
> +++ b/include/configs/mx53loco.h
> @@ -41,6 +41,7 @@
>  #define CONFIG_SYS_MALLOC_LEN(10 * 1024 * 1024)
>  
>  #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_BOARD_LATE_INIT

I see, commit eae08eb2b53ffb87f3342e45ab422d8625659fcd dropped it.

Acked-by: Stefano Babic 

Best regards,
Stefano Babic


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Re: [U-Boot] [PATCH 7/7] powerpc/82xx: adapt SDRAM settings for mgcoge3ne

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-8-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> The HW guys suggested to change these two values. And these values are
> now identical to the values we use on mgcoge.
> 
> PSDMR_WRC was set to 1C as it should lead to better performance.
> 
> Signed-off-by: Gerlando Falauto 
> Signed-off-by: Holger Brunck 
> ---
>  include/configs/km82xx.h |6 --
>  1 files changed, 4 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 5/7] powerpc/82xx: add SDRAM detection for km82xx

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-6-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> This patch adds SDRAM detection feature to km82xx boards.
> To enable this feature, define CONFIG_SYS_SDRAM_LIST as the initializer
> for an array of struct sdram_conf_s.
> These structs will expose the bitfields within registers PSDMR and OR1 which
> have to be different between configurations; common bitfields will be
> defined, as usual, within CONFIG_SYS_PSDMR and CONFIG_SYS_OR1.
> If CONFIG_SYS_SDRAM_LIST is not defined, then the usual behavior is retained.
> 
> Signed-off-by: Gerlando Falauto 
> ---
>  board/keymile/km82xx/km82xx.c |   51 +++-
>  1 files changed, 49 insertions(+), 2 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 6/7] powerpc/82xx: use SDRAM detection for mgcoge2ne

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-7-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> mgcoge2ne was an intermediate step towards mgcoge3ne. One difference is the
> smaller SDRAM on mgcoge2ne (128MB). To support both boards with the same
> u-boot we use here the SDRAM detection.
> 
> This patch enables SDRAM detection between 256MB and 128MB.
> So in addition to the existing 256MB geometry:
>  4 chips x 8M (13 rows, 10 cols) x 16 bit x 4 banks
> we can now also have 128MB geometry:
>  4 chips x 4M (13 rows,  9 cols) x 16 bit x 4 banks
> 
> Signed-off-by: Gerlando Falauto 
> ---
>  include/configs/km82xx.h |   17 +
>  1 files changed, 13 insertions(+), 4 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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best way to learn a new language is to *read* every example snippet I
can find, with a reference book close by. Eventually, the *rhythm* of
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Re: [U-Boot] [PATCH 4/7] powerpc/82xx: move km/km82xx-common.h within km82xx.h

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-5-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> The only file including km82xx-common.h is km82xx.h.
> So there is no need to have it as a separate file.
> 
> Signed-off-by: Gerlando Falauto 
> ---
>  include/configs/km/km82xx-common.h |  317 
> 
>  include/configs/km82xx.h   |  290 -
>  2 files changed, 289 insertions(+), 318 deletions(-)
>  delete mode 100644 include/configs/km/km82xx-common.h

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 3/7] powerpc/82xx: merge mgcoge.h and mgcoge3ne.h into km82xx.h

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-4-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> Since mgcoge and mgcoge3ne are the only km82xx boards, there is no need
> to keep them as separate .h config files.
> Therefore, make mgcoge3ne.h and mgcoge.h converge into a single km82xx.h
> file.
> 
> Signed-off-by: Gerlando Falauto 
> ---
>  boards.cfg  |4 +-
>  include/configs/km82xx.h|  149 
> +++
>  include/configs/mgcoge.h|   93 ---
>  include/configs/mgcoge3ne.h |   93 ---
>  4 files changed, 151 insertions(+), 188 deletions(-)
>  create mode 100644 include/configs/km82xx.h
>  delete mode 100644 include/configs/mgcoge.h
>  delete mode 100644 include/configs/mgcoge3ne.h

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 2/7] powerpc/82xx: move mgcoge, mgcoge3ne defines to ease subsequent merge

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-3-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> Signed-off-by: Gerlando Falauto 
> ---
>  include/configs/mgcoge.h|   34 +-
>  include/configs/mgcoge3ne.h |   34 +-
>  2 files changed, 34 insertions(+), 34 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH 1/7] powerpc/82xx: remove unused define for mgcoge3ne

2012-07-31 Thread Wolfgang Denk
Dear Gerlando Falauto,

In message <1343402200-32020-2-git-send-email-gerlando.fala...@keymile.com> you 
wrote:
> From: Holger Brunck 
> 
> Signed-off-by: Holger Brunck 
> ---
>  include/configs/mgcoge3ne.h |3 ---
>  1 files changed, 0 insertions(+), 3 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] SMDK6400: Add MAINTAINERS entry

2012-07-31 Thread Wolfgang Denk
Dear Zhong Hongbo,

In message <1342787305-3083-1-git-send-email-bocui...@gmail.com> you wrote:
> From: Zhong Hongbo 
> 
> Signed-off-by: Zhong Hongbo 
> ---
>  MAINTAINERS |5 -
>  1 files changed, 4 insertions(+), 1 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] lsxl: support power switch

2012-07-31 Thread Michael Walle
Am Dienstag 31 Juli 2012, 13:12:19 schrieb Prafulla Wadaskar:
> > -Original Message-
> > From: Michael Walle [mailto:mich...@walle.cc]
> > Sent: 31 July 2012 16:22
> > To: Prafulla Wadaskar
> > Cc: Michael Walle; u-boot@lists.denx.de
> > Subject: RE: [PATCH] lsxl: support power switch
> > 
> > On Tue, July 31, 2012 07:59, Prafulla Wadaskar wrote:
> > >> -Original Message-
> > >> From: Michael Walle [mailto:mich...@walle.cc]
> > >> Sent: 31 July 2012 02:17
> > >> To: u-boot@lists.denx.de
> > >> Cc: Michael Walle; Prafulla Wadaskar
> > >> Subject: [PATCH] lsxl: support power switch
> > >> 
> > >> This patch restores the Linkstation's original behaviour when
> > 
> > powering
> > 
> > >> off.
> > >> Once the (soft) power switch is turned off, linux will reboot and
> > 
> > the
> > 
> > >> bootloader turns off HDD and USB power. Then it loops as long as
> > 
> > the
> > 
> > >> switch
> > >> is in the off position, before continuing the boot process again.
> > >> 
> > >> Additionally, this patch fixes the board function set_led(LED_OFF).
> > >> 
> > >> Signed-off-by: Michael Walle 
> > >> Cc: Prafulla Wadaskar 
> > >> ---
> > >> 
> > >>  board/buffalo/lsxl/lsxl.c |   22 +-
> > >>  1 files changed, 21 insertions(+), 1 deletions(-)
> > >> 
> > >> diff --git a/board/buffalo/lsxl/lsxl.c b/board/buffalo/lsxl/lsxl.c
> > >> index fe15511..b3f31d6 100644
> > >> --- a/board/buffalo/lsxl/lsxl.c
> > >> +++ b/board/buffalo/lsxl/lsxl.c
> > >> @@ -158,7 +158,7 @@ static void set_led(int state)
> > >> 
> > >>  {
> > >>  
> > >>  switch (state) {
> > >> 
> > >>  case LED_OFF:
> > >> -__set_led(0, 0, 0, 0, 0, 0);
> > >> +__set_led(0, 0, 0, 1, 1, 1);
> > >> 
> > >>  break;
> > >>  
> > >>  case LED_ALARM_ON:
> > >>  __set_led(0, 0, 0, 0, 1, 1);
> > >> 
> > >> @@ -192,6 +192,25 @@ int board_init(void)
> > >> 
> > >>  }
> > >>  
> > >>  #ifdef CONFIG_MISC_INIT_R
> > >> 
> > >> +static void check_power_switch(void)
> > >> +{
> > >> +if (kw_gpio_get_value(GPIO_POWER_SWITCH)) {
> > >> +/* turn off HDD and USB power */
> > >> +kw_gpio_set_value(GPIO_HDD_POWER, 0);
> > >> +kw_gpio_set_value(GPIO_USB_VBUS, 0);
> > >> +set_led(LED_OFF);
> > >> +
> > >> +/* loop until released */
> > >> +while (kw_gpio_get_value(GPIO_POWER_SWITCH))
> > >> +;
> > > 
> > > Please avoid infinite loop, may you introduce timeout?
> > 
> > actually, thats the use case, to loop indefinitely ;) See the commit
> > message. The GPIO is a switch not a button. As long as it is switched
> > to
> > "Power Off" uboot should loop.
> 
> Okay got it.
> Ack for this patch.

ok thanks, can you apply it to your repository?

-- 
michael
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[U-Boot] multiple definition of `reloc_dst'

2012-07-31 Thread Sabri Altunbas


Hello,

i get this link error if i build u-boot
...
...
...
&& sh4-unknown-linux-uclibc-ld  -e 0x8FF0 --defsym reloc_dst=0x8FF0
-T u-boot.lds --gc-sections -Bstatic -Ttext 0x8FF0 $UNDEF_SYM
arch/sh/cpu/sh4/start.o --start-group BR/BR_libsh4.a api/libapi.o
arch/sh/cpu/sh4/libsh4.o arch/sh/lib/libsh.o common/libcommon.o
disk/libdisk.o drivers/bios_emulator/libatibiosemu.o
drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o
drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o
drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o
drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o
drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o
drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o
drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o
drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o
drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.a
drivers/usb/gadget/libusb_gadget.o drivers/usb/host/libusb_host.o
drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o
drivers/video/libvideo.o drivers/watchdog/libwatchdog.o
fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o
fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o
fs/yaffs2/libyaffs2.o lib/libfdt/libfdt.o lib/libgeneric.o
lib/lzma/liblzma.o lib/lzo/liblzo.o net/libnet.o post/libpost.o
board/renesas/sh7785lcr/libsh7785lcr.o --end-group -L
/usr/sh-linux/usr/lib/gcc/sh4-unknown-linux-uclibc/4.5.3 -lgcc -Map
u-boot.map -o u-boot
arch/sh/cpu/sh4/libsh4.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
arch/sh/lib/libsh.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
common/libcommon.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
disk/libdisk.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/net/libnet.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/pci/libpci.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/pcmcia/libpcmcia.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/rtc/librtc.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/serial/libserial.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
fs/fat/libfat.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
lib/libgeneric.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
net/libnet.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
board/renesas/sh7785lcr/libsh7785lcr.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
make: *** [u-boot] Error 1
lmde boot #

every hint appreciated

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[U-Boot] multiple definition of `reloc_dst'

2012-07-31 Thread Sabri Altunbas

Hello,

i get this link error if i build u-boot
...
...
...
&& sh4-unknown-linux-uclibc-ld  -e 0x8FF0 --defsym reloc_dst=0x8FF0
-T u-boot.lds --gc-sections -Bstatic -Ttext 0x8FF0 $UNDEF_SYM
arch/sh/cpu/sh4/start.o --start-group BR/BR_libsh4.a api/libapi.o
arch/sh/cpu/sh4/libsh4.o arch/sh/lib/libsh.o common/libcommon.o
disk/libdisk.o drivers/bios_emulator/libatibiosemu.o
drivers/block/libblock.o drivers/dma/libdma.o drivers/fpga/libfpga.o
drivers/gpio/libgpio.o drivers/hwmon/libhwmon.o drivers/i2c/libi2c.o
drivers/input/libinput.o drivers/misc/libmisc.o drivers/mmc/libmmc.o
drivers/mtd/libmtd.o drivers/mtd/nand/libnand.o
drivers/mtd/onenand/libonenand.o drivers/mtd/spi/libspi_flash.o
drivers/mtd/ubi/libubi.o drivers/net/libnet.o drivers/net/phy/libphy.o
drivers/pci/libpci.o drivers/pcmcia/libpcmcia.o drivers/power/libpower.o
drivers/rtc/librtc.o drivers/serial/libserial.o drivers/spi/libspi.o
drivers/twserial/libtws.o drivers/usb/eth/libusb_eth.a
drivers/usb/gadget/libusb_gadget.o drivers/usb/host/libusb_host.o
drivers/usb/musb/libusb_musb.o drivers/usb/phy/libusb_phy.o
drivers/video/libvideo.o drivers/watchdog/libwatchdog.o
fs/cramfs/libcramfs.o fs/ext2/libext2fs.o fs/fat/libfat.o fs/fdos/libfdos.o
fs/jffs2/libjffs2.o fs/reiserfs/libreiserfs.o fs/ubifs/libubifs.o
fs/yaffs2/libyaffs2.o lib/libfdt/libfdt.o lib/libgeneric.o
lib/lzma/liblzma.o lib/lzo/liblzo.o net/libnet.o post/libpost.o
board/renesas/sh7785lcr/libsh7785lcr.o --end-group -L
/usr/sh-linux/usr/lib/gcc/sh4-unknown-linux-uclibc/4.5.3 -lgcc -Map
u-boot.map -o u-boot
arch/sh/cpu/sh4/libsh4.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
arch/sh/lib/libsh.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
common/libcommon.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
disk/libdisk.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/net/libnet.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/pci/libpci.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/pcmcia/libpcmcia.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/rtc/librtc.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
drivers/serial/libserial.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
fs/fat/libfat.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
lib/libgeneric.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
net/libnet.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
board/renesas/sh7785lcr/libsh7785lcr.o: In function `reloc_dst':
(*ABS*+0x8ff0): multiple definition of `reloc_dst'
make: *** [u-boot] Error 1
lmde boot #

every hint appreciated


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Re: [U-Boot] [i2c] Pull request

2012-07-31 Thread Wolfgang Denk
Dear Heiko Schocher,

In message <5017901a.2060...@denx.de> you wrote:
> Hello Wolfgang,
> 
> The following changes since commit b98b611502f5e0a85a1f8e15cf46c470cb105614:
> 
>Merge branch 'next' of git://git.denx.de/u-boot (2012-07-30 20:39:52 +0200)
> 
> are available in the git repository at:
> 
>git://git.denx.de/u-boot-i2c.git master
> 
> Holger Brunck (2):
>i2c: deblock i2c bus also if accessed before realocation
>km/common: remove printfs for i2c deblocking code
> 
> Rajeshwari Shinde (8):
>EXYNOS: CLK: Add i2c clock
>EXYNOS: Add I2C base address.
>EXYNOS5: define EXYNOS5_I2C_SPACING
>EXYNOS: PINMUX: Add pinmux support for I2C
>I2C: Move struct s3c24x0_i2c to a common place.
>I2C: Modify the I2C driver for EXYNOS5
>I2C: Add support for Multi channel
>CONFIG: SMDK5250: I2C: Enable I2C
> 
> Troy Kisky (25):
>mxc_i2c: fix i2c_imx_stop
>mxc_i2c: remove ifdef of CONFIG_HARD_I2C
>mxc_i2c: create tx_byte function
>mxc_i2c: clear i2sr before waiting for bit
>mxc_i2c: create i2c_init_transfer
>mxc_i2c: call i2c_imx_stop on error in i2c_read/i2c_write
>mxc_i2c.c: code i2c_probe as a 0 length i2c_write
>mxc_i2c: combine i2c_imx_bus_busy and i2c_imx_trx_complete into 
> wait_for_sr_state
>mxc_i2c: remove redundant read
>mxc_i2c: place imx_start code inline
>mxc_i2c: place i2c_reset code inline
>mxc_i2c: don't disable controller after every transaction
>mxc_i2c: change slave addr if conflicts with destination.
>mxc_i2c: check for arbitration lost
>mxc_i2c: add retries
>mxc_i2c: add i2c_regs argument to i2c_imx_stop
>mxc_i2c: prep work for multiple busses support
>mxc_i2c: add bus recovery support
>mxc_i2c: finish adding CONFIG_I2C_MULTI_BUS support
>iomux-v3: remove include of mx6x_pins.h
>i.mx: iomux-v3.h: move to imx-common include directory
>i.mx: iomux-v3.c: move to imx-common directory
>i.mx53: add definition for I2C3_BASE_ADDR
>imx-common: add i2c.c for bus recovery support
>mx6qsabrelite: add i2c multi-bus support
> 
>   arch/arm/cpu/armv7/exynos/clock.c  |   33 ++
>   arch/arm/cpu/armv7/exynos/pinmux.c |   52 +++
>   arch/arm/cpu/armv7/imx-common/Makefile |4 +-
>   arch/arm/cpu/armv7/imx-common/i2c.c|   99 
>   arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c  |3 +-
>   arch/arm/cpu/armv7/mx5/clock.c |   20 +
>   arch/arm/cpu/armv7/mx6/Makefile|2 +-
>   arch/arm/cpu/armv7/mx6/clock.c |   20 +
>   arch/arm/include/asm/arch-exynos/clk.h |1 +
>   arch/arm/include/asm/arch-exynos/cpu.h |5 +
>   arch/arm/include/asm/arch-exynos/periph.h  |8 +
>   arch/arm/include/asm/arch-mx5/clock.h  |1 +
>   arch/arm/include/asm/arch-mx5/imx-regs.h   |1 +
>   arch/arm/include/asm/arch-mx6/clock.h  |1 +
>   arch/arm/include/asm/arch-mx6/mx6x_pins.h  |2 +-
>   arch/arm/include/asm/arch-s3c24x0/s3c24x0.h|   10 -
>   .../asm/{arch-mx6 => imx-common}/iomux-v3.h|0
>   arch/arm/include/asm/imx-common/mxc_i2c.h  |   42 ++
>   board/freescale/mx6qarm2/mx6qarm2.c|2 +-
>   board/freescale/mx6qsabrelite/mx6qsabrelite.c  |   54 ++-
>   board/keymile/common/common.c  |3 -
>   board/samsung/smdk5250/smdk5250.c  |   30 ++-
>   common/cmd_i2c.c   |1 +
>   drivers/i2c/mxc_i2c.c  |  477 
> +++-
>   drivers/i2c/s3c24x0_i2c.c  |  221 ++
>   drivers/i2c/s3c24x0_i2c.h  |   33 ++
>   drivers/usb/host/ehci-mx6.c|2 +-
>   include/configs/mx6qsabrelite.h|6 +-
>   include/configs/smdk5250.h |   10 +
>   29 files changed, 822 insertions(+), 321 deletions(-)
>   create mode 100644 arch/arm/cpu/armv7/imx-common/i2c.c
>   rename arch/arm/cpu/armv7/{mx6 => imx-common}/iomux-v3.c (97%)
>   rename arch/arm/include/asm/{arch-mx6 => imx-common}/iomux-v3.h (100%)
>   create mode 100644 arch/arm/include/asm/imx-common/mxc_i2c.h
>   create mode 100644 drivers/i2c/s3c24x0_i2c.h

Applied, thanks.

Best regards,

Wolfgang Denk

-- 
DENX Software Engineering GmbH, MD: Wolfgang Denk & Detlev Zundel
HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany
Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] Pull request - microblaze

2012-07-31 Thread Wolfgang Denk
Dear Michal Simek,

In message <50176ca2.6000...@monstr.eu> you wrote:
> 
> Please pull these patches to your repository. There will be one simple merge 
> conflict
> around SPI makefile which is easy to resolve.

Maybe it's easy for you - to me it was extra effort.  And I don;t even
know if I did it right.  Please validate!

Next time please fix such issues yourself, and send clean, working
pull requests.  Thanks.

>u-b...@lakedaemon.net (1):
>  ext2load: increase read speed
> 
> are available in the git repository at:
> 
>git://www.denx.de/git/u-boot-microblaze.git master
> 
> Michal Simek (6):
>microblaze: Add gpio.h
>microblaze: Move individual board linker scripts to common script in 
> cpu tree.
>microblaze: Remove extern from board.c
>microblaze: Move __udelay implementation
>microblaze: Call serial multi initialization
>microblaze: intc: Clear interrupt code
> 
> Stephan Linz (9):
>microblaze: Remove wrong define CONFIG_SYS_FLASH_PROTECTION
>microblaze: Avoid compile error on systems without cfi flash
>microblaze: Enable ubi support
>microblaze: Expand and correct configuration comments
>microblaze: Add missing undefs for UBI and UBIFS
>fdt: Add board specific dts inclusion
>microblaze: Wire up dts configuration
>spi: microblaze: Adds driver for Xilinx SPI controller
>microblaze: Wire up SPI driver
> 
>   arch/microblaze/config.mk  |2 +
>   arch/microblaze/cpu/interrupts.c   |   88 +
>   arch/microblaze/cpu/start.S|2 -
>   arch/microblaze/cpu/timer.c|   21 ++-
>   .../microblaze/cpu}/u-boot.lds |0
>   arch/microblaze/include/asm/gpio.h |   41 
>   arch/microblaze/include/asm/microblaze_intc.h  |3 +
>   arch/microblaze/lib/Makefile   |1 -
>   arch/microblaze/lib/board.c|   15 +-
>   arch/microblaze/lib/time.c |   42 
>   board/xilinx/dts/microblaze.dts|1 +
>   board/xilinx/microblaze-generic/dts/microblaze.dts |7 +
>   drivers/spi/Makefile   |1 +
>   drivers/spi/xilinx_spi.c   |  214 
> 
>   drivers/spi/xilinx_spi.h   |  135 
>   dts/Makefile   |3 +-
>   include/configs/microblaze-generic.h   |  129 ++--
>   17 files changed, 594 insertions(+), 111 deletions(-)
>   rename {board/xilinx/microblaze-generic => arch/microblaze/cpu}/u-boot.lds 
> (100%)
>   create mode 100644 arch/microblaze/include/asm/gpio.h
>   create mode 100644 board/xilinx/dts/microblaze.dts
>   create mode 100644 board/xilinx/microblaze-generic/dts/microblaze.dts
>   create mode 100644 drivers/spi/xilinx_spi.c
>   create mode 100644 drivers/spi/xilinx_spi.h

Applied, thanks.

Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH v2 2/5] ehci-hcd: Boost transfer speed

2012-07-31 Thread Stefan Herbrechtsmeier

Dear Benoît

Am 29.07.2012 02:48, schrieb Benoît Thébaudeau:

Sorry for the delay. I'm very busy, and there is much to tell on this topic.

No problem. Hopefully I don't make you to much extra trouble.


BTW, the 15x speed gain that I gave in my patch description was
compared to an
older version of the original code that used 20 blocks per transfer
in
usb_storage.c. This is now 40 blocks per transfer with a
page-aligned buffer, so
the speed gain compared to the current code should be rather about
7x. I should
update that.

I'm sure that there is a significant speed gain but you shouldn't
miss
the heap usage as the main CONFIG_SYS_MALLOC_LEN is 128kB.

I have checked all the config files. Among those using EHCI, most have a heap
size >= 1 MiB. The only exceptions are:

-
| Heap Size |  Board   |  RAM Size  |
|---|
|   512 kiB | MERGERBOX|   > 10 MiB |
|   | MPC8315ERDB  |128 MiB |
|   | MVBLM7   |512 MiB |
|---|
|   256 kiB | MPC8349ITX   |256 MiB |
|   | omap4_panda  |  1 GiB |
|---|
|   128 kiB | adp-ag102|256 MiB |
|   | at91sam9m10g45ek |128 MiB |
|   | edminiv2 | 64 MiB |
|   | M52277EVB| 64 MiB |
|   | omap3_beagle | >= 128 MiB |
-

As you can see, these small heap sizes are not linked to any hardware
constraint, but only to the lack of need to have larger heaps, so they could be
easily enlarged if needed. But even 128 kiB should be enough for common usage.

You are right.



Maybe you should also add a worst case heap usage and I'm not sure,
if
your calculation are right, as the size of struct qTD is allays 32B
and
thereby I get 50kB or 64kB.

>From ehci.h:
struct qTD {
/* this part defined by EHCI spec */
uint32_t qt_next;   /* see EHCI 3.5.1 */
#define QT_NEXT_TERMINATE   1
uint32_t qt_altnext;/* see EHCI 3.5.2 */
uint32_t qt_token;  /* see EHCI 3.5.3 */
uint32_t qt_buffer[5];  /* see EHCI 3.5.4 */
uint32_t qt_buffer_hi[5];   /* Appendix B */
/* pad struct for 32 byte alignment */
uint32_t unused[3];
};

So sizeof(struct qTD) is 16 * 32 bits = 64 bytes. For the worst alignment case,
the number of qTDs to allocate for 65535 blocks of 512 bytes (worst MSC case
with 512-byte sectors) is DIV_ROUND_UP(65535 * 512, 4 * 4096) = 2048 qTDs, i.e.
128 kiB. For the same transfer size with the best alignment case, it is
DIV_ROUND_UP(65535 * 512, 5 * 4096) = 1639 qTDs, i.e. 104896 B.

Sorry, you are right. I had missed the arrays.

Regards,
Stefan

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Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread Wolfgang Denk
Dear Fabio Estevam,

In message <1343762513-5574-1-git-send-email-fabio.este...@freescale.com> you 
wrote:
> Define CONFIG_BOARD_LATE_INIT so that the serial console messages can be 
> redirected to the serial port.
> 
> This is needed because in mx53loco.c we have:
> 
> #ifdef CONFIG_BOARD_LATE_INIT
> int board_late_init(void)
> {
>   setenv("stdout", "serial");
> 
>   return 0;
> }
> #endif

Why would that beneeded?  And why must it be done mandatorily, without
a chance for the user to configure different behaviour?

Please feel fre to define defualt settings, but please always give the
user an option to select different behaviour.  This is what the
environment variables are made for - if we would always sent them
mandatorily in the code, we would nbot need any representation in the
environment.

Best regards,

Wolfgang Denk

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Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread Wolfgang Denk
Dear Fabio Estevam,

In message  
you wrote:
...
> 
> -#ifdef CONFIG_BOARD_LATE_INIT
>  int board_late_init(void)
>  {
> - setenv("stdout", "serial");
> + setenv("preboot", "setenv stdout serial\0");

NAK.  Please never, never ever mandatorily overwrite environment
variables!  The user who sets it to a different value and cannot find
out why his settings don;t work and always get overwritten would be
seriously frustrated.

Best regards,

Wolfgang Denk

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Re: [U-Boot] Pull request u-boot-blackfin.git (sf branch)

2012-07-31 Thread Wolfgang Denk
Dear Mike Frysinger,

In message <1343746406-27916-1-git-send-email-vap...@gentoo.org> you wrote:
> The following changes since commit b98b611502f5e0a85a1f8e15cf46c470cb105614:
> 
>   Merge branch 'next' of git://git.denx.de/u-boot (2012-07-30 20:39:52 +0200)
> 
> are available in the git repository at:
> 
> 
>   git://www.denx.de/git/u-boot-blackfin.git sf
> 
> for you to fetch changes up to b54d1f26ff216ef08307b7652647cc92124c2be1:
> 
>   sf: stmicro: add geometrical info for N25Q256 from Micron (2012-04-08 
> 10:55:55 +)
> 
> 
> Gerlando Falauto (1):
>   cmd_sf: add size checking to spi flash commands
> 
> Jérôme Carretero (1):
>   sf: stmicro: add geometrical info for N25Q256 from Micron
> 
> Mike Frysinger (5):
>   sf: inline data constants
>   sf: unify erase commands
>   sf: eon: drop duplicate id
>   sf: sst: inline duplicate write enable helper funcs
>   sf: unify status register writing (and thus block unlocking)
> 
>  common/cmd_sf.c  |   14 ++
>  drivers/mtd/spi/eon.c|   35 ++-
>  drivers/mtd/spi/macronix.c   |   82 
> ++
>  drivers/mtd/spi/spansion.c   |   24 ++
>  drivers/mtd/spi/spi_flash.c  |   35 +--
>  drivers/mtd/spi/spi_flash_internal.h |   10 -
>  drivers/mtd/spi/sst.c|   66 +++
>  drivers/mtd/spi/stmicro.c|   28 
>  drivers/mtd/spi/winbond.c|   55 ++-
>  9 files changed, 85 insertions(+), 264 deletions(-)

Applied, thanks.

Best regards,

Wolfgang Denk

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users  tend  to  create  numerous  files  using large amounts of file
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Re: [U-Boot] early_malloc outline

2012-07-31 Thread Wolfgang Denk
Dear Tomas Hlavacek,

In message  
you wrote:
> 
> Can/should we use some existing mechanism? Or would it be considered a
> viable option to choose different beginning address for early heap,
> use it (in architecture-specific way) and keep the pointer to the
> beginning in GD. Then copy the early heap to memory before caches are
> flushed and in case of DM copy again data from early heap to new
> destinations that has been obtained through malloc() when it is
> initialized?

It is difficult (or actually impossible) to answer this, if you do not
explain which concept you are talking about here, or why two copy
operations would be needed, what "in case of DM" means (and which
other cases exist), or how you intend to handle the problem of
changing addresses (and thus pointers becoming incorrect) for each of
such copy operations.

Best regards,

Wolfgang Denk

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Phone: (+49)-8142-66989-10 Fax: (+49)-8142-66989-80 Email: w...@denx.de
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Re: [U-Boot] [PATCH v2 2/5] ehci-hcd: Boost transfer speed

2012-07-31 Thread Stefan Herbrechtsmeier

Am 31.07.2012 03:06, schrieb Benoît Thébaudeau:

Dear Marek Vasut,

On Tue, Jul 31, 2012 at 12:38:54 AM, Marek Vasut wrote:

[...]


Can you explain where this gain would come from? In both cases,
the
data in USB
transfers would be organized in the same way, and it would be
accessed in memory
also in the same way (regarding bursts). The only difference
would
be the fetch
time of a little bit more qTDs, which is extremely fast and
insignificant
compared to the transfer time of the payload, which remains
unchanged.

You are right, the speed different will be minimal, only the
memory
usage will be lower.

If your point is only the memory gain, I agree. With your
suggestion, there
are roughly 25% less qTDs used in the "(max wMaxPacketSize)-aligned
but
not page-aligned" case since the number of qTDs is about (total
transfer
size) / 5 instead of (total transfer size) / 4. But this is still
small
compared to usual heap sizes (at least on the kind of hardware I
use).

Ok, I see the point. I understand it's not really a bug, just an
improvement.

Exactly.


Maybe we can do a subsequent patch on top of these from Benoit and
see how it
fares?

If you wish. I'll do that.


Moreover, in your use case, if you are e.g. using FAT, on the
one
hand, the
buffers in fat.c are never aligned to more than the DMA min
alignment, and on
the other hand, if you can align your user buffers to 512
bytes,
you can also
align them directly to 4 kB.

The user buffer is aligned to 4kB, but this doesn't matter as a
file
load from a storage device (ex. fatload) can be segmented in
partial
USB
transfers. This can lead to any block aligned buffer for a
partial
transfer.

What do you mean by "partial USB transfers"? As seen from EHCI
users like
the MSC driver (usb_storage.c), USB transfers either succeed or
fail, but
they cannot be "segmented".

Segmented -- like multiple transfers being issues with small payload?

Right.

You can
not put these together at the USB-level, since it's the issuing code
that has to
be fixed.
If the segmentation comes from the file system handling we can not avoid 
this.



On its side, the MSC driver will only segment the FAT layer
requests if
they are larger than 65535 blocks, so still not what you describe.

As to the FAT stack, it will only read whole clusters while
accessing file
payload, and the most usual cluster sizes are by default a multiple
of 4
kiB (see http://support.microsoft.com/kb/140365).

512b is minimum and it's quite often used.

OK.
In my example I use a FAT partition with 128 MB and 1 KB clusters. The 
file is read in two segments in which the first transfer starts 4 kB 
aligned but stops 1 kB aligned but not 4 kB aligned and leads to 
unaligned second transfer.

So I don't see "segmentation" anywhere, and for usual cluster
sizes, the
EHCI buffer alignment is fully determined by the applicative buffer
alignment and the file position corresponding to the beginning of
the
applicative buffer. But there are indeed some unusual use cases
(e.g.
smaller clusters) for which only a block-aligned buffer will reach
EHCI
despite a page-aligned applicative buffer.

I don't quite get this one.

I meant that 512 bytes (most usual storage block size) is what we should aim at
to optimize the number of qTDs.

Right.



My suggestion would be to truncate the xfr_bytes with the max
wMaxPacketSize (1024) and for the qtd_count use:

if ((uint32_t)buffer & 1023)/* wMaxPacketSize unaligned */

   qtd_count += DIV_ROUND_UP(((uint32_t)buffer & 4095) +
   
   length, (QT_BUFFER_CNT - 1) * 4096);


else/* wMaxPacketSize aligned */

   qtd_count += DIV_ROUND_UP(((uint32_t)buffer & 4095) +
   
   length, QT_BUFFER_CNT * 4096);


This allows 50% of unaligned block data (512) to be
transferred
with
min
qTDs.

That would also require a realignment-to-page stage. This is
specific code for
specific buffer alignment from the upper layers. We could also
skip
the
realignment to page and always keep the same qTD transfer size
except for the
last one, by adding as many packets as possible for the buffer
alignment.

What you mean by realignment-to-page stage?

I mean that the alignment of the transfer to 1024 instead of 4096
can make
the first qTD transfer larger than the following ones, which
guarantees
that the following qTD transfers are page-aligned, even if the
first one
was only aligned to 1024. For the 1024-aligned case, this results
in the
change that you suggest, but it also changes things for the
unaligned
case, which makes this part of the code inaccurate. See below.
You are right. It maximise the first transfer. All other transfers are 5 
* 4 KB (aligned) or 4 * 4 KB (unaligned) long.

But I still don't see a significant reason to complicate code
to do
that.

I don't understand where you expect to complicate the code.

You limit the size of one transfer (xfr_bytes) to (QT_BUFFER_CNT
- 1)
*
4kB for unaligned buffers. But you only need to limit it to a
multiple
of t

Re: [U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread Fabio Estevam
On Tue, Jul 31, 2012 at 4:21 PM, Fabio Estevam
 wrote:
> Define CONFIG_BOARD_LATE_INIT so that the serial console messages can be 
> redirected to the serial port.
>
> This is needed because in mx53loco.c we have:
>
> #ifdef CONFIG_BOARD_LATE_INIT
> int board_late_init(void)
> {
> setenv("stdout", "serial");
>
> return 0;
> }
> #endif
>
> Signed-off-by: Fabio Estevam 
> ---
>  include/configs/mx53loco.h |1 +
>  1 files changed, 1 insertions(+), 0 deletions(-)
>
> diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
> index 0a25c7d..bd23387 100644
> --- a/include/configs/mx53loco.h
> +++ b/include/configs/mx53loco.h
> @@ -41,6 +41,7 @@
>  #define CONFIG_SYS_MALLOC_LEN  (10 * 1024 * 1024)
>
>  #define CONFIG_BOARD_EARLY_INIT_F
> +#define CONFIG_BOARD_LATE_INIT
>  #define CONFIG_MXC_GPIO
>  #define CONFIG_REVISION_TAG

Or maybe this is a better approach?

diff --git a/board/freescale/mx53loco/mx53loco.c
b/board/freescale/mx53loco/mx53loco.c
index cbdcfad..4176d46 100644
--- a/board/freescale/mx53loco/mx53loco.c
+++ b/board/freescale/mx53loco/mx53loco.c
@@ -495,14 +495,12 @@ int print_cpuinfo(void)
return 0;
 }

-#ifdef CONFIG_BOARD_LATE_INIT
 int board_late_init(void)
 {
-   setenv("stdout", "serial");
+   setenv("preboot", "setenv stdout serial\0");

return 0;
 }
-#endif

 int board_init(void)
 {
-- 
1.7.1
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Re: [U-Boot] mx53loco hangs on 2012.07

2012-07-31 Thread Fabio Estevam
On Tue, Jul 31, 2012 at 3:52 PM, Robert Nelson  wrote:
> On Tue, Jul 31, 2012 at 1:25 PM, Fabio Estevam  wrote:
>> Hi,
>>
>> Just tried 2012.07 on a mx53loco and this is what I got:
>>
>> U-Boot 2012.07 (Jul 31 2012 - 15:21:51)
>>
>> Board: MX53 LOCO
>> I2C:   ready
>> DRAM:  1 GiB
>> WARNING: Caches not enabled
>> CPU:   Freescale i.MX53 family rev2.0 at 1000 MHz
>> Reset cause: POR
>> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>>
>> (Hangs here)
>>
>> Have anyone else seen this? I will start debugging it, and any
>> suggestions are welcome.
>
> It's actually not hanging up, if you have a boot script, it seems to
> runs that just fine, but it will not print it to the serial terminal..
>
> This would seem to redirect the prompt the lcd?

Yes, just realized that a "#define CONFIG_BOARD_LATE_INIT" is missing.

Will send a patch for fixing this.

Regards,

Fabio Estevam
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[U-Boot] [PATCH] mx53loco: Define CONFIG_BOARD_LATE_INIT

2012-07-31 Thread Fabio Estevam
Define CONFIG_BOARD_LATE_INIT so that the serial console messages can be 
redirected to the serial port.

This is needed because in mx53loco.c we have:

#ifdef CONFIG_BOARD_LATE_INIT
int board_late_init(void)
{
setenv("stdout", "serial");

return 0;
}
#endif

Signed-off-by: Fabio Estevam 
---
 include/configs/mx53loco.h |1 +
 1 files changed, 1 insertions(+), 0 deletions(-)

diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 0a25c7d..bd23387 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -41,6 +41,7 @@
 #define CONFIG_SYS_MALLOC_LEN  (10 * 1024 * 1024)
 
 #define CONFIG_BOARD_EARLY_INIT_F
+#define CONFIG_BOARD_LATE_INIT
 #define CONFIG_MXC_GPIO
 #define CONFIG_REVISION_TAG
 
-- 
1.7.1


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[U-Boot] [PATCH 11/11] snowball: Adding board specific cache cleanup routine

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Following ARM's reference manuel for initializing the cache - the
kernel won't boot otherwise.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/cpu.c |   26 ++
 1 files changed, 26 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 02bb332..6f95c30 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -36,6 +36,14 @@
 #define CPUID_DB8500V2 0x412fc091
 #define ASICID_DB8500V11   0x008500A1
 
+#define CACHE_CONTR_BASE   0xA0412000
+/* Cache controller register offsets
+ * as found in ARM's technical reference manual
+ */
+#define CACHE_INVAL_BY_WAY (CACHE_CONTR_BASE + 0x77C)
+#define CACHE_LOCKDOWN_BY_D(CACHE_CONTR_BASE + 0X900)
+#define CACHE_LOCKDOWN_BY_I(CACHE_CONTR_BASE + 0X904)
+
 static unsigned int read_asicid(void);
 
 static inline unsigned int read_cpuid(void)
@@ -73,6 +81,24 @@ static unsigned int read_asicid(void)
return readl(address);
 }
 
+void cpu_cache_initialization(void)
+{
+   unsigned int value;
+   /* invalidate all cache entries */
+   writel(0x, CACHE_INVAL_BY_WAY);
+
+   /* ways are set to '0' when they are totally
+* cleaned and invalidated
+*/
+   do {
+   value = readl(CACHE_INVAL_BY_WAY);
+   } while (value & 0xFF);
+
+   /* Invalidate register 9 D and I lockdown */
+   writel(0xFF, CACHE_LOCKDOWN_BY_D);
+   writel(0xFF, CACHE_LOCKDOWN_BY_I);
+}
+
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
  * SOC specific cpu init
-- 
1.7.5.4

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[U-Boot] [PATCH 09/11] u8500: Separating mmc config parameters from driver

2012-07-31 Thread mathieu . poirier
From: John Rigby 

Configuration in vexpress and u8500.v1 is different from what
is needed in u8500.v2.  As such, card configuration specifics need
to reside in the board file rather than the driver.

Signed-off-by: John Rigby 
Signed-off-by: Mathieu Poirier 
---
 board/armltd/vexpress/ca9x4_ct_vxp.c  |   21 +-
 board/st-ericsson/snowball/snowball.c |   92 ++-
 board/st-ericsson/u8500/u8500_href.c  |   22 +-
 drivers/mmc/arm_pl180_mmci.c  |  132 +
 drivers/mmc/arm_pl180_mmci.h  |   27 ++-
 include/configs/snowball.h|8 ++
 6 files changed, 214 insertions(+), 88 deletions(-)

diff --git a/board/armltd/vexpress/ca9x4_ct_vxp.c 
b/board/armltd/vexpress/ca9x4_ct_vxp.c
index 0b36d12..d5e109e 100644
--- a/board/armltd/vexpress/ca9x4_ct_vxp.c
+++ b/board/armltd/vexpress/ca9x4_ct_vxp.c
@@ -33,6 +33,8 @@
  * MA 02111-1307 USA
  */
 #include 
+#include 
+#include 
 #include 
 #include 
 #include 
@@ -90,8 +92,25 @@ int board_eth_init(bd_t *bis)
 int cpu_mmc_init(bd_t *bis)
 {
int rc = 0;
+   (void) bis;
 #ifdef CONFIG_ARM_PL180_MMCI
-   rc = arm_pl180_mmci_init();
+   struct pl180_mmc_host *host;
+
+   host = malloc(sizeof(struct pl180_mmc_host));
+   if (!host)
+   return -ENOMEM;
+   memset(host, 0, sizeof(*host));
+
+   strcpy(host->name, "MMC");
+   host->base = (struct sdi_registers *)CONFIG_ARM_PL180_MMCI_BASE;
+   host->pwr_init = INIT_PWR;
+   host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V1 | SDI_CLKCR_CLKEN;
+   host->voltages = VOLTAGE_WINDOW_MMC;
+   host->caps = 0;
+   host->clock_in = ARM_MCLK;
+   host->clock_min = ARM_MCLK / (2 * (SDI_CLKCR_CLKDIV_INIT_V1 + 1));
+   host->clock_max = CONFIG_ARM_PL180_MMCI_CLOCK_FREQ;
+   rc = arm_pl180_mmci_init(host);
 #endif
return rc;
 }
diff --git a/board/st-ericsson/snowball/snowball.c 
b/board/st-ericsson/snowball/snowball.c
index 32c343f..7a52de6 100644
--- a/board/st-ericsson/snowball/snowball.c
+++ b/board/st-ericsson/snowball/snowball.c
@@ -29,6 +29,9 @@
 #include 
 #include 
 
+#ifdef CONFIG_MMC
+#include "../../../drivers/mmc/arm_pl180_mmci.h"
+#endif
 #include "db8500_pins.h"
 
 /*
@@ -269,9 +272,96 @@ int board_late_init(void)
if ((raise_ab8500_gpio16() < 0))
printf("error: cant' raise GPIO16\n");
 
+   return 0;
+}
+
 #ifdef CONFIG_MMC
+/*
+ * emmc_host_init - initialize the emmc controller.
+ * Configure GPIO settings, set initial clock and power for emmc slot.
+ * Initialize mmc struct and register with mmc framework.
+ */
+static int emmc_host_init(void)
+{
+   struct pl180_mmc_host *host;
+
+   host = malloc(sizeof(struct pl180_mmc_host));
+   if (!host)
+   return -ENOMEM;
+   memset(host, 0, sizeof(*host));
+
+   host->base = (struct sdi_registers *)CFG_EMMC_BASE;
+   host->pwr_init = SDI_PWR_OPD | SDI_PWR_PWRCTRL_ON;
+   host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
+SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
+   strcpy(host->name, "EMMC");
+   host->caps = MMC_MODE_8BIT | MMC_MODE_HS | MMC_MODE_HS_52MHz;
+   host->voltages = VOLTAGE_WINDOW_MMC;
+   host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
+   host->clock_max = ARM_MCLK / 2;
+   host->clock_in = ARM_MCLK;
+   host->version2 = 1;
+
+   return arm_pl180_mmci_init(host);
+}
+
+/*
+ * mmc_host_init - initialize the external mmc controller.
+ * Configure GPIO settings, set initial clock and power for mmc slot.
+ * Initialize mmc struct and register with mmc framework.
+ */
+static int mmc_host_init(void)
+{
+   struct pl180_mmc_host *host;
+   u32 sdi_u32;
+
+   host = malloc(sizeof(struct pl180_mmc_host));
+   if (!host)
+   return -ENOMEM;
+   memset(host, 0, sizeof(*host));
+
+   host->base = (struct sdi_registers *)CFG_MMC_BASE;
+   sdi_u32 = 0xBF;
+   writel(sdi_u32, &host->base->power);
+   host->pwr_init = 0xBF;
+   host->clkdiv_init = SDI_CLKCR_CLKDIV_INIT_V2 |
+SDI_CLKCR_CLKEN | SDI_CLKCR_HWFC_EN;
+   strcpy(host->name, "MMC");
+   host->caps = MMC_MODE_8BIT;
+   host->b_max = 0;
+   host->voltages = VOLTAGE_WINDOW_SD;
+   host->clock_min = ARM_MCLK / (2 + SDI_CLKCR_CLKDIV_INIT_V2);
+   host->clock_max = ARM_MCLK / 2;
+   host->clock_in = ARM_MCLK;
+   host->version2 = 1;
+
+   return arm_pl180_mmci_init(host);
+}
+
+/*
+ * board_mmc_init - initialize all the mmc/sd host controllers.
+ * Called by generic mmc framework.
+ */
+int board_mmc_init(bd_t *bis)
+{
+   int error;
+
+   (void) bis;
+
+   error = emmc_host_init();
+   if (error) {
+   printf("emmc_host_init() %d\n", error);
+   return -1;
+   }
+
u8500_mmc_power_init();
-#endif /* CONFIG_MMC */
+
+   error = mmc_host_init();
+   if (e

[U-Boot] [PATCH 06/11] snowball: applying power to LAN and GBF controllers

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

LAN and GBF need to be powered explicitely, doing so with
interface to AB8500 companion chip.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/include/asm/arch-u8500/hardware.h |   11 +++-
 arch/arm/include/asm/arch-u8500/prcmu.h|7 ++-
 board/st-ericsson/snowball/snowball.c  |   87 
 include/configs/snowball.h |1 +
 4 files changed, 103 insertions(+), 3 deletions(-)

diff --git a/arch/arm/include/asm/arch-u8500/hardware.h 
b/arch/arm/include/asm/arch-u8500/hardware.h
index 9208880..8044ac3 100644
--- a/arch/arm/include/asm/arch-u8500/hardware.h
+++ b/arch/arm/include/asm/arch-u8500/hardware.h
@@ -62,7 +62,7 @@
 
 /* Per4 */
 #define U8500_PRCMU_BASE   (U8500_PER4_BASE + 0x07000)
-#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x06800)
+#define U8500_PRCMU_TCDM_BASE   (U8500_PER4_BASE + 0x68000)
 
 /* Per3 */
 #define U8500_UART2_BASE   (U8500_PER3_BASE + 0x7000)
@@ -80,4 +80,13 @@
 #define U8500_BOOTROM_BASE  0x9001f000
 #define U8500_BOOTROM_ASIC_ID_OFFSET0x0ff4
 
+/* AB8500 specifics */
+#define AB8500_MISC0x0010
+#define AB8500_GPIO_SEL2_REG   0x1001
+#define AB8500_GPIO_DIR2_REG   0x1011
+#define AB8500_GPIO_DIR4_REG   0x1013
+#define AB8500_GPIO_SEL4_REG   0x1003
+#define AB8500_GPIO_OUT2_REG   0x1021
+#define AB8500_GPIO_OUT4_REG   0x1023
+
 #endif /* __ASM_ARCH_HARDWARE_H */
diff --git a/arch/arm/include/asm/arch-u8500/prcmu.h 
b/arch/arm/include/asm/arch-u8500/prcmu.h
index 9862eb3..e9dcc93 100644
--- a/arch/arm/include/asm/arch-u8500/prcmu.h
+++ b/arch/arm/include/asm/arch-u8500/prcmu.h
@@ -64,8 +64,11 @@
 
 #define REQ_MB55
 
-extern int prcmu_i2c_read(u8 reg, u16 slave);
-extern int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
+#define ab8500_readprcmu_i2c_read
+#define ab8500_write   prcmu_i2c_write
+
+int prcmu_i2c_read(u8 reg, u16 slave);
+int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data);
 
 void u8500_prcmu_enable(u32 *reg);
 void db8500_prcmu_init(void);
diff --git a/board/st-ericsson/snowball/snowball.c 
b/board/st-ericsson/snowball/snowball.c
index a70ebb1..7959ab8 100644
--- a/board/st-ericsson/snowball/snowball.c
+++ b/board/st-ericsson/snowball/snowball.c
@@ -25,6 +25,8 @@
 #include 
 #include 
 #include 
+#include 
+#include 
 
 #include "db8500_pins.h"
 
@@ -183,3 +185,88 @@ int dram_init(void)
 
return 0;
 }
+
+static int raise_ab8500_gpio16(void)
+{
+   int ret;
+
+   /* selection */
+   ret = ab8500_read(AB8500_MISC, AB8500_GPIO_SEL2_REG);
+   if (ret < 0)
+   goto out;
+
+   ret |= 0x80;
+   ret = ab8500_write(AB8500_MISC, AB8500_GPIO_SEL2_REG, ret);
+   if (ret < 0)
+   goto out;
+
+   /* direction */
+   ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR2_REG);
+   if (ret < 0)
+   goto out;
+
+   ret |= 0x80;
+   ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR2_REG, ret);
+   if (ret < 0)
+   goto out;
+
+   /* out */
+   ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT2_REG);
+   if (ret < 0)
+   goto out;
+
+   ret |= 0x80;
+   ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT2_REG, ret);
+
+out:
+   return ret;
+}
+
+static int raise_ab8500_gpio26(void)
+{
+   int ret;
+
+   /* selection */
+   ret = ab8500_read(AB8500_MISC, AB8500_GPIO_DIR4_REG);
+   if (ret < 0)
+   goto out;
+
+   ret |= 0x2;
+   ret = ab8500_write(AB8500_MISC, AB8500_GPIO_DIR4_REG, ret);
+   if (ret < 0)
+   goto out;
+
+   /* out */
+   ret = ab8500_read(AB8500_MISC, AB8500_GPIO_OUT4_REG);
+   if (ret < 0)
+   goto out;
+
+   ret |= 0x2;
+   ret = ab8500_write(AB8500_MISC, AB8500_GPIO_OUT4_REG, ret);
+
+out:
+   return ret;
+}
+
+int board_late_init(void)
+{
+   /* enable 3V3 for LAN controller */
+   if (raise_ab8500_gpio26() >= 0) {
+   /* Turn on FSMC device */
+   writel(0x1, 0x8000f000);
+   writel(0x1, 0x8000f008);
+
+   /* setup FSMC for LAN controler */
+   writel(0x305b, 0x8000);
+
+   /* run at the highest possible speed */
+   writel(0x01010210, 0x8004);
+   } else
+   printf("error: can't raise GPIO26\n");
+
+   /* enable 3v6 for GBF chip */
+   if ((raise_ab8500_gpio16() < 0))
+   printf("error: cant' raise GPIO16\n");
+
+   return 0;
+}
diff --git a/include/configs/snowball.h b/include/configs/snowball.h
index bb8970b..e9de790 100644
--- a/include/configs/snowball.h
+++ b/include/configs/snowball.h
@@ -32,6 +32,7 @@
 #define CONFIG_SYS_ICACHE_OFF
 #define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_ARCH_CPU_INIT
+#define CONFIG_BOARD_LATE_INIT
 
 /*
  * High Level Configuration Options
-- 
1.7.5.4

___
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[U-Boot] [PATCH 10/11] armv7: Adding cpu specific cache managmenent

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Some CPU (i.e u8500) need more cache management before launching
the Linux kernel.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/cpu.c |8 
 1 files changed, 8 insertions(+), 0 deletions(-)

diff --git a/arch/arm/cpu/armv7/cpu.c b/arch/arm/cpu/armv7/cpu.c
index c6fa8ef..f01989f 100644
--- a/arch/arm/cpu/armv7/cpu.c
+++ b/arch/arm/cpu/armv7/cpu.c
@@ -36,6 +36,7 @@
 #include 
 #include 
 #include 
+#include 
 
 void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
 {
@@ -44,6 +45,8 @@ void save_boot_params_default(u32 r0, u32 r1, u32 r2, u32 r3)
 void save_boot_params(u32 r0, u32 r1, u32 r2, u32 r3)
__attribute__((weak, alias("save_boot_params_default")));
 
+void __weak cpu_cache_initialization(void){}
+
 int cleanup_before_linux(void)
 {
/*
@@ -81,5 +84,10 @@ int cleanup_before_linux(void)
 */
invalidate_dcache_all();
 
+   /*
+* Some CPU need more cache attention before starting the kernel.
+*/
+   cpu_cache_initialization();
+
return 0;
 }
-- 
1.7.5.4

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[U-Boot] [PATCH 08/11] u8500: Enabling power to MMC device on AB8500 V2

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Register mapping has changed on power control chip between
the first and second revision.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/cpu.c |   89 
 arch/arm/include/asm/arch-u8500/hardware.h |   22 ++-
 board/st-ericsson/snowball/snowball.c  |5 ++
 3 files changed, 88 insertions(+), 28 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 593199c..02bb332 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -36,11 +36,19 @@
 #define CPUID_DB8500V2 0x412fc091
 #define ASICID_DB8500V11   0x008500A1
 
-static unsigned int read_asicid(void)
+static unsigned int read_asicid(void);
+
+static inline unsigned int read_cpuid(void)
 {
-   unsigned int *address = (void *)U8500_BOOTROM_BASE
-   + U8500_BOOTROM_ASIC_ID_OFFSET;
-   return readl(address);
+   unsigned int val;
+
+   /* Main ID register (MIDR) */
+   asm("mrcp15, 0, %0, c0, c0, 0"
+  : "=r" (val)
+  :
+  : "cc");
+
+   return val;
 }
 
 static int cpu_is_u8500v11(void)
@@ -53,6 +61,18 @@ static int cpu_is_u8500v2(void)
return read_cpuid() == CPUID_DB8500V2;
 }
 
+static unsigned int read_asicid(void)
+{
+   unsigned int *address;
+
+   if (cpu_is_u8500v2())
+   address = (void *) U8500_ASIC_ID_LOC_V2;
+   else
+   address = (void *) U8500_ASIC_ID_LOC_ED_V1;
+
+   return readl(address);
+}
+
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
  * SOC specific cpu init
@@ -68,22 +88,22 @@ int arch_cpu_init(void)
 
 #ifdef CONFIG_MMC
 
-#define LDO_VAUX3_MASK 0x3
-#define LDO_VAUX3_ENABLE   0x1
-#define VAUX3_VOLTAGE_2_9V 0xd
-
-#define AB8500_REGU_CTRL2  0x4
-#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
-#define AB8500_REGU_VRF1VAUX3_SEL_REG  0x0421
-
 int u8500_mmc_power_init(void)
 {
int ret;
-   int val;
+   int enable, voltage;
+   int ab8500_revision;
 
-   if (!cpu_is_u8500v11())
+   if (!cpu_is_u8500v11() && !cpu_is_u8500v2())
return 0;
 
+   /* Get AB8500 revision */
+   ret = ab8500_read(AB8500_MISC, AB8500_REV_REG);
+   if (ret < 0)
+   goto out;
+
+   ab8500_revision = ret;
+
/*
 * On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
 * card to work.  This is done by enabling the regulators in the AB8500
@@ -95,33 +115,50 @@ int u8500_mmc_power_init(void)
 * Turn off and delay is required to have it work across soft reboots.
 */
 
-   ret = prcmu_i2c_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
+   /* Turn off (read-modify-write) */
+   ret = ab8500_read(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_REGU_REG);
if (ret < 0)
goto out;
 
-   val = ret;
+   enable = ret;
 
/* Turn off */
-   ret = prcmu_i2c_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
-   val & ~LDO_VAUX3_MASK);
+   ret = ab8500_write(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_REGU_REG,
+   enable & ~LDO_VAUX3_ENABLE_MASK);
if (ret < 0)
goto out;
 
udelay(10 * 1000);
 
-   /* Set the voltage to 2.9V */
-   ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
-   AB8500_REGU_VRF1VAUX3_SEL_REG,
-   VAUX3_VOLTAGE_2_9V);
+   /* Set the voltage to 2.91 V or 2.9 V without overriding VRF1 value */
+   ret = ab8500_read(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_SEL_REG);
if (ret < 0)
goto out;
 
-   val = val & ~LDO_VAUX3_MASK;
-   val = val | LDO_VAUX3_ENABLE;
+   voltage = ret;
+
+   if (ab8500_revision < 0x20) {
+   voltage &= ~LDO_VAUX3_SEL_MASK;
+   voltage |= LDO_VAUX3_SEL_2V9;
+   } else {
+   voltage &= ~LDO_VAUX3_V2_SEL_MASK;
+   voltage |= LDO_VAUX3_V2_SEL_2V91;
+   }
+
+   ret = ab8500_write(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_SEL_REG, voltage);
+   if (ret < 0)
+   goto out;
 
/* Turn on the supply */
-   ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
-   AB8500_REGU_VRF1VAUX3_REGU_REG, val);
+   enable &= ~LDO_VAUX3_ENABLE_MASK;
+   enable |= LDO_VAUX3_ENABLE_VAL;
+
+   ret = ab8500_write(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_REGU_REG, enable);
 
 out:
return ret;
diff --git a/arch/arm/include/asm/arch-u8500/hardware.h 
b/arch/arm/include/asm/arch-u8500/hardware.h
index 8044ac3..ee03419 100644
--- a/arch/arm/include/asm/arch-u8500/hardware.h
+++ b/arch/arm/include/asm/arch-u8500/

[U-Boot] [PATCH 07/11] u8500: Moving processor-specific functions to cpu area.

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Functions such as providing power to the MMC device and reading
the processor version register should be in the cpu area for
access by multiple u8500-based boards.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/cpu.c  |   86 +++
 arch/arm/include/asm/arch-u8500/sys_proto.h |1 +
 board/st-ericsson/u8500/u8500_href.c|   75 +---
 3 files changed, 88 insertions(+), 74 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index fece201..593199c 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -28,6 +28,30 @@
 #include 
 #include 
 #include 
+#include 
+
+#include 
+
+#define CPUID_DB8500V1 0x411fc091
+#define CPUID_DB8500V2 0x412fc091
+#define ASICID_DB8500V11   0x008500A1
+
+static unsigned int read_asicid(void)
+{
+   unsigned int *address = (void *)U8500_BOOTROM_BASE
+   + U8500_BOOTROM_ASIC_ID_OFFSET;
+   return readl(address);
+}
+
+static int cpu_is_u8500v11(void)
+{
+   return read_asicid() == ASICID_DB8500V11;
+}
+
+static int cpu_is_u8500v2(void)
+{
+   return read_cpuid() == CPUID_DB8500V2;
+}
 
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
@@ -41,3 +65,65 @@ int arch_cpu_init(void)
return 0;
 }
 #endif /* CONFIG_ARCH_CPU_INIT */
+
+#ifdef CONFIG_MMC
+
+#define LDO_VAUX3_MASK 0x3
+#define LDO_VAUX3_ENABLE   0x1
+#define VAUX3_VOLTAGE_2_9V 0xd
+
+#define AB8500_REGU_CTRL2  0x4
+#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
+#define AB8500_REGU_VRF1VAUX3_SEL_REG  0x0421
+
+int u8500_mmc_power_init(void)
+{
+   int ret;
+   int val;
+
+   if (!cpu_is_u8500v11())
+   return 0;
+
+   /*
+* On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
+* card to work.  This is done by enabling the regulators in the AB8500
+* via PRCMU I2C transactions.
+*
+* This code is derived from the handling of AB8500_LDO_VAUX3 in
+* ab8500_ldo_enable() and ab8500_ldo_disable() in Linux.
+*
+* Turn off and delay is required to have it work across soft reboots.
+*/
+
+   ret = prcmu_i2c_read(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG);
+   if (ret < 0)
+   goto out;
+
+   val = ret;
+
+   /* Turn off */
+   ret = prcmu_i2c_write(AB8500_REGU_CTRL2, AB8500_REGU_VRF1VAUX3_REGU_REG,
+   val & ~LDO_VAUX3_MASK);
+   if (ret < 0)
+   goto out;
+
+   udelay(10 * 1000);
+
+   /* Set the voltage to 2.9V */
+   ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_SEL_REG,
+   VAUX3_VOLTAGE_2_9V);
+   if (ret < 0)
+   goto out;
+
+   val = val & ~LDO_VAUX3_MASK;
+   val = val | LDO_VAUX3_ENABLE;
+
+   /* Turn on the supply */
+   ret = prcmu_i2c_write(AB8500_REGU_CTRL2,
+   AB8500_REGU_VRF1VAUX3_REGU_REG, val);
+
+out:
+   return ret;
+}
+#endif /* CONFIG_MMC */
diff --git a/arch/arm/include/asm/arch-u8500/sys_proto.h 
b/arch/arm/include/asm/arch-u8500/sys_proto.h
index bac5e79..a8ef9e5 100644
--- a/arch/arm/include/asm/arch-u8500/sys_proto.h
+++ b/arch/arm/include/asm/arch-u8500/sys_proto.h
@@ -23,5 +23,6 @@
 #define _SYS_PROTO_H_
 
 void gpio_init(void);
+int u8500_mmc_power_init(void);
 
 #endif  /* _SYS_PROTO_H_ */
diff --git a/board/st-ericsson/u8500/u8500_href.c 
b/board/st-ericsson/u8500/u8500_href.c
index fe72684..e75f8b4 100644
--- a/board/st-ericsson/u8500/u8500_href.c
+++ b/board/st-ericsson/u8500/u8500_href.c
@@ -139,18 +139,6 @@ void show_boot_progress(int progress)
 }
 #endif
 
-static unsigned int read_asicid(void)
-{
-   unsigned int *address = (void *)U8500_BOOTROM_BASE
-   + U8500_BOOTROM_ASIC_ID_OFFSET;
-   return readl(address);
-}
-
-int cpu_is_u8500v11(void)
-{
-   return read_asicid() == 0x008500A1;
-}
-
 /*
  * Miscellaneous platform dependent initialisations
  */
@@ -227,67 +215,6 @@ unsigned int addr_vall_arr[] = {
 };
 
 #ifdef CONFIG_BOARD_LATE_INIT
-#ifdef CONFIG_MMC
-
-#define LDO_VAUX3_MASK 0x3
-#define LDO_VAUX3_ENABLE   0x1
-#define VAUX3_VOLTAGE_2_9V 0xd
-
-#define AB8500_REGU_CTRL2  0x4
-#define AB8500_REGU_VRF1VAUX3_REGU_REG 0x040A
-#define AB8500_REGU_VRF1VAUX3_SEL_REG  0x0421
-
-static int hrefplus_mmc_power_init(void)
-{
-   int ret;
-   int val;
-
-   if (!cpu_is_u8500v11())
-   return 0;
-
-   /*
-* On v1.1 HREF boards (HREF+), Vaux3 needs to be enabled for the SD
-* card to work.  This is done by enabling the regulators in the AB8500
-* via PRCMU I2C transactions.
-*
-* This code is derived from the handling of AB8500_LDO_VAUX3 i

[U-Boot] [PATCH 05/11] snowball: Moving to ux500.v2 addess scheme for PRCMU access

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Addresses between ux500.v1 and ux500.v2 have changed slightly,
hence mandating a review of the PRCMU access methods.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/prcmu.c   |   91 +++-
 arch/arm/include/asm/arch-u8500/hardware.h |2 +-
 arch/arm/include/asm/arch-u8500/prcmu.h|   10 ++-
 3 files changed, 71 insertions(+), 32 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/prcmu.c b/arch/arm/cpu/armv7/u8500/prcmu.c
index 4918bbc..934428f 100644
--- a/arch/arm/cpu/armv7/u8500/prcmu.c
+++ b/arch/arm/cpu/armv7/u8500/prcmu.c
@@ -36,9 +36,10 @@
 #include 
 
 /* CPU mailbox registers */
-#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
-#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
-#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
+#define PRCMU_I2C_WRITE(slave)  \
+   (((slave) << 1) | I2CWRITE | (1 << 6))
+#define PRCMU_I2C_READ(slave) \
+   (((slave) << 1) | I2CREAD | (1 << 6))
 
 #define I2C_MBOX_BIT(1 << 5)
 
@@ -50,26 +51,39 @@ static int prcmu_is_ready(void)
return ready;
 }
 
-static int _wait_for_req_complete(int num)
+static int wait_for_i2c_mbx_rdy(void)
 {
-   int timeout = 1000;
+   int timeout = 1;
 
-   /* checking any already on-going transaction */
-   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   if (readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) {
+   printf("prcmu: warning i2c mailbox was not acked\n");
+   /* clear mailbox 5 ack irq */
+   writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
+   }
+
+   /* check any already on-going transaction */
+   while ((readl(PRCM_MBOX_CPU_VAL) & I2C_MBOX_BIT) && timeout)
timeout--;
 
-   timeout = 1000;
+   if (timeout == 0)
+   return -1;
+
+   return 0;
+}
+
+static int wait_for_i2c_req_done(void)
+{
+   int timeout = 1;
 
/* Set an interrupt to XP70 */
-   writel(1 << num, PRCM_MBOX_CPU_SET);
+   writel(I2C_MBOX_BIT, PRCM_MBOX_CPU_SET);
 
-   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   /* wait for mailbox 5 (i2c) ack */
+   while (!(readl(PRCM_ARM_IT1_VAL) & I2C_MBOX_BIT) && timeout)
timeout--;
 
-   if (!timeout) {
-   printf("PRCMU operation timed out\n");
+   if (timeout == 0)
return -1;
-   }
 
return 0;
 }
@@ -84,6 +98,7 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 {
uint8_t i2c_status;
uint8_t i2c_val;
+   int ret;
 
if (!prcmu_is_ready())
return -1;
@@ -91,13 +106,23 @@ int prcmu_i2c_read(u8 reg, u16 slave)
debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
reg, slave);
 
+   ret = wait_for_i2c_mbx_rdy();
+   if (ret) {
+   printf("prcmu_i2c_read: mailbox became not ready\n");
+   return ret;
+   }
+
/* prepare the data for mailbox 5 */
-   writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb(PRCMU_I2C_READ(reg), PRCM_REQ_MB5_I2COPTYPE_REG);
writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
writeb(0, PRCM_REQ_MB5_I2CVAL);
 
-   _wait_for_req_complete(REQ_MB5);
+   ret = wait_for_i2c_req_done();
+   if (ret) {
+   printf("prcmu_i2c_read: mailbox request timed out\n");
+   return ret;
+   }
 
/* retrieve values */
debug("ack-mb5:transfer status = %x\n",
@@ -109,16 +134,14 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 
i2c_status = readb(PRCM_ACK_MB5_STATUS);
i2c_val = readb(PRCM_ACK_MB5_VAL);
+   /* clear mailbox 5 ack irq */
+   writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
 
if (i2c_status == I2C_RD_OK)
return i2c_val;
-   else {
-
-   printf("prcmu_i2c_read:read return status= %d\n",
-   i2c_status);
-   return -1;
-   }
 
+   printf("prcmu_i2c_read:read return status= %d\n", i2c_status);
+   return -1;
 }
 
 /**
@@ -131,6 +154,7 @@ int prcmu_i2c_read(u8 reg, u16 slave)
 int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
 {
uint8_t i2c_status;
+   int ret;
 
if (!prcmu_is_ready())
return -1;
@@ -138,14 +162,23 @@ int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
debug("\nprcmu_4500_i2c_write:bank=%x;reg=%x;\n",
reg, slave);
 
+   ret = wait_for_i2c_mbx_rdy();
+   if (ret) {
+   printf("prcmu_i2c_write: mailbox became not ready\n");
+   return ret;
+   }
+
/* prepare the data for mailbox 5 */
-   writeb((reg << 1) | I2CWRITE, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb(PRCMU_I2C_WRITE(reg), PRCM_REQ_MB5_I2COPTYPE_REG);
writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
writeb(slave,

[U-Boot] [PATCH 04/11] snowball: Adding CPU clock initialisation

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/clock.c|   34 +++
 arch/arm/cpu/armv7/u8500/cpu.c  |2 +
 arch/arm/include/asm/arch-u8500/clock.h |5 +---
 3 files changed, 37 insertions(+), 4 deletions(-)

diff --git a/arch/arm/cpu/armv7/u8500/clock.c b/arch/arm/cpu/armv7/u8500/clock.c
index 9e3b873..fcfd61a 100644
--- a/arch/arm/cpu/armv7/u8500/clock.c
+++ b/arch/arm/cpu/armv7/u8500/clock.c
@@ -54,3 +54,37 @@ void u8500_clock_enable(int periph, int cluster, int kern)
if (cluster != -1)
writel(1 << cluster, &clkrst->pcken);
 }
+
+void db8500_clocks_init(void)
+{
+   /*
+* Enable all clocks. This is u-boot, we can enable it all. There is no
+* powersave in u-boot.
+*/
+
+   u8500_clock_enable(1, 9, -1); /* GPIO0 */
+   u8500_clock_enable(2, 11, -1);/* GPIO1 */
+   u8500_clock_enable(3, 8, -1); /* GPIO2 */
+   u8500_clock_enable(5, 1, -1); /* GPIO3 */
+   u8500_clock_enable(3, 6, 6);  /* UART2 */
+   u8500_clock_enable(3, 3, 3);  /* I2C0 */
+   u8500_clock_enable(1, 5, 5);  /* SDI0 */
+   u8500_clock_enable(2, 4, 2);  /* SDI4 */
+   u8500_clock_enable(6, 6, -1); /* MTU0 */
+   u8500_clock_enable(3, 4, 4);  /* SDI2 */
+
+   /*
+* Enabling clocks for all devices which are AMBA devices in the
+* kernel.  Otherwise they will not get probe()'d because the
+* peripheral ID register will not be powered.
+*/
+
+   /* XXX: some of these differ between ED/V1 */
+
+   u8500_clock_enable(1, 1, 1);  /* UART1 */
+   u8500_clock_enable(1, 0, 0);  /* UART0 */
+   u8500_clock_enable(3, 2, 2);  /* SSP1 */
+   u8500_clock_enable(3, 1, 1);  /* SSP0 */
+   u8500_clock_enable(2, 8, -1); /* SPI0 */
+   u8500_clock_enable(2, 5, 3);  /* MSP2 */
+}
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
index 04f4b19..fece201 100644
--- a/arch/arm/cpu/armv7/u8500/cpu.c
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -27,6 +27,7 @@
 #include 
 #include 
 #include 
+#include 
 
 #ifdef CONFIG_ARCH_CPU_INIT
 /*
@@ -35,6 +36,7 @@
 int arch_cpu_init(void)
 {
db8500_prcmu_init();
+   db8500_clocks_init();
 
return 0;
 }
diff --git a/arch/arm/include/asm/arch-u8500/clock.h 
b/arch/arm/include/asm/arch-u8500/clock.h
index b00ab0d..2a14784 100644
--- a/arch/arm/include/asm/arch-u8500/clock.h
+++ b/arch/arm/include/asm/arch-u8500/clock.h
@@ -64,9 +64,6 @@ struct prcmu {
 
 extern void u8500_clock_enable(int periph, int kern, int cluster);
 
-static inline void u8500_prcmu_enable(unsigned int *reg)
-{
-   writel(readl(reg) | (1 << 8), reg);
-}
+void db8500_clocks_init(void);
 
 #endif /* __ASM_ARCH_CLOCK */
-- 
1.7.5.4

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[U-Boot] [PATCH 03/11] snowball: Adding architecture dependent initialisation

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

Enabling timers and clocks in PRCMU and cleaning up mailbox.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/Makefile   |2 +-
 arch/arm/cpu/armv7/u8500/cpu.c  |   41 +++
 arch/arm/cpu/armv7/u8500/prcmu.c|   30 ++
 arch/arm/include/asm/arch-u8500/prcmu.h |   24 ++
 board/st-ericsson/u8500/u8500_href.c|2 +-
 include/configs/snowball.h  |1 +
 6 files changed, 93 insertions(+), 7 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/cpu.c

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
index 77accde..ce8af96 100644
--- a/arch/arm/cpu/armv7/u8500/Makefile
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  = timer.o clock.o prcmu.o
+COBJS  = timer.o clock.o prcmu.o cpu.o
 SOBJS  = lowlevel.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/u8500/cpu.c b/arch/arm/cpu/armv7/u8500/cpu.c
new file mode 100644
index 000..04f4b19
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/cpu.c
@@ -0,0 +1,41 @@
+/*
+ * Copyright (C) 2012 Linaro Limited
+ * Mathieu Poirier 
+ *
+ * Based on original code from Joakim Axelsson at ST-Ericsson
+ * (C) Copyright 2010 ST-Ericsson
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+#ifdef CONFIG_ARCH_CPU_INIT
+/*
+ * SOC specific cpu init
+ */
+int arch_cpu_init(void)
+{
+   db8500_prcmu_init();
+
+   return 0;
+}
+#endif /* CONFIG_ARCH_CPU_INIT */
diff --git a/arch/arm/cpu/armv7/u8500/prcmu.c b/arch/arm/cpu/armv7/u8500/prcmu.c
index b256d27..4918bbc 100644
--- a/arch/arm/cpu/armv7/u8500/prcmu.c
+++ b/arch/arm/cpu/armv7/u8500/prcmu.c
@@ -40,6 +40,8 @@
 #define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
 #define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
 
+#define I2C_MBOX_BIT(1 << 5)
+
 static int prcmu_is_ready(void)
 {
int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
@@ -162,3 +164,31 @@ int prcmu_i2c_write(u8 reg, u16 slave, u8 reg_data)
return -1;
}
 }
+
+void u8500_prcmu_enable(u32 *reg)
+{
+   writel(readl(reg) | (1 << 8), reg);
+}
+
+void db8500_prcmu_init(void)
+{
+   /* Enable timers */
+   writel(1 << 17, PRCM_TCR);
+
+   u8500_prcmu_enable((u32 *)PRCM_PER1CLK_MGT_REG);
+   u8500_prcmu_enable((u32 *)PRCM_PER2CLK_MGT_REG);
+   u8500_prcmu_enable((u32 *)PRCM_PER3CLK_MGT_REG);
+   /* PER4CLK does not exist */
+   u8500_prcmu_enable((u32 *)PRCM_PER5CLK_MGT_REG);
+   u8500_prcmu_enable((u32 *)PRCM_PER6CLK_MGT_REG);
+   /* Only exists in ED but is always ok to write to */
+   u8500_prcmu_enable((u32 *)PRCM_PER7CLK_MGT_REG);
+
+   u8500_prcmu_enable((u32 *)PRCM_UARTCLK_MGT_REG);
+   u8500_prcmu_enable((u32 *)PRCM_I2CCLK_MGT_REG);
+
+   u8500_prcmu_enable((u32 *)PRCM_SDMMCCLK_MGT_REG);
+
+   /* Clean up the mailbox interrupts after pre-u-boot code. */
+   writel(I2C_MBOX_BIT, PRCM_ARM_IT1_CLEAR);
+}
diff --git a/arch/arm/include/asm/arch-u8500/prcmu.h 
b/arch/arm/include/asm/arch-u8500/prcmu.h
index 0836983..1fd4d2a 100644
--- a/arch/arm/include/asm/arch-u8500/prcmu.h
+++ b/arch/arm/include/asm/arch-u8500/prcmu.h
@@ -27,12 +27,23 @@
 #define I2C_RD_OK  2
 #define I2CWRITE   0
 
-#define _PRCMU_TCDM_BASEU8500_PRCMU_TCDM_BASE
-#define PRCM_XP70_CUR_PWR_STATE (_PRCMU_TCDM_BASE + 0xFFC)  /* 4 BYTES */
-
-#define PRCM_REQ_MB5(_PRCMU_TCDM_BASE + 0xE44)/* 4 bytes  */
-#define PRCM_ACK_MB5(_PRCMU_TCDM_BASE + 0xDF4)/* 4 bytes */
+#define PRCMU_BASE U8500_PRCMU_BASE
+#define PRCM_UARTCLK_MGT_REG   (PRCMU_BASE + 0x018)
+#define PRCM_MSPCLK_MGT_REG(PRCMU_BASE + 0x01C)
+#define PRCM_I2CCLK_MGT_REG(PRCMU_BASE + 0x020)
+#define PRCM_SDMMCCLK_MGT_REG  (PRCMU_BASE + 0x024)
+#define PRCM_PER1CLK_MGT_REG   (PRCMU_BASE + 0x02C)
+#define PRCM_PER2CLK_MGT_REG   (PRCMU_BASE + 0x030)
+#define PRCM_PER3CLK_MGT_REG   (PRCMU_BASE + 0x034)
+#define PRCM_PER5CLK_MGT

[U-Boot] [PATCH 02/11] u8500: Moving prcmu to cpu directory

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

This is to allow the prcmu functions to be used by multiple
u8500-based processors.

Signed-off-by: Mathieu Poirier 
Signed-off-by: John Rigby 
---
 arch/arm/cpu/armv7/u8500/Makefile   |2 +-
 arch/arm/cpu/armv7/u8500/prcmu.c|  164 ++
 arch/arm/include/asm/arch-u8500/prcmu.h |   55 ++
 board/st-ericsson/u8500/Makefile|2 +-
 board/st-ericsson/u8500/prcmu-fw.h  |   55 --
 board/st-ericsson/u8500/prcmu.c |  165 ---
 board/st-ericsson/u8500/u8500_href.c|2 +-
 7 files changed, 222 insertions(+), 223 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/prcmu.c
 create mode 100644 arch/arm/include/asm/arch-u8500/prcmu.h
 delete mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 delete mode 100644 board/st-ericsson/u8500/prcmu.c

diff --git a/arch/arm/cpu/armv7/u8500/Makefile 
b/arch/arm/cpu/armv7/u8500/Makefile
index 270aa40..77accde 100644
--- a/arch/arm/cpu/armv7/u8500/Makefile
+++ b/arch/arm/cpu/armv7/u8500/Makefile
@@ -25,7 +25,7 @@ include $(TOPDIR)/config.mk
 
 LIB= $(obj)lib$(SOC).o
 
-COBJS  = timer.o clock.o
+COBJS  = timer.o clock.o prcmu.o
 SOBJS  = lowlevel.o
 
 SRCS   := $(SOBJS:.o=.S) $(COBJS:.o=.c)
diff --git a/arch/arm/cpu/armv7/u8500/prcmu.c b/arch/arm/cpu/armv7/u8500/prcmu.c
new file mode 100644
index 000..b256d27
--- /dev/null
+++ b/arch/arm/cpu/armv7/u8500/prcmu.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright (C) 2009 ST-Ericsson SA
+ *
+ * Adapted from the Linux version:
+ * Author: Kumar Sanghvi 
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2
+ * as published by the Free Software Foundation.
+ */
+
+/*
+ * NOTE: This currently does not support the I2C workaround access method.
+ */
+
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+#include 
+
+/* CPU mailbox registers */
+#define PRCM_MBOX_CPU_VAL (U8500_PRCMU_BASE + 0x0fc)
+#define PRCM_MBOX_CPU_SET (U8500_PRCMU_BASE + 0x100)
+#define PRCM_MBOX_CPU_CLR (U8500_PRCMU_BASE + 0x104)
+
+static int prcmu_is_ready(void)
+{
+   int ready = readb(PRCM_XP70_CUR_PWR_STATE) == AP_EXECUTE;
+   if (!ready)
+   printf("PRCMU firmware not ready\n");
+   return ready;
+}
+
+static int _wait_for_req_complete(int num)
+{
+   int timeout = 1000;
+
+   /* checking any already on-going transaction */
+   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   timeout--;
+
+   timeout = 1000;
+
+   /* Set an interrupt to XP70 */
+   writel(1 << num, PRCM_MBOX_CPU_SET);
+
+   while ((readl(PRCM_MBOX_CPU_VAL) & (1 << num)) && timeout)
+   timeout--;
+
+   if (!timeout) {
+   printf("PRCMU operation timed out\n");
+   return -1;
+   }
+
+   return 0;
+}
+
+/**
+ * prcmu_i2c_read - PRCMU - 4500 communication using PRCMU I2C
+ * @reg: - db8500 register bank to be accessed
+ * @slave:  - db8500 register to be accessed
+ * Returns: ACK_MB5  value containing the status
+ */
+int prcmu_i2c_read(u8 reg, u16 slave)
+{
+   uint8_t i2c_status;
+   uint8_t i2c_val;
+
+   if (!prcmu_is_ready())
+   return -1;
+
+   debug("\nprcmu_4500_i2c_read:bank=%x;reg=%x;\n",
+   reg, slave);
+
+   /* prepare the data for mailbox 5 */
+   writeb((reg << 1) | I2CREAD, PRCM_REQ_MB5_I2COPTYPE_REG);
+   writeb((1 << 3) | 0x0, PRCM_REQ_MB5_BIT_FIELDS);
+   writeb(slave, PRCM_REQ_MB5_I2CSLAVE);
+   writeb(0, PRCM_REQ_MB5_I2CVAL);
+
+   _wait_for_req_complete(REQ_MB5);
+
+   /* retrieve values */
+   debug("ack-mb5:transfer status = %x\n",
+   readb(PRCM_ACK_MB5_STATUS));
+   debug("ack-mb5:reg bank = %x\n", readb(PRCM_ACK_MB5) >> 1);
+   debug("ack-mb5:slave_add = %x\n",
+   readb(PRCM_ACK_MB5_SLAVE));
+   debug("ack-mb5:reg_val = %d\n", readb(PRCM_ACK_MB5_VAL));
+
+   i2c_status = readb(PRCM_ACK_MB5_STATUS);
+   i2c_val = readb(PRCM_ACK_MB5_VAL);
+
+   if (i2c_status == I2C_RD_OK)
+   return i2c_val;
+   else {
+
+   printf("prcmu_i2c_read:read

[U-Boot] [PATCH 00/11] Support for ST-Ericsson snowball board

2012-07-31 Thread mathieu . poirier
From: "Mathieu J. Poirier" 

This set adds support for the ST-Ericsson u8500 based
snowball board.  Doing so it moves u8500-href code around
to allow for code reuse between boards.

It was sent out during the 12.07 cycle but never received
an official ACK.

John Rigby (1):
  u8500: Separating mmc config parameters from driver

Mathieu J. Poirier (10):
  snowball: Add support for ux500 based snowball board
  u8500: Moving prcmu to cpu directory
  snowball: Adding architecture dependent initialisation
  snowball: Adding CPU clock initialisation
  snowball: Moving to ux500.v2 addess scheme for PRCMU access
  snowball: applying power to LAN and GBF controllers
  u8500: Moving processor-specific functions to cpu area.
  u8500: Enabling power to MMC device on AB8500 V2
  armv7: Adding cpu specific cache managmenent
  snowball: Adding board specific cache cleanup routine

 MAINTAINERS |4 +
 arch/arm/cpu/armv7/cpu.c|8 +
 arch/arm/cpu/armv7/u8500/Makefile   |2 +-
 arch/arm/cpu/armv7/u8500/clock.c|   34 +
 arch/arm/cpu/armv7/u8500/cpu.c  |  192 ++
 arch/arm/cpu/armv7/u8500/prcmu.c|  229 +++
 arch/arm/include/asm/arch-u8500/clock.h |5 +-
 arch/arm/include/asm/arch-u8500/db8500_gpio.h   |   42 ++
 arch/arm/include/asm/arch-u8500/db8500_pincfg.h |  170 +
 arch/arm/include/asm/arch-u8500/hardware.h  |   33 +-
 arch/arm/include/asm/arch-u8500/prcmu.h |   76 +++
 arch/arm/include/asm/arch-u8500/sys_proto.h |1 +
 board/armltd/vexpress/ca9x4_ct_vxp.c|   21 +-
 board/st-ericsson/snowball/Makefile |   51 ++
 board/st-ericsson/snowball/db8500_pins.h|  745 +++
 board/st-ericsson/snowball/snowball.c   |  367 +++
 board/st-ericsson/u8500/Makefile|2 +-
 board/st-ericsson/u8500/prcmu-fw.h  |   55 --
 board/st-ericsson/u8500/prcmu.c |  165 -
 board/st-ericsson/u8500/u8500_href.c|   99 +---
 boards.cfg  |1 +
 drivers/gpio/Makefile   |1 +
 drivers/gpio/db8500_gpio.c  |  225 +++
 drivers/mmc/arm_pl180_mmci.c|  132 ++---
 drivers/mmc/arm_pl180_mmci.h|   27 +-
 drivers/serial/serial_pl01x.c   |2 +
 include/configs/snowball.h  |  268 
 27 files changed, 2566 insertions(+), 391 deletions(-)
 create mode 100644 arch/arm/cpu/armv7/u8500/cpu.c
 create mode 100644 arch/arm/cpu/armv7/u8500/prcmu.c
 create mode 100644 arch/arm/include/asm/arch-u8500/db8500_gpio.h
 create mode 100644 arch/arm/include/asm/arch-u8500/db8500_pincfg.h
 create mode 100644 arch/arm/include/asm/arch-u8500/prcmu.h
 create mode 100644 board/st-ericsson/snowball/Makefile
 create mode 100644 board/st-ericsson/snowball/db8500_pins.h
 create mode 100644 board/st-ericsson/snowball/snowball.c
 delete mode 100644 board/st-ericsson/u8500/prcmu-fw.h
 delete mode 100644 board/st-ericsson/u8500/prcmu.c
 create mode 100644 drivers/gpio/db8500_gpio.c
 create mode 100644 include/configs/snowball.h

-- 
1.7.5.4

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Re: [U-Boot] mx53loco hangs on 2012.07

2012-07-31 Thread Robert Nelson
On Tue, Jul 31, 2012 at 1:25 PM, Fabio Estevam  wrote:
> Hi,
>
> Just tried 2012.07 on a mx53loco and this is what I got:
>
> U-Boot 2012.07 (Jul 31 2012 - 15:21:51)
>
> Board: MX53 LOCO
> I2C:   ready
> DRAM:  1 GiB
> WARNING: Caches not enabled
> CPU:   Freescale i.MX53 family rev2.0 at 1000 MHz
> Reset cause: POR
> MMC:   FSL_SDHC: 0, FSL_SDHC: 1
>
> (Hangs here)
>
> Have anyone else seen this? I will start debugging it, and any
> suggestions are welcome.

It's actually not hanging up, if you have a boot script, it seems to
runs that just fine, but it will not print it to the serial terminal..

This would seem to redirect the prompt the lcd?
http://git.denx.de/?p=u-boot.git;a=commit;h=f714b0a911e24cc733553f02b30d508212f339fe

before that commit i was using "4398d55" with no issues..

mx53loco-r

U-Boot 2012.07-7-g7395c76 (Jul 31 2012 - 11:29:17)


Board: MX53 LOCO

I2C:   ready

DRAM:  1 GiB

WARNING: Caches not enabled

CPU:   Freescale i.MX53 family rev2.1 at 1000 MHz

Reset cause: WDOG

MMC:   FSL_SDHC: 0, FSL_SDHC: 1

*** Warning - bad CRC, using default environment


Uncompressing Linux... done, booting the kernel

Regards,

-- 
Robert Nelson
http://www.rcn-ee.com/
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[U-Boot] mx53loco hangs on 2012.07

2012-07-31 Thread Fabio Estevam
Hi,

Just tried 2012.07 on a mx53loco and this is what I got:

U-Boot 2012.07 (Jul 31 2012 - 15:21:51)

Board: MX53 LOCO
I2C:   ready
DRAM:  1 GiB
WARNING: Caches not enabled
CPU:   Freescale i.MX53 family rev2.0 at 1000 MHz
Reset cause: POR
MMC:   FSL_SDHC: 0, FSL_SDHC: 1

(Hangs here)

Have anyone else seen this? I will start debugging it, and any
suggestions are welcome.

Regards,

Fabio Estevam
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[U-Boot] [PATCH] mx28evk: Turn on caches

2012-07-31 Thread Fabio Estevam
Turn on data and instruction caches.

Signed-off-by: Fabio Estevam 
---
 include/configs/mx28evk.h |2 --
 1 files changed, 0 insertions(+), 2 deletions(-)

diff --git a/include/configs/mx28evk.h b/include/configs/mx28evk.h
index 54d21e6..5f145d1 100644
--- a/include/configs/mx28evk.h
+++ b/include/configs/mx28evk.h
@@ -31,8 +31,6 @@
 #define CONFIG_MACH_TYPE   MACH_TYPE_MX28EVK
 
 #define CONFIG_SYS_NO_FLASH
-#define CONFIG_SYS_ICACHE_OFF
-#define CONFIG_SYS_DCACHE_OFF
 #define CONFIG_BOARD_EARLY_INIT_F
 #define CONFIG_ARCH_MISC_INIT
 
-- 
1.7.1


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Re: [U-Boot] [PATCH] tegra: harmony: fix comments for environment config options

2012-07-31 Thread Thierry Reding
On Tue, Jul 31, 2012 at 08:52:34AM -0700, Tom Warren wrote:
> Stephen/Thierry,
> 
> > -Original Message-
> > From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> > Sent: Tuesday, July 31, 2012 8:47 AM
> > To: Tom Warren
> > Cc: Thierry Reding; U-Boot Mailing List; Stephen Warren
> > Subject: [PATCH] tegra: harmony: fix comments for environment config options
> > 
> > From: Stephen Warren 
> > 
> > The environment is now stored in NAND, so update the comment to say so,
> > rather than saying it's not stored.
> > 
> > Signed-off-by: Stephen Warren 
> > ---
> > Tom, feel free to just squash this into my patch that added environment
> > support to Harmony if you want.
> 
> I'll just fix the 'not stored' comment in both harmony and tec when I apply 
> those patches to /next, if that's OK with you two.

That's fine with me. You can just copy Stephen's comment for TEC. In
fact probably the same patch can be used for both Medcom and Plutux as
well, but I'll submit them as separate patches after I've had the time
to actually test them.

Thierry


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Re: [U-Boot] [PATCH 2/2] tegra: Enable NAND on TEC

2012-07-31 Thread Thierry Reding
On Tue, Jul 31, 2012 at 09:40:54AM -0600, Stephen Warren wrote:
> On 07/31/2012 12:21 AM, Thierry Reding wrote:
> > This commit enables NAND support on the Tamonten Evaluation Carrier and
> > adds the corresponding device tree nodes. Furthermore, the U-Boot
> > environment can now be stored in NAND.
> 
> > diff --git a/include/configs/tec.h b/include/configs/tec.h
> 
> > +/* Environment not stored */
> > +#define CONFIG_ENV_IS_IN_NAND
> > +#define CONFIG_ENV_OFFSET  (SZ_512M - SZ_128K) /* 128K sector size 
> > */
> 
> I guess you also need to update the comment;-)

Hehe. Will do. =)

Thierry


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[U-Boot] [PATCH v3 2/2] rbpi: Add BCM2835 GPIO driver for raspberry pi

2012-07-31 Thread Vikram Narayanan
Add the driver to the default config

Signed-off-by: Vikram Narayanan 
---
 include/configs/rpi_b.h |3 ++-
 1 files changed, 2 insertions(+), 1 deletions(-)

diff --git a/include/configs/rpi_b.h b/include/configs/rpi_b.h
index f547027..d4bbccc 100644
--- a/include/configs/rpi_b.h
+++ b/include/configs/rpi_b.h
@@ -43,7 +43,8 @@
 #define CONFIG_SYS_NO_FLASH
 
 /* Devices */
-/* None yet */
+/* GPIO */
+#define CONFIG_BCM2835_GPIO
 
 /* Console UART */
 #define CONFIG_PL011_SERIAL
-- 
1.7.4.1


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[U-Boot] [PATCH v3 1/2] gpio: bcm2835: Add GPIO driver

2012-07-31 Thread Vikram Narayanan
Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.

Signed-off-by: Vikram Narayanan 
---
 arch/arm/include/asm/arch-bcm2835/gpio.h |   71 
 drivers/gpio/Makefile|1 +
 drivers/gpio/bcm2835_gpio.c  |   88 ++
 3 files changed, 160 insertions(+), 0 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
 create mode 100644 drivers/gpio/bcm2835_gpio.c

diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h 
b/arch/arm/include/asm/arch-bcm2835/gpio.h
new file mode 100644
index 000..515456a
--- /dev/null
+++ b/arch/arm/include/asm/arch-bcm2835/gpio.h
@@ -0,0 +1,71 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#ifndef _BCM2835_GPIO_H_
+#define _BCM2835_GPIO_H_
+
+#define BCM2835_GPIO_BASE  0x7E20
+#define BCM2835_GPIO_COUNT 53
+
+#define BCM2835_GPIO_FSEL_MASK 0x7
+#define BCM2835_GPIO_INPUT 0x0
+#define BCM2835_GPIO_OUTPUT0x1
+#define BCM2835_GPIO_ALT0  0x2
+#define BCM2835_GPIO_ALT1  0x3
+#define BCM2835_GPIO_ALT2  0x4
+#define BCM2835_GPIO_ALT3  0x5
+#define BCM2835_GPIO_ALT4  0x6
+#define BCM2835_GPIO_ALT5  0x7
+
+#define BCM2835_GPIO_COMMON_BANK(gpio) ((gpio < 32) ? 0 : 1)
+#define BCM2835_GPIO_COMMON_SHIFT(gpio)(gpio & 0x1f)
+
+#define BCM2835_GPIO_FSEL_BANK(gpio)   (gpio / 10)
+#define BCM2835_GPIO_FSEL_SHIFT(gpio)  ((gpio % 10) * 3)
+
+struct bcm_gpio_regs {
+   u32 gpfsel[6];
+   u32 reserved1;
+   u32 gpset[2];
+   u32 reserved2;
+   u32 gpclr[2];
+   u32 reserved3;
+   u32 gplev[2];
+   u32 reserved4;
+   u32 gpeds[2];
+   u32 reserved5;
+   u32 gpren[2];
+   u32 reserved6;
+   u32 gpfen[2];
+   u32 reserved7;
+   u32 gphen[2];
+   u32 reserved8;
+   u32 gplen[2];
+   u32 reserved9;
+   u32 gparen[2];
+   u32 reserved10;
+   u32 gppud;
+   u32 gppudclk[2];
+};
+
+#endif /* _BCM2835_GPIO_H_ */
diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
index 32a2474..8d2f2b2 100644
--- a/drivers/gpio/Makefile
+++ b/drivers/gpio/Makefile
@@ -40,6 +40,7 @@ COBJS-$(CONFIG_TEGRA_GPIO)+= tegra_gpio.o
 COBJS-$(CONFIG_DA8XX_GPIO) += da8xx_gpio.o
 COBJS-$(CONFIG_ALTERA_PIO) += altera_pio.o
 COBJS-$(CONFIG_MPC83XX_GPIO)   += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO)   += bcm2835_gpio.o
 
 COBJS  := $(COBJS-y)
 SRCS   := $(COBJS:.o=.c)
diff --git a/drivers/gpio/bcm2835_gpio.c b/drivers/gpio/bcm2835_gpio.c
new file mode 100644
index 000..eb02efa
--- /dev/null
+++ b/drivers/gpio/bcm2835_gpio.c
@@ -0,0 +1,88 @@
+/*
+ * Copyright (C) 2012 Vikram Narayananan
+ * 
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+
+#include 
+#include 
+#include 
+
+inline int gpio_is_valid(unsigned gpio)
+{
+   return (gpio < BCM2835_GPIO_COUNT);
+}
+
+int gpio_request(unsigned gpio, const char *label)
+{
+   return gpio_is_valid(gpio);
+}
+
+int gpio_free(unsigned gpio)
+{
+   return 0;
+}
+
+int gpio_direction_input(unsigned gpio)
+{
+   struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+   unsigned val;
+
+   val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+   val &= ~(BCM2835_GPIO_FSEL_MASK << BCM2835_GPIO_FSEL_SHIFT(gpio))

[U-Boot] [PATCH v3 0/2] Add GPIO driver for BCM2835 SoC

2012-07-31 Thread Vikram Narayanan
Also, add the driver to the raspberrypi default config

Cc: Stephen Warren 
Cc: Albert Aribaud 

Vikram Narayanan (2):
  gpio: bcm2835: Add GPIO driver
  rbpi: Add BCM2835 GPIO driver for raspberry pi

Changes from v2:
  Incorporate further comments from Stephen Warren
Changes from v1:
  Incorporate comments from Stephen Warren

 arch/arm/include/asm/arch-bcm2835/gpio.h |   71 
 drivers/gpio/Makefile|1 +
 drivers/gpio/bcm2835_gpio.c  |   88 ++
 include/configs/rpi_b.h  |3 +-
 4 files changed, 162 insertions(+), 1 deletions(-)
 create mode 100644 arch/arm/include/asm/arch-bcm2835/gpio.h
 create mode 100644 drivers/gpio/bcm2835_gpio.c

-- 
1.7.4.1

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Re: [U-Boot] [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320

2012-07-31 Thread Stefan Herbrechtsmeier

Am 31.07.2012 11:01, schrieb Jamie Lentin:

On Mon, 30 Jul 2012, Prafulla Wadaskar wrote:





-Original Message-
From: Jamie Lentin [mailto:j...@lentin.co.uk]
Sent: 31 July 2012 03:26
To: u-boot@lists.denx.de
Cc: Prafulla Wadaskar; albert.u.b...@aribaud.net;
ub...@lukaperkov.net; Jamie Lentin
Subject: [PATCH 2/2] kirkwood: Add support for the D-Link DNS-320

Extend dnskw to support the D-Link DNS-320 ShareCenter NAS also. For
more
information on this NAS, see:-

  http://jamie.lentin.co.uk/devices/dlink-dns320
  http://dns323.kood.org/dns-320
  http://sharecenter.dlink.com/products/DNS-320

Signed-off-by: Jamie Lentin 
Cc: prafu...@marvell.com
Cc: albert.u.b...@aribaud.net
---
 MAINTAINERS|4 +
 board/d-link/dnskw/dnskw.c |8 +-
 board/d-link/dnskw/dnskw.h |6 +
 board/d-link/dnskw/kwbimage.dns320.cfg |  207

 boards.cfg |1 +
 include/configs/dnskw.h|   10 ++
 6 files changed, 232 insertions(+), 4 deletions(-)
 create mode 100644 board/d-link/dnskw/kwbimage.dns320.cfg

diff --git a/MAINTAINERS b/MAINTAINERS
index fd0c65c..92ede1f 100644
--- a/MAINTAINERS
+++ b/MAINTAINERS
@@ -673,6 +673,10 @@ Igor Grinberg 

 cm-t35ARM ARMV7 (OMAP3xx Soc)

+Jamie Lentin 
+
+dns320ARM926EJS (Kirkwood SoC)
+
 Stefan Herbrechtsmeier 

 dns325ARM926EJS (Kirkwood SoC)
diff --git a/board/d-link/dnskw/dnskw.c b/board/d-link/dnskw/dnskw.c
index d29735c..cd6bfe9 100644
--- a/board/d-link/dnskw/dnskw.c
+++ b/board/d-link/dnskw/dnskw.c
@@ -58,8 +58,8 @@ int board_early_init_f(void)
 MPP10_UART0_TXD,
 MPP11_UART0_RXD,
 MPP12_SD_CLK,
-MPP13_SD_CMD,
-MPP14_SD_D0,
+MPP13_UART1_TXD,/* Custom ...*/
+MPP14_UART1_RXD,/* ... controller */


Are these entries valid for both boards? If not then encapsulate with 
#ifdef


It seems fairly reasonable to---the DNS-325 does not make use of the 
SD interface. Either these pins are unattached or attached to the 
embedded controller in the same way, but the connection is not useful. 
Either way, setting them to UART does not cause any problems on the 
DNS-325.
The DNS-325 has no SD interface. The SD configuration is only the 
default configuration for this pins (compare to other boards). Maybe we 
should change all other SD pins to GPIO to make clear that they are unused.




I could set MPP13_GPIO, MPP14_GPIO for the DNS-325 instead, or just 
not configure them at all (if that is an option).
As MMP14 has a internal pull-up you can configure it as input 
MPP14_UART1_RXD even if it is not connected on the board.



 MPP15_SD_D1,
 MPP16_SD_D2,
 MPP17_SD_D3,
@@ -74,13 +74,13 @@ int board_early_init_f(void)
 MPP26_GPIO,/* power led */
 MPP27_GPIO,/* sata0(right) error led */
 MPP28_GPIO,/* sata1(left) error led */
-MPP29_GPIO,/* usb error led */
+MPP29_GPIO,/* usb error led (dns-325) */


Ditto


Unattached on the DNS-320, so same situation as above.


 MPP30_GPIO,
 MPP31_GPIO,
 MPP32_GPIO,
 MPP33_GPIO,
 MPP34_GPIO,/* power key */
-MPP35_GPIO,
+MPP35_GPIO,/* usb error led (dns-320) */


Ditto


Unattached on the DNS-325, so same situation as above.


 MPP36_GPIO,
 MPP37_GPIO,
 MPP38_GPIO,
diff --git a/board/d-link/dnskw/dnskw.h b/board/d-link/dnskw/dnskw.h
index 4b11cb6..8886050 100644
--- a/board/d-link/dnskw/dnskw.h
+++ b/board/d-link/dnskw/dnskw.h
@@ -43,6 +43,12 @@
 #define DNSKW_OE_VAL_HIGH0x0800/* disable leds */
 #endif /* CONFIG_BOARD_IS_DNS325 */

+/* DNS-320 specific configuration */
+#ifdef CONFIG_BOARD_IS_DNS320
+#define DNSKW_OE_VAL_LOW0x3800/* disable leds */
+#define DNSKW_OE_VAL_HIGH0x0808/* disable leds */
+#endif /* CONFIG_BOARD_IS_DNS320 */
+
 /* PHY related */
 #define MV88E1116_MAC_CTRL_REG21
 #define MV88E1116_PGADR_REG22
diff --git a/board/d-link/dnskw/kwbimage.dns320.cfg b/board/d-
link/dnskw/kwbimage.dns320.cfg
new file mode 100644
index 000..5fb4052
--- /dev/null
+++ b/board/d-link/dnskw/kwbimage.dns320.cfg
@@ -0,0 +1,207 @@
+#
+# Copyright (C) 2012
+# Jamie Lentin 
+#
+# Based on dns325 support:
+# Copyright (C) 2011
+# Stefan Herbrechtsmeier 
+#
+# See file CREDITS for list of people who contributed to this
+# project.
+#
+# This program is free software; you can redistribute it and/or
+# modify it under the terms of the GNU General Public License as
+# published by the Free Software Foundation; either version 2 of
+# the License, or (at your option) any later version.
+#
+# This program is distributed in the hope that it will be useful,
+# but WITHOUT ANY WARRANTY; without even the implied warranty of
+# MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+# G

Re: [U-Boot] [PATCH v3 5/7] dfu:cmd: Support for DFU u-boot command

2012-07-31 Thread Stephen Warren
On 07/31/2012 12:37 AM, Lukasz Majewski wrote:
> Support for u-boot's "dfu   [list]" command.

> +U_BOOT_CMD(dfu, CONFIG_SYS_MAXARGS, 1, do_dfu,
> + "Device Firmware Upgrade",
> + "  [list]\n"
> + "  - device firmware upgrade on a device \n"
> + "attached to interface \n"
> + "[list] - list available alt settings"
> +);

Hmm. Is there any way to make this work without specifying "interface
dev", or to allow specifying multiple "interface dev" entries? On a
system with all of eMMC, NAND, and SPI, I'd like to just run "dfu" as
the U-Boot command, and have the host specify which of those "devices"
it wants to download to using the DFU protocol. So, if flashing a bunch
of devices, there is no need to interact with U-Boot over both serial
and USB in order to invoke the dfu command multiple times.

Somewhat related to this, it looks like the eMMC support doesn't allow
the HW partition to be specified; it would be nice to expose alt
settings for all of:

a) Each individual HW partition (boot0/1 if present, general0/1/2/3 if
present, the user area, maybe the replay block)

b) Perhaps also a linearized view of the raw eMMC (LBAs 0..boot_size-1
write to boot 0, LBAs boot_size..(2*boot_size)-1 write to boot1, LBAs
2*boot_size..end_of_device write to user area for example).
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Re: [U-Boot] [PATCH] env_nand: align NAND buffers

2012-07-31 Thread Scott Wood
On 07/31/2012 10:59 AM, Tom Warren wrote:
> Scott,
> 
>> -Original Message-
>> From: Scott Wood [mailto:scottw...@freescale.com]
>> Sent: Monday, July 30, 2012 4:01 PM
>> To: Stephen Warren
>> Cc: Tom Warren; Simon Glass; U-Boot Mailing List; Stephen Warren
>> Subject: Re: [PATCH] env_nand: align NAND buffers
>>
>> On 07/30/2012 12:38 PM, Stephen Warren wrote:
>>> From: Stephen Warren 
>>>
>>> This allows cache flush/invalidate operations to succeed on the buffers.
>>>
>>> Signed-off-by: Stephen Warren 
>>> ---
>>>  common/env_nand.c |   10 +-
>>>  1 files changed, 5 insertions(+), 5 deletions(-)
>>
>> Acked-by: Scott Wood 
>>
>> I'm assuming you want it to go with the Tegra patches and not via my tree.
> I'm fine with taking the env_nand and cmd_nand changes thru the Tegra tree. 
> Let me know if that's OK with you.

It's OK with me.

-Scott


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Re: [U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers

2012-07-31 Thread Scott Wood
On 07/31/2012 10:40 AM, Stephen Warren wrote:
> On 07/31/2012 12:21 AM, Thierry Reding wrote:
>> In order for cache invalidation and flushing to work properly, the data
>> and OOB buffers must be aligned to full cache lines.
>>
>> Signed-off-by: Thierry Reding 
> 
> You probably want to CC the NAND maintainer, Scott Wood (I have here) so
> he can ack this or apply it.
> 
>> ---
>>  common/cmd_nand.c | 4 ++--
>>  1 file changed, 2 insertions(+), 2 deletions(-)
>>
>> diff --git a/common/cmd_nand.c b/common/cmd_nand.c
>> index a91ccf4..4367f5a 100644
>> --- a/common/cmd_nand.c
>> +++ b/common/cmd_nand.c
>> @@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int 
>> only_oob, int repeat)
>>  
>>  last = off;
>>  
>> -datbuf = malloc(nand->writesize);
>> -oobbuf = malloc(nand->oobsize);
>> +datbuf = memalign(ARCH_DMA_MINALIGN, nand->writesize);
>> +oobbuf = memalign(ARCH_DMA_MINALIGN, nand->oobsize);
>>  if (!datbuf || !oobbuf) {
>>  puts("No memory for page buffer\n");
>>  return 1;
> 

Acked-by: Scott Wood 

...though I'm still not fond of the idea that every user of an API has
to know whether DMA might be used on the buffer.

-Scott


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Re: [U-Boot] [PATCH v3 06/18] tegra: fdt: Add LCD definitions for Tegra

2012-07-31 Thread Stephen Warren
On 07/31/2012 03:27 AM, Simon Glass wrote:
> On Thu, Jul 12, 2012 at 4:25 PM, Simon Glass  wrote:
>> Add LCD definitions and also a proposed binding for LCD displays.
>>
>> The PWM is as per what will likely be committed to linux-next soon.
>>
>> The displaymode binding comes from a proposal here:
>>
>> http://lists.freedesktop.org/archives/dri-devel/2012-July/024875.html
>>
>> The panel binding is new, and fills a need to specify the panel
>> timings and other tegra-specific information. Should a binding appear
>> that allows the pwm to handle this automatically, we can revisit
>> this.
> 
> Any comments on this binding please? The main addition from Thierry's
> one posted on LMKL is the LCD resolution selection.

I have some concerns about the way the mode is represented in the
binding; the timing parameters are quite different to how e.g. an EDID
DTD would represent them, which I think will lead to conversion mistakes
when writing the DT.

I'm trying to get along of Sascha's original email so I can join in on
that discussion.

>> diff --git a/doc/device-tree-bindings/video/tegra20-dc.txt 
>> b/doc/device-tree-bindings/video/tegra20-dc.txt

>> +Optional properties (rgb):
>> + - nvidia,frame-buffer: address of frame buffer (if omitted it will be
>> +   calculated)
>> +   - This may be useful to share an address between U-Boot and Linux and
>> +   avoid boot-time corruption / flicker

Why can't the display driver read this out of the display registers,
instead of requiring the same information to be passed using DT too?
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Re: [U-Boot] [u-boot-arm/next RESEND PATCH 0/3] OMAP3: igep00x0: add nand flash and SPL support

2012-07-31 Thread Javier Martinez Canillas
On Mon, Jul 30, 2012 at 7:06 PM, Tom Rini  wrote:
> On Sat, Jul 28, 2012 at 01:19:31PM +0200, Javier Martinez Canillas wrote:
>
>> IGEP-based boards can have two different flash memories, a OneNAND or a
>> NAND device.
>>
>> Since u-boot still lacks of a device model to be the able to look at
>> run-time which memory type is available on a the board, a built time
>> config option is needed to choose which memory to use.
>>
>> This is a resend of a patch-set that adds both a config option for the
>> nand memory type and SPL support to IGEP-based boards.
>>
>> The patch-set is composed of the following patches:
>>
>> [u-boot-arm/next RESEND PATCH 1/3] OMAP3: igep00x0: Add config
>> [u-boot-arm/next RESEND PATCH 2/3] OMAP3: mem: Add Numonyx OneNAND
>> [u-boot-arm/next RESEND PATCH 3/3] OMAP3: igep00x0: add SPL support
>
> This all looks good, barring comments from someone else, I'll pick this
> up Friday or so.
>
> --
> Tom

Perfect, thanks a lot Tom!

Best regards,
Javier
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Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver

2012-07-31 Thread Vikram Narayanan

On 7/31/2012 9:22 PM, Stephen Warren wrote:

On 07/31/2012 09:46 AM, Vikram Narayanan wrote:

On 7/15/2012 10:53 PM, Stephen Warren wrote:

On 07/11/2012 02:37 PM, Vikram Narayanan wrote:

Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.



diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
b/arch/arm/include/asm/arch-bcm2835/gpio.h


One more comment on the patch subject; it probably should be "gpio:
bcm2835:" not "bcm:" since (a) it's in the GPIO directory and (b) the
GPIO module is specifically for a BCM2835, and probably doesn't apply to
any/all Broadcom devices.



Linux kernel follows this naming, to be exact, it should've been
gpio-bcm2835.c. Having a thought in mind that one day the namings would
be made consistent with the kernel. That is the reason for this naming,
but isn't a big deal to change it.


Hmmm. It seems better to be internally consistent with U-Boot rather
than keeping (onyl part of) U-Boot consistent with the kernel...


Yes.




Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?


If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then
it shall be COMMON_SHIFT.

But it doesn't do any shifting like the FSEL_SHIFT, rather it does only
masking of bits. So, it makes more sense for me to name it as MASK and
not SHIFT.


The full quote you're replying to was:


+int gpio_get_value(unsigned gpio)



+   return (val>>  BCM2835_GPIO_COMMON_MASK(gpio))&  0x1;


Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?


... so that macro is being used as a shift not as a mask.


Naming isn't really a problem for me. If you want it to be SHIFT, I'd go 
with it.

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[U-Boot] [PATCH v2] net: Make the netconsole buffer size configurable

2012-07-31 Thread Joe Hershberger
Allow a board to configure a larger buffer for netconsole, but leave
the default.

Signed-off-by: Joe Hershberger 
Cc: Mike Frysinger 
---
 doc/README.NetConsole|2 ++
 drivers/net/netconsole.c |8 ++--
 2 files changed, 8 insertions(+), 2 deletions(-)

diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..73543e5 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -6,6 +6,8 @@ serial and network input/output devices by adjusting the 
'stdin' and
 set either of these variables to "nc". Input and output can be
 switched independently.
 
+CONFIG_NETCONSOLE_BUFFER_SIZE - Override the default buffer size
+
 We use an environment variable 'ncip' to set the IP address and the
 port of the destination. The format is :. If  is
 omitted, the value of  is used. If the env var doesn't exist, the
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..c68ca4f 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -28,7 +28,11 @@
 
 DECLARE_GLOBAL_DATA_PTR;
 
-static char input_buffer[512];
+#ifndef CONFIG_NETCONSOLE_BUFFER_SIZE
+#define CONFIG_NETCONSOLE_BUFFER_SIZE 512
+#endif
+
+static char input_buffer[CONFIG_NETCONSOLE_BUFFER_SIZE];
 static int input_size; /* char count in input buffer */
 static int input_offset; /* offset to valid chars in input buffer */
 static int input_recursion;
@@ -203,7 +207,7 @@ static void nc_puts(const char *s)
 
len = strlen(s);
while (len) {
-   int send_len = min(len, 512);
+   int send_len = min(len, sizeof(input_buffer));
nc_send_packet(s, send_len);
len -= send_len;
s += send_len;
-- 
1.6.0.2

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[U-Boot] [PATCH v2] net: Make netconsole src and dest ports configurable

2012-07-31 Thread Joe Hershberger
It is desirable to use different port numbers for sending and receiving
packets with netconsole in the case where you have more than one device
on the local subnet with netconsole enabled for broadcast.  When they
use the same port for both, any output from one will look like input to
the other.  This is typlically not desirable.

This patch allows the input and output ports to be specified separately
in the environment.

Signed-off-by: Joe Hershberger 
Cc: Mike Frysinger 
---
 doc/README.NetConsole|3 +++
 drivers/net/netconsole.c |   29 -
 tools/netconsole |   18 +++---
 3 files changed, 34 insertions(+), 16 deletions(-)

diff --git a/doc/README.NetConsole b/doc/README.NetConsole
index c8bcb90..070e86a 100644
--- a/doc/README.NetConsole
+++ b/doc/README.NetConsole
@@ -11,6 +11,9 @@ port of the destination. The format is :. If 
 is
 omitted, the value of  is used. If the env var doesn't exist, the
 broadcast address and port  are used. If it is set to an IP
 address of 0 (or 0.0.0.0) then no messages are sent to the network.
+The source / listening port can be configured separately by setting
+the 'ncinport' environment variable and the destination port can be
+configured by setting the 'ncoutport' environment variable.
 
 For example, if your server IP is 192.168.1.1, you could use:
 
diff --git a/drivers/net/netconsole.c b/drivers/net/netconsole.c
index 14243b8..86f5301 100644
--- a/drivers/net/netconsole.c
+++ b/drivers/net/netconsole.c
@@ -36,7 +36,8 @@ static int output_recursion;
 static int net_timeout;
 static uchar nc_ether[6]; /* server enet address */
 static IPaddr_t nc_ip; /* server ip */
-static short nc_port; /* source/target port */
+static short nc_out_port; /* target output port */
+static short nc_in_port; /* source input port */
 static const char *output_packet; /* used by first send udp */
 static int output_packet_len;
 
@@ -71,7 +72,7 @@ void NcStart(void)
net_set_arp_handler(nc_wait_arp_handler);
pkt = (uchar *)NetTxPacket + NetEthHdrSize() + IP_UDP_HDR_SIZE;
memcpy(pkt, output_packet, output_packet_len);
-   NetSendUDPPacket(nc_ether, nc_ip, nc_port, nc_port,
+   NetSendUDPPacket(nc_ether, nc_ip, nc_out_port, nc_in_port,
output_packet_len);
}
 }
@@ -80,7 +81,7 @@ int nc_input_packet(uchar *pkt, unsigned dest, unsigned src, 
unsigned len)
 {
int end, chunk;
 
-   if (dest != nc_port || !len)
+   if (dest != nc_in_port || !len)
return 0; /* not for us */
 
debug_cond(DEBUG_DEV_PKT, "input: \"%*.*s\"\n", len, len, pkt);
@@ -139,7 +140,7 @@ static void nc_send_packet(const char *buf, int len)
memcpy(pkt, buf, len);
ether = nc_ether;
ip = nc_ip;
-   NetSendUDPPacket(ether, ip, nc_port, nc_port, len);
+   NetSendUDPPacket(ether, ip, nc_out_port, nc_in_port, len);
 
if (inited)
eth_halt();
@@ -148,20 +149,30 @@ static void nc_send_packet(const char *buf, int len)
 static int nc_start(void)
 {
int netmask, our_ip;
+   char *p;
 
-   nc_port = ; /* default port */
+   nc_out_port = ; /* default port */
+   nc_in_port = nc_out_port;
 
if (getenv("ncip")) {
-   char *p;
 
nc_ip = getenv_IPaddr("ncip");
if (!nc_ip)
return -1;  /* ncip is 0.0.0.0 */
p = strchr(getenv("ncip"), ':');
-   if (p != NULL)
-   nc_port = simple_strtoul(p + 1, NULL, 10);
+   if (p != NULL) {
+   nc_out_port = simple_strtoul(p + 1, NULL, 10);
+   nc_in_port = nc_out_port;
+   }
} else
-   nc_ip = ~0; /* ncip is not set */
+   nc_ip = ~0; /* ncip is not set, so broadcast */
+
+   p = getenv("ncoutport");
+   if (p != NULL)
+   nc_out_port = simple_strtoul(p, NULL, 10);
+   p = getenv("ncinport");
+   if (p != NULL)
+   nc_in_port = simple_strtoul(p, NULL, 10);
 
our_ip = getenv_IPaddr("ipaddr");
netmask = getenv_IPaddr("netmask");
diff --git a/tools/netconsole b/tools/netconsole
index c8109bb..1a0ef22 100755
--- a/tools/netconsole
+++ b/tools/netconsole
@@ -2,7 +2,7 @@
 
 usage() {
(
-   echo "Usage: $0  [board port]"
+   echo "Usage: $0  [board-port [board-in-port]]"
echo ""
echo "If port is not specified, '' will be used"
[ -z "$*" ] && exit 0
@@ -24,9 +24,13 @@ while [ -n "$1" ] ; do
 done
 
 ip=$1
-port=${2:-}
+board_out_port=${2:-}
+board_in_port=${3:-${board_out_port}}
 
-if [ -z "${ip}" ] || [ -n "$3" ] ; then
+echo Board out port: ${board_out_port}
+echo Board in port: ${board_in_port}
+
+if [ -z "${ip}" ] || [ -n "$4" ] ; then
usage "Invalid number of arguments"
 fi
 

Re: [U-Boot] [PATCH] tegra: harmony: fix comments for environment config options

2012-07-31 Thread Tom Warren
Stephen/Thierry,

> -Original Message-
> From: Stephen Warren [mailto:swar...@wwwdotorg.org]
> Sent: Tuesday, July 31, 2012 8:47 AM
> To: Tom Warren
> Cc: Thierry Reding; U-Boot Mailing List; Stephen Warren
> Subject: [PATCH] tegra: harmony: fix comments for environment config options
> 
> From: Stephen Warren 
> 
> The environment is now stored in NAND, so update the comment to say so,
> rather than saying it's not stored.
> 
> Signed-off-by: Stephen Warren 
> ---
> Tom, feel free to just squash this into my patch that added environment
> support to Harmony if you want.

I'll just fix the 'not stored' comment in both harmony and tec when I apply 
those patches to /next, if that's OK with you two.

Tom
-- 
nvpublic
> 
>  include/configs/harmony.h |2 +-
>  1 files changed, 1 insertions(+), 1 deletions(-)
> 
> diff --git a/include/configs/harmony.h b/include/configs/harmony.h index
> 85059b9..69857dd 100644
> --- a/include/configs/harmony.h
> +++ b/include/configs/harmony.h
> @@ -68,7 +68,7 @@
>  #define CONFIG_SYS_MAX_NAND_DEVICE   1
>  #define CONFIG_SYS_NAND_BASE TEGRA20_NAND_BASE
> 
> -/* Environment not stored */
> +/* Environment in NAND (which is 512M), aligned to start of last sector
> +*/
>  #define CONFIG_ENV_IS_IN_NAND
>  #define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K sector size */
> 
> --
> 1.7.0.4

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Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver

2012-07-31 Thread Stephen Warren
On 07/31/2012 09:46 AM, Vikram Narayanan wrote:
> On 7/15/2012 10:53 PM, Stephen Warren wrote:
>> On 07/11/2012 02:37 PM, Vikram Narayanan wrote:
>>> Driver for BCM2835 SoC. This gives the basic functionality of
>>> setting/clearing the output.
>>
>>> diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h
>>> b/arch/arm/include/asm/arch-bcm2835/gpio.h

One more comment on the patch subject; it probably should be "gpio:
bcm2835:" not "bcm:" since (a) it's in the GPIO directory and (b) the
GPIO module is specifically for a BCM2835, and probably doesn't apply to
any/all Broadcom devices.

>>> diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile
>>
>>>   COBJS-$(CONFIG_DA8XX_GPIO)+= da8xx_gpio.o
>>>   COBJS-$(CONFIG_ALTERA_PIO)+= altera_pio.o
>>>   COBJS-$(CONFIG_MPC83XX_GPIO)+= mpc83xx_gpio.o
>>> +COBJS-$(CONFIG_BCM2835_GPIO)+= gpio_bcm2835.o
>>
>> It looks like the name bcm2835_gpio.c would be more consistent with
>> existing drivers, but not a big deal.
>>
>>> diff --git a/drivers/gpio/gpio_bcm2835.c b/drivers/gpio/gpio_bcm2835.c
> 
> Linux kernel follows this naming, to be exact, it should've been
> gpio-bcm2835.c. Having a thought in mind that one day the namings would
> be made consistent with the kernel. That is the reason for this naming,
> but isn't a big deal to change it.

Hmmm. It seems better to be internally consistent with U-Boot rather
than keeping (onyl part of) U-Boot consistent with the kernel...

>> Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?
> 
> If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then
> it shall be COMMON_SHIFT.
> 
> But it doesn't do any shifting like the FSEL_SHIFT, rather it does only
> masking of bits. So, it makes more sense for me to name it as MASK and
> not SHIFT.

The full quote you're replying to was:

>> +int gpio_get_value(unsigned gpio)
> 
>> +return (val >> BCM2835_GPIO_COMMON_MASK(gpio)) & 0x1;
> 
> Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?

... so that macro is being used as a shift not as a mask.
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[U-Boot] [PATCH] tegra: harmony: fix comments for environment config options

2012-07-31 Thread Stephen Warren
From: Stephen Warren 

The environment is now stored in NAND, so update the comment to say so,
rather than saying it's not stored.

Signed-off-by: Stephen Warren 
---
Tom, feel free to just squash this into my patch that added environment
support to Harmony if you want.

 include/configs/harmony.h |2 +-
 1 files changed, 1 insertions(+), 1 deletions(-)

diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 85059b9..69857dd 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -68,7 +68,7 @@
 #define CONFIG_SYS_MAX_NAND_DEVICE 1
 #define CONFIG_SYS_NAND_BASE   TEGRA20_NAND_BASE
 
-/* Environment not stored */
+/* Environment in NAND (which is 512M), aligned to start of last sector */
 #define CONFIG_ENV_IS_IN_NAND
 #define CONFIG_ENV_OFFSET  (SZ_512M - SZ_128K) /* 128K sector size */
 
-- 
1.7.0.4

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Re: [U-Boot] [PATCH v2 1/2] bcm: Add GPIO driver

2012-07-31 Thread Vikram Narayanan

Hello Stephen,

On 7/15/2012 10:53 PM, Stephen Warren wrote:

On 07/11/2012 02:37 PM, Vikram Narayanan wrote:

Driver for BCM2835 SoC. This gives the basic functionality of
setting/clearing the output.



diff --git a/arch/arm/include/asm/arch-bcm2835/gpio.h 
b/arch/arm/include/asm/arch-bcm2835/gpio.h



+#define BCM2835_GPIO_BASE  0x7E20
+#define BCM2835_NUM_GPIOS  53


For consistency, that might be better as BCM2835_GPIO_COUNT, but not a
big deal.


diff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile



  COBJS-$(CONFIG_DA8XX_GPIO)+= da8xx_gpio.o
  COBJS-$(CONFIG_ALTERA_PIO)+= altera_pio.o
  COBJS-$(CONFIG_MPC83XX_GPIO)  += mpc83xx_gpio.o
+COBJS-$(CONFIG_BCM2835_GPIO)   += gpio_bcm2835.o


It looks like the name bcm2835_gpio.c would be more consistent with
existing drivers, but not a big deal.


diff --git a/drivers/gpio/gpio_bcm2835.c b/drivers/gpio/gpio_bcm2835.c




Linux kernel follows this naming, to be exact, it should've been 
gpio-bcm2835.c. Having a thought in mind that one day the namings would 
be made consistent with the kernel. That is the reason for this naming, 
but isn't a big deal to change it.



+inline int gpio_is_valid(unsigned gpio)
+{
+   return (gpio>  BCM2835_NUM_GPIOS) ? 0 : 1;


Presumably gpio==0 is a valid GPIO, so that should be>= not>. It'd be
simpler to write it as:

return gpio<  BCM2835_NUM_GPIOS;


+int gpio_request(unsigned gpio, const char *label)
+{
+   return (gpio_is_valid(gpio)) ? 1 : 0;


Why not just return gpio_is_valid_(gpio) directly?


+int gpio_direction_input(unsigned gpio)



+   val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+   val&= ~(BCM2835_GPIO_FSEL_MASK<<  BCM2835_GPIO_FSEL_SHIFT(gpio));


Even if BCM2835_GPIO_OUTPUT==0, it seems better to | it in here for
documentation purposes, so add:

val |= (BCM2835_GPIO_INPUT<<  BCM2835_GPIO_FSEL_SHIFT(gpio));

Otherwise, there's not much point creating the #define BCM2835_GPIO_INPUT.


+int gpio_direction_output(unsigned gpio, int value)
+{
+   struct bcm_gpio_regs *reg = (struct bcm_gpio_regs *)BCM2835_GPIO_BASE;
+   unsigned val;
+
+   val = readl(®->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);
+   val&= ~(BCM2835_GPIO_FSEL_MASK<<  BCM2835_GPIO_FSEL_SHIFT(gpio));
+   val |= (BCM2835_GPIO_OUTPUT<<  BCM2835_GPIO_FSEL_SHIFT(gpio));
+   writel(val, reg->gpfsel[BCM2835_GPIO_FSEL_BANK(gpio)]);


This (setting the direction) should happen after the following to set
the value:


+   if (value)
+   gpio_set_value(gpio, value);


That way, when the GPIO is set to output, the correct value will
immediately be driven onto the GPIO, so a glitch may be avoided.


+int gpio_get_value(unsigned gpio)



+   return (val>>  BCM2835_GPIO_COMMON_MASK(gpio))&  0x1;




Agree for all the above. Will get reflected in the v3.


Shouldn't that be BCM2835_GPIO_COMMON_SHIFT not BCM2835_GPIO_COMMON_MASK?


If you'd like to have naming consistency FSEL_SHIFT/COMMON_SHIFT, then 
it shall be COMMON_SHIFT.


But it doesn't do any shifting like the FSEL_SHIFT, rather it does only 
masking of bits. So, it makes more sense for me to name it as MASK and 
not SHIFT.


~Vikram
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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function

2012-07-31 Thread R, Sricharan
Correct.
DRAM_ADDR_SPACE_END should be 0x for OMAP5.

Thanks,
 Sricharan

On Tue, Jul 31, 2012 at 9:12 PM, Tom Rini  wrote:
> On 07/31/2012 08:27 AM, R, Sricharan wrote:
>> Hi Tom,
>>
>> On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini  wrote:
>>> On 07/31/2012 01:33 AM, R, Sricharan wrote:
 Hi Tom,
 [snip..]
> diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
> b/arch/arm/include/asm/arch-omap5/omap.h
> index 7f05cb5..c697e0b 100644
> --- a/arch/arm/include/asm/arch-omap5/omap.h
> +++ b/arch/arm/include/asm/arch-omap5/omap.h
> @@ -39,11 +39,6 @@
>  #define OMAP54XX_L4_WKUP_BASE  0x4Ae0
>  #define OMAP54XX_L4_PER_BASE   0x4800
>
> -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000
> -#define OMAP54XX_DRAM_ADDR_SPACE_END   0x
> -#define DRAM_ADDR_SPACE_START  OMAP54XX_DRAM_ADDR_SPACE_START
> -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END
> -
   This is a problem for OMAP5, which has  a trap section at 0xFF00
   with in the sdram boundary. OMAP5 evm board has 2GB of memory from
   0x8000 - 0x.  Size of the trap section should not be
 included in the
  total sdram size.
>>>
>>> But it's not sdram size.  What happens when you're executing at the trap
>>> section, or rather, where are you executing code from?
>>
>>When we execute at trap section address, the system aborts.
>>EMIF returns a exception. This is to catch the unmapped tiler
>>entries.
>> So total size of sdram size calculated should subtract the size
>>of trap section if that falls with in the sdram boundary,
>>as in case of omap5.  This is taken care in omap_sdram_size
>>function.  But with this change the trap section will go un-noticed.
>
> So you're saying the problem is that 0xFF... needs to be included in
> DRAM_ADDR_SPACE on omap5?
>
> --
> Tom
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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function

2012-07-31 Thread Tom Rini
On 07/31/2012 08:27 AM, R, Sricharan wrote:
> Hi Tom,
> 
> On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini  wrote:
>> On 07/31/2012 01:33 AM, R, Sricharan wrote:
>>> Hi Tom,
>>> [snip..]
 diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
 b/arch/arm/include/asm/arch-omap5/omap.h
 index 7f05cb5..c697e0b 100644
 --- a/arch/arm/include/asm/arch-omap5/omap.h
 +++ b/arch/arm/include/asm/arch-omap5/omap.h
 @@ -39,11 +39,6 @@
  #define OMAP54XX_L4_WKUP_BASE  0x4Ae0
  #define OMAP54XX_L4_PER_BASE   0x4800

 -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000
 -#define OMAP54XX_DRAM_ADDR_SPACE_END   0x
 -#define DRAM_ADDR_SPACE_START  OMAP54XX_DRAM_ADDR_SPACE_START
 -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END
 -
>>>   This is a problem for OMAP5, which has  a trap section at 0xFF00
>>>   with in the sdram boundary. OMAP5 evm board has 2GB of memory from
>>>   0x8000 - 0x.  Size of the trap section should not be
>>> included in the
>>>  total sdram size.
>>
>> But it's not sdram size.  What happens when you're executing at the trap
>> section, or rather, where are you executing code from?
> 
>When we execute at trap section address, the system aborts.
>EMIF returns a exception. This is to catch the unmapped tiler
>entries.
> So total size of sdram size calculated should subtract the size
>of trap section if that falls with in the sdram boundary,
>as in case of omap5.  This is taken care in omap_sdram_size
>function.  But with this change the trap section will go un-noticed.

So you're saying the problem is that 0xFF... needs to be included in
DRAM_ADDR_SPACE on omap5?

-- 
Tom
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Re: [U-Boot] [PATCH 2/2] tegra: Enable NAND on TEC

2012-07-31 Thread Stephen Warren
On 07/31/2012 12:21 AM, Thierry Reding wrote:
> This commit enables NAND support on the Tamonten Evaluation Carrier and
> adds the corresponding device tree nodes. Furthermore, the U-Boot
> environment can now be stored in NAND.

> diff --git a/include/configs/tec.h b/include/configs/tec.h

> +/* Environment not stored */
> +#define CONFIG_ENV_IS_IN_NAND
> +#define CONFIG_ENV_OFFSET(SZ_512M - SZ_128K) /* 128K sector size 
> */

I guess you also need to update the comment;-)
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Re: [U-Boot] [PATCH 1/2] cmd_nand: dump: Align data and OOB buffers

2012-07-31 Thread Stephen Warren
On 07/31/2012 12:21 AM, Thierry Reding wrote:
> In order for cache invalidation and flushing to work properly, the data
> and OOB buffers must be aligned to full cache lines.
> 
> Signed-off-by: Thierry Reding 

You probably want to CC the NAND maintainer, Scott Wood (I have here) so
he can ack this or apply it.

> ---
>  common/cmd_nand.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
> 
> diff --git a/common/cmd_nand.c b/common/cmd_nand.c
> index a91ccf4..4367f5a 100644
> --- a/common/cmd_nand.c
> +++ b/common/cmd_nand.c
> @@ -48,8 +48,8 @@ static int nand_dump(nand_info_t *nand, ulong off, int 
> only_oob, int repeat)
>  
>   last = off;
>  
> - datbuf = malloc(nand->writesize);
> - oobbuf = malloc(nand->oobsize);
> + datbuf = memalign(ARCH_DMA_MINALIGN, nand->writesize);
> + oobbuf = memalign(ARCH_DMA_MINALIGN, nand->oobsize);
>   if (!datbuf || !oobbuf) {
>   puts("No memory for page buffer\n");
>   return 1;
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[U-Boot] early_malloc outline

2012-07-31 Thread Tomas Hlavacek
Hello all!

In u-boot-dm mailinglist we had a discussion about implementation of
early_malloc (not only) for U-Boot Driver Model. The intention is to
have a simple malloc() function in the early stage of init before
relocation and before RAM is up and running. There was an experimental
patch that added the early heap to GD structure.

In the following discussion Graeme Russ pointed out that there is a
pre-console buffer which does the similar thing. And we should not
explode GD by adding the early heap (which is going to be few hundreds
of bytes long) into it. He suggested to create an independent area
locked in cache lines for early heap in order to allow split GD and
early heap into more non-contiguous blocks.

Pavel Hermann said that we would have to copy data twice (first before
the RAM is up and running and caches are still off and second after
RAM and dlmalloc is initialized).

Marek Vasut said (earlier in the discussion) that we do not need to
care about few hundred of bytes, especially after copying them into
RAM. And Wolfgang Denk resisted. He also pointed out that there are
other possibilities where early memory may be allocated -
on-chip-memory, external SRAM and others and these should be kept in
mind including existing size restrictions.

(I apologize for eventual misinterpretation and I am sorry that we do
not have a link to the u-boot-dm mailinglist archive nor GMANE. But I
can eventually Fwd. needed pieces of the discussion.)

We would like to hear opinions on the early_malloc idea to find a
broadly acceptable solution.

Can/should we use some existing mechanism? Or would it be considered a
viable option to choose different beginning address for early heap,
use it (in architecture-specific way) and keep the pointer to the
beginning in GD. Then copy the early heap to memory before caches are
flushed and in case of DM copy again data from early heap to new
destinations that has been obtained through malloc() when it is
initialized?

Tomas

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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function

2012-07-31 Thread R, Sricharan
Hi Tom,

On Tue, Jul 31, 2012 at 8:43 PM, Tom Rini  wrote:
> On 07/31/2012 01:33 AM, R, Sricharan wrote:
>> Hi Tom,
>> [snip..]
>>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
>>> b/arch/arm/include/asm/arch-omap5/omap.h
>>> index 7f05cb5..c697e0b 100644
>>> --- a/arch/arm/include/asm/arch-omap5/omap.h
>>> +++ b/arch/arm/include/asm/arch-omap5/omap.h
>>> @@ -39,11 +39,6 @@
>>>  #define OMAP54XX_L4_WKUP_BASE  0x4Ae0
>>>  #define OMAP54XX_L4_PER_BASE   0x4800
>>>
>>> -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000
>>> -#define OMAP54XX_DRAM_ADDR_SPACE_END   0x
>>> -#define DRAM_ADDR_SPACE_START  OMAP54XX_DRAM_ADDR_SPACE_START
>>> -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END
>>> -
>>   This is a problem for OMAP5, which has  a trap section at 0xFF00
>>   with in the sdram boundary. OMAP5 evm board has 2GB of memory from
>>   0x8000 - 0x.  Size of the trap section should not be
>> included in the
>>  total sdram size.
>
> But it's not sdram size.  What happens when you're executing at the trap
> section, or rather, where are you executing code from?

   When we execute at trap section address, the system aborts.
   EMIF returns a exception. This is to catch the unmapped tiler
   entries.
So total size of sdram size calculated should subtract the size
   of trap section if that falls with in the sdram boundary,
   as in case of omap5.  This is taken care in omap_sdram_size
   function.  But with this change the trap section will go un-noticed.

Thanks,
 Sricharan
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Re: [U-Boot] [PATCH 01/17] omap3/omap4/omap5/am33xx: Use a common running_from_sdram function

2012-07-31 Thread Tom Rini
On 07/31/2012 01:33 AM, R, Sricharan wrote:
> Hi Tom,
> [snip..]
>> diff --git a/arch/arm/include/asm/arch-omap5/omap.h 
>> b/arch/arm/include/asm/arch-omap5/omap.h
>> index 7f05cb5..c697e0b 100644
>> --- a/arch/arm/include/asm/arch-omap5/omap.h
>> +++ b/arch/arm/include/asm/arch-omap5/omap.h
>> @@ -39,11 +39,6 @@
>>  #define OMAP54XX_L4_WKUP_BASE  0x4Ae0
>>  #define OMAP54XX_L4_PER_BASE   0x4800
>>
>> -#define OMAP54XX_DRAM_ADDR_SPACE_START 0x8000
>> -#define OMAP54XX_DRAM_ADDR_SPACE_END   0x
>> -#define DRAM_ADDR_SPACE_START  OMAP54XX_DRAM_ADDR_SPACE_START
>> -#define DRAM_ADDR_SPACE_ENDOMAP54XX_DRAM_ADDR_SPACE_END
>> -
>   This is a problem for OMAP5, which has  a trap section at 0xFF00
>   with in the sdram boundary. OMAP5 evm board has 2GB of memory from
>   0x8000 - 0x.  Size of the trap section should not be
> included in the
>  total sdram size.

But it's not sdram size.  What happens when you're executing at the trap
section, or rather, where are you executing code from?

-- 
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[U-Boot] Pull request u-boot-blackfin.git (sf branch)

2012-07-31 Thread Mike Frysinger
The following changes since commit b98b611502f5e0a85a1f8e15cf46c470cb105614:

  Merge branch 'next' of git://git.denx.de/u-boot (2012-07-30 20:39:52 +0200)

are available in the git repository at:


  git://www.denx.de/git/u-boot-blackfin.git sf

for you to fetch changes up to b54d1f26ff216ef08307b7652647cc92124c2be1:

  sf: stmicro: add geometrical info for N25Q256 from Micron (2012-04-08 
10:55:55 +)


Gerlando Falauto (1):
  cmd_sf: add size checking to spi flash commands

Jérôme Carretero (1):
  sf: stmicro: add geometrical info for N25Q256 from Micron

Mike Frysinger (5):
  sf: inline data constants
  sf: unify erase commands
  sf: eon: drop duplicate id
  sf: sst: inline duplicate write enable helper funcs
  sf: unify status register writing (and thus block unlocking)

 common/cmd_sf.c  |   14 ++
 drivers/mtd/spi/eon.c|   35 ++-
 drivers/mtd/spi/macronix.c   |   82 ++
 drivers/mtd/spi/spansion.c   |   24 ++
 drivers/mtd/spi/spi_flash.c  |   35 +--
 drivers/mtd/spi/spi_flash_internal.h |   10 -
 drivers/mtd/spi/sst.c|   66 +++
 drivers/mtd/spi/stmicro.c|   28 
 drivers/mtd/spi/winbond.c|   55 ++-
 9 files changed, 85 insertions(+), 264 deletions(-)
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Re: [U-Boot] Building u-boot for iMX28 and getting error in mkimage of missing command line parameter CONFIG_IMX_CONFIG

2012-07-31 Thread Bill

That did it!  Thanks.

Bill


On 7/30/2012 3:59 PM, Fabio Estevam wrote:

On Mon, Jul 30, 2012 at 3:53 PM, Bill  wrote:

Progress!   I switched all the references from ttyAMA0...   to ttyAM0.  Also
changed netargs too.  Now it starts to boot linux but hangs right after the
line of:
 mxs_cpu_init:  cpufreq init finished.

Please remove cpufreq from your kernel config.

You can use this patch:
https://github.com/Freescale/meta-fsl-arm/blob/denzil/recipes-kernel/linux/linux-imx-2.6.35.3/mx28-removecpufreq.patch

Regards,

Fabio Estevam


--
William (Bill) L. Sousan, Ph.D.
(w) 402.331.4977 ext. 4002
bsou...@techsi.com
Technical Support Inc.
11253 John Galt Blvd
Omaha, NE 68137
www.techsi.com
8(a) SDB Certified, ISO 9001:2008


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Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function

2012-07-31 Thread Mike Frysinger
On Tuesday 31 July 2012 10:08:51 Marek Vasut wrote:
> Dear Mike Frysinger,
> > On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote:
> > > Dear Mike Frysinger,
> > > > would be good to import
> > > > linux/stringify.h (rather than adding these macros to common.h) and
> > > > converting all consumers over to that.
> > > 
> > > I wonder, what's the gain?
> > 
> > one less way we're different from linux for importing code
> 
> Not that that macro is ever gonna change, but so be it.

i meant #include's, not the API itself.  you're right that likely this API 
will never change.
-mike


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Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function

2012-07-31 Thread Marek Vasut
Dear Mike Frysinger,

> On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote:
> > Dear Mike Frysinger,
> > 
> > > On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote:
> > > > Marek Vasut wrote:
> > > > > > >  include/common.h |7 +++
> > > > > > >  1 file changed, 7 insertions(+)
> > > > > > 
> > > > > > We have similar things already, and we don't add dead code - you
> > > > > > add a macro without users here.
> > > > > 
> > > > > It's used in 2/2 ... what macro do you have in mind ?
> > > > 
> > > > Then add it with the patch that uses it.
> > > > 
> > > > As for existing use, see for example
> > > 
> > > there's also MK_STR() and XMK_STR().
> > 
> > Grunt ... how do you find those? Or is it that you just happened to run
> > over them?
> 
> these are the ones we use in Blackfin boards that i happened to stumble
> across when reading some common code

Ugh ... makes you feel like Indy, discovering gems in crazy places and fighting 
hordes of evil code ...

> > > would be good to import
> > > linux/stringify.h (rather than adding these macros to common.h) and
> > > converting all consumers over to that.
> > 
> > I wonder, what's the gain?
> 
> one less way we're different from linux for importing code

Not that that macro is ever gonna change, but so be it.

> -mike

Best regards,
Marek Vasut
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Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function

2012-07-31 Thread Mike Frysinger
On Tuesday 31 July 2012 09:55:55 Marek Vasut wrote:
> Dear Mike Frysinger,
> > On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote:
> > > Marek Vasut wrote:
> > > > > >  include/common.h |7 +++
> > > > > >  1 file changed, 7 insertions(+)
> > > > > 
> > > > > We have similar things already, and we don't add dead code - you
> > > > > add a macro without users here.
> > > > 
> > > > It's used in 2/2 ... what macro do you have in mind ?
> > > 
> > > Then add it with the patch that uses it.
> > > 
> > > As for existing use, see for example
> > 
> > there's also MK_STR() and XMK_STR().
> 
> Grunt ... how do you find those? Or is it that you just happened to run
> over them?

these are the ones we use in Blackfin boards that i happened to stumble across 
when reading some common code

> > would be good to import
> > linux/stringify.h (rather than adding these macros to common.h) and
> > converting all consumers over to that.
> 
> I wonder, what's the gain?

one less way we're different from linux for importing code
-mike


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Re: [U-Boot] [PATCH 1/2] COMMON: Add __stringify() function

2012-07-31 Thread Marek Vasut
Dear Mike Frysinger,

> On Saturday 28 July 2012 15:57:33 Wolfgang Denk wrote:
> > Marek Vasut wrote:
> > > > >  include/common.h |7 +++
> > > > >  1 file changed, 7 insertions(+)
> > > > 
> > > > We have similar things already, and we don't add dead code - you add
> > > > a macro without users here.
> > > 
> > > It's used in 2/2 ... what macro do you have in mind ?
> > 
> > Then add it with the patch that uses it.
> > 
> > As for existing use, see for example
> 
> there's also MK_STR() and XMK_STR().

Grunt ... how do you find those? Or is it that you just happened to run over 
them?

> would be good to import
> linux/stringify.h (rather than adding these macros to common.h) and
> converting all consumers over to that.

I wonder, what's the gain?

> -mike

Best regards,
Marek Vasut
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