RE: [PATCH v1] HSD #18028953892: usb: xhci-dwc3: Fix USB3.1 controller register access in reset state
Hi > -Original Message- > From: Marek Vasut > Sent: Wednesday, 26 July, 2023 6:30 PM > To: Chong, Teik Heng ; Lim, Jit Loon > ; u-boot@lists.denx.de > Cc: Jagan Teki ; Simon > ; Chee, Tien Fong > ; Hea, Kok Kiang ; > Maniyam, Dinesh ; Ng, Boon Khai > ; Yuslaimi, Alif Zakuan > ; Zamri, Muhammad Hazim Izzat > ; Tang, Sieu Mun > ; Bin Meng ; Michal > Simek ; Tom Rini ; Eugen Hristev > > Subject: Re: [PATCH v1] HSD #18028953892: usb: xhci-dwc3: Fix USB3.1 > controller register access in reset state > > On 7/26/23 06:04, Chong, Teik Heng wrote: > [...] > >>>>> Linux: (__dwc3_of_simple_teardown) > >>>>> https://elixir.bootlin.com/linux/latest/source/drivers/usb/dwc3/dw > >>>>> c3 > >>>>> -o > >>>>> f-simple.c#L98 > >>>>> U-Boot: (xhci_dwc3_remove) > >>>>> https://elixir.bootlin.com/u-boot/latest/source/drivers/usb/host/x > >>>>> hc > >>>>> i- > >>>>> dwc3.c#L227 > >>>>> > >>>>> So we believed that we can't directly pickup all Linux kernel dwc3 > >>>>> patches > >>>> and merge to U-Boot. > >>>> > >>>> If you were to sync the driver from Linux to U-Boot, then the same > >>>> sequence as Linux uses would be automatically used too, right ? > >>>> > >>>> Sorry for the abysmal delay in my reply. > >>> > >>> Are we saying that we shall port/use Linux driver in U-Boot and > >>> abandon > >> the existing USB host driver in U-Boot? > >> > >> No, the existing driver in U-Boot is a port of the Linux driver, it > >> is just outdated. I am saying, just pick the missing patches from > >> Linux and add them to U-Boot, so the two drivers are in sync. > > > > We do not see a DWC3 host driver under usb host folder in Linux > > https://elixir.bootlin.com/linux/latest/source/drivers/usb/host. Would > > you mind to tell us which DWC3 host driver we should use in usb host > > folder? Then, we can pick up the missing patches > > drivers/usb/dwc3 > > Same as u-boot Ok. We will use the driver from drivers/usb/dwc3. Thank you for the pointers
RE: [PATCH v1] HSD #18028953892: usb: xhci-dwc3: Fix USB3.1 controller register access in reset state
Hi > -Original Message- > From: Marek Vasut > Sent: Saturday, 22 July, 2023 4:31 AM > To: Lim, Jit Loon ; u-boot@lists.denx.de > Cc: Jagan Teki ; Simon > ; Chee, Tien Fong > ; Hea, Kok Kiang ; > Maniyam, Dinesh ; Ng, Boon Khai > ; Yuslaimi, Alif Zakuan > ; Chong, Teik Heng > ; Zamri, Muhammad Hazim Izzat > ; Tang, Sieu Mun > ; Bin Meng ; Michal > Simek ; Tom Rini ; Eugen Hristev > > Subject: Re: [PATCH v1] HSD #18028953892: usb: xhci-dwc3: Fix USB3.1 > controller register access in reset state > > On 7/21/23 05:26, Lim, Jit Loon wrote: > > Hi, > > >>> Linux: (__dwc3_of_simple_teardown) > >>> https://elixir.bootlin.com/linux/latest/source/drivers/usb/dwc3/dwc3 > >>> -o > >>> f-simple.c#L98 > >>> U-Boot: (xhci_dwc3_remove) > >>> https://elixir.bootlin.com/u-boot/latest/source/drivers/usb/host/xhc > >>> i- > >>> dwc3.c#L227 > >>> > >>> So we believed that we can't directly pickup all Linux kernel dwc3 > >>> patches > >> and merge to U-Boot. > >> > >> If you were to sync the driver from Linux to U-Boot, then the same > >> sequence as Linux uses would be automatically used too, right ? > >> > >> Sorry for the abysmal delay in my reply. > > > > Are we saying that we shall port/use Linux driver in U-Boot and abandon > the existing USB host driver in U-Boot? > > No, the existing driver in U-Boot is a port of the Linux driver, it is just > outdated. I am saying, just pick the missing patches from Linux and add them > to U-Boot, so the two drivers are in sync. We do not see a DWC3 host driver under usb host folder in Linux https://elixir.bootlin.com/linux/latest/source/drivers/usb/host. Would you mind to tell us which DWC3 host driver we should use in usb host folder? Then, we can pick up the missing patches
RE: [PATCH v3 1/1] usb: dwc2: Fix the write to W1C fields in HPRT register
> -Original Message-
> From: Marek Vasut
> Sent: Wednesday, 21 June, 2023 7:16 PM
> To: Chong, Teik Heng ; u-boot@lists.denx.de
> Cc: Jagan Teki ; Vignesh R ;
> Simon ; Kris ;
> Chee, Tien Fong ; Hea, Kok Kiang
> ; Lokanathan, Raaj ;
> Maniyam, Dinesh ; Ng, Boon Khai
> ; Yuslaimi, Alif Zakuan
> ; Zamri, Muhammad Hazim Izzat
> ; Lim, Jit Loon
> ; Tang, Sieu Mun
> Subject: Re: [PATCH v3 1/1] usb: dwc2: Fix the write to W1C fields in HPRT
> register
>
> On 6/21/23 05:13, teik.heng.ch...@intel.com wrote:
> > From: Teik Heng Chong
> >
> > Fix the write to the HPRT register which treat W1C fields as if they
> > were mere RW. This leads to unintended clearing of such fields
> >
> > This bug was found during the testing on Simics model. Referring to
> > specification DesignWare Cores USB 2.0 Hi-Speed On-The-Go (OTG)
> > Databook (3.30a)"5.3.4.8 Host Port Control and Status Register
> > (HPRT)", the HPRT.PrtPwr is cleared by this mistake. In the Linux
> > driver (contrary to U-Boot), HPRT is always read using dwc2_read_hprt0
> > helper function which clears W1C bits. So after write back those bits are
> zeroes.
> >
> > Signed-off-by: Teik Heng Chong
> >
> > ---
> >
> > V2->V3
> > - update commit message
> > ---
> > drivers/usb/host/dwc2.c | 34 --
> > drivers/usb/host/dwc2.h | 4
> > 2 files changed, 12 insertions(+), 26 deletions(-)
> >
> > diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index
> > 23060fc369..9818f9be94 100644
> > --- a/drivers/usb/host/dwc2.c
> > +++ b/drivers/usb/host/dwc2.c
> > @@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice
> > *dev,
> >
> > /* Turn on the vbus power. */
> > if (readl(>gintsts) & DWC2_GINTSTS_CURMODE_HOST) {
> > - hprt0 = readl(>hprt0);
> > - hprt0 &= ~(DWC2_HPRT0_PRTENA |
> DWC2_HPRT0_PRTCONNDET);
> > - hprt0 &= ~(DWC2_HPRT0_PRTENCHNG |
> DWC2_HPRT0_PRTOVRCURRCHNG);
> > + hprt0 = readl(>hprt0) & ~DWC2_HPRT0_W1C_MASK;
> > if (!(hprt0 & DWC2_HPRT0_PRTPWR)) {
> > hprt0 |= DWC2_HPRT0_PRTPWR;
> > writel(hprt0, >hprt0);
> > @@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct
> dwc2_priv *priv,
> > case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER |
> USB_TYPE_CLASS:
> > switch (wValue) {
> > case USB_PORT_FEAT_C_CONNECTION:
> > - setbits_le32(>hprt0,
> DWC2_HPRT0_PRTCONNDET);
> > + clrsetbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK,
> > +DWC2_HPRT0_PRTCONNDET);
> > break;
> > }
> > break;
> > @@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct
> dwc2_priv *priv,
> > break;
> >
> > case USB_PORT_FEAT_RESET:
> > - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> > - DWC2_HPRT0_PRTCONNDET |
> > - DWC2_HPRT0_PRTENCHNG |
> > - DWC2_HPRT0_PRTOVRCURRCHNG,
> > - DWC2_HPRT0_PRTRST);
> > + clrsetbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK,
> > +DWC2_HPRT0_PRTRST);
> > mdelay(50);
> > - clrbits_le32(>hprt0, DWC2_HPRT0_PRTRST);
> > + clrbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK |
> > +DWC2_HPRT0_PRTRST);
> > break;
> >
> > case USB_PORT_FEAT_POWER:
> > - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> > - DWC2_HPRT0_PRTCONNDET |
> > - DWC2_HPRT0_PRTENCHNG |
> > - DWC2_HPRT0_PRTOVRCURRCHNG,
> > - DWC2_HPRT0_PRTRST);
> > + clrsetbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK,
> > +DWC2_HPRT0_PRTRST);
> > break;
> >
> > case USB_PORT_FEAT_ENABLE:
> > @@ -1213,14 +1203,9 @@ static int dwc2_init_common(struct udevice *dev,
> struct dwc2_priv *priv)
> > dwc_otg_core_host_init(dev, regs);
> > }
> >
> > - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> > - DWC2_HPRT0_PRTCONNDET |
> DWC2_HPRT0_PRTENCHNG |
> > -
RE: [PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in HPRT register
> -Original Message-
> From: Marek Vasut
> Sent: Wednesday, 21 June, 2023 9:20 AM
> To: Chong, Teik Heng ; u-boot@lists.denx.de
> Cc: Jagan Teki ; Vignesh R
> ; Simon ; Kris
> ; Chee, Tien Fong ; Hea,
> Kok Kiang ; Lokanathan, Raaj
> ; Maniyam, Dinesh
> ; Ng, Boon Khai ;
> Yuslaimi, Alif Zakuan ; Zamri, Muhammad
> Hazim Izzat ; Lim, Jit Loon
> ; Tang, Sieu Mun ;
> Patrice CHOTARD ; Patrick DELAUNAY
>
> Subject: Re: [PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in HPRT
> register
>
> On 6/21/23 02:57, Chong, Teik Heng wrote:
> > -Original Message-
> > From: Marek Vasut
> > Sent: Wednesday, 21 June, 2023 5:38 AM
> > To: Chong, Teik Heng ; u-boot@lists.denx.de
> > Cc: Jagan Teki ; Vignesh R
> > ; Simon ; Kris
> > ; Chee, Tien Fong ;
> > Hea, Kok Kiang ; Lokanathan, Raaj
> > ; Maniyam, Dinesh
> > ; Ng, Boon Khai ;
> > Yuslaimi, Alif Zakuan ; Zamri,
> > Muhammad Hazim Izzat ; Lim,
> Jit
> > Loon ; Tang, Sieu Mun
> > ; Patrice CHOTARD
> > ; Patrick DELAUNAY
> >
> > Subject: Re: [PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in
> > HPRT register
> >
> > On 6/20/23 15:52, teik.heng.ch...@intel.com wrote:
> >> From: Teik Heng Chong
> >>
> >> Fix the write to the HPRT register which treat W1C fields as if they
> >> were mere RW. This leads to unintended clearing of such fields
> >>
> >> Signed-off-by: Teik Heng Chong
> >>
> >> ---
> >>
> >> V1->V2
> >> - update subject tags to usb:dwc2
> >> ---
> >>drivers/usb/host/dwc2.c | 34 --
> >>drivers/usb/host/dwc2.h | 4
> >>2 files changed, 12 insertions(+), 26 deletions(-)
> >>
> >> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index
> >> 23060fc369..9818f9be94 100644
> >> --- a/drivers/usb/host/dwc2.c
> >> +++ b/drivers/usb/host/dwc2.c
> >> @@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice
> >> *dev,
> >>
> >>/* Turn on the vbus power. */
> >>if (readl(>gintsts) & DWC2_GINTSTS_CURMODE_HOST) {
> >> - hprt0 = readl(>hprt0);
> >> - hprt0 &= ~(DWC2_HPRT0_PRTENA |
> DWC2_HPRT0_PRTCONNDET);
> >> - hprt0 &= ~(DWC2_HPRT0_PRTENCHNG |
> DWC2_HPRT0_PRTOVRCURRCHNG);
> >> + hprt0 = readl(>hprt0) & ~DWC2_HPRT0_W1C_MASK;
> >>if (!(hprt0 & DWC2_HPRT0_PRTPWR)) {
> >>hprt0 |= DWC2_HPRT0_PRTPWR;
> >>writel(hprt0, >hprt0);
> >> @@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct
> dwc2_priv *priv,
> >>case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER |
> USB_TYPE_CLASS:
> >>switch (wValue) {
> >>case USB_PORT_FEAT_C_CONNECTION:
> >> - setbits_le32(>hprt0,
> DWC2_HPRT0_PRTCONNDET);
> >> + clrsetbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK,
> >> +DWC2_HPRT0_PRTCONNDET);
> >>break;
> >>}
> >>break;
> >> @@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct
> dwc2_priv *priv,
> >>break;
> >>
> >>case USB_PORT_FEAT_RESET:
> >> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA
> |
> >> - DWC2_HPRT0_PRTCONNDET |
> >> - DWC2_HPRT0_PRTENCHNG |
> >> - DWC2_HPRT0_PRTOVRCURRCHNG,
> >> - DWC2_HPRT0_PRTRST);
> >> + clrsetbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK,
> >> +DWC2_HPRT0_PRTRST);
> >>mdelay(50);
> >> - clrbits_le32(>hprt0, DWC2_HPRT0_PRTRST);
> >> + clrbits_le32(>hprt0,
> DWC2_HPRT0_W1C_MASK |
> >> +DWC2_HPRT0_PRTRST);
> >>break;
> >>
> >>case USB_PORT_FEAT_POWER:
> >> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA
> |
> >> - DWC2_HPRT0_PRTCONNDET |
> >> - DWC2_HPRT0_PRTENCHNG |
> >> - DWC2_HPRT0_P
RE: [PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in HPRT register
-Original Message-
From: Marek Vasut
Sent: Wednesday, 21 June, 2023 5:38 AM
To: Chong, Teik Heng ; u-boot@lists.denx.de
Cc: Jagan Teki ; Vignesh R ; Simon
; Kris ; Chee, Tien
Fong ; Hea, Kok Kiang ;
Lokanathan, Raaj ; Maniyam, Dinesh
; Ng, Boon Khai ; Yuslaimi,
Alif Zakuan ; Zamri, Muhammad Hazim Izzat
; Lim, Jit Loon ;
Tang, Sieu Mun ; Patrice CHOTARD
; Patrick DELAUNAY
Subject: Re: [PATCH v2 1/1] usb: dwc2: Fix the write to W1C fields in HPRT
register
On 6/20/23 15:52, teik.heng.ch...@intel.com wrote:
> From: Teik Heng Chong
>
> Fix the write to the HPRT register which treat W1C fields as if they
> were mere RW. This leads to unintended clearing of such fields
>
> Signed-off-by: Teik Heng Chong
>
> ---
>
> V1->V2
> - update subject tags to usb:dwc2
> ---
> drivers/usb/host/dwc2.c | 34 --
> drivers/usb/host/dwc2.h | 4
> 2 files changed, 12 insertions(+), 26 deletions(-)
>
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index
> 23060fc369..9818f9be94 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice
> *dev,
>
> /* Turn on the vbus power. */
> if (readl(>gintsts) & DWC2_GINTSTS_CURMODE_HOST) {
> - hprt0 = readl(>hprt0);
> - hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET);
> - hprt0 &= ~(DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG);
> + hprt0 = readl(>hprt0) & ~DWC2_HPRT0_W1C_MASK;
> if (!(hprt0 & DWC2_HPRT0_PRTPWR)) {
> hprt0 |= DWC2_HPRT0_PRTPWR;
> writel(hprt0, >hprt0);
> @@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv
> *priv,
> case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER | USB_TYPE_CLASS:
> switch (wValue) {
> case USB_PORT_FEAT_C_CONNECTION:
> - setbits_le32(>hprt0, DWC2_HPRT0_PRTCONNDET);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTCONNDET);
> break;
> }
> break;
> @@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv
> *priv,
> break;
>
> case USB_PORT_FEAT_RESET:
> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> - DWC2_HPRT0_PRTCONNDET |
> - DWC2_HPRT0_PRTENCHNG |
> - DWC2_HPRT0_PRTOVRCURRCHNG,
> - DWC2_HPRT0_PRTRST);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTRST);
> mdelay(50);
> - clrbits_le32(>hprt0, DWC2_HPRT0_PRTRST);
> + clrbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK |
> +DWC2_HPRT0_PRTRST);
> break;
>
> case USB_PORT_FEAT_POWER:
> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> - DWC2_HPRT0_PRTCONNDET |
> - DWC2_HPRT0_PRTENCHNG |
> - DWC2_HPRT0_PRTOVRCURRCHNG,
> - DWC2_HPRT0_PRTRST);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTRST);
> break;
>
> case USB_PORT_FEAT_ENABLE:
> @@ -1213,14 +1203,9 @@ static int dwc2_init_common(struct udevice *dev,
> struct dwc2_priv *priv)
> dwc_otg_core_host_init(dev, regs);
> }
>
> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> - DWC2_HPRT0_PRTCONNDET | DWC2_HPRT0_PRTENCHNG |
> - DWC2_HPRT0_PRTOVRCURRCHNG,
> - DWC2_HPRT0_PRTRST);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTRST);
> mdelay(50);
> - clrbits_le32(>hprt0, DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET |
> - DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG |
> - DWC2_HPRT0_PRTRST);
> + clrbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK | DWC2_HPRT0_PRTRST);
>
> for (i = 0; i < MAX_DEVICE; i++) {
> for (j = 0; j < MAX_ENDPOINT; j++) { @@ -1246,10 +1231,7 @@
> static
> int dwc2_init_common(struct udevice *dev, struct dwc2_priv *priv)
> static void dwc2_uninit_common(struct dwc2_core_regs *regs)
> {
> /* Put everything in reset. */
> - clrsetbits_le32(>hpr
RE: [PATCH] drivers: usb: host: Fix the write to W1C fields in HPRT register
-Original Message-
From: Marek Vasut
Sent: Thursday, 2 February, 2023 11:16 PM
To: Chong, Teik Heng ; u-boot@lists.denx.de
Cc: Simon ; Chee, Tien Fong
; Hea, Kok Kiang ; Lim, Elly
Siew Chin ; Kho, Sin Hui ;
Lokanathan, Raaj ; Maniyam, Dinesh
; Ng, Boon Khai ; Yuslaimi,
Alif Zakuan ; Zamri, Muhammad Hazim Izzat
; Lim, Jit Loon ;
Tang, Sieu Mun
Subject: Re: [PATCH] drivers: usb: host: Fix the write to W1C fields in HPRT
register
On 2/2/23 02:14, teik.heng.ch...@intel.com wrote:
The subject tags are 'usb: dwc2:' .
> diff --git a/drivers/usb/host/dwc2.c b/drivers/usb/host/dwc2.c index
> 23060fc369..9818f9be94 100644
> --- a/drivers/usb/host/dwc2.c
> +++ b/drivers/usb/host/dwc2.c
> @@ -315,9 +315,7 @@ static void dwc_otg_core_host_init(struct udevice
> *dev,
>
> /* Turn on the vbus power. */
> if (readl(>gintsts) & DWC2_GINTSTS_CURMODE_HOST) {
> - hprt0 = readl(>hprt0);
> - hprt0 &= ~(DWC2_HPRT0_PRTENA | DWC2_HPRT0_PRTCONNDET);
> - hprt0 &= ~(DWC2_HPRT0_PRTENCHNG | DWC2_HPRT0_PRTOVRCURRCHNG);
> + hprt0 = readl(>hprt0) & ~DWC2_HPRT0_W1C_MASK;
> if (!(hprt0 & DWC2_HPRT0_PRTPWR)) {
> hprt0 |= DWC2_HPRT0_PRTPWR;
> writel(hprt0, >hprt0);
> @@ -748,7 +746,7 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv
> *priv,
> case (USB_REQ_CLEAR_FEATURE << 8) | USB_RECIP_OTHER | USB_TYPE_CLASS:
> switch (wValue) {
> case USB_PORT_FEAT_C_CONNECTION:
> - setbits_le32(>hprt0, DWC2_HPRT0_PRTCONNDET);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTCONNDET);
> break;
> }
> break;
> @@ -759,21 +757,13 @@ static int dwc_otg_submit_rh_msg_out(struct dwc2_priv
> *priv,
> break;
>
> case USB_PORT_FEAT_RESET:
> - clrsetbits_le32(>hprt0, DWC2_HPRT0_PRTENA |
> - DWC2_HPRT0_PRTCONNDET |
> - DWC2_HPRT0_PRTENCHNG |
> - DWC2_HPRT0_PRTOVRCURRCHNG,
> - DWC2_HPRT0_PRTRST);
> + clrsetbits_le32(>hprt0, DWC2_HPRT0_W1C_MASK,
> +DWC2_HPRT0_PRTRST);
The code above used to be clearing the W1C (write 1 to clear) bits , while the
changed code is no longer clearing those bits. Is that correct ?
yes
[...]
