Re: [PATCH v1 21/26] imx8mn: synchronise device tree with linux
On Wed, Aug 3, 2022 at 8:02 AM Marcel Ziswiler wrote: > > Hi Adam > > On Sun, 2022-07-31 at 11:58 -0500, Adam Ford wrote: > > On Thu, Jul 21, 2022 at 8:44 AM Marcel Ziswiler wrote: > > > > > > From: Marcel Ziswiler > > > > > > Synchronise device tree with linux v5.19-rc5. > > > > > > Signed-off-by: Marcel Ziswiler > > > > For what it's worth to others who may have been impacted, this patch > > broke my nano booting because the imx8mn.dtsi now has the UART's as > > subnodes to spba1 which wasn't being included in SPL's device tree. > > It's likely to impact others who are booting with DM_SERIAL enabled on > > their Nano. > > Sorry about that. > > > To fix, I had to add a small line of code to my > > imx8mn-beacon-kit-u-boot.dtsi file with the following: > > > > &spba1 { > >u-boot,dm-spl; > > }; > > > > With that, my board boots again. If anyone else is using DM_SERIAL > > and having issues no longer starting, give that a try. > > > > Since there are few nano boards with common -u-boot.dtsi entries, it > > seems like it makes sense to have a common imx8mn-u-boot.dtsi file > > like we do for Mini and Plus. I'll try to work on that as I have > > time. (hopefully today) > > Thanks for your help in correcting this. Marcel, Have you seen the patch series I posted at [1]? I know Tim Harvey replied 'tested-by' to the cover letter. Might you have a chance to test it? [1] - https://patchwork.ozlabs.org/project/uboot/list/?series=312016 > > Cheers > > Marcel
Re: [PATCH v1 21/26] imx8mn: synchronise device tree with linux
On Thu, Jul 21, 2022 at 8:44 AM Marcel Ziswiler wrote: > > From: Marcel Ziswiler > > Synchronise device tree with linux v5.19-rc5. > > Signed-off-by: Marcel Ziswiler For what it's worth to others who may have been impacted, this patch broke my nano booting because the imx8mn.dtsi now has the UART's as subnodes to spba1 which wasn't being included in SPL's device tree. It's likely to impact others who are booting with DM_SERIAL enabled on their Nano. To fix, I had to add a small line of code to my imx8mn-beacon-kit-u-boot.dtsi file with the following: &spba1 { u-boot,dm-spl; }; With that, my board boots again. If anyone else is using DM_SERIAL and having issues no longer starting, give that a try. Since there are few nano boards with common -u-boot.dtsi entries, it seems like it makes sense to have a common imx8mn-u-boot.dtsi file like we do for Mini and Plus. I'll try to work on that as I have time. (hopefully today) adam > --- > > arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 4 +- > arch/arm/dts/imx8mn-beacon-som.dtsi| 12 +- > arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi | 113 - > arch/arm/dts/imx8mn-bsh-smm-s2pro.dts | 90 +++ > arch/arm/dts/imx8mn-ddr4-evk.dts | 4 + > arch/arm/dts/imx8mn-evk-u-boot.dtsi| 4 +- > arch/arm/dts/imx8mn-evk.dts| 56 ++--- > arch/arm/dts/imx8mn-evk.dtsi | 121 + > arch/arm/dts/imx8mn-var-som.dtsi | 15 +- > arch/arm/dts/imx8mn-venice-gw7902.dts | 80 -- > arch/arm/dts/imx8mn.dtsi | 270 ++--- > board/freescale/imx8mn_evk/spl.c | 2 +- > include/dt-bindings/clock/imx8mn-clock.h | 25 +- > include/dt-bindings/power/imx8mn-power.h | 5 + > include/dt-bindings/sound/tlv320aic31xx.h | 14 ++ > 15 files changed, 607 insertions(+), 208 deletions(-) > create mode 100644 include/dt-bindings/sound/tlv320aic31xx.h > > -- > 2.35.1 >
[PATCH v1 21/26] imx8mn: synchronise device tree with linux
> From: Marcel Ziswiler > Synchronise device tree with linux v5.19-rc5. > Signed-off-by: Marcel Ziswiler Applied to u-boot-imx, master, thanks ! Best regards, Stefano Babic -- = DENX Software Engineering GmbH, Managing Director: Wolfgang Denk HRB 165235 Munich, Office: Kirchenstr.5, D-82194 Groebenzell, Germany Phone: +49-8142-66989-53 Fax: +49-8142-66989-80 Email: sba...@denx.de =
[PATCH v1 21/26] imx8mn: synchronise device tree with linux
From: Marcel Ziswiler Synchronise device tree with linux v5.19-rc5. Signed-off-by: Marcel Ziswiler --- arch/arm/dts/imx8mn-beacon-baseboard.dtsi | 4 +- arch/arm/dts/imx8mn-beacon-som.dtsi| 12 +- arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi | 113 - arch/arm/dts/imx8mn-bsh-smm-s2pro.dts | 90 +++ arch/arm/dts/imx8mn-ddr4-evk.dts | 4 + arch/arm/dts/imx8mn-evk-u-boot.dtsi| 4 +- arch/arm/dts/imx8mn-evk.dts| 56 ++--- arch/arm/dts/imx8mn-evk.dtsi | 121 + arch/arm/dts/imx8mn-var-som.dtsi | 15 +- arch/arm/dts/imx8mn-venice-gw7902.dts | 80 -- arch/arm/dts/imx8mn.dtsi | 270 ++--- board/freescale/imx8mn_evk/spl.c | 2 +- include/dt-bindings/clock/imx8mn-clock.h | 25 +- include/dt-bindings/power/imx8mn-power.h | 5 + include/dt-bindings/sound/tlv320aic31xx.h | 14 ++ 15 files changed, 607 insertions(+), 208 deletions(-) create mode 100644 include/dt-bindings/sound/tlv320aic31xx.h diff --git a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi index 376ca8ff721..02f37dcda7e 100644 --- a/arch/arm/dts/imx8mn-beacon-baseboard.dtsi +++ b/arch/arm/dts/imx8mn-beacon-baseboard.dtsi @@ -126,7 +126,6 @@ compatible = "wlf,wm8962"; reg = <0x1a>; clocks = <&clk IMX8MN_CLK_SAI3_ROOT>; - clock-names = "xclk"; DCVDD-supply = <®_audio>; DBVDD-supply = <®_audio>; AVDD-supply = <®_audio>; @@ -176,6 +175,7 @@ pinctrl-0 = <&pinctrl_uart3>; assigned-clocks = <&clk IMX8MN_CLK_UART3>; assigned-clock-parents = <&clk IMX8MN_SYS_PLL1_80M>; + uart-has-rtscts; status = "okay"; }; @@ -259,6 +259,8 @@ fsl,pins = < MX8MN_IOMUXC_ECSPI1_SCLK_UART3_DCE_RX 0x40 MX8MN_IOMUXC_ECSPI1_MOSI_UART3_DCE_TX 0x40 + MX8MN_IOMUXC_ECSPI1_MISO_UART3_DCE_CTS_B0x40 + MX8MN_IOMUXC_ECSPI1_SS0_UART3_DCE_RTS_B 0x40 >; }; diff --git a/arch/arm/dts/imx8mn-beacon-som.dtsi b/arch/arm/dts/imx8mn-beacon-som.dtsi index de2cd0e3201..1133cded9be 100644 --- a/arch/arm/dts/imx8mn-beacon-som.dtsi +++ b/arch/arm/dts/imx8mn-beacon-som.dtsi @@ -101,7 +101,7 @@ #size-cells = <1>; compatible = "jedec,spi-nor"; spi-max-frequency = <8000>; - spi-tx-bus-width = <4>; + spi-tx-bus-width = <1>; spi-rx-bus-width = <4>; }; }; @@ -120,6 +120,9 @@ interrupt-parent = <&gpio1>; interrupts = <3 IRQ_TYPE_LEVEL_LOW>; rohm,reset-snvs-powered; + #clock-cells = <0>; + clocks = <&osc_32k 0>; + clock-output-names = "clk-32k-out"; regulators { buck1_reg: BUCK1 { @@ -262,12 +265,15 @@ &usdhc1 { #address-cells = <1>; #size-cells = <0>; - pinctrl-names = "default"; + pinctrl-names = "default", "state_100mhz", "state_200mhz"; pinctrl-0 = <&pinctrl_usdhc1>; + pinctrl-1 = <&pinctrl_usdhc1_100mhz>; + pinctrl-2 = <&pinctrl_usdhc1_200mhz>; + vmmc-supply = <&buck4_reg>; + vqmmc-supply = <&buck5_reg>; bus-width = <4>; non-removable; cap-power-off-card; - pm-ignore-notify; keep-power-in-suspend; mmc-pwrseq = <&usdhc1_pwrseq>; status = "okay"; diff --git a/arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi b/arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi index 184c715bd38..c11895d9d58 100644 --- a/arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi +++ b/arch/arm/dts/imx8mn-bsh-smm-s2-common.dtsi @@ -4,6 +4,8 @@ * Copyright 2021 BSH Hausgeraete GmbH */ +/dts-v1/; + #include "imx8mn.dtsi" / { @@ -11,17 +13,17 @@ stdout-path = &uart4; }; - fec_supply: fec_supply_en { + fec_supply: fec-supply-en { compatible = "regulator-fixed"; + vin-supply = <&buck4_reg>; regulator-name = "tja1101_en"; regulator-min-microvolt = <330>; regulator-max-microvolt = <330>; gpio = <&gpio2 20 GPIO_ACTIVE_HIGH>; - vin-supply = <&buck4_reg>; enable-active-high; }; - usdhc2_pwrseq: usdhc2_pwrseq { + usdhc2_pwrseq: usdhc2-pwrseq { compatible = "mmc-pwrseq-simple"; pinctrl-names = "default"; pinctrl-0 = <&pinctrl_usdhc2_pwrseq>; @@ -57,8 +59,6 @@ phy-mode = "rmii"; phy-handle = <ðphy0>; phy-supply = <&fec_supply>; - phy-reset-gpios = <&gpio1 29 GPIO_ACTIVE_LOW>; - phy-reset-duration = <20>; fsl,magic-packet; status = "okay";