Re: [PATCH v2 21/28] arm: rockchip: Add RV1126 arch core support

2022-09-28 Thread Kever Yang



On 2022/8/18 22:52, Jagan Teki wrote:

Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.

Add arch core support for it.

Signed-off-by: Jagan Teki 

Reviewed-by: Kever Yang 

Thanks,
- Kever

---
Changes for v2:
- none

  arch/arm/include/asm/arch-rv1126/boot0.h  | 11 
  arch/arm/include/asm/arch-rv1126/gpio.h   | 11 
  arch/arm/mach-rockchip/Kconfig| 46 ++
  arch/arm/mach-rockchip/Makefile   |  1 +
  arch/arm/mach-rockchip/rv1126/Kconfig | 43 +
  arch/arm/mach-rockchip/rv1126/Makefile| 13 
  arch/arm/mach-rockchip/rv1126/clk_rv1126.c| 33 ++
  arch/arm/mach-rockchip/rv1126/rv1126.c| 63 +++
  arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 47 ++
  common/spl/Kconfig.tpl|  2 +-
  10 files changed, 269 insertions(+), 1 deletion(-)
  create mode 100644 arch/arm/include/asm/arch-rv1126/boot0.h
  create mode 100644 arch/arm/include/asm/arch-rv1126/gpio.h
  create mode 100644 arch/arm/mach-rockchip/rv1126/Kconfig
  create mode 100644 arch/arm/mach-rockchip/rv1126/Makefile
  create mode 100644 arch/arm/mach-rockchip/rv1126/clk_rv1126.c
  create mode 100644 arch/arm/mach-rockchip/rv1126/rv1126.c
  create mode 100644 arch/arm/mach-rockchip/rv1126/syscon_rv1126.c

diff --git a/arch/arm/include/asm/arch-rv1126/boot0.h 
b/arch/arm/include/asm/arch-rv1126/boot0.h
new file mode 100644
index 00..2e78b074ad
--- /dev/null
+++ b/arch/arm/include/asm/arch-rv1126/boot0.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ASM_ARCH_BOOT0_H__
+#define __ASM_ARCH_BOOT0_H__
+
+#include 
+
+#endif
diff --git a/arch/arm/include/asm/arch-rv1126/gpio.h 
b/arch/arm/include/asm/arch-rv1126/gpio.h
new file mode 100644
index 00..eca79d5159
--- /dev/null
+++ b/arch/arm/include/asm/arch-rv1126/gpio.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ASM_ARCH_GPIO_H__
+#define __ASM_ARCH_GPIO_H__
+
+#include 
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c561a77e6a..19fa6a4659 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -301,6 +301,51 @@ config ROCKCHIP_RV1108
  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
  and a DSP.
  
+config ROCKCHIP_RV1126

+   bool "Support Rockchip RV1126"
+   select CPU_V7A
+   select SKIP_LOWLEVEL_INIT_ONLY
+   select TPL
+   select SUPPORT_TPL
+   select TPL_NEEDS_SEPARATE_STACK
+   select TPL_ROCKCHIP_BACK_TO_BROM
+   select SPL
+   select SUPPORT_SPL
+   select SPL_STACK_R
+   select CLK
+   select FIT
+   select PINCTRL
+   select RAM
+   select ROCKCHIP_SDRAM_COMMON
+   select REGMAP
+   select SYSCON
+   select DM_PMIC
+   select DM_REGULATOR_FIXED
+   select DM_RESET
+   select REGULATOR_RK8XX
+   select PMIC_RK8XX
+   select BOARD_LATE_INIT
+   imply ROCKCHIP_COMMON_BOARD
+   imply TPL_DM
+   imply TPL_LIBCOMMON_SUPPORT
+   imply TPL_LIBGENERIC_SUPPORT
+   imply TPL_OF_CONTROL
+   imply TPL_OF_PLATDATA
+   imply TPL_RAM
+   imply TPL_ROCKCHIP_COMMON_BOARD
+   imply TPL_SERIAL
+   imply SPL_CLK
+   imply SPL_DM
+   imply SPL_DRIVERS_MISC
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_OF_CONTROL
+   imply SPL_RAM
+   imply SPL_REGMAP
+   imply SPL_ROCKCHIP_COMMON_BOARD
+   imply SPL_SERIAL
+   imply SPL_SYSCON
+
  config ROCKCHIP_USB_UART
bool "Route uart output to usb pins"
help
@@ -448,4 +493,5 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig"
  source "arch/arm/mach-rockchip/rk3399/Kconfig"
  source "arch/arm/mach-rockchip/rk3568/Kconfig"
  source "arch/arm/mach-rockchip/rv1108/Kconfig"
+source "arch/arm/mach-rockchip/rv1126/Kconfig"
  endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6c1c7b8a10..32138fa723 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
  obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
  obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/
  obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
+obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
  
  # Clear out SPL objects, in case this is a TPL build

  obj-spl-$(CONFIG_TPL_BUILD) =
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig 
b/arch/arm/mach-rockchip/rv1126/Kconfig
new file mode 100644
index 00..86abc4e2fa
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -0,0 +1,43 @@
+if ROCKCHIP_RV1126
+
+config SOC_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select 

[PATCH v2 21/28] arm: rockchip: Add RV1126 arch core support

2022-08-18 Thread Jagan Teki
Rockchip RV1126 is a high-performance vision processor SoC
for IPC/CVR, especially for AI related application.

Add arch core support for it.

Signed-off-by: Jagan Teki 
---
Changes for v2:
- none

 arch/arm/include/asm/arch-rv1126/boot0.h  | 11 
 arch/arm/include/asm/arch-rv1126/gpio.h   | 11 
 arch/arm/mach-rockchip/Kconfig| 46 ++
 arch/arm/mach-rockchip/Makefile   |  1 +
 arch/arm/mach-rockchip/rv1126/Kconfig | 43 +
 arch/arm/mach-rockchip/rv1126/Makefile| 13 
 arch/arm/mach-rockchip/rv1126/clk_rv1126.c| 33 ++
 arch/arm/mach-rockchip/rv1126/rv1126.c| 63 +++
 arch/arm/mach-rockchip/rv1126/syscon_rv1126.c | 47 ++
 common/spl/Kconfig.tpl|  2 +-
 10 files changed, 269 insertions(+), 1 deletion(-)
 create mode 100644 arch/arm/include/asm/arch-rv1126/boot0.h
 create mode 100644 arch/arm/include/asm/arch-rv1126/gpio.h
 create mode 100644 arch/arm/mach-rockchip/rv1126/Kconfig
 create mode 100644 arch/arm/mach-rockchip/rv1126/Makefile
 create mode 100644 arch/arm/mach-rockchip/rv1126/clk_rv1126.c
 create mode 100644 arch/arm/mach-rockchip/rv1126/rv1126.c
 create mode 100644 arch/arm/mach-rockchip/rv1126/syscon_rv1126.c

diff --git a/arch/arm/include/asm/arch-rv1126/boot0.h 
b/arch/arm/include/asm/arch-rv1126/boot0.h
new file mode 100644
index 00..2e78b074ad
--- /dev/null
+++ b/arch/arm/include/asm/arch-rv1126/boot0.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ASM_ARCH_BOOT0_H__
+#define __ASM_ARCH_BOOT0_H__
+
+#include 
+
+#endif
diff --git a/arch/arm/include/asm/arch-rv1126/gpio.h 
b/arch/arm/include/asm/arch-rv1126/gpio.h
new file mode 100644
index 00..eca79d5159
--- /dev/null
+++ b/arch/arm/include/asm/arch-rv1126/gpio.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2019 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __ASM_ARCH_GPIO_H__
+#define __ASM_ARCH_GPIO_H__
+
+#include 
+
+#endif
diff --git a/arch/arm/mach-rockchip/Kconfig b/arch/arm/mach-rockchip/Kconfig
index c561a77e6a..19fa6a4659 100644
--- a/arch/arm/mach-rockchip/Kconfig
+++ b/arch/arm/mach-rockchip/Kconfig
@@ -301,6 +301,51 @@ config ROCKCHIP_RV1108
  The Rockchip RV1108 is a ARM-based SoC with a single-core Cortex-A7
  and a DSP.
 
+config ROCKCHIP_RV1126
+   bool "Support Rockchip RV1126"
+   select CPU_V7A
+   select SKIP_LOWLEVEL_INIT_ONLY
+   select TPL
+   select SUPPORT_TPL
+   select TPL_NEEDS_SEPARATE_STACK
+   select TPL_ROCKCHIP_BACK_TO_BROM
+   select SPL
+   select SUPPORT_SPL
+   select SPL_STACK_R
+   select CLK
+   select FIT
+   select PINCTRL
+   select RAM
+   select ROCKCHIP_SDRAM_COMMON
+   select REGMAP
+   select SYSCON
+   select DM_PMIC
+   select DM_REGULATOR_FIXED
+   select DM_RESET
+   select REGULATOR_RK8XX
+   select PMIC_RK8XX
+   select BOARD_LATE_INIT
+   imply ROCKCHIP_COMMON_BOARD
+   imply TPL_DM
+   imply TPL_LIBCOMMON_SUPPORT
+   imply TPL_LIBGENERIC_SUPPORT
+   imply TPL_OF_CONTROL
+   imply TPL_OF_PLATDATA
+   imply TPL_RAM
+   imply TPL_ROCKCHIP_COMMON_BOARD
+   imply TPL_SERIAL
+   imply SPL_CLK
+   imply SPL_DM
+   imply SPL_DRIVERS_MISC
+   imply SPL_LIBCOMMON_SUPPORT
+   imply SPL_LIBGENERIC_SUPPORT
+   imply SPL_OF_CONTROL
+   imply SPL_RAM
+   imply SPL_REGMAP
+   imply SPL_ROCKCHIP_COMMON_BOARD
+   imply SPL_SERIAL
+   imply SPL_SYSCON
+
 config ROCKCHIP_USB_UART
bool "Route uart output to usb pins"
help
@@ -448,4 +493,5 @@ source "arch/arm/mach-rockchip/rk3368/Kconfig"
 source "arch/arm/mach-rockchip/rk3399/Kconfig"
 source "arch/arm/mach-rockchip/rk3568/Kconfig"
 source "arch/arm/mach-rockchip/rv1108/Kconfig"
+source "arch/arm/mach-rockchip/rv1126/Kconfig"
 endif
diff --git a/arch/arm/mach-rockchip/Makefile b/arch/arm/mach-rockchip/Makefile
index 6c1c7b8a10..32138fa723 100644
--- a/arch/arm/mach-rockchip/Makefile
+++ b/arch/arm/mach-rockchip/Makefile
@@ -45,6 +45,7 @@ obj-$(CONFIG_ROCKCHIP_RK3368) += rk3368/
 obj-$(CONFIG_ROCKCHIP_RK3399) += rk3399/
 obj-$(CONFIG_ROCKCHIP_RK3568) += rk3568/
 obj-$(CONFIG_ROCKCHIP_RV1108) += rv1108/
+obj-$(CONFIG_ROCKCHIP_RV1126) += rv1126/
 
 # Clear out SPL objects, in case this is a TPL build
 obj-spl-$(CONFIG_TPL_BUILD) =
diff --git a/arch/arm/mach-rockchip/rv1126/Kconfig 
b/arch/arm/mach-rockchip/rv1126/Kconfig
new file mode 100644
index 00..86abc4e2fa
--- /dev/null
+++ b/arch/arm/mach-rockchip/rv1126/Kconfig
@@ -0,0 +1,43 @@
+if ROCKCHIP_RV1126
+
+config SOC_SPECIFIC_OPTIONS # dummy
+   def_bool y
+   select HAS_CUSTOM_SYS_INIT_SP_ADDR
+
+config ROCKCHIP_BOOT_MODE_REG
+   default 0xfe020200
+
+config ROCKCHIP_STIMER_BASE
+   default