Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-24 Thread Vikas MANOCHA
Thanks Jagan,

> -Original Message-
> From: Jagan Teki [mailto:jt...@openedev.com]
> Sent: Wednesday, June 24, 2015 11:54 AM
> To: Vikas MANOCHA
> Cc: Stefan Roese; u-boot@lists.denx.de; grmo...@opensource.altera.com
> Subject: Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT &
> fix for FIFO width
> 
> On 24 June 2015 at 23:43, Vikas MANOCHA  wrote:
> > Thanks Stefan,
> > Adding Jagan to apply the patchset.
> 
> I saw checkpatch.pl errors/warnings with 1 and 3 patches, please check it
> those and resend.

Yes for Patch3, I will fix it & send the v2. 
Patch1 has one check info (Alignment should match open parenthesis)  I think it 
should be ignored..

Rgds,
Vikas

> Anyway I will apply these on master-next for next releases, is that fine?
> 
> >
> >> -Original Message-
> >> From: Stefan Roese [mailto:s...@denx.de]
> >> Sent: Wednesday, June 24, 2015 3:09 AM
> >> To: Vikas MANOCHA
> >> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> >> dingu...@opensource.altera.com
> >> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix
> >> for FIFO width
> >>
> >> Hi Vikas,
> >>
> >> On 23.06.2015 16:48, Vikas MANOCHA wrote:
> >> >> -Original Message-
> >> >> From: Stefan Roese [mailto:s...@denx.de]
> >> >> Sent: Friday, June 12, 2015 5:10 AM
> >> >> To: Vikas MANOCHA; u-boot@lists.denx.de;
> >> >> grmo...@opensource.altera.com; dingu...@opensource.altera.com
> >> >> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT &
> >> >> fix for FIFO width
> >> >>
> >> >> Hi Vikas,
> >> >>
> >> >> On 11.06.2015 21:16, Vikas MANOCHA wrote:
> >> >>> Any comments on the patchset.
> >> >>
> >> >> I'll test them next week on a SoCFPGA based board and will comment
> >> >> then again.
> >> >
> >> > Can you please test this patchset also.
> >>
> >> Okay. I've now tested this 3 patch series as well on top of mainline.
> >> And SPI NOR seems to work just fine with this one applied. Not errors
> >> and the write/read/compare test also works okay.
> 
> thanks!
> --
> Jagan | openedev.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-24 Thread Jagan Teki
On 24 June 2015 at 23:43, Vikas MANOCHA  wrote:
> Thanks Stefan,
> Adding Jagan to apply the patchset.

I saw checkpatch.pl errors/warnings with 1 and 3 patches, please check
it those and resend.
Anyway I will apply these on master-next for next releases, is that fine?

>
>> -Original Message-
>> From: Stefan Roese [mailto:s...@denx.de]
>> Sent: Wednesday, June 24, 2015 3:09 AM
>> To: Vikas MANOCHA
>> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
>> dingu...@opensource.altera.com
>> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
>> FIFO width
>>
>> Hi Vikas,
>>
>> On 23.06.2015 16:48, Vikas MANOCHA wrote:
>> >> -Original Message-
>> >> From: Stefan Roese [mailto:s...@denx.de]
>> >> Sent: Friday, June 12, 2015 5:10 AM
>> >> To: Vikas MANOCHA; u-boot@lists.denx.de;
>> >> grmo...@opensource.altera.com; dingu...@opensource.altera.com
>> >> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix
>> >> for FIFO width
>> >>
>> >> Hi Vikas,
>> >>
>> >> On 11.06.2015 21:16, Vikas MANOCHA wrote:
>> >>> Any comments on the patchset.
>> >>
>> >> I'll test them next week on a SoCFPGA based board and will comment
>> >> then again.
>> >
>> > Can you please test this patchset also.
>>
>> Okay. I've now tested this 3 patch series as well on top of mainline.
>> And SPI NOR seems to work just fine with this one applied. Not errors and
>> the write/read/compare test also works okay.

thanks!
-- 
Jagan | openedev.
___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-24 Thread Vikas MANOCHA
Thanks Stefan,
Adding Jagan to apply the patchset.
Rgds,
Vikas

> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Wednesday, June 24, 2015 3:09 AM
> To: Vikas MANOCHA
> Cc: u-boot@lists.denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com
> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
> FIFO width
> 
> Hi Vikas,
> 
> On 23.06.2015 16:48, Vikas MANOCHA wrote:
> >> -Original Message-
> >> From: Stefan Roese [mailto:s...@denx.de]
> >> Sent: Friday, June 12, 2015 5:10 AM
> >> To: Vikas MANOCHA; u-boot@lists.denx.de;
> >> grmo...@opensource.altera.com; dingu...@opensource.altera.com
> >> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix
> >> for FIFO width
> >>
> >> Hi Vikas,
> >>
> >> On 11.06.2015 21:16, Vikas MANOCHA wrote:
> >>> Any comments on the patchset.
> >>
> >> I'll test them next week on a SoCFPGA based board and will comment
> >> then again.
> >
> > Can you please test this patchset also.
> 
> Okay. I've now tested this 3 patch series as well on top of mainline.
> And SPI NOR seems to work just fine with this one applied. Not errors and
> the write/read/compare test also works okay.
> 
> HTP.
> 
> Thanks,
> Stefan

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-24 Thread Stefan Roese

Hi Vikas,

On 23.06.2015 16:48, Vikas MANOCHA wrote:

-Original Message-
From: Stefan Roese [mailto:s...@denx.de]
Sent: Friday, June 12, 2015 5:10 AM
To: Vikas MANOCHA; u-boot@lists.denx.de;
grmo...@opensource.altera.com; dingu...@opensource.altera.com
Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
FIFO width

Hi Vikas,

On 11.06.2015 21:16, Vikas MANOCHA wrote:

Any comments on the patchset.


I'll test them next week on a SoCFPGA based board and will comment then
again.


Can you please test this patchset also.


Okay. I've now tested this 3 patch series as well on top of mainline. 
And SPI NOR seems to work just fine with this one applied. Not errors 
and the write/read/compare test also works okay.


HTP.

Thanks,
Stefan

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-23 Thread Vikas MANOCHA
Hi Stefan,

> -Original Message-
> From: Stefan Roese [mailto:s...@denx.de]
> Sent: Friday, June 12, 2015 5:10 AM
> To: Vikas MANOCHA; u-boot@lists.denx.de;
> grmo...@opensource.altera.com; dingu...@opensource.altera.com
> Subject: Re: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for
> FIFO width
> 
> Hi Vikas,
> 
> On 11.06.2015 21:16, Vikas MANOCHA wrote:
> > Any comments on the patchset.
> 
> I'll test them next week on a SoCFPGA based board and will comment then
> again.

Can you please test this patchset also.

Rgds,
Vikas

> 
> Thanks,
> Stefan

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-12 Thread Stefan Roese

Hi Vikas,

On 11.06.2015 21:16, Vikas MANOCHA wrote:

Any comments on the patchset.


I'll test them next week on a SoCFPGA based board and will comment then 
again.


Thanks,
Stefan

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


Re: [U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-11 Thread Vikas MANOCHA
Hi Stephen,
Any comments on the patchset.
Rgds,
Vikas

> -Original Message-
> From: Vikas MANOCHA
> Sent: Tuesday, June 09, 2015 6:25 PM
> To: u-boot@lists.denx.de; s...@denx.de; grmo...@opensource.altera.com;
> dingu...@opensource.altera.com
> Cc: Vikas MANOCHA
> Subject: [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO
> width
> 
> This patchset adds support to get controller sram size from device tree & fix
> to support different FIFO widths.
> 
> Vikas Manocha (3):
>   spi: cadence_qspi: move the sram partition in init
>   spi: cadence_qspi: get sram size from device tree
>   spi: cadence_qspi: support FIFO width other than 4 bytes
> 
>  arch/arm/dts/socfpga.dtsi  |1 +
>  arch/arm/dts/stv0991.dts   |1 +
>  drivers/spi/cadence_qspi.c |1 +
>  drivers/spi/cadence_qspi.h |1 +
>  drivers/spi/cadence_qspi_apb.c |   63 +---
> 
>  5 files changed, 31 insertions(+), 36 deletions(-)
> 
> --
> 1.7.9.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot


[U-Boot] [PATCH 0/3] spi: cadence_qspi: sram depth from DT & fix for FIFO width

2015-06-09 Thread Vikas Manocha
This patchset adds support to get controller sram size from device tree
& fix to support different FIFO widths.

Vikas Manocha (3):
  spi: cadence_qspi: move the sram partition in init
  spi: cadence_qspi: get sram size from device tree
  spi: cadence_qspi: support FIFO width other than 4 bytes

 arch/arm/dts/socfpga.dtsi  |1 +
 arch/arm/dts/stv0991.dts   |1 +
 drivers/spi/cadence_qspi.c |1 +
 drivers/spi/cadence_qspi.h |1 +
 drivers/spi/cadence_qspi_apb.c |   63 +---
 5 files changed, 31 insertions(+), 36 deletions(-)

-- 
1.7.9.5

___
U-Boot mailing list
U-Boot@lists.denx.de
http://lists.denx.de/mailman/listinfo/u-boot