Re: [U-Boot] [PATCH 3/7] dra7xx_evm: add SPL API, QSPI, and serial flash support
On Thursday 11 July 2013 05:28 AM, Nishanth Menon wrote: [...] diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 338a241..2441c55 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {UART1_RTSN, (IEN | PTU | PDIS | M3)},/* UART1_RTSN */ {I2C1_SDA, (IEN | PTU | PDIS | M0)},/* I2C1_SDA */ {I2C1_SCL, (IEN | PTU | PDIS | M0)},/* I2C1_SCL */ +{GPMC_A13, (IEN | PDIS | M1)},/* QSPI1_RTCLK */ +{GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ +{GPMC_A15, (IEN | PDIS | M1)},/* QSPI1_D[2] */ +{GPMC_A16, (IEN | PDIS | M1)},/* QSPI1_D[1] */ +{GPMC_A17, (IEN | PDIS | M1)},/* QSPI1_D[0] */ +{GPMC_A18, (IEN | PDIS | M1)},/* QSPI1_SCLK */ +{GPMC_A3, (IEN | PDIS | M1)},/* QSPI1_CS2 */ +{GPMC_A4, (IEN | PDIS | M1)},/* QSPI1_CS3 */ +{GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */ +{GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/ Just a nitpick - Could someone audit this to ensure that only input/full duplex pins are set to IEN(Input Enable)? Chip select (CS), SCLK, RTCLK dont seem to be candidates for input to DRA. Yes, SCLK is just an output and IEN should not be required. RTCLK is an input to qspi to synchronise the data read, so probably I should keep IEN. CS are also the outputs to slave, though I dont know why the dra data manual shows its type as IO. --- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] dra7xx_evm: add SPL API, QSPI, and serial flash support
[...] diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 338a241..2441c55 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ {I2C1_SDA, (IEN | PTU | PDIS | M0)},/* I2C1_SDA */ {I2C1_SCL, (IEN | PTU | PDIS | M0)},/* I2C1_SCL */ + {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */ + {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ + {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */ + {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */ + {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */ + {GPMC_A18, (IEN | PDIS | M1)}, /* QSPI1_SCLK */ + {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */ + {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */ + {GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */ + {GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/ Just a nitpick - Could someone audit this to ensure that only input/full duplex pins are set to IEN(Input Enable)? Chip select (CS), SCLK, RTCLK dont seem to be candidates for input to DRA. --- Regards, Nishanth Menon ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
Re: [U-Boot] [PATCH 3/7] dra7xx_evm: add SPL API, QSPI, and serial flash support
On Wednesday 10 July 2013 04:55 PM, Sourav Poddar wrote: > From: Matt Porter > > Enables support for SPI SPL, QSPI and Spansion serial flash device > on the EVM. Configures pin muxes for QSPI mode. > > Signed-off-by: Matt Porter > Signed-off-by: Sourav Poddar > --- > board/ti/dra7xx/mux_data.h | 10 ++ > include/configs/dra7xx_evm.h | 22 ++ > 2 files changed, 32 insertions(+), 0 deletions(-) > > diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h > index 338a241..2441c55 100644 > --- a/board/ti/dra7xx/mux_data.h > +++ b/board/ti/dra7xx/mux_data.h > @@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] > = { > {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ > {I2C1_SDA, (IEN | PTU | PDIS | M0)},/* I2C1_SDA */ > {I2C1_SCL, (IEN | PTU | PDIS | M0)},/* I2C1_SCL */ > + {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */ > + {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ > + {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */ > + {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */ > + {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */ > + {GPMC_A18, (IEN | PDIS | M1)}, /* QSPI1_SCLK */ > + {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */ > + {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */ > + {GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */ > + {GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/ > }; > #endif /* _MUX_DATA_DRA7XX_H_ */ > diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h > index 6b37e1d..0583858 100644 > --- a/include/configs/dra7xx_evm.h > +++ b/include/configs/dra7xx_evm.h > @@ -46,4 +46,26 @@ > #define NON_SECURE_SRAM_END 0x4038 /* Not inclusive */ > > #define CONFIG_SYS_OMAP_ABE_SYSCK > +#define CONFIG_SYS_DCACHE_OFF > +#define CONFIG_SYS_ICACHE_OFF Is it necessary to Disable caches to use QSPI? If not please drop these two defines. > + > +#define EMIF1_EMIF2 This one too.. Thanks, Lokesh > + > +/* SPI */ > +#define CONFIG_TI_QSPI > +#define CONFIG_SPI_FLASH > +#define CONFIG_SPI_FLASH_SPANSION > +#define CONFIG_CMD_SF > +#define CONFIG_CMD_SPI > +#define CONFIG_SF_DEFAULT_SPEED 1200 > +#define CONFIG_DEFAULT_SPI_MODE SPI_MODE_3 > + > +/* SPI SPL */ > +#define CONFIG_SPL_SPI_SUPPORT > +#define CONFIG_SPL_SPI_LOAD > +#define CONFIG_SPL_SPI_FLASH_SUPPORT > +#define CONFIG_SPL_SPI_BUS 0 > +#define CONFIG_SPL_SPI_CS0 > +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2 > + > #endif /* __CONFIG_DRA7XX_EVM_H */ > ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot
[U-Boot] [PATCH 3/7] dra7xx_evm: add SPL API, QSPI, and serial flash support
From: Matt Porter Enables support for SPI SPL, QSPI and Spansion serial flash device on the EVM. Configures pin muxes for QSPI mode. Signed-off-by: Matt Porter Signed-off-by: Sourav Poddar --- board/ti/dra7xx/mux_data.h | 10 ++ include/configs/dra7xx_evm.h | 22 ++ 2 files changed, 32 insertions(+), 0 deletions(-) diff --git a/board/ti/dra7xx/mux_data.h b/board/ti/dra7xx/mux_data.h index 338a241..2441c55 100644 --- a/board/ti/dra7xx/mux_data.h +++ b/board/ti/dra7xx/mux_data.h @@ -53,5 +53,15 @@ const struct pad_conf_entry core_padconf_array_essential[] = { {UART1_RTSN, (IEN | PTU | PDIS | M3)}, /* UART1_RTSN */ {I2C1_SDA, (IEN | PTU | PDIS | M0)},/* I2C1_SDA */ {I2C1_SCL, (IEN | PTU | PDIS | M0)},/* I2C1_SCL */ + {GPMC_A13, (IEN | PDIS | M1)}, /* QSPI1_RTCLK */ + {GPMC_A14, (IEN | PDIS | M1)}, /* QSPI1_D[3] */ + {GPMC_A15, (IEN | PDIS | M1)}, /* QSPI1_D[2] */ + {GPMC_A16, (IEN | PDIS | M1)}, /* QSPI1_D[1] */ + {GPMC_A17, (IEN | PDIS | M1)}, /* QSPI1_D[0] */ + {GPMC_A18, (IEN | PDIS | M1)}, /* QSPI1_SCLK */ + {GPMC_A3, (IEN | PDIS | M1)}, /* QSPI1_CS2 */ + {GPMC_A4, (IEN | PDIS | M1)}, /* QSPI1_CS3 */ + {GPMC_CS2, (IEN | PTU | PDIS | M1)},/* QSPI1_CS0 */ + {GPMC_CS3, (IEN | PTU | PDIS | M1)},/* QSPI1_CS1*/ }; #endif /* _MUX_DATA_DRA7XX_H_ */ diff --git a/include/configs/dra7xx_evm.h b/include/configs/dra7xx_evm.h index 6b37e1d..0583858 100644 --- a/include/configs/dra7xx_evm.h +++ b/include/configs/dra7xx_evm.h @@ -46,4 +46,26 @@ #define NON_SECURE_SRAM_END0x4038 /* Not inclusive */ #define CONFIG_SYS_OMAP_ABE_SYSCK +#define CONFIG_SYS_DCACHE_OFF +#define CONFIG_SYS_ICACHE_OFF + +#define EMIF1_EMIF2 + +/* SPI */ +#define CONFIG_TI_QSPI +#define CONFIG_SPI_FLASH +#define CONFIG_SPI_FLASH_SPANSION +#define CONFIG_CMD_SF +#define CONFIG_CMD_SPI +#define CONFIG_SF_DEFAULT_SPEED1200 +#define CONFIG_DEFAULT_SPI_MODESPI_MODE_3 + +/* SPI SPL */ +#define CONFIG_SPL_SPI_SUPPORT +#define CONFIG_SPL_SPI_LOAD +#define CONFIG_SPL_SPI_FLASH_SUPPORT +#define CONFIG_SPL_SPI_BUS 0 +#define CONFIG_SPL_SPI_CS 0 +#define CONFIG_SYS_SPI_U_BOOT_OFFS 0x2 + #endif /* __CONFIG_DRA7XX_EVM_H */ -- 1.7.1 ___ U-Boot mailing list U-Boot@lists.denx.de http://lists.denx.de/mailman/listinfo/u-boot