From: Tien Fong Chee
These drivers handle FPGA program operation from flash loading
RBF to memory and then to program FPGA.
Signed-off-by: Tien Fong Chee
---
.../include/mach/fpga_manager_arria10.h| 28 ++
drivers/fpga/socfpga_arria10.c | 435 -
include/altera.h | 6 +
3 files changed, 467 insertions(+), 2 deletions(-)
diff --git a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
index 9cbf696..1fc5b92 100644
--- a/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
+++ b/arch/arm/mach-socfpga/include/mach/fpga_manager_arria10.h
@@ -8,6 +8,8 @@
#ifndef _FPGA_MANAGER_ARRIA10_H_
#define _FPGA_MANAGER_ARRIA10_H_
+#include
+
#define ALT_FPGAMGR_IMGCFG_STAT_F2S_CRC_ERROR_SET_MSK BIT(0)
#define ALT_FPGAMGR_IMGCFG_STAT_F2S_EARLY_USERMODE_SET_MSK BIT(1)
#define ALT_FPGAMGR_IMGCFG_STAT_F2S_USERMODE_SET_MSK BIT(2)
@@ -89,11 +91,37 @@ struct socfpga_fpga_manager {
u32 imgcfg_fifo_status;
};
+#if defined(CONFIG_CMD_FPGA_LOADFS)
+enum rbf_type {unknown, periph_section, core_section};
+enum rbf_security {invalid, unencrypted, encrypted};
+
+struct rbf_info {
+ enum rbf_type section;
+ enum rbf_security security;
+};
+
+struct flash_info {
+ char *interface;
+ char *dev_part;
+ char *filename;
+ int fstype;
+ u32 remaining;
+ u32 flash_offset;
+ struct rbf_info rbfinfo;
+ struct image_header header;
+};
+#endif
+
/* Functions */
int fpgamgr_program_init(u32 * rbf_data, size_t rbf_size);
int fpgamgr_program_finish(void);
int is_fpgamgr_user_mode(void);
int fpgamgr_wait_early_user_mode(void);
+#if defined(CONFIG_CMD_FPGA_LOADFS)
+const char *get_cff_filename(const void *fdt, int *len, u32 core);
+const char *get_cff_devpart(const void *fdt, int *len);
+#endif
+void set_flash_devpart(char *name, char *devpart);
#endif /* __ASSEMBLY__ */
diff --git a/drivers/fpga/socfpga_arria10.c b/drivers/fpga/socfpga_arria10.c
index e076bda..bfc8700 100644
--- a/drivers/fpga/socfpga_arria10.c
+++ b/drivers/fpga/socfpga_arria10.c
@@ -13,6 +13,13 @@
#include
#include
#include
+#include
+#include
+#include
+#include
+#include
+#include
+#include
#include
#include
@@ -22,6 +29,10 @@
#define COMPRESSION_OFFSET 229
#define FPGA_TIMEOUT_MSEC 1000 /* timeout in ms */
#define FPGA_TIMEOUT_CNT 0x100
+#define RBF_UNENCRYPTED0xa65c
+#define RBF_ENCRYPTED 0xa65d
+#define ARRIA10RBF_PERIPH 0x0001
+#define ARRIA10RBF_CORE0x8001
DECLARE_GLOBAL_DATA_PTR;
@@ -33,6 +44,32 @@ static const struct socfpga_system_manager
*system_manager_base =
static void fpgamgr_set_cd_ratio(unsigned long ratio);
+static struct flash_location default_flash_locations[] = {
+ {
+ .name = "mmc",
+ .storage = FLASH_STORAGE_MMC,
+ .flags = FLASH_STORAGE_FS,
+ .devpart = "0:1",
+ },
+};
+
+void set_flash_devpart(char *name, char *devpart)
+{
+ int i;
+ u32 size;
+
+ size = ARRAY_SIZE(default_flash_locations);
+
+ for (i = 0; i < size; i++) {
+ if (!strcmp(default_flash_locations[i].name, name))
+ default_flash_locations[i].devpart = devpart;
+ return;
+ }
+
+ printf("No flash is found\n");
+ return;
+}
+
static uint32_t fpgamgr_get_msel(void)
{
u32 reg;
@@ -181,7 +218,8 @@ static int fpgamgr_set_cdratio_cdwidth(unsigned int
cfg_width, u32 *rbf_data,
debug("header word %d = %08x\n", 69, rbf_data[69]);
debug("header word %d = %08x\n", 229, rbf_data[229]);
- debug("read from rbf header: encrypt=%d compress=%d\n", encrypt,
compress);
+ debug("read from rbf header: encrypt=%d compress=%d\n", encrypt,
+compress);
/*
* from the register map description of cdratio in imgcfg_ctrl_02:
@@ -362,7 +400,8 @@ static int fpgamgr_program_poll_cd(void)
if (reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_CONDONE_PIN_SET_MSK)
return 0;
- if ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK) ==
0) {
+ if ((reg & ALT_FPGAMGR_IMGCFG_STAT_F2S_NSTATUS_PIN_SET_MSK) ==
+0) {
printf("nstatus == 0 while waiting for condone\n");
return -EPERM;
}
@@ -470,6 +509,7 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data,
size_t rbf_size)
/* Initialize the FPGA Manager */
status = fpgamgr_program_init((u32 *)rbf_data, rbf_size);
+
if (status)
return status;
@@ -478,3 +518,394 @@ int socfpga_load(Altera_desc *desc, const void *rbf_data,
size_t rbf_size)