Re: [U-Boot] [U-Boot-Users] U-boot for PPC405GP based custom Board

2010-06-24 Thread ravi . rao
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Feng Kan f...@apm.com 
06/24/2010 04:32 PM

To
ravi@rflelect.com
cc

Subject
Re: [U-Boot-Users] U-boot for PPC405GP based custom Board






please enable debug in the flash driver and send out that information.

Feng Kan


On Thu, Jun 24, 2010 at 12:56 PM, ravi@rflelect.com wrote:

HI All, 
   Our Custom board is based on EP405GP which is not supported in current 
u-boot. I have almost everything running except for the Flash interface. I 
am not able to Get the Flash size correct it comes back as 32MB.Also none 
of the Flash related operations work.  One major difference I see in our 
design is we have 2,  AMD S29GL256N spansion  flashes in the same Bank. I 
do not see any reference board which is doing this. Number of Banks is 1 
and word size is 32. 
Following are the definitions 

#define CFG_FLASH_CHIPS_PER_BANK2 
#define CFG_FLASH_TOTAL_BANKS1/* also used 
by CFG_MAX_FLASH_BANKS below */ 
#define CFG_TOTAL_CONTIG_BANKS1 
#define CFG_FLASH_BUS_WIDTH32 


#define CFG_MAX_FLASH_BANKSCFG_FLASH_TOTAL_BANKS/* max 
flash banks for rfl boards */ 


#define FLASH_BASE0_PRELIMCFG_FLASH_BASE/* FLASH bank #0   
 */ 
#define FLASH_BASE1_PRELIM0/* FLASH bank #1   
 */ 

#define CFG_MAX_FLASH_SECT512/* max number of sectors on 
one chip*/ 

#define CFG_FLASH_ERASE_TOUT12/* Timeout for Flash 
Erase (in ms)*/ 
#define CFG_FLASH_WRITE_TOUT500/* Timeout for Flash Write 
(in ms)*/ 

#define CFG_FLASH_EMPTY_INFO/* print 'E' for empty sector 
on flinfo */ 

#define CFG_FLASH_ADDR0 0x555 
#define CFG_FLASH_ADDR1 0x2aa 

// An important configuration when trying to bring the board up -RAVI.. 
#define CFG_FLASH_WORD_SIZE unsigned int //(32 bits = Bus width..) 

Any pointers to resolve this is greatly apreciated. 
Thanks,
Ravishankar Govindarao
RFL Electronics Inc.
E-mail : ravi@rflelect.com 
Voice: 973.334.3100 Ext. 233
Fax: 973.334.3863 
  

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Feng Kan
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Re: [U-Boot] [U-Boot-Users] U-boot for PPC405GP based custom Board

2010-06-24 Thread Feng Kan
  FDE6 EFDE8
 FDEA EFDEC  FDEE  FDF0  FDF2 E
 FDF4  FDF6 EFDF8  FDFA EFDFC
 FDFE E
 =


 Thanks,
 Ravishankar Govindarao
 RFL Electronics Inc.
 E-mail : *ravi@rflelect.com* ravi@rflelect.com
 Voice: 973.334.3100 Ext. 233
 Fax: 973.334.3863



 *CONFIDENTIALITY NOTE*

 This e-mail, including any attachments, may contain confidential and/or
 legally privileged information.  The Information is intended only for the
 use of the individual or entity named on this e-mail .  If you are not the
 intended recipient, you are hereby notified that any disclosure, copying,
 distribution, or the taking of any action in reliance on the contents of
 this transmitted Information is strictly prohibited.  Further, if you are
 not the intended recipient, please notify us by return e-mail and delete the
 Information promptly.








  *Feng Kan f...@apm.com*

 06/24/2010 04:32 PM
   To
 ravi@rflelect.com
 cc
   Subject
 Re: [U-Boot-Users] U-boot for PPC405GP based custom Board




 please enable debug in the flash driver and send out that information.

 Feng Kan


 On Thu, Jun 24, 2010 at 12:56 PM, 
 *ravi@rflelect.com*ravi@rflelect.com
 wrote:

 HI All,
Our Custom board is based on EP405GP which is not supported in current
 u-boot. I have almost everything running except for the Flash interface. I
 am not able to Get the Flash size correct it comes back as 32MB.Also none of
 the Flash related operations work.  One major difference I see in our design
 is we have 2,  AMD S29GL256N spansion  flashes in the same Bank. I do not
 see any reference board which is doing this. Number of Banks is 1 and word
 size is 32.
 Following are the definitions

 #define CFG_FLASH_CHIPS_PER_BANK2
 #define CFG_FLASH_TOTAL_BANKS1/* also used
 by CFG_MAX_FLASH_BANKS below */
 #define CFG_TOTAL_CONTIG_BANKS1
 #define CFG_FLASH_BUS_WIDTH32


 #define CFG_MAX_FLASH_BANKSCFG_FLASH_TOTAL_BANKS/* max
 flash banks for rfl boards */


 #define FLASH_BASE0_PRELIMCFG_FLASH_BASE/* FLASH bank #0
  */
 #define FLASH_BASE1_PRELIM0/* FLASH bank #1
*/

 #define CFG_MAX_FLASH_SECT512/* max number of sectors on
 one chip*/

 #define CFG_FLASH_ERASE_TOUT12/* Timeout for Flash
 Erase (in ms)*/
 #define CFG_FLASH_WRITE_TOUT500/* Timeout for Flash Write
 (in ms)*/

 #define CFG_FLASH_EMPTY_INFO/* print 'E' for empty sector
 on flinfo */

 #define CFG_FLASH_ADDR0 0x555
 #define CFG_FLASH_ADDR1 0x2aa

 // An important configuration when trying to bring the board up -RAVI..
 #define CFG_FLASH_WORD_SIZE unsigned int //(32 bits = Bus width..)

 Any pointers to resolve this is greatly apreciated.
 Thanks,
 Ravishankar Govindarao
 RFL Electronics Inc.
 E-mail : *ravi@rflelect.com* ravi@rflelect.com
 Voice: 973.334.3100 Ext. 233
 Fax: 973.334.3863



 *
 CONFIDENTIALITY NOTE*


 This e-mail, including any attachments, may contain confidential and/or
 legally privileged information.  The Information is intended only for the
 use of the individual or entity named on this e-mail .  If you are not the
 intended recipient, you are hereby notified that any disclosure, copying,
 distribution, or the taking of any action in reliance on the contents of
 this transmitted Information is strictly prohibited.  Further, if you are
 not the intended recipient, please notify us by return e-mail and delete the
 Information promptly.









 --
 ThinkGeek and WIRED's GeekDad team up for the Ultimate
 GeekDad Father's Day Giveaway. ONE MASSIVE PRIZE to the
 lucky parental unit.  See the prize list and enter to win:*
 **http://p.sf.net/sfu/thinkgeek-promo*http://p.sf.net/sfu/thinkgeek-promo
 ___
 U-Boot-Users mailing list*
 **u-boot-us...@lists.sourceforge.net* u-boot-us...@lists.sourceforge.net
 *
 **https://lists.sourceforge.net/lists/listinfo/u-boot-users*https://lists.sourceforge.net/lists/listinfo/u-boot-users




 --
 Feng Kan
 CONFIDENTIALITY NOTICE: This e-mail message, including any attachments,
 is for the sole use of the intended recipient(s) and contains information
 that is confidential and proprietary to AppliedMicro Corporation or its
 subsidiaries.
 It is to be used solely for the purpose of furthering the parties' business
 relationship.
 All unauthorized review, use, disclosure or distribution is prohibited.
 If you are not the intended recipient, please contact the sender by reply
 e-mail
 and destroy all copies of the original message.





-- 
Feng Kan

CONFIDENTIALITY NOTICE: This e-mail message, including any attachments, 
is for the sole use of the intended recipient(s

Re: [U-Boot] [U-Boot-Users] U-boot for PPC405GP based custom Board

2010-06-24 Thread ravi . rao
Hi Feng,
We do not have two banks. Our design has only one Bank but two chips 
in the single Bank. Any idea how to get this working in u-boot..
Thanks
Ravishankar Govindarao
RFL Electronics Inc.
E-mail : ravi@rflelect.com
Voice: 973.334.3100 Ext. 233
Fax: 973.334.3863
 
CONFIDENTIALITY NOTE
This e-mail, including any attachments, may contain confidential and/or 
legally privileged information.  The Information is intended only for the 
use of the individual or entity named on this e-mail .  If you are not the 
intended recipient, you are hereby notified that any disclosure, copying, 
distribution, or the taking of any action in reliance on the contents of 
this transmitted Information is strictly prohibited.  Further, if you are 
not the intended recipient, please notify us by return e-mail and delete 
the Information promptly.
 
 
 



Feng Kan f...@apm.com 
06/24/2010 05:45 PM

To
ravi@rflelect.com
cc
u-boot@lists.denx.de
Subject
Re: [U-Boot-Users] U-boot for PPC405GP based custom Board






I dont know how the hardware is tied down. But at it seems to be getting 
bank 0 correctly.
However, you second bank base address should be bank0_base + size instead 
of 0.
You may have a hardware problem.

Feng Kan

On Thu, Jun 24, 2010 at 2:14 PM, ravi@rflelect.com wrote:

Hi Feng, 
Below is the screen dump after enabling Debug. .. 
=== 
Booting RFL GARD 8000 Controller using u-boot based bootloader 
=== 

U-Boot 1.3.0-rc4 (Jun 24 2010 - 16:47:32) 

CPU:   AMCC PowerPC 405GP Rev. E at 200 MHz (PLB=100, OPB=50, EBC=50 MHz) 
, PCI sync clock at 50 MHz   16 kB I-Cache 8 kB D-Cache 
Board: RFL-GARD8000 with AMCC PPC405GP processor 
I2C:   ready 
DRAM:  64 MB 
SDRAM test passes 
FLASH: FLASH ADDR: fc00 
FLASH MANUFACT: 10001 

FLASH DEVICEID: 227e227e 

C2:  LS: 22012201 

info-flash_id: f2 

Size of Flash0 at addr 0xfc00 is 0x200 
FLASH ADDR:  
FLASH MANUFACT:  
## Unknown FLASH on Bank 1 - Size = 0x = 0 MB 

Size of Flash1 at addr 0x0 is 0x0 
32 MB 
*** Warning - bad CRC, using default environment 

In:serial 
Out:   serial 
Err:   serial 
Error: start and/or end address not on sector boundary 
Error: start and/or end address not on sector boundary 
Error: start and/or end address not on sector boundary 
Hit any key to stop autoboot:  0 

= flinfo 

Bank # 1: AMD S29GL256N (256 Mbit, uniform sector size) 
  Size: 32768 KB in 256 Sectors 
  Sector Start Addresses: 
FC00  FC02  FC04  FC06  FC08 
FC0A  FC0C  FC0E  FC10  FC12 
FC14  FC16  FC18  FC1A  FC1C 
FC1E  FC20  FC22  FC24  FC26 
FC28  FC2A  FC2C  FC2E  FC30 
FC32  FC34  FC36  FC38  FC3A 
FC3C  FC3E  FC40  FC42  FC44 
FC46  FC48  FC4A  FC4C  FC4E 
FC50  FC52  FC54  FC56  FC58 
FC5A  FC5C  FC5E  FC60  FC62 
FC64  FC66  FC68  FC6A  FC6C 
FC6E  FC70  FC72  FC74  FC76 
FC78  FC7A  FC7C  FC7E  FC80 
FC82  FC84  FC86  FC88  FC8A 
FC8C  FC8E  FC90  FC92  FC94 
FC96  FC98  FC9A  FC9C  FC9E 
FCA0  FCA2  FCA4  FCA6  FCA8 
FCAA EFCAC  FCAE EFCB0  FCB2 E 
FCB4  FCB6 EFCB8  FCBA EFCBC 
FCBE EFCC0  FCC2 EFCC4  FCC6 E 
FCC8  FCCA EFCCC  FCCE EFCD0 
FCD2 EFCD4  FCD6 EFCD8  FCDA 
FCDC  FCDE EFCE0  FCE2 EFCE4 
FCE6 EFCE8  FCEA EFCEC  FCEE E 
FCF0  FCF2 EFCF4  FCF6 EFCF8 
FCFA EFCFC  FCFE EFD00  FD02 E 
FD04  FD06  FD08  FD0A EFD0C 
FD0E EFD10  FD12 EFD14  FD16 E 
FD18  FD1A EFD1C  FD1E EFD20 
FD22 EFD24  FD26 EFD28  FD2A E 
FD2C  FD2E EFD30  FD32 EFD34 
FD36 EFD38  FD3A  FD3C  FD3E E 
FD40  FD42 EFD44  FD46 EFD48 
FD4A EFD4C  FD4E EFD50  FD52 E 
FD54