Re: [yocto] How is it possible to build a loadable module from spi-altera.c ...?
My problem is I have an 1553 chip (an avionic data bus) connected to the
HPS master (an ARM processor) via an FPGA (soft) SPI controller. This is
where the spi-altera.c comes in. It provides the driver/interface to the
soft SPI controller on the Arria 10 SoC.
I need an interface now to communicate between the SPI slave (the 1553
chip) and the SPI master (the Arria 10 HPS/ARM).
When I load _spi-altera.ko_ I get the _udev_ files (_/dev/spidevXX_) but
not when I load _spidev.ko._ Why? _spi-altera.c _doesn't have an _init_
routine and consequently no call to _register_chrdev_(..) but _spidev.c_
does. What's the relationship between _spi-altera_ and _spidev_? What's
the purpose of _spi.c_?
On 2021-03-20 18:14, jchludzinski wrote:
How is it possible to build a loadable module from _spi-altera.c_ when
it has no code for creating _udev_ files (i.e., _/dev/spidevXX_); it
has no:
static int __init spidev_init(void)
{
int status;
printk(KERN_ALERT "DEBUG: Passed %s %d \n", __FUNCTION__,
__LINE__);
/* Claim our 256 reserved device numbers. Then register a class
* that will key udev/mdev to add/remove /dev nodes. Last,
register
* the driver which manages those device numbers.
*/
BUILD_BUG_ON(N_SPI_MINORS > 256);
status = register_chrdev(SPIDEV_MAJOR, "spi", &spidev_fops);
printk(KERN_ALERT "DEBUG: Passed %s %d \n", __FUNCTION__,
__LINE__);
if (status < 0)
return status;
printk(KERN_ALERT "DEBUG: Passed %s %d \n", __FUNCTION__,
__LINE__);
spidev_class = class_create(THIS_MODULE, "spidev");
if (IS_ERR(spidev_class)) {
unregister_chrdev(SPIDEV_MAJOR,
spidev_spi_driver.driver.name);
return PTR_ERR(spidev_class);
}
printk(KERN_ALERT "DEBUG: Passed %s %d \n", __FUNCTION__,
__LINE__);
status = spi_register_driver(&spidev_spi_driver);
if (status < 0) {
class_destroy(spidev_class);
unregister_chrdev(SPIDEV_MAJOR,
spidev_spi_driver.driver.name);
}
printk(KERN_ALERT "DEBUG: Passed %s %d \n", __FUNCTION__,
__LINE__);
return status;
}
module_init(spidev_init);
The _printk_'s are of course mine.
---John
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Re: [yocto] spidev.c ?
> // interrupt-parent = <&intc>;
> // interrupts = <0 24 IRQ_TYPE_EDGE_FALLING>;
Not sure if you did represent these values correctly?!
I have for enc28j60:something like this:
interrupt-parent = <&gpio2>;
interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
Where <&gpio2> is gpio chip name (the gpio port 2),
and <1 IRQ_TYPE_EDGE_FALLING>;is pin 1 of port 2 (32 pins for ports
from port 0).
<&intc> should be an INT controller.
Since <0 24 IRQ_TYPE_EDGE_FALLING>; you are trying to represent 0 as
port #, 24 as pin #...
I have no idea how many pins you have per gpio port? 16? 32?
You should carefully analyse and try to understand if you wrote this
device tree sequence correctly.
But I am just guessing now...
Zee
___
On Sat, Mar 20, 2021 at 11:02 PM jchludzinski wrote:
>
> Using 'make nconfig' I selected the following options:
> (Keep in mind I using an Altera/Intel Arria 10 SoC which uses DesignWare hard
> SPI controllers. BUT the SPI controllers I'm concerned with now are soft
> controllers defined in the FPGA code).
>
> .config - Linux/arm 5.4.74 Kernel Configuration
> ┌── SPI support
> ─┐
> │
> │
> │--- SPI support
> │
> │[*] Debug support for SPI drivers
> │
> │-*- SPI memory extension
> │
> │ *** SPI Master Controller Drivers ***
> │
> │ Altera SPI Controller
>
> ...
>
> │<*> Utilities for Bitbanging SPI masters
> │
> │< > Cadence SPI controller
> │
> │< > CLPS711X host SPI controller
> │
> │<*> DesignWare SPI controller core support
> │
> │<*> PCI interface driver for DW SPI core
> │
> │<*> Memory-mapped io interface driver for
> DW SPI core │
>
> ...
>
> │ *** SPI Protocol Masters ***
> │
> │ User mode SPI device driver support
> │
> │ spi loopback test framework support
> │
> │< > Infineon TLE62X0 (for power switching)
> │
> │[*] SPI slave protocol handlers
> │
> │ SPI slave handler reporting boot up
> time│
> │ SPI slave handler controlling system
> state │
>
> This got the SPI nodes to show up in /sys/firmware/devicetree/ but there were
> no udev files (/dev/spidevXX). So I commented out the 'interrupts' in the
> DTSI file and the udev files appeared?
>
> spi2: spi@0xc00c0800 { // hps_spi_1553_int
>address-cells = <0x1>;
>#size-cells = <0x0>;
>reg = <0xc00c0800 0x20>;
>// interrupt-parent = <&intc>;
>// interrupts = <0 24 IRQ_TYPE_EDGE_FALLING>;
>num-cs = <0x1>;
>status = "okay";
>
>spidev@0 {
> compatible = "rohm,dh2228fv";
> #address-cells = <0x1>;
> #size-cells = <0x0>;
> reg = <0x0>;
> spi-max-frequency = <0x1f400>;
> // enable-dma = <0x1>;
>};
> };
>
> BUT I need those interrupts. Thoughts and/or suggestions?
>
> ---John
>
>
>
> On 2021-03-19 01:10, Zoran wrote:
>
> Hello John,
>
> It seems that your target is configured correctly. Since you have all
> the components you should and must have as SPI framework.
>
> Namely I was looking for /sys/bus (since you must have an SPI bus
> driver), and then /sys/class (since as my best understanding is that
> SPI is a master/slave device), you must have class/). O
