use CONTEXT_CONTROL package to dynamically skip
preamble IB and other load_xxx command in sequence.
Change-Id: I4b87ca84ea8c11ba4f7fb4c0e8a5be537ccde851
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 9 +
drivers/gpu/drm/amd/amdgpu/amdgpu_cs.c | 12
dr
CE & DE can have most up to 128dw as the gap between them
so to sync CE nad DE we don't need double SWITCH_BUFFERs any
more, which is urgly and harm performance, we only need
insert 128NOP after VM flush to prevent CE vm fault.
Change-Id: Ibec954ce4c817ad7d3bce89c2bcb95b6c6bb5411
Signed-off-by: Mo
job->ctx actually is a fence_context of the entity
it belongs to, naming it as ctx is too vague, and
we'll need add amdgpu_ctx into the job structure
later.
Change-Id: I71e73912e26372639ea44a18d9e36d58d936f19a
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h | 2 +-
drivers/g
Change-Id: Ie3e4587ed49c487c562f45a99f236a76727ace1e
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
b/drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c
index 029ee79..6ad45fa 10064
sync switch buffer scheme with windows kmd for gfx v8,
Now always and only insert one switch buffer to the
end of CS.
Change-Id: Ief8539b2ad91ccb38b9adbfb54e27d8282f3a3bd
Signed-off-by: Monk Liu
---
drivers/gpu/drm/amd/amdgpu/amdgpu.h| 2 ++
drivers/gpu/drm/amd/amdgpu/amdgpu_ib.c | 2 ++
d
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, August 25, 2016 11:04 PM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-ati] Also handle disabled CRTCs in
> drmmode_clear_pending_flip
>
> F
But for VI. My patch will reduce those 5 redundant SB and one SB can always use
ping-pong buffer,
so the performance looks raised around 5%.
BR Monk
-Original Message-
From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf Of Liu,
Monk
Sent: Friday, August 26, 2016 11:0
Not needed at least in windows kmd, I don't know if it is out of what reason,
with my guess:
1, CI doesn’t support world switch, so no need for the SWITCH_BUFFER at end
(only one SB at end is for world switch).
2, I don’t know if that limit can also applied on CI (limit is CE can at most
ahead
From: Michel Dänzer
If disabling a CRTC had to be deferred due to a pending flip in
drmmode_crtc_dpms, there may no longer be any outputs associated with
the CRTC when we get here. So we have to check for !crtc->enabled and
call drmmode_crtc_dpms in that case as well.
Fixes: 9090309e057d ("Wait
On 2016-08-25 20:43, Marek Olšák wrote:
On Thu, Aug 25, 2016 at 3:36 PM, Mads wrote:
Thank you for notifying :)
Just curious, is there a way to enable them in the same way as
disabling
them is done with R600_DEBUG=nodma? Because, while desktop
applications gets
buggy, games and such does n
On Thu, Aug 25, 2016 at 3:36 PM, Mads wrote:
> Thank you for notifying :)
>
> Just curious, is there a way to enable them in the same way as disabling
> them is done with R600_DEBUG=nodma? Because, while desktop applications gets
> buggy, games and such does not trigger any artifacts, so normally
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Tom St Denis
> Sent: Thursday, August 25, 2016 1:10 PM
> To: amd-gfx@lists.freedesktop.org
> Cc: StDenis, Tom
> Subject: [PATCH 3/3] drm/amd/amdgpu: Tidy up cz_dpm.c
>
> Various minor formatt
If one of the entries fails to be allocated then free
all of the previous entries before freeing the array which
holds their pointers.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/
Patch #2 has a typo should be 'j' in the loop.
I'll resend that patch in a second.
Tom
From: Tom St Denis
Sent: Thursday, August 25, 2016 13:10
To: amd-gfx@lists.freedesktop.org
Cc: StDenis, Tom
Subject: [PATCH 2/3] drm/amd/amdgpu: Clean up memory leak in cz_
If one of the entries fails to be allocated then free
all of the previous entries before freeing the array which
holds their pointers.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 2 ++
1 file changed, 2 insertions(+)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/
Various small fixes for cz_dpm.c. Patches #1/#2 deal with cleaning up the
memory allocations if init fails. Patch #3 addresses various style/indenation
issues.
___
amd-gfx mailing list
amd-gfx@lists.freedesktop.org
https://lists.freedesktop.org/mailma
If init fails free up any allocated memory.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 14 +-
1 file changed, 9 insertions(+), 5 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
index b06b95ce1350..d97604
Various minor formatting changes.
Signed-off-by: Tom St Denis
---
drivers/gpu/drm/amd/amdgpu/cz_dpm.c | 31 +++
1 file changed, 11 insertions(+), 20 deletions(-)
diff --git a/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
b/drivers/gpu/drm/amd/amdgpu/cz_dpm.c
index d9760438676
On Thu, Aug 25, 2016 at 11:51 AM, Dennis Schridde
wrote:
> On Thursday, 25 August 2016 11:44:08 CEST Alex Deucher wrote:
>> SR-IOV support is not yet upstream for Linux.
>
> Where do I ask about the abilities of the binary driver? Is there another
> mailinglist?
There is no binary kernel driver.
On Thursday, 25 August 2016 11:44:08 CEST Alex Deucher wrote:
> SR-IOV support is not yet upstream for Linux.
Where do I ask about the abilities of the binary driver? Is there another
mailinglist?
--Dennis
signature.asc
Description: This is a digitally signed message part.
_
On Thu, Aug 25, 2016 at 11:00 AM, Dennis Schridde
wrote:
> Hello!
>
> I investigating the virtualisation abilities of current AMD FirePro hardware;
> specifically how to securely pass a share of a GPU to one application (a Rkt/
> Docker container). I already read vfio.txt and pci-iov-howto.txt, bu
Hello!
I investigating the virtualisation abilities of current AMD FirePro hardware;
specifically how to securely pass a share of a GPU to one application (a Rkt/
Docker container). I already read vfio.txt and pci-iov-howto.txt, but they do
not answer my questions. I was unable to find documenta
Thank you for notifying :)
Just curious, is there a way to enable them in the same way as disabling
them is done with R600_DEBUG=nodma? Because, while desktop applications
gets buggy, games and such does not trigger any artifacts, so normally I
disable R600_DEBUG=nodma when gaming (as I've ass
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Michel Dänzer
> Sent: Thursday, August 25, 2016 5:58 AM
> To: amd-gfx@lists.freedesktop.org
> Subject: [PATCH xf86-video-ati 1/2] Also call drmmode_clear_pending_flip
> from radeon_scanout_fli
> -Original Message-
> From: amd-gfx [mailto:amd-gfx-boun...@lists.freedesktop.org] On Behalf
> Of Monk Liu
> Sent: Thursday, August 25, 2016 1:58 AM
> To: amd-gfx@lists.freedesktop.org
> Cc: Liu, Monk
> Subject: [PATCH 1/2] drm/amdgpu:fix gfx ib schedule
>
> for GFX 8, originally we use d
On Thu, Aug 25, 2016 at 4:06 AM, Christian König
wrote:
> Reviewed-by: Christian König as well.
>
> Do we have any requirement to support ring 2 and 3 in the near future or was
> this set just for cleanup?
Just cleanup and I was wondering if perhaps setting up all the rings
might make the engine
FYI, I've disabled SDMA texture copying for Carrizo in Mesa. The VM
faults should no longer occur.
Marek
On Fri, Aug 5, 2016 at 3:22 PM, Mads wrote:
> Just to update, R600_DEBUG=nodma is still needed when updating to
> xorg-server 1.18.4, plasma 5.7.3 and linux 4.7.0, and libdrm, mesa and llvm
>
From: Michel Dänzer
Not doing so could break DPMS with TearFree.
Reported-and-Tested-by: furkan on IRC
Fixes: 9090309e057d ("Wait for pending flips to complete before turning
off an output or CRTC")
Signed-off-by: Michel Dänzer
---
src/drmmode_display.c | 2 +-
src/drmmode_display.h | 1 +
sr
From: Michel Dänzer
When overriding the crtc parameter value of the last pending CRTC,
drmmode_clear_pending_flip would work on the wrong CRTC, and the last
pending CRTC's flip_pending flag might never get cleared. This would
prevent that CRTC from properly turning off and back on again.
Fixes:
But even user space will submit 10 ibs this submission, the calculate of
256*ibs is totally overflow, remember that ring buffer is only 4kb size
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Thursday, August 25, 2016 4:12 PM
To: Liu, Monk ; amd-gfx@lists
True indeed. Something like 256 + 32 * num_ibs (or even 16 * num_ibs???
Need to double check) should do as well.
Christian.
Am 25.08.2016 um 10:28 schrieb Liu, Monk:
But even user space will submit 10 ibs this submission, the calculate of
256*ibs is totally overflow, remember that ring buffer
Yeah, I was already doing that
-Original Message-
From: Christian König [mailto:deathsim...@vodafone.de]
Sent: Thursday, August 25, 2016 4:08 PM
To: Liu, Monk ; Zhou, David(ChunMing) ;
amd-gfx@lists.freedesktop.org
Cc: Mao, David
Subject: Re: [PATCH 0/6] make ctx mgr global
Yeah, I wou
Well userspace is allowed to send any number of IBs down to this if I
remember correctly.
So we clearly need something depending on the number of IBs or reject
submissions with to many IBs earlier in the CS.
Otherwise we clearly open up a possible problem where userspace can
trigger a ring o
Yeah, I wouldn't mind a patch renaming ctx to fence_context in the job
and rign structure.
This way we make it clear what is used here.
Christian.
Am 25.08.2016 um 05:38 schrieb Liu, Monk:
Sorry,
I don't mean ctx-id, I'm talking about "job->ctx", which is a atomic_64t value,
and it is initi
Reviewed-by: Christian König as well.
Do we have any requirement to support ring 2 and 3 in the near future or
was this set just for cleanup?
Regards,
Christian.
Am 25.08.2016 um 02:03 schrieb Qu, Jim:
These series Reivewed-by: JimQu
Thanks
JimQu
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