@@ -149,6 +149,12 @@ BUILTIN(__builtin_amdgcn_mqsad_pk_u16_u8, "WUiWUiUiWUi",
"nc")
BUILTIN(__builtin_amdgcn_mqsad_u32_u8, "V4UiWUiUiV4Ui", "nc")
BUILTIN(__builtin_amdgcn_make_buffer_rsrc, "Qbv*sii", "nc")
+BUILTIN(__builtin_amdgcn_raw_buffer_store_b8, "vcQbiiIi", "n")
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From 7fee22e922090633e0d96bd564aefc94bde7bb72 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 11:20:55 -0400
Subject: [PATCH 1/2] [Clang] Replace `emitXXXBuiltin` with a unified interface
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/94576
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https://github.com/llvm/llvm-project/pull/94576
>From 7fee22e922090633e0d96bd564aefc94bde7bb72 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 11:20:55 -0400
Subject: [PATCH 1/2] [Clang] Replace `emitXXXBuiltin` with a unified interface
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/96313
>From bedcb3a4a1ffe958e84ed8f0bdaba59dd7bf3ef3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 10:45:39 -0400
Subject: [PATCH] [Clang] Replace `emitXXXBuiltin` with a unified interface
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/96313
>From 836b7c1dce1ed323afef4d911e9c12378858e0dd Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 10:45:04 -0400
Subject: [PATCH] [Clang] Replace `emitXXXBuiltin` with a unified interface
---
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/96313
None
>From 64dbea02a0946dba55dad63b930939ed08907e8a Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 21 Jun 2024 10:43:11 -0400
Subject: [PATCH] [Clang] Replace `emitXXXBuiltin` with a unified interface
@@ -149,6 +149,19 @@ BUILTIN(__builtin_amdgcn_mqsad_pk_u16_u8, "WUiWUiUiWUi",
"nc")
BUILTIN(__builtin_amdgcn_mqsad_u32_u8, "V4UiWUiUiV4Ui", "nc")
BUILTIN(__builtin_amdgcn_make_buffer_rsrc, "Qbv*sii", "nc")
+BUILTIN(__builtin_amdgcn_raw_ptr_buffer_store_i8, "vcQbiiIi", "n")
@@ -149,6 +149,19 @@ BUILTIN(__builtin_amdgcn_mqsad_pk_u16_u8, "WUiWUiUiWUi",
"nc")
BUILTIN(__builtin_amdgcn_mqsad_u32_u8, "V4UiWUiUiV4Ui", "nc")
BUILTIN(__builtin_amdgcn_make_buffer_rsrc, "Qbv*sii", "nc")
+BUILTIN(__builtin_amdgcn_raw_ptr_buffer_store_i8, "vcQbiiIi", "n")
@@ -626,6 +626,18 @@ static Value *emitQuaternaryBuiltin(CodeGenFunction ,
const CallExpr *E,
return CGF.Builder.CreateCall(F, {Src0, Src1, Src2, Src3});
}
+static Value *emitQuinaryBuiltin(CodeGenFunction , const CallExpr *E,
shiltian wrote:
If we look
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From 01443b5f9d0b8d96b1d9e874d08c0464e9114502 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 20 Jun 2024 12:35:35 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
shiltian wrote:
> maybe add a test for non-constant offset?
Hmm, I thought I added all tests...My bad. Will add it right away.
https://github.com/llvm/llvm-project/pull/94576
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https://github.com/llvm/llvm-project/pull/95276
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shiltian wrote:
ping
https://github.com/llvm/llvm-project/pull/94576
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shiltian wrote:
ping
https://github.com/llvm/llvm-project/pull/95276
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@@ -0,0 +1,31 @@
+// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -ast-print %s | FileCheck %s
+// expected-no-diagnostics
+
+extern int bar(int);
+
+int foo(int arg)
+{
+ #pragma omp assume no_openmp_routines
+ {
+auto fn = [](int x) { return bar(x); };
+// CHECK: auto fn =
@@ -0,0 +1,42 @@
+// RUN: %clang_cc1 -verify -fopenmp -ast-print %s | FileCheck %s
+// RUN: %clang_cc1 -fopenmp -x c++ -std=c++11 -emit-pch -o %t %s
+// RUN: %clang_cc1 -fopenmp -std=c++11 -include-pch %t -verify %s -ast-print |
FileCheck %s
+// expected-no-diagnostics
+
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/92731
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https://github.com/shiltian commented:
don't you need more code in AST?
https://github.com/llvm/llvm-project/pull/92731
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https://github.com/llvm/llvm-project/pull/94576
>From b63209bfc103e2606afecd00ef10cf843c37fb2b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 18 Jun 2024 20:50:16 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a builtin for
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/95276
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>From b63209bfc103e2606afecd00ef10cf843c37fb2b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 18 Jun 2024 20:50:16 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a builtin for
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/95276
>From 5bf43d825870999bbb762304e6f407bd0ce1403b Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 18 Jun 2024 20:49:44 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a builtin for
`llvm.amdgcn.make.buffer.rsrc`
https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/94830
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shiltian wrote:
ping
https://github.com/llvm/llvm-project/pull/94830
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https://github.com/shiltian edited
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From 013a40d474e3acaa7a090d5e279f2d8a2f18fbd8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 18:48:33 -0400
Subject: [PATCH 1/3] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,24 @@
+// RUN: %clang_cc1 -triple amdgcn-amd-amdhsa -aux-triple
x86_64-unknown-linux-gnu -fcuda-is-device -fsyntax-only -verify %s
+
+void call_amdgpu_builtins() {
+ __builtin_amdgcn_fence(); // expected-error {{too few arguments to function
call, expected 2, have
@@ -6628,7 +6628,8 @@ ExprResult Sema::BuildCallExpr(Scope *Scope, Expr *Fn,
SourceLocation LParenLoc,
// the parameter type.
if (getLangOpts().HIP && getLangOpts().CUDAIsDevice && FD &&
FD->getBuiltinID()) {
- for (unsigned Idx = 0; Idx <
@@ -33,6 +33,7 @@
// q -> Scalable vector, followed by the number of elements and the base type.
// Q -> target builtin type, followed by a character to distinguish the
builtin type
//Qa -> AArch64 svcount_t builtin type.
+//Qb -> AMDGPU __amdgpu_buffer_rsrc_t
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/95276
>From 013a40d474e3acaa7a090d5e279f2d8a2f18fbd8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 18:48:33 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -33,6 +33,7 @@
// q -> Scalable vector, followed by the number of elements and the base type.
// Q -> target builtin type, followed by a character to distinguish the
builtin type
//Qa -> AArch64 svcount_t builtin type.
+//Qb -> AMDGPU __amdgpu_buffer_rsrc_t
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/95276
>From 013a40d474e3acaa7a090d5e279f2d8a2f18fbd8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 18:48:33 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,95 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -cl-std=CL2.0 -target-cpu
verde -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/95276
>From 013a40d474e3acaa7a090d5e279f2d8a2f18fbd8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 18:48:33 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 013a40d474e3acaa7a090d5e279f2d8a2f18fbd8 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 18:48:33 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
shiltian wrote:
@yxsamliu
https://github.com/llvm/llvm-project/pull/94830
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 913d0761133b5f6f7785e04b23d0a8744e140842 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 15:29:47 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From bc137f40cd524c47094ce39ec4e4d567283fc2da Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 15:19:39 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,17 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -fsyntax-only -verify -std=gnu++11 -triple amdgcn
-Wno-unused-value %s
+
shiltian wrote:
TBH I don't think there is any difference but I added them anyway.
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 15347886bf3327d1a23a2caa65f58cba7ef86fe5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 14:27:09 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 1751b9ed484e88213ba56be9961769bcabf085be Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 17 Jun 2024 14:23:00 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 15ed0af5f5d23213fd4c10ff704ac26bb1b80030 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Sun, 16 Jun 2024 23:07:29 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 7b31bbbd9efd13ea78d1a7bfef00cbd943e27876 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Jun 2024 13:22:17 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,21 @@
+//===-- AMDGPUTypes.def - Metadata about AMDGPU types ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -0,0 +1,84 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --function-signature
+ // REQUIRES: amdgpu-registered-target
+ // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu verde
-emit-llvm -o - %s | FileCheck %s
+ //
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From baa19285069854598437694cb2094283598cf8c2 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 14 Jun 2024 12:58:08 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,69 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+ // REQUIRES: amdgpu-registered-target
+ // RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu verde
-emit-llvm -o - %s | FileCheck %s
+ // RUN: %clang_cc1 -triple
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 24703e0480835fb2c491b7140c2ab5022218777d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 13 Jun 2024 18:43:29 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 2eb6b3a58692ae3b8a6250e87516450a5085fa0f Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 13 Jun 2024 17:02:11 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -0,0 +1,6 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -x hip -aux-triple
amdgcn-amd-amdhsa %s -fsyntax-only -verify
+
+#define __device__ __attribute__((device))
+
+__device__ __amdgcn_buffer_rsrc_t test_buffer_rsrc_t_device() {} //
expected-warning {{non-void
@@ -0,0 +1,6 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -x hip -aux-triple
amdgcn-amd-amdhsa %s -fsyntax-only -verify
+
+#define __device__ __attribute__((device))
+
+__device__ __amdgcn_buffer_rsrc_t test_buffer_rsrc_t_device() {} //
expected-warning {{non-void
@@ -0,0 +1,9 @@
+
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn -emit-llvm -o - %s -debug-info-kind=limited
2>&1 | FileCheck %s
+
+// CHECK: name: "__amdgcn_buffer_rsrc_t",{{.*}}baseType: ![[BT:[0-9]+]]
+// CHECK: [[BT]] = !DICompositeType(tag:
shiltian wrote:
Now `__amdgcn_buffer_rsrc_t` is a 128-bit wide builtin opaque type.
https://github.com/llvm/llvm-project/pull/94830
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From bbe2a055c2448d8caf020d33c7e96a3e3bd75165 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 13 Jun 2024 15:39:02 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/95276
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@@ -0,0 +1,95 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -cl-std=CL2.0 -target-cpu
verde -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple
shiltian wrote:
> I am wondering whether prefix the builtin type with `__amdgcn_` would be
> better since I envision risk of conflicting with reserved names of other
> compilers or standard libraries.
In the patch where the type was introduced we had a brief back-and-forth. I
checked the
@@ -0,0 +1,95 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -cl-std=CL2.0 -target-cpu
verde -emit-llvm -o - %s | FileCheck %s
+// RUN: %clang_cc1 -triple
@@ -0,0 +1,6 @@
+// RUN: %clang_cc1 -triple x86_64-unknown-linux-gnu -x hip -aux-triple
amdgcn-amd-amdhsa %s -fsyntax-only -verify
+
+#define __device__ __attribute__((device))
+
+__device__ __buffer_rsrc_t test_buffer_rsrc_t_device() {} // expected-warning
{{non-void function
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From cbb274f279c918bd0aaa601f87e50a2d10b71c25 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 12 Jun 2024 15:46:55 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/95276
>From 1b06131a10e1f8067961624b02bba3354d5057c0 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 12 Jun 2024 09:18:49 -0400
Subject: [PATCH 1/2] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/95276
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/95276
- **[Clang][AMDGPU] Add a new builtin type for buffer rsrc**
- **[Clang][AMDGPU] Add a builtin for `llvm.amdgcn.make.buffer.rsrc` intrinsic**
>From 1b06131a10e1f8067961624b02bba3354d5057c0 Mon Sep 17 00:00:00
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 1b06131a10e1f8067961624b02bba3354d5057c0 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 12 Jun 2024 09:18:49 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
shiltian wrote:
> how does a user initialize/populate this type of objects? by calling a
> builtin function?
yes. The builtin functions will come next.
https://github.com/llvm/llvm-project/pull/94830
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shiltian wrote:
any comment/concern?
https://github.com/llvm/llvm-project/pull/94830
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https://github.com/llvm/llvm-project/pull/94830
>From 731c2adb3bf69bd1f337691eeb34756e521d47f3 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 10 Jun 2024 15:40:41 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/94830
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@@ -2201,6 +2207,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
Align = 8;
\
break;
#include "clang/Basic/WebAssemblyReferenceTypes.def"
+case BuiltinType::AMDGPUBufferRsrc:
+
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From 57e60fb4d4d37f19ddfbc4a0878b7ee2e180aa2d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 10 Jun 2024 15:23:07 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
@@ -2201,6 +2207,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
Align = 8;
\
break;
#include "clang/Basic/WebAssemblyReferenceTypes.def"
+case BuiltinType::AMDGPUBufferRsrc:
+
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94830
>From b468736cad511e36c7ac22d2ad86ba01ca21d8a5 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Mon, 10 Jun 2024 11:37:17 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/94931
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@@ -0,0 +1,9 @@
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -fclang-abi-compat=latest -triple amdgcn %s -emit-llvm -o -
| FileCheck %s
shiltian wrote:
Copy/paste from other tests Lol
https://github.com/llvm/llvm-project/pull/94830
@@ -0,0 +1,21 @@
+//===-- AMDGPUTypes.def - Metadata about AMDGPU types ---*- C++
-*-===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier:
@@ -2200,6 +2206,9 @@ TypeInfo ASTContext::getTypeInfoImpl(const Type *T) const
{
Align = 8;
\
break;
#include "clang/Basic/WebAssemblyReferenceTypes.def"
+case BuiltinType::AMDGPUBufferRsrc:
+
shiltian wrote:
https://github.com/llvm/llvm-project/pull/94830 for buffer rsrc data type. Will
update this patch afterwards.
https://github.com/llvm/llvm-project/pull/94576
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/94830
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https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/94830
None
>From 891c37a3f6002c40aa0ded803330f61c3d16e6bb Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Fri, 7 Jun 2024 22:37:13 -0400
Subject: [PATCH] [Clang][AMDGPU] Add a new builtin type for buffer rsrc
---
shiltian wrote:
@jayfoad @kzhuravl fixed in
https://github.com/llvm/llvm-project/commit/7eab68026d931860e9c750e8b8b29a2076370d38
https://github.com/llvm/llvm-project/pull/94534
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https://github.com/shiltian closed
https://github.com/llvm/llvm-project/pull/94534
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https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From d520ea7bdc3abe864e1fc76a501189eb094e845d Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 6 Jun 2024 09:49:32 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From 6f7374e4085954ad1ed1d66be154bd14dba658f9 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 6 Jun 2024 09:49:05 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94576
>From 13b2f0446b89c866214b446b1c1653c10a89efcc Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 6 Jun 2024 09:47:40 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
@@ -0,0 +1,264 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
+// REQUIRES: amdgpu-registered-target
+// RUN: %clang_cc1 -triple amdgcn-unknown-unknown -target-cpu verde -emit-llvm
-o - %s | FileCheck %s --check-prefixes=VERDE
+// RUN:
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/94576
None
>From c874a4d69d472a83dfcd11e8c07518e4d216b725 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Thu, 6 Jun 2024 01:46:17 -0400
Subject: [PATCH] [Clang][AMDGPU] Add builtins for instrinsic
@@ -1534,6 +1534,12 @@ def FeatureISAVersion11_5_1 : FeatureSet<
FeatureVGPRSingleUseHintInsts,
Feature1_5xVGPRs])>;
+def FeatureISAVersion11_5_2 : FeatureSet<
shiltian wrote:
GFX1152 is same as GFX1150. In my internal PR, I took @jayfoad 's
https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/94534
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@@ -1534,6 +1534,12 @@ def FeatureISAVersion11_5_1 : FeatureSet<
FeatureVGPRSingleUseHintInsts,
Feature1_5xVGPRs])>;
+def FeatureISAVersion11_5_2 : FeatureSet<
shiltian wrote:
Are they not?
https://github.com/llvm/llvm-project/pull/94534
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94534
>From 1bdb851ff0b21e73228a2f0a6c2752c47de9dda0 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 5 Jun 2024 16:44:09 -0400
Subject: [PATCH] [AMDGPU] Add a new target gfx1152
---
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/94534
None
>From cf1e045d09d18f19bef4a8eb07f86e00f3b6f7a6 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Wed, 5 Jun 2024 16:18:57 -0400
Subject: [PATCH] [AMDGPU] Add a new target gfx1152
---
https://github.com/shiltian approved this pull request.
https://github.com/llvm/llvm-project/pull/94483
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@@ -121,6 +121,11 @@ enum class CudaArch {
GFX1151,
GFX1200,
GFX1201,
+ GFX9_GENERIC,
shiltian wrote:
I think you might want to group them with corresponding non-generic targets
such that we can directly use `>=` and `<=` to compare if a GFX version
https://github.com/shiltian updated
https://github.com/llvm/llvm-project/pull/94376
>From d5ecf4e5f3cd5b7191acf3fd24ef0ac98b8a9f3e Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 4 Jun 2024 15:10:08 -0400
Subject: [PATCH] [Clang][AMDGPU] Use `I` to decorate imm argument for
https://github.com/shiltian created
https://github.com/llvm/llvm-project/pull/94376
None
>From d974ef91f988f803e5904d4b922e8b65390d16a0 Mon Sep 17 00:00:00 2001
From: Shilei Tian
Date: Tue, 4 Jun 2024 12:26:32 -0400
Subject: [PATCH] [Clang][AMDGPU] Use `I` to decorate imm argument for
https://github.com/shiltian approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/93875
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https://github.com/shiltian deleted
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https://github.com/shiltian edited
https://github.com/llvm/llvm-project/pull/93875
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