Author: Simon Pilgrim
Date: 2024-04-08T14:31:46+01:00
New Revision: f139387fb6e76a5249e8d7c2d124565e6b566ef4
URL:
https://github.com/llvm/llvm-project/commit/f139387fb6e76a5249e8d7c2d124565e6b566ef4
DIFF:
https://github.com/llvm/llvm-project/commit/f139387fb6e76a5249e8d7c2d124565e6b566ef4.diff
Author: Simon Pilgrim
Date: 2024-04-09T09:59:57+01:00
New Revision: 4ae33c52f794dbd64924dd006570cdc409c297bc
URL:
https://github.com/llvm/llvm-project/commit/4ae33c52f794dbd64924dd006570cdc409c297bc
DIFF:
https://github.com/llvm/llvm-project/commit/4ae33c52f794dbd64924dd006570cdc409c297bc.diff
@@ -22,7 +22,11 @@ class FunctionPointer final {
const Function *Func;
public:
- FunctionPointer() : Func(nullptr) {}
+ // FIXME: We might want to track the fact that the Function pointer
+ // has been created from an integer and is most likely garbage anyway.
+ Function
Author: Simon Pilgrim
Date: 2024-04-10T17:50:13+01:00
New Revision: 798e04f93769318db857b27f51020e7115e00301
URL:
https://github.com/llvm/llvm-project/commit/798e04f93769318db857b27f51020e7115e00301
DIFF:
https://github.com/llvm/llvm-project/commit/798e04f93769318db857b27f51020e7115e00301.diff
@@ -22,7 +22,11 @@ class FunctionPointer final {
const Function *Func;
public:
- FunctionPointer() : Func(nullptr) {}
+ // FIXME: We might want to track the fact that the Function pointer
+ // has been created from an integer and is most likely garbage anyway.
+ Function
Author: Simon Pilgrim
Date: 2024-04-11T14:02:56+01:00
New Revision: 6fd2fdccf2f28fc155f614eec41f785492aad618
URL:
https://github.com/llvm/llvm-project/commit/6fd2fdccf2f28fc155f614eec41f785492aad618
DIFF:
https://github.com/llvm/llvm-project/commit/6fd2fdccf2f28fc155f614eec41f785492aad618.diff
Pol Marcet =?utf-8?q?Sardà?= ,
Pol Marcet =?utf-8?q?Sardà?= ,
Pol Marcet =?utf-8?q?Sardà?=
Message-ID:
In-Reply-To:
RKSimon wrote:
Other than fixing the ReleaseNotes.rst conflict is there anything outstanding
on this now?
https://github.com/llvm/llvm-project/pull/76615
__
@@ -18515,20 +18515,20 @@ X86TargetLowering::LowerGlobalAddress(SDValue Op,
SelectionDAG &DAG) const {
return LowerGlobalOrExternal(Op, DAG, /*ForCall=*/false);
}
-static SDValue
-GetTLSADDR(SelectionDAG &DAG, SDValue Chain, GlobalAddressSDNode *GA,
- SDValue *InG
@@ -813,3 +813,57 @@ __m128 test_mm_xor_ps(__m128 A, __m128 B) {
// CHECK: xor <4 x i32>
return _mm_xor_ps(A, B);
}
+
+__m128 test_mm_cmp_ps_eq_oq(__m128 a, __m128 b) {
RKSimon wrote:
Move these up (they should be approximately alpha sorted)
https://githu
@@ -2613,6 +2614,24 @@ void CGBuilderInserter::InsertHelper(
// called function.
void CodeGenFunction::checkTargetFeatures(const CallExpr *E,
const FunctionDecl *TargetDecl) {
+ // SemaCheking cannot handle below x86 builtins because t
https://github.com/RKSimon commented:
Should we update the existing SSE/SSE2 cmpeq/cmplt intinsics to use
__builtin_ia32_cmp* instead of __builtin_ia32_cmpeq??/__builtin_ia32_cmplt??
etc?
https://github.com/llvm/llvm-project/pull/84136
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@@ -462,12 +462,12 @@ TARGET_BUILTIN(__builtin_ia32_blendvps256,
"V8fV8fV8fV8f", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufpd256, "V4dV4dV4dIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia32_shufps256, "V8fV8fV8fIi", "ncV:256:", "avx")
TARGET_BUILTIN(__builtin_ia
@@ -1719,3 +1719,57 @@ __m128i test_mm_xor_si128(__m128i A, __m128i B) {
// CHECK: xor <2 x i64> %{{.*}}, %{{.*}}
return _mm_xor_si128(A, B);
}
+
+__m128d test_mm_cmp_pd_eq_oq(__m128d a, __m128d b) {
RKSimon wrote:
Sorting
https://github.com/llvm/llvm-pro
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/84136
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@@ -2940,6 +2940,134 @@ _mm_movemask_ps(__m128 __a)
return __builtin_ia32_movmskps((__v4sf)__a);
}
+/* Compare */
+#define _CMP_EQ_OQ0x00 /* Equal (ordered, non-signaling) */
+#define _CMP_LT_OS0x01 /* Less-than (ordered, signaling) */
+#define _CMP_LE_OS0x02 /
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https://github.com/llvm/llvm-project/pull/84136
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@@ -500,7 +500,7 @@ class HTMLLogger : public Logger {
for (unsigned I = 0; I < CFG.getNumBlockIDs(); ++I) {
std::string Name = blockID(I);
// Rightwards arrow, vertical line
- char ConvergenceMarker[] = u8"\\n\u2192\u007c";
+ char ConvergenceMarker[]
https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/84302
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RKSimon wrote:
> @RKSimon note this will affect what the tooltips show. Is that okay?
I think so - we're just losing the extra info about -1/0 or 1/0 result values?
https://github.com/llvm/llvm-project/pull/83316
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https://github.com/RKSimon approved this pull request.
LGTM - but @pogo59 needs a headup as it will affect some ongoing documentation
cleanup work
https://github.com/llvm/llvm-project/pull/84136
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@@ -4216,6 +4217,95 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned
ROpc, unsigned MOpc,
return CNode;
}
+// When the consumer of a right shift (arithmetic or logical) wouldn't notice
+// the difference if the instruction was a rotate right instead (because the
+//
RKSimon wrote:
@RamaMalladiAWS Do you have examples of the IR that fails to lower to BFI?
These things often turn out to be either a missing middle-end canonicalization
or maybe a case that could be added to existing pattern matching in the
back-end.
https://github.com/llvm/llvm-project/pull/
https://github.com/RKSimon commented:
Please can you add better comments explaining the process
https://github.com/llvm/llvm-project/pull/77529
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@@ -2432,7 +2433,7 @@ class BoUpSLP {
isGatherShuffledEntry(
const TreeEntry *TE, ArrayRef VL, SmallVectorImpl &Mask,
SmallVectorImpl> &Entries,
- unsigned NumParts);
+ unsigned NumParts, bool ForOrder = false);
RKSimon wrote:
Add ForOr
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/77529
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@@ -3779,65 +3780,169 @@ static void reorderOrder(SmallVectorImpl
&Order, ArrayRef Mask,
std::optional
BoUpSLP::findReusedOrderedScalars(const BoUpSLP::TreeEntry &TE) {
assert(TE.State == TreeEntry::NeedToGather && "Expected gather node only.");
- unsigned NumScalars = TE.S
@@ -2418,7 +2418,8 @@ class BoUpSLP {
std::optional
isGatherShuffledSingleRegisterEntry(
const TreeEntry *TE, ArrayRef VL, MutableArrayRef Mask,
- SmallVectorImpl &Entries, unsigned Part);
+ SmallVectorImpl &Entries, unsigned Part,
+ bool ForOrder);
---
@@ -3779,65 +3780,169 @@ static void reorderOrder(SmallVectorImpl
&Order, ArrayRef Mask,
std::optional
BoUpSLP::findReusedOrderedScalars(const BoUpSLP::TreeEntry &TE) {
assert(TE.State == TreeEntry::NeedToGather && "Expected gather node only.");
- unsigned NumScalars = TE.S
@@ -858,7 +858,7 @@ static void addMask(SmallVectorImpl &Mask,
ArrayRef SubMask,
/// values 3 and 7 respectively:
/// before: 6 9 5 4 9 2 1 0
/// after: 6 3 5 4 7 2 1 0
-static void fixupOrderingIndices(SmallVectorImpl &Order) {
+static void fixupOrderingIndices(MutableArra
@@ -0,0 +1,332 @@
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize
-S < %s | FileCheck %s
+
+; Test to verify that when math headers are built with
+; __FINITE_MATH_ONLY__ enabled, causing use of ___finite
+; function versions, vectorization can map
@@ -139,20 +139,77 @@ enum ProcessorFeatures {
FEATURE_AVX512BITALG,
FEATURE_AVX512BF16,
FEATURE_AVX512VP2INTERSECT,
+ FEATURE_3DNOW,
+ FEATURE_ADX = 40,
+ FEATURE_CLDEMOTE = 42,
RKSimon wrote:
Maybe leave in a commented out entry to make that clear?
@@ -2,15 +2,15 @@
; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print"
2>&1 -disable-output -cost-kind=latency -mattr=+sse2 | FileCheck %s
-check-prefixes=SSE,SSE2
; RUN: opt < %s -mtriple=x86_64-unknown-linux-gnu -passes="print"
2>&1 -disable-output -cost-kind=l
https://github.com/RKSimon commented:
Please can you confirm we have tests for underaligned pointers?
https://github.com/llvm/llvm-project/pull/74275
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RKSimon wrote:
@FreddyLeaf Can this be abandoned now?
https://github.com/llvm/llvm-project/pull/76383
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https://github.com/RKSimon approved this pull request.
LGTM. I'd still like to ensure we have unaligned x86 test coverage.
https://github.com/llvm/llvm-project/pull/74275
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RKSimon wrote:
@sdesmalen-arm This appears to be failing on some buildbots:
https://lab.llvm.org/buildbot/#/builders/176/builds/8232
```
llvm-lit:
/home/tcwg-buildbot/worker/clang-aarch64-sve-vls-2stage/llvm/llvm/utils/lit/lit/TestingConfig.py:152:
fatal: unable to parse config file
'/home/tc
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/77964
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@@ -4216,6 +4217,97 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned
ROpc, unsigned MOpc,
return CNode;
}
+// When the consumer of a right shift (arithmetic or logical) wouldn't notice
+// the difference if the instruction was a rotate right instead (because the
+//
@@ -4216,6 +4217,97 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned
ROpc, unsigned MOpc,
return CNode;
}
+// When the consumer of a right shift (arithmetic or logical) wouldn't notice
+// the difference if the instruction was a rotate right instead (because the
+//
https://github.com/RKSimon requested changes to this pull request.
https://github.com/llvm/llvm-project/pull/77964
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@@ -4216,6 +4217,97 @@ MachineSDNode *X86DAGToDAGISel::emitPCMPESTR(unsigned
ROpc, unsigned MOpc,
return CNode;
}
+// When the consumer of a right shift (arithmetic or logical) wouldn't notice
+// the difference if the instruction was a rotate right instead (because the
+//
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/74405
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https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/78330
>From 8f8917528e30d2ba67f669cfd1a893bc85c21121 Mon Sep 17 00:00:00 2001
From: Ammarguellat
Date: Tue, 16 Jan 2024 11:24:03 -0800
Subject: [PATCH 1/4] Fixed a bug in Smith's algorithm and made sure last
option in
@@ -0,0 +1,332 @@
+; RUN: opt -vector-library=AMDLIBM -passes=inject-tli-mappings,loop-vectorize
-S < %s | FileCheck %s
+
+; Test to verify that when math headers are built with
+; __FINITE_MATH_ONLY__ enabled, causing use of ___finite
+; function versions, vectorization can map
@@ -2834,7 +2834,7 @@ ABIArgInfo
X86_64ABIInfo::classifyRegCallStructTypeImpl(QualType Ty, unsigned &NeededInt,
unsigned &NeededSSE,
unsigned &MaxVectorWidth) const {
- auto RT = Ty->getA
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/96888
>From 7f6614d8df9a5ed2027f90d813695bc43f1044b2 Mon Sep 17 00:00:00 2001
From: Simon Pilgrim
Date: Thu, 27 Jun 2024 11:09:32 +0100
Subject: [PATCH] [Sema] LambdaScopeForCallOperatorInstantiationRAII - fix typo
in
RKSimon wrote:
Cheers - I'll push this (without the assert) in a moment - that shouldn't get
in the way of working out why they aren't always paired.
https://github.com/llvm/llvm-project/pull/96888
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@@ -48,6 +48,7 @@ set(sources
X86AvoidStoreForwardingBlocks.cpp
X86DynAllocaExpander.cpp
X86FixupSetCC.cpp
+ X86WinFixupBufferSecurityCheck.cpp
RKSimon wrote:
(style) alpha sorting
https://github.com/llvm/llvm-project/pull/95904
___
@@ -0,0 +1,248 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check Call
RKSimon wrote:
Fix filename and '===// 'comment overflow
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
RKSimon wrote:
X86WinFixupBufferSecurityCheck.cpp
https://github.com/llvm/llvm-project/pull/95904
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@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
@@ -0,0 +1,247 @@
+//=== X86FixupBufferSecurityCheck.cpp Fix Buffer Security Check
Call---===//
+//
+// Part of the LLVM Project, under the Apache License v2.0 with LLVM
Exceptions.
+// See https://llvm.org/LICENSE.txt for license information.
+// SPDX-License-Identifier: Ap
https://github.com/RKSimon commented:
SGTM with a few minors
https://github.com/llvm/llvm-project/pull/95904
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@@ -749,6 +749,11 @@ def TuningUseGLMDivSqrtCosts
: SubtargetFeature<"use-glm-div-sqrt-costs", "UseGLMDivSqrtCosts", "true",
"Use Goldmont specific floating point div/sqrt costs">;
+// Starting with Redwood Cove architecture, the branch has branch taken hint
+// (i
https://github.com/RKSimon edited
https://github.com/llvm/llvm-project/pull/97721
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https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/95904
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https://github.com/RKSimon commented:
Please update the PR subject as its a lot more than just X86AsmParser.cpp
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/RKSimon commented:
Please address the clang-format warnings the CI has reported
https://github.com/llvm/llvm-project/pull/90391
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@@ -0,0 +1,69 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm
-o - | FileCheck -check-prefixes=CHECK,CHECK64 %s
+// RUN: %clang_cc1 -triple i68
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/89362
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RKSimon wrote:
@aniplcc if the x86 builtins handling is causing a problem - could we split
this so the generic c code intrinsics (andn, blsr etc.) are done first?
https://github.com/llvm/llvm-project/pull/94161
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RKSimon wrote:
How easy would it be to add an option for this to update inline asm? I'm not
asking you to do this here, I just want to know if this approach would make it
straightforward to add in the future.
https://github.com/llvm/llvm-project/pull/96860
_
RKSimon wrote:
> > How easy would it be to add an option for this to update inline asm? I'm
> > not asking you to do this here, I just want to know if this approach would
> > make it straightforward to add in the future.
>
> Should we touch the inline asm? (GCC doesn't https://godbolt.org/z/o9
https://github.com/RKSimon approved this pull request.
LGTM - cheers
https://github.com/llvm/llvm-project/pull/96860
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@@ -0,0 +1,97 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm
-o - | FileCheck %s
+// RUN: %clang_cc1 -triple i686-linux-gnu -target-cpu core2
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/87273
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RKSimon wrote:
@Amila-Rukshan please can you rebase this patch? merge is currently failing
https://github.com/llvm/llvm-project/pull/87273
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@@ -0,0 +1,64 @@
+// NOTE: Assertions have been autogenerated by utils/update_cc_test_checks.py
UTC_ARGS: --version 4
+// RUN: %clang_cc1 -triple x86_64-linux-gnu -target-cpu core2 %s -S -emit-llvm
-o - | FileCheck %s
RKSimon wrote:
Please can you add the i686
https://github.com/RKSimon closed
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@@ -728,7 +728,7 @@ class IRIntrinsicResult : public Result {
std::vector ParamTypes;
std::vector Args;
IRIntrinsicResult(StringRef IntrinsicID, std::vector
ParamTypes,
RKSimon wrote:
std::vector ParamTypes?
https://github.com/llvm/llvm-project/pull/89
@@ -660,7 +660,7 @@ class IRBuilderResult : public Result {
std::map IntegerArgs;
IRBuilderResult(StringRef CallPrefix, std::vector Args,
std::set AddressArgs,
RKSimon wrote:
std::set AddressArgs?
https://github.com/llvm/llvm-project/pul
@@ -660,7 +660,7 @@ class IRBuilderResult : public Result {
std::map IntegerArgs;
IRBuilderResult(StringRef CallPrefix, std::vector Args,
RKSimon wrote:
std::vector Args?
https://github.com/llvm/llvm-project/pull/89202
_
https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/89551
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@@ -285,7 +285,7 @@ define i32 @xunp(ptr %p) nounwind readnone {
; BMI264-NEXT:rorxl $7, (%rdi), %eax
; BMI264-NEXT:retq
entry:
-; shld-label: xunp:
+; shld-LABEL: xunp:
; shld: shldl $25
RKSimon wrote:
remove these 2 checks (the auto checks above cov
https://github.com/RKSimon updated
https://github.com/llvm/llvm-project/pull/92055
>From 6946c9f1285d5a27eafcdbf13f79c0641736198d Mon Sep 17 00:00:00 2001
From: Sunil Kuravinakop
Date: Thu, 9 May 2024 12:09:15 -0500
Subject: [PATCH 1/3] Avoiding DeclRefExpr with "non_odr_use_unevaluated" to
de
@@ -3019,6 +3019,26 @@ C-style cast applied to each element of the first
argument.
Query for this feature with ``__has_builtin(__builtin_convertvector)``.
+``__builtin_selectvector``
+--
+
+``__builtin_selectvector`` is used to express generic vector
@@ -232,225 +232,225 @@ typedef char __v2qi __attribute__((__vector_size__(2)));
static __inline__ __m256i __DEFAULT_FN_ATTRS256
_mm256_mask_add_epi32(__m256i __W, __mmask8 __U, __m256i __A, __m256i __B)
{
- return (__m256i)__builtin_ia32_selectd_256((__mmask8)__U,
-
https://github.com/RKSimon commented:
constexpr handling?
https://github.com/llvm/llvm-project/pull/91306
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@@ -139,6 +139,9 @@ Changes to the Windows Target
Changes to the X86 Backend
--
+- Removed knl/knm specific ISA lowerings: AVX512PF, AVX512ER, PREFETCHWT1,
RKSimon wrote:
"ISA intrinsics" instead?
https://github.com/llvm/llvm-project/
https://github.com/RKSimon approved this pull request.
LGTM with one minor
https://github.com/llvm/llvm-project/pull/92883
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RKSimon wrote:
@endilll Thanks for working on this - out of interest are you intending to do
this for CGBuiltin as well? Is the plan to no longer have to include all target
builtins in all clang builds?
https://github.com/llvm/llvm-project/pull/93098
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RKSimon wrote:
Not sure - CI checks aren't running either
https://github.com/llvm/llvm-project/pull/93136
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Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 4bb6974a87e495f19faea4b13475a65e842473f0
URL:
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0
DIFF:
https://github.com/llvm/llvm-project/commit/4bb6974a87e495f19faea4b13475a65e842473f0.diff
Author: Simon Pilgrim
Date: 2024-05-29T10:38:03+01:00
New Revision: 9c42ed1371ee8c211aedcfe8aed16662a9befb69
URL:
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69
DIFF:
https://github.com/llvm/llvm-project/commit/9c42ed1371ee8c211aedcfe8aed16662a9befb69.diff
Author: Simon Pilgrim
Date: 2024-05-29T10:38:02+01:00
New Revision: f3fb7f569936db418feef98e4ae68777a9a4cd2a
URL:
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a
DIFF:
https://github.com/llvm/llvm-project/commit/f3fb7f569936db418feef98e4ae68777a9a4cd2a.diff
@@ -63,6 +63,91 @@ unsigned __int64 test__emulu(unsigned int a, unsigned int b)
{
// CHECK: [[RES:%[0-9]+]] = mul nuw i64 [[Y]], [[X]]
// CHECK: ret i64 [[RES]]
+//
+// CHECK-I386-LABEL: define dso_local noundef i32 @test_outp(
+// CHECK-I386-SAME: i16 noundef zeroext [[PORT:
RKSimon wrote:
@FreddyLeaf This is corrupting git checkouts on windows - please can you revert
?
https://github.com/llvm/llvm-project/pull/92338
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https://github.com/RKSimon approved this pull request.
LGTM
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/RKSimon closed
https://github.com/llvm/llvm-project/pull/90391
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https://github.com/RKSimon commented:
Maybe add a line to ReleaseNotes? But otherwise SGTM
https://github.com/llvm/llvm-project/pull/93774
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https://github.com/RKSimon commented:
Maybe add this to ReleaseNotes?
https://github.com/llvm/llvm-project/pull/93804
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RKSimon wrote:
Would it make sense to add a new header (SemaUtils.h? SemaTargetUtils.h?) to
move most of the exposed templated helpers to instead of Sema.h?
https://github.com/llvm/llvm-project/pull/93966
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Author: Simon Pilgrim
Date: 2024-06-19T16:55:33+01:00
New Revision: f7c96d5733915c4ea30dbd7852faffc9cef4aca9
URL:
https://github.com/llvm/llvm-project/commit/f7c96d5733915c4ea30dbd7852faffc9cef4aca9
DIFF:
https://github.com/llvm/llvm-project/commit/f7c96d5733915c4ea30dbd7852faffc9cef4aca9.diff
RKSimon wrote:
I'd prefer we rip off ALL the 3dnow/mmx bandaid in one big series of patches -
and not split across the 19.X/20.X releases.
So can we get all the mmx patches done in time for the 19.0 branch?
Also, this "might" have bigger impact than the KNL changes - should we announce
the p
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